Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
f2cb1360 IM |
2 | /* |
3 | * Scheduler topology setup/handling methods | |
4 | */ | |
f2cb1360 IM |
5 | #include "sched.h" |
6 | ||
7 | DEFINE_MUTEX(sched_domains_mutex); | |
8 | ||
9 | /* Protected by sched_domains_mutex: */ | |
ace80310 | 10 | static cpumask_var_t sched_domains_tmpmask; |
11 | static cpumask_var_t sched_domains_tmpmask2; | |
f2cb1360 IM |
12 | |
13 | #ifdef CONFIG_SCHED_DEBUG | |
14 | ||
f2cb1360 IM |
15 | static int __init sched_debug_setup(char *str) |
16 | { | |
9469eb01 | 17 | sched_debug_enabled = true; |
f2cb1360 IM |
18 | |
19 | return 0; | |
20 | } | |
21 | early_param("sched_debug", sched_debug_setup); | |
22 | ||
23 | static inline bool sched_debug(void) | |
24 | { | |
25 | return sched_debug_enabled; | |
26 | } | |
27 | ||
28 | static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level, | |
29 | struct cpumask *groupmask) | |
30 | { | |
31 | struct sched_group *group = sd->groups; | |
32 | ||
33 | cpumask_clear(groupmask); | |
34 | ||
005f874d | 35 | printk(KERN_DEBUG "%*s domain-%d: ", level, "", level); |
f2cb1360 IM |
36 | |
37 | if (!(sd->flags & SD_LOAD_BALANCE)) { | |
38 | printk("does not load-balance\n"); | |
39 | if (sd->parent) | |
97fb7a0a | 40 | printk(KERN_ERR "ERROR: !SD_LOAD_BALANCE domain has parent"); |
f2cb1360 IM |
41 | return -1; |
42 | } | |
43 | ||
005f874d | 44 | printk(KERN_CONT "span=%*pbl level=%s\n", |
f2cb1360 IM |
45 | cpumask_pr_args(sched_domain_span(sd)), sd->name); |
46 | ||
47 | if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) { | |
97fb7a0a | 48 | printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu); |
f2cb1360 | 49 | } |
6cd0c583 | 50 | if (group && !cpumask_test_cpu(cpu, sched_group_span(group))) { |
97fb7a0a | 51 | printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu); |
f2cb1360 IM |
52 | } |
53 | ||
54 | printk(KERN_DEBUG "%*s groups:", level + 1, ""); | |
55 | do { | |
56 | if (!group) { | |
57 | printk("\n"); | |
58 | printk(KERN_ERR "ERROR: group is NULL\n"); | |
59 | break; | |
60 | } | |
61 | ||
ae4df9d6 | 62 | if (!cpumask_weight(sched_group_span(group))) { |
f2cb1360 IM |
63 | printk(KERN_CONT "\n"); |
64 | printk(KERN_ERR "ERROR: empty group\n"); | |
65 | break; | |
66 | } | |
67 | ||
68 | if (!(sd->flags & SD_OVERLAP) && | |
ae4df9d6 | 69 | cpumask_intersects(groupmask, sched_group_span(group))) { |
f2cb1360 IM |
70 | printk(KERN_CONT "\n"); |
71 | printk(KERN_ERR "ERROR: repeated CPUs\n"); | |
72 | break; | |
73 | } | |
74 | ||
ae4df9d6 | 75 | cpumask_or(groupmask, groupmask, sched_group_span(group)); |
f2cb1360 | 76 | |
005f874d PZ |
77 | printk(KERN_CONT " %d:{ span=%*pbl", |
78 | group->sgc->id, | |
ae4df9d6 | 79 | cpumask_pr_args(sched_group_span(group))); |
b0151c25 | 80 | |
af218122 | 81 | if ((sd->flags & SD_OVERLAP) && |
ae4df9d6 | 82 | !cpumask_equal(group_balance_mask(group), sched_group_span(group))) { |
005f874d | 83 | printk(KERN_CONT " mask=%*pbl", |
e5c14b1f | 84 | cpumask_pr_args(group_balance_mask(group))); |
b0151c25 PZ |
85 | } |
86 | ||
005f874d PZ |
87 | if (group->sgc->capacity != SCHED_CAPACITY_SCALE) |
88 | printk(KERN_CONT " cap=%lu", group->sgc->capacity); | |
f2cb1360 | 89 | |
a420b063 PZ |
90 | if (group == sd->groups && sd->child && |
91 | !cpumask_equal(sched_domain_span(sd->child), | |
ae4df9d6 | 92 | sched_group_span(group))) { |
a420b063 PZ |
93 | printk(KERN_ERR "ERROR: domain->groups does not match domain->child\n"); |
94 | } | |
95 | ||
005f874d PZ |
96 | printk(KERN_CONT " }"); |
97 | ||
f2cb1360 | 98 | group = group->next; |
b0151c25 PZ |
99 | |
100 | if (group != sd->groups) | |
101 | printk(KERN_CONT ","); | |
102 | ||
f2cb1360 IM |
103 | } while (group != sd->groups); |
104 | printk(KERN_CONT "\n"); | |
105 | ||
106 | if (!cpumask_equal(sched_domain_span(sd), groupmask)) | |
107 | printk(KERN_ERR "ERROR: groups don't span domain->span\n"); | |
108 | ||
109 | if (sd->parent && | |
110 | !cpumask_subset(groupmask, sched_domain_span(sd->parent))) | |
97fb7a0a | 111 | printk(KERN_ERR "ERROR: parent span is not a superset of domain->span\n"); |
f2cb1360 IM |
112 | return 0; |
113 | } | |
114 | ||
115 | static void sched_domain_debug(struct sched_domain *sd, int cpu) | |
116 | { | |
117 | int level = 0; | |
118 | ||
119 | if (!sched_debug_enabled) | |
120 | return; | |
121 | ||
122 | if (!sd) { | |
123 | printk(KERN_DEBUG "CPU%d attaching NULL sched-domain.\n", cpu); | |
124 | return; | |
125 | } | |
126 | ||
005f874d | 127 | printk(KERN_DEBUG "CPU%d attaching sched-domain(s):\n", cpu); |
f2cb1360 IM |
128 | |
129 | for (;;) { | |
130 | if (sched_domain_debug_one(sd, cpu, level, sched_domains_tmpmask)) | |
131 | break; | |
132 | level++; | |
133 | sd = sd->parent; | |
134 | if (!sd) | |
135 | break; | |
136 | } | |
137 | } | |
138 | #else /* !CONFIG_SCHED_DEBUG */ | |
139 | ||
140 | # define sched_debug_enabled 0 | |
141 | # define sched_domain_debug(sd, cpu) do { } while (0) | |
142 | static inline bool sched_debug(void) | |
143 | { | |
144 | return false; | |
145 | } | |
146 | #endif /* CONFIG_SCHED_DEBUG */ | |
147 | ||
148 | static int sd_degenerate(struct sched_domain *sd) | |
149 | { | |
150 | if (cpumask_weight(sched_domain_span(sd)) == 1) | |
151 | return 1; | |
152 | ||
153 | /* Following flags need at least 2 groups */ | |
154 | if (sd->flags & (SD_LOAD_BALANCE | | |
155 | SD_BALANCE_NEWIDLE | | |
156 | SD_BALANCE_FORK | | |
157 | SD_BALANCE_EXEC | | |
158 | SD_SHARE_CPUCAPACITY | | |
159 | SD_ASYM_CPUCAPACITY | | |
160 | SD_SHARE_PKG_RESOURCES | | |
161 | SD_SHARE_POWERDOMAIN)) { | |
162 | if (sd->groups != sd->groups->next) | |
163 | return 0; | |
164 | } | |
165 | ||
166 | /* Following flags don't use groups */ | |
167 | if (sd->flags & (SD_WAKE_AFFINE)) | |
168 | return 0; | |
169 | ||
170 | return 1; | |
171 | } | |
172 | ||
173 | static int | |
174 | sd_parent_degenerate(struct sched_domain *sd, struct sched_domain *parent) | |
175 | { | |
176 | unsigned long cflags = sd->flags, pflags = parent->flags; | |
177 | ||
178 | if (sd_degenerate(parent)) | |
179 | return 1; | |
180 | ||
181 | if (!cpumask_equal(sched_domain_span(sd), sched_domain_span(parent))) | |
182 | return 0; | |
183 | ||
184 | /* Flags needing groups don't count if only 1 group in parent */ | |
185 | if (parent->groups == parent->groups->next) { | |
186 | pflags &= ~(SD_LOAD_BALANCE | | |
187 | SD_BALANCE_NEWIDLE | | |
188 | SD_BALANCE_FORK | | |
189 | SD_BALANCE_EXEC | | |
190 | SD_ASYM_CPUCAPACITY | | |
191 | SD_SHARE_CPUCAPACITY | | |
192 | SD_SHARE_PKG_RESOURCES | | |
193 | SD_PREFER_SIBLING | | |
194 | SD_SHARE_POWERDOMAIN); | |
195 | if (nr_node_ids == 1) | |
196 | pflags &= ~SD_SERIALIZE; | |
197 | } | |
198 | if (~cflags & pflags) | |
199 | return 0; | |
200 | ||
201 | return 1; | |
202 | } | |
203 | ||
1f74de87 | 204 | DEFINE_STATIC_KEY_FALSE(sched_energy_present); |
531b5c9f QP |
205 | #if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL) |
206 | DEFINE_MUTEX(sched_energy_mutex); | |
207 | bool sched_energy_update; | |
208 | ||
6aa140fa QP |
209 | static void free_pd(struct perf_domain *pd) |
210 | { | |
211 | struct perf_domain *tmp; | |
212 | ||
213 | while (pd) { | |
214 | tmp = pd->next; | |
215 | kfree(pd); | |
216 | pd = tmp; | |
217 | } | |
218 | } | |
219 | ||
220 | static struct perf_domain *find_pd(struct perf_domain *pd, int cpu) | |
221 | { | |
222 | while (pd) { | |
223 | if (cpumask_test_cpu(cpu, perf_domain_span(pd))) | |
224 | return pd; | |
225 | pd = pd->next; | |
226 | } | |
227 | ||
228 | return NULL; | |
229 | } | |
230 | ||
231 | static struct perf_domain *pd_init(int cpu) | |
232 | { | |
233 | struct em_perf_domain *obj = em_cpu_get(cpu); | |
234 | struct perf_domain *pd; | |
235 | ||
236 | if (!obj) { | |
237 | if (sched_debug()) | |
238 | pr_info("%s: no EM found for CPU%d\n", __func__, cpu); | |
239 | return NULL; | |
240 | } | |
241 | ||
242 | pd = kzalloc(sizeof(*pd), GFP_KERNEL); | |
243 | if (!pd) | |
244 | return NULL; | |
245 | pd->em_pd = obj; | |
246 | ||
247 | return pd; | |
248 | } | |
249 | ||
250 | static void perf_domain_debug(const struct cpumask *cpu_map, | |
251 | struct perf_domain *pd) | |
252 | { | |
253 | if (!sched_debug() || !pd) | |
254 | return; | |
255 | ||
256 | printk(KERN_DEBUG "root_domain %*pbl:", cpumask_pr_args(cpu_map)); | |
257 | ||
258 | while (pd) { | |
259 | printk(KERN_CONT " pd%d:{ cpus=%*pbl nr_cstate=%d }", | |
260 | cpumask_first(perf_domain_span(pd)), | |
261 | cpumask_pr_args(perf_domain_span(pd)), | |
262 | em_pd_nr_cap_states(pd->em_pd)); | |
263 | pd = pd->next; | |
264 | } | |
265 | ||
266 | printk(KERN_CONT "\n"); | |
267 | } | |
268 | ||
269 | static void destroy_perf_domain_rcu(struct rcu_head *rp) | |
270 | { | |
271 | struct perf_domain *pd; | |
272 | ||
273 | pd = container_of(rp, struct perf_domain, rcu); | |
274 | free_pd(pd); | |
275 | } | |
276 | ||
1f74de87 QP |
277 | static void sched_energy_set(bool has_eas) |
278 | { | |
279 | if (!has_eas && static_branch_unlikely(&sched_energy_present)) { | |
280 | if (sched_debug()) | |
281 | pr_info("%s: stopping EAS\n", __func__); | |
282 | static_branch_disable_cpuslocked(&sched_energy_present); | |
283 | } else if (has_eas && !static_branch_unlikely(&sched_energy_present)) { | |
284 | if (sched_debug()) | |
285 | pr_info("%s: starting EAS\n", __func__); | |
286 | static_branch_enable_cpuslocked(&sched_energy_present); | |
287 | } | |
288 | } | |
289 | ||
b68a4c0d QP |
290 | /* |
291 | * EAS can be used on a root domain if it meets all the following conditions: | |
292 | * 1. an Energy Model (EM) is available; | |
293 | * 2. the SD_ASYM_CPUCAPACITY flag is set in the sched_domain hierarchy. | |
294 | * 3. the EM complexity is low enough to keep scheduling overheads low; | |
531b5c9f | 295 | * 4. schedutil is driving the frequency of all CPUs of the rd; |
b68a4c0d QP |
296 | * |
297 | * The complexity of the Energy Model is defined as: | |
298 | * | |
299 | * C = nr_pd * (nr_cpus + nr_cs) | |
300 | * | |
301 | * with parameters defined as: | |
302 | * - nr_pd: the number of performance domains | |
303 | * - nr_cpus: the number of CPUs | |
304 | * - nr_cs: the sum of the number of capacity states of all performance | |
305 | * domains (for example, on a system with 2 performance domains, | |
306 | * with 10 capacity states each, nr_cs = 2 * 10 = 20). | |
307 | * | |
308 | * It is generally not a good idea to use such a model in the wake-up path on | |
309 | * very complex platforms because of the associated scheduling overheads. The | |
310 | * arbitrary constraint below prevents that. It makes EAS usable up to 16 CPUs | |
311 | * with per-CPU DVFS and less than 8 capacity states each, for example. | |
312 | */ | |
313 | #define EM_MAX_COMPLEXITY 2048 | |
314 | ||
531b5c9f | 315 | extern struct cpufreq_governor schedutil_gov; |
1f74de87 | 316 | static bool build_perf_domains(const struct cpumask *cpu_map) |
6aa140fa | 317 | { |
b68a4c0d | 318 | int i, nr_pd = 0, nr_cs = 0, nr_cpus = cpumask_weight(cpu_map); |
6aa140fa QP |
319 | struct perf_domain *pd = NULL, *tmp; |
320 | int cpu = cpumask_first(cpu_map); | |
321 | struct root_domain *rd = cpu_rq(cpu)->rd; | |
531b5c9f QP |
322 | struct cpufreq_policy *policy; |
323 | struct cpufreq_governor *gov; | |
b68a4c0d QP |
324 | |
325 | /* EAS is enabled for asymmetric CPU capacity topologies. */ | |
326 | if (!per_cpu(sd_asym_cpucapacity, cpu)) { | |
327 | if (sched_debug()) { | |
328 | pr_info("rd %*pbl: CPUs do not have asymmetric capacities\n", | |
329 | cpumask_pr_args(cpu_map)); | |
330 | } | |
331 | goto free; | |
332 | } | |
6aa140fa QP |
333 | |
334 | for_each_cpu(i, cpu_map) { | |
335 | /* Skip already covered CPUs. */ | |
336 | if (find_pd(pd, i)) | |
337 | continue; | |
338 | ||
531b5c9f QP |
339 | /* Do not attempt EAS if schedutil is not being used. */ |
340 | policy = cpufreq_cpu_get(i); | |
341 | if (!policy) | |
342 | goto free; | |
343 | gov = policy->governor; | |
344 | cpufreq_cpu_put(policy); | |
345 | if (gov != &schedutil_gov) { | |
346 | if (rd->pd) | |
347 | pr_warn("rd %*pbl: Disabling EAS, schedutil is mandatory\n", | |
348 | cpumask_pr_args(cpu_map)); | |
349 | goto free; | |
350 | } | |
351 | ||
6aa140fa QP |
352 | /* Create the new pd and add it to the local list. */ |
353 | tmp = pd_init(i); | |
354 | if (!tmp) | |
355 | goto free; | |
356 | tmp->next = pd; | |
357 | pd = tmp; | |
b68a4c0d QP |
358 | |
359 | /* | |
360 | * Count performance domains and capacity states for the | |
361 | * complexity check. | |
362 | */ | |
363 | nr_pd++; | |
364 | nr_cs += em_pd_nr_cap_states(pd->em_pd); | |
365 | } | |
366 | ||
367 | /* Bail out if the Energy Model complexity is too high. */ | |
368 | if (nr_pd * (nr_cs + nr_cpus) > EM_MAX_COMPLEXITY) { | |
369 | WARN(1, "rd %*pbl: Failed to start EAS, EM complexity is too high\n", | |
370 | cpumask_pr_args(cpu_map)); | |
371 | goto free; | |
6aa140fa QP |
372 | } |
373 | ||
374 | perf_domain_debug(cpu_map, pd); | |
375 | ||
376 | /* Attach the new list of performance domains to the root domain. */ | |
377 | tmp = rd->pd; | |
378 | rcu_assign_pointer(rd->pd, pd); | |
379 | if (tmp) | |
380 | call_rcu(&tmp->rcu, destroy_perf_domain_rcu); | |
381 | ||
1f74de87 | 382 | return !!pd; |
6aa140fa QP |
383 | |
384 | free: | |
385 | free_pd(pd); | |
386 | tmp = rd->pd; | |
387 | rcu_assign_pointer(rd->pd, NULL); | |
388 | if (tmp) | |
389 | call_rcu(&tmp->rcu, destroy_perf_domain_rcu); | |
1f74de87 QP |
390 | |
391 | return false; | |
6aa140fa QP |
392 | } |
393 | #else | |
394 | static void free_pd(struct perf_domain *pd) { } | |
531b5c9f | 395 | #endif /* CONFIG_ENERGY_MODEL && CONFIG_CPU_FREQ_GOV_SCHEDUTIL*/ |
6aa140fa | 396 | |
f2cb1360 IM |
397 | static void free_rootdomain(struct rcu_head *rcu) |
398 | { | |
399 | struct root_domain *rd = container_of(rcu, struct root_domain, rcu); | |
400 | ||
401 | cpupri_cleanup(&rd->cpupri); | |
402 | cpudl_cleanup(&rd->cpudl); | |
403 | free_cpumask_var(rd->dlo_mask); | |
404 | free_cpumask_var(rd->rto_mask); | |
405 | free_cpumask_var(rd->online); | |
406 | free_cpumask_var(rd->span); | |
6aa140fa | 407 | free_pd(rd->pd); |
f2cb1360 IM |
408 | kfree(rd); |
409 | } | |
410 | ||
411 | void rq_attach_root(struct rq *rq, struct root_domain *rd) | |
412 | { | |
413 | struct root_domain *old_rd = NULL; | |
414 | unsigned long flags; | |
415 | ||
416 | raw_spin_lock_irqsave(&rq->lock, flags); | |
417 | ||
418 | if (rq->rd) { | |
419 | old_rd = rq->rd; | |
420 | ||
421 | if (cpumask_test_cpu(rq->cpu, old_rd->online)) | |
422 | set_rq_offline(rq); | |
423 | ||
424 | cpumask_clear_cpu(rq->cpu, old_rd->span); | |
425 | ||
426 | /* | |
427 | * If we dont want to free the old_rd yet then | |
428 | * set old_rd to NULL to skip the freeing later | |
429 | * in this function: | |
430 | */ | |
431 | if (!atomic_dec_and_test(&old_rd->refcount)) | |
432 | old_rd = NULL; | |
433 | } | |
434 | ||
435 | atomic_inc(&rd->refcount); | |
436 | rq->rd = rd; | |
437 | ||
438 | cpumask_set_cpu(rq->cpu, rd->span); | |
439 | if (cpumask_test_cpu(rq->cpu, cpu_active_mask)) | |
440 | set_rq_online(rq); | |
441 | ||
442 | raw_spin_unlock_irqrestore(&rq->lock, flags); | |
443 | ||
444 | if (old_rd) | |
445 | call_rcu_sched(&old_rd->rcu, free_rootdomain); | |
446 | } | |
447 | ||
364f5665 SRV |
448 | void sched_get_rd(struct root_domain *rd) |
449 | { | |
450 | atomic_inc(&rd->refcount); | |
451 | } | |
452 | ||
453 | void sched_put_rd(struct root_domain *rd) | |
454 | { | |
455 | if (!atomic_dec_and_test(&rd->refcount)) | |
456 | return; | |
457 | ||
458 | call_rcu_sched(&rd->rcu, free_rootdomain); | |
459 | } | |
460 | ||
f2cb1360 IM |
461 | static int init_rootdomain(struct root_domain *rd) |
462 | { | |
f2cb1360 IM |
463 | if (!zalloc_cpumask_var(&rd->span, GFP_KERNEL)) |
464 | goto out; | |
465 | if (!zalloc_cpumask_var(&rd->online, GFP_KERNEL)) | |
466 | goto free_span; | |
467 | if (!zalloc_cpumask_var(&rd->dlo_mask, GFP_KERNEL)) | |
468 | goto free_online; | |
469 | if (!zalloc_cpumask_var(&rd->rto_mask, GFP_KERNEL)) | |
470 | goto free_dlo_mask; | |
471 | ||
4bdced5c SRRH |
472 | #ifdef HAVE_RT_PUSH_IPI |
473 | rd->rto_cpu = -1; | |
474 | raw_spin_lock_init(&rd->rto_lock); | |
475 | init_irq_work(&rd->rto_push_work, rto_push_irq_work_func); | |
476 | #endif | |
477 | ||
f2cb1360 IM |
478 | init_dl_bw(&rd->dl_bw); |
479 | if (cpudl_init(&rd->cpudl) != 0) | |
480 | goto free_rto_mask; | |
481 | ||
482 | if (cpupri_init(&rd->cpupri) != 0) | |
483 | goto free_cpudl; | |
484 | return 0; | |
485 | ||
486 | free_cpudl: | |
487 | cpudl_cleanup(&rd->cpudl); | |
488 | free_rto_mask: | |
489 | free_cpumask_var(rd->rto_mask); | |
490 | free_dlo_mask: | |
491 | free_cpumask_var(rd->dlo_mask); | |
492 | free_online: | |
493 | free_cpumask_var(rd->online); | |
494 | free_span: | |
495 | free_cpumask_var(rd->span); | |
496 | out: | |
497 | return -ENOMEM; | |
498 | } | |
499 | ||
500 | /* | |
501 | * By default the system creates a single root-domain with all CPUs as | |
502 | * members (mimicking the global state we have today). | |
503 | */ | |
504 | struct root_domain def_root_domain; | |
505 | ||
506 | void init_defrootdomain(void) | |
507 | { | |
508 | init_rootdomain(&def_root_domain); | |
509 | ||
510 | atomic_set(&def_root_domain.refcount, 1); | |
511 | } | |
512 | ||
513 | static struct root_domain *alloc_rootdomain(void) | |
514 | { | |
515 | struct root_domain *rd; | |
516 | ||
4d13a06d | 517 | rd = kzalloc(sizeof(*rd), GFP_KERNEL); |
f2cb1360 IM |
518 | if (!rd) |
519 | return NULL; | |
520 | ||
521 | if (init_rootdomain(rd) != 0) { | |
522 | kfree(rd); | |
523 | return NULL; | |
524 | } | |
525 | ||
526 | return rd; | |
527 | } | |
528 | ||
529 | static void free_sched_groups(struct sched_group *sg, int free_sgc) | |
530 | { | |
531 | struct sched_group *tmp, *first; | |
532 | ||
533 | if (!sg) | |
534 | return; | |
535 | ||
536 | first = sg; | |
537 | do { | |
538 | tmp = sg->next; | |
539 | ||
540 | if (free_sgc && atomic_dec_and_test(&sg->sgc->ref)) | |
541 | kfree(sg->sgc); | |
542 | ||
213c5a45 SW |
543 | if (atomic_dec_and_test(&sg->ref)) |
544 | kfree(sg); | |
f2cb1360 IM |
545 | sg = tmp; |
546 | } while (sg != first); | |
547 | } | |
548 | ||
549 | static void destroy_sched_domain(struct sched_domain *sd) | |
550 | { | |
551 | /* | |
a090c4f2 PZ |
552 | * A normal sched domain may have multiple group references, an |
553 | * overlapping domain, having private groups, only one. Iterate, | |
554 | * dropping group/capacity references, freeing where none remain. | |
f2cb1360 | 555 | */ |
213c5a45 SW |
556 | free_sched_groups(sd->groups, 1); |
557 | ||
f2cb1360 IM |
558 | if (sd->shared && atomic_dec_and_test(&sd->shared->ref)) |
559 | kfree(sd->shared); | |
560 | kfree(sd); | |
561 | } | |
562 | ||
563 | static void destroy_sched_domains_rcu(struct rcu_head *rcu) | |
564 | { | |
565 | struct sched_domain *sd = container_of(rcu, struct sched_domain, rcu); | |
566 | ||
567 | while (sd) { | |
568 | struct sched_domain *parent = sd->parent; | |
569 | destroy_sched_domain(sd); | |
570 | sd = parent; | |
571 | } | |
572 | } | |
573 | ||
574 | static void destroy_sched_domains(struct sched_domain *sd) | |
575 | { | |
576 | if (sd) | |
577 | call_rcu(&sd->rcu, destroy_sched_domains_rcu); | |
578 | } | |
579 | ||
580 | /* | |
581 | * Keep a special pointer to the highest sched_domain that has | |
582 | * SD_SHARE_PKG_RESOURCE set (Last Level Cache Domain) for this | |
583 | * allows us to avoid some pointer chasing select_idle_sibling(). | |
584 | * | |
585 | * Also keep a unique ID per domain (we use the first CPU number in | |
586 | * the cpumask of the domain), this allows us to quickly tell if | |
587 | * two CPUs are in the same cache domain, see cpus_share_cache(). | |
588 | */ | |
589 | DEFINE_PER_CPU(struct sched_domain *, sd_llc); | |
590 | DEFINE_PER_CPU(int, sd_llc_size); | |
591 | DEFINE_PER_CPU(int, sd_llc_id); | |
592 | DEFINE_PER_CPU(struct sched_domain_shared *, sd_llc_shared); | |
593 | DEFINE_PER_CPU(struct sched_domain *, sd_numa); | |
011b27bb QP |
594 | DEFINE_PER_CPU(struct sched_domain *, sd_asym_packing); |
595 | DEFINE_PER_CPU(struct sched_domain *, sd_asym_cpucapacity); | |
df054e84 | 596 | DEFINE_STATIC_KEY_FALSE(sched_asym_cpucapacity); |
f2cb1360 IM |
597 | |
598 | static void update_top_cache_domain(int cpu) | |
599 | { | |
600 | struct sched_domain_shared *sds = NULL; | |
601 | struct sched_domain *sd; | |
602 | int id = cpu; | |
603 | int size = 1; | |
604 | ||
605 | sd = highest_flag_domain(cpu, SD_SHARE_PKG_RESOURCES); | |
606 | if (sd) { | |
607 | id = cpumask_first(sched_domain_span(sd)); | |
608 | size = cpumask_weight(sched_domain_span(sd)); | |
609 | sds = sd->shared; | |
610 | } | |
611 | ||
612 | rcu_assign_pointer(per_cpu(sd_llc, cpu), sd); | |
613 | per_cpu(sd_llc_size, cpu) = size; | |
614 | per_cpu(sd_llc_id, cpu) = id; | |
615 | rcu_assign_pointer(per_cpu(sd_llc_shared, cpu), sds); | |
616 | ||
617 | sd = lowest_flag_domain(cpu, SD_NUMA); | |
618 | rcu_assign_pointer(per_cpu(sd_numa, cpu), sd); | |
619 | ||
620 | sd = highest_flag_domain(cpu, SD_ASYM_PACKING); | |
011b27bb QP |
621 | rcu_assign_pointer(per_cpu(sd_asym_packing, cpu), sd); |
622 | ||
623 | sd = lowest_flag_domain(cpu, SD_ASYM_CPUCAPACITY); | |
624 | rcu_assign_pointer(per_cpu(sd_asym_cpucapacity, cpu), sd); | |
f2cb1360 IM |
625 | } |
626 | ||
627 | /* | |
628 | * Attach the domain 'sd' to 'cpu' as its base domain. Callers must | |
629 | * hold the hotplug lock. | |
630 | */ | |
631 | static void | |
632 | cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu) | |
633 | { | |
634 | struct rq *rq = cpu_rq(cpu); | |
635 | struct sched_domain *tmp; | |
636 | ||
637 | /* Remove the sched domains which do not contribute to scheduling. */ | |
638 | for (tmp = sd; tmp; ) { | |
639 | struct sched_domain *parent = tmp->parent; | |
640 | if (!parent) | |
641 | break; | |
642 | ||
643 | if (sd_parent_degenerate(tmp, parent)) { | |
644 | tmp->parent = parent->parent; | |
645 | if (parent->parent) | |
646 | parent->parent->child = tmp; | |
647 | /* | |
648 | * Transfer SD_PREFER_SIBLING down in case of a | |
649 | * degenerate parent; the spans match for this | |
650 | * so the property transfers. | |
651 | */ | |
652 | if (parent->flags & SD_PREFER_SIBLING) | |
653 | tmp->flags |= SD_PREFER_SIBLING; | |
654 | destroy_sched_domain(parent); | |
655 | } else | |
656 | tmp = tmp->parent; | |
657 | } | |
658 | ||
659 | if (sd && sd_degenerate(sd)) { | |
660 | tmp = sd; | |
661 | sd = sd->parent; | |
662 | destroy_sched_domain(tmp); | |
663 | if (sd) | |
664 | sd->child = NULL; | |
665 | } | |
666 | ||
667 | sched_domain_debug(sd, cpu); | |
668 | ||
669 | rq_attach_root(rq, rd); | |
670 | tmp = rq->sd; | |
671 | rcu_assign_pointer(rq->sd, sd); | |
bbdacdfe | 672 | dirty_sched_domain_sysctl(cpu); |
f2cb1360 IM |
673 | destroy_sched_domains(tmp); |
674 | ||
675 | update_top_cache_domain(cpu); | |
676 | } | |
677 | ||
f2cb1360 IM |
678 | struct s_data { |
679 | struct sched_domain ** __percpu sd; | |
680 | struct root_domain *rd; | |
681 | }; | |
682 | ||
683 | enum s_alloc { | |
684 | sa_rootdomain, | |
685 | sa_sd, | |
686 | sa_sd_storage, | |
687 | sa_none, | |
688 | }; | |
689 | ||
35a566e6 PZ |
690 | /* |
691 | * Return the canonical balance CPU for this group, this is the first CPU | |
e5c14b1f | 692 | * of this group that's also in the balance mask. |
35a566e6 | 693 | * |
e5c14b1f PZ |
694 | * The balance mask are all those CPUs that could actually end up at this |
695 | * group. See build_balance_mask(). | |
35a566e6 PZ |
696 | * |
697 | * Also see should_we_balance(). | |
698 | */ | |
699 | int group_balance_cpu(struct sched_group *sg) | |
700 | { | |
e5c14b1f | 701 | return cpumask_first(group_balance_mask(sg)); |
35a566e6 PZ |
702 | } |
703 | ||
704 | ||
705 | /* | |
706 | * NUMA topology (first read the regular topology blurb below) | |
707 | * | |
708 | * Given a node-distance table, for example: | |
709 | * | |
710 | * node 0 1 2 3 | |
711 | * 0: 10 20 30 20 | |
712 | * 1: 20 10 20 30 | |
713 | * 2: 30 20 10 20 | |
714 | * 3: 20 30 20 10 | |
715 | * | |
716 | * which represents a 4 node ring topology like: | |
717 | * | |
718 | * 0 ----- 1 | |
719 | * | | | |
720 | * | | | |
721 | * | | | |
722 | * 3 ----- 2 | |
723 | * | |
724 | * We want to construct domains and groups to represent this. The way we go | |
725 | * about doing this is to build the domains on 'hops'. For each NUMA level we | |
726 | * construct the mask of all nodes reachable in @level hops. | |
727 | * | |
728 | * For the above NUMA topology that gives 3 levels: | |
729 | * | |
730 | * NUMA-2 0-3 0-3 0-3 0-3 | |
731 | * groups: {0-1,3},{1-3} {0-2},{0,2-3} {1-3},{0-1,3} {0,2-3},{0-2} | |
732 | * | |
733 | * NUMA-1 0-1,3 0-2 1-3 0,2-3 | |
734 | * groups: {0},{1},{3} {0},{1},{2} {1},{2},{3} {0},{2},{3} | |
735 | * | |
736 | * NUMA-0 0 1 2 3 | |
737 | * | |
738 | * | |
739 | * As can be seen; things don't nicely line up as with the regular topology. | |
740 | * When we iterate a domain in child domain chunks some nodes can be | |
741 | * represented multiple times -- hence the "overlap" naming for this part of | |
742 | * the topology. | |
743 | * | |
744 | * In order to minimize this overlap, we only build enough groups to cover the | |
745 | * domain. For instance Node-0 NUMA-2 would only get groups: 0-1,3 and 1-3. | |
746 | * | |
747 | * Because: | |
748 | * | |
749 | * - the first group of each domain is its child domain; this | |
750 | * gets us the first 0-1,3 | |
751 | * - the only uncovered node is 2, who's child domain is 1-3. | |
752 | * | |
753 | * However, because of the overlap, computing a unique CPU for each group is | |
754 | * more complicated. Consider for instance the groups of NODE-1 NUMA-2, both | |
755 | * groups include the CPUs of Node-0, while those CPUs would not in fact ever | |
756 | * end up at those groups (they would end up in group: 0-1,3). | |
757 | * | |
e5c14b1f | 758 | * To correct this we have to introduce the group balance mask. This mask |
35a566e6 PZ |
759 | * will contain those CPUs in the group that can reach this group given the |
760 | * (child) domain tree. | |
761 | * | |
762 | * With this we can once again compute balance_cpu and sched_group_capacity | |
763 | * relations. | |
764 | * | |
765 | * XXX include words on how balance_cpu is unique and therefore can be | |
766 | * used for sched_group_capacity links. | |
767 | * | |
768 | * | |
769 | * Another 'interesting' topology is: | |
770 | * | |
771 | * node 0 1 2 3 | |
772 | * 0: 10 20 20 30 | |
773 | * 1: 20 10 20 20 | |
774 | * 2: 20 20 10 20 | |
775 | * 3: 30 20 20 10 | |
776 | * | |
777 | * Which looks a little like: | |
778 | * | |
779 | * 0 ----- 1 | |
780 | * | / | | |
781 | * | / | | |
782 | * | / | | |
783 | * 2 ----- 3 | |
784 | * | |
785 | * This topology is asymmetric, nodes 1,2 are fully connected, but nodes 0,3 | |
786 | * are not. | |
787 | * | |
788 | * This leads to a few particularly weird cases where the sched_domain's are | |
97fb7a0a | 789 | * not of the same number for each CPU. Consider: |
35a566e6 PZ |
790 | * |
791 | * NUMA-2 0-3 0-3 | |
792 | * groups: {0-2},{1-3} {1-3},{0-2} | |
793 | * | |
794 | * NUMA-1 0-2 0-3 0-3 1-3 | |
795 | * | |
796 | * NUMA-0 0 1 2 3 | |
797 | * | |
798 | */ | |
799 | ||
800 | ||
f2cb1360 | 801 | /* |
e5c14b1f PZ |
802 | * Build the balance mask; it contains only those CPUs that can arrive at this |
803 | * group and should be considered to continue balancing. | |
35a566e6 PZ |
804 | * |
805 | * We do this during the group creation pass, therefore the group information | |
806 | * isn't complete yet, however since each group represents a (child) domain we | |
807 | * can fully construct this using the sched_domain bits (which are already | |
808 | * complete). | |
f2cb1360 | 809 | */ |
1676330e | 810 | static void |
e5c14b1f | 811 | build_balance_mask(struct sched_domain *sd, struct sched_group *sg, struct cpumask *mask) |
f2cb1360 | 812 | { |
ae4df9d6 | 813 | const struct cpumask *sg_span = sched_group_span(sg); |
f2cb1360 IM |
814 | struct sd_data *sdd = sd->private; |
815 | struct sched_domain *sibling; | |
816 | int i; | |
817 | ||
1676330e PZ |
818 | cpumask_clear(mask); |
819 | ||
f32d782e | 820 | for_each_cpu(i, sg_span) { |
f2cb1360 | 821 | sibling = *per_cpu_ptr(sdd->sd, i); |
73bb059f PZ |
822 | |
823 | /* | |
824 | * Can happen in the asymmetric case, where these siblings are | |
825 | * unused. The mask will not be empty because those CPUs that | |
826 | * do have the top domain _should_ span the domain. | |
827 | */ | |
828 | if (!sibling->child) | |
829 | continue; | |
830 | ||
831 | /* If we would not end up here, we can't continue from here */ | |
832 | if (!cpumask_equal(sg_span, sched_domain_span(sibling->child))) | |
f2cb1360 IM |
833 | continue; |
834 | ||
1676330e | 835 | cpumask_set_cpu(i, mask); |
f2cb1360 | 836 | } |
73bb059f PZ |
837 | |
838 | /* We must not have empty masks here */ | |
1676330e | 839 | WARN_ON_ONCE(cpumask_empty(mask)); |
f2cb1360 IM |
840 | } |
841 | ||
842 | /* | |
35a566e6 PZ |
843 | * XXX: This creates per-node group entries; since the load-balancer will |
844 | * immediately access remote memory to construct this group's load-balance | |
845 | * statistics having the groups node local is of dubious benefit. | |
f2cb1360 | 846 | */ |
8c033469 LRV |
847 | static struct sched_group * |
848 | build_group_from_child_sched_domain(struct sched_domain *sd, int cpu) | |
849 | { | |
850 | struct sched_group *sg; | |
851 | struct cpumask *sg_span; | |
852 | ||
853 | sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(), | |
854 | GFP_KERNEL, cpu_to_node(cpu)); | |
855 | ||
856 | if (!sg) | |
857 | return NULL; | |
858 | ||
ae4df9d6 | 859 | sg_span = sched_group_span(sg); |
8c033469 LRV |
860 | if (sd->child) |
861 | cpumask_copy(sg_span, sched_domain_span(sd->child)); | |
862 | else | |
863 | cpumask_copy(sg_span, sched_domain_span(sd)); | |
864 | ||
213c5a45 | 865 | atomic_inc(&sg->ref); |
8c033469 LRV |
866 | return sg; |
867 | } | |
868 | ||
869 | static void init_overlap_sched_group(struct sched_domain *sd, | |
1676330e | 870 | struct sched_group *sg) |
8c033469 | 871 | { |
1676330e | 872 | struct cpumask *mask = sched_domains_tmpmask2; |
8c033469 LRV |
873 | struct sd_data *sdd = sd->private; |
874 | struct cpumask *sg_span; | |
1676330e PZ |
875 | int cpu; |
876 | ||
e5c14b1f | 877 | build_balance_mask(sd, sg, mask); |
ae4df9d6 | 878 | cpu = cpumask_first_and(sched_group_span(sg), mask); |
8c033469 LRV |
879 | |
880 | sg->sgc = *per_cpu_ptr(sdd->sgc, cpu); | |
881 | if (atomic_inc_return(&sg->sgc->ref) == 1) | |
e5c14b1f | 882 | cpumask_copy(group_balance_mask(sg), mask); |
35a566e6 | 883 | else |
e5c14b1f | 884 | WARN_ON_ONCE(!cpumask_equal(group_balance_mask(sg), mask)); |
8c033469 LRV |
885 | |
886 | /* | |
887 | * Initialize sgc->capacity such that even if we mess up the | |
888 | * domains and no possible iteration will get us here, we won't | |
889 | * die on a /0 trap. | |
890 | */ | |
ae4df9d6 | 891 | sg_span = sched_group_span(sg); |
8c033469 LRV |
892 | sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sg_span); |
893 | sg->sgc->min_capacity = SCHED_CAPACITY_SCALE; | |
e3d6d0cb | 894 | sg->sgc->max_capacity = SCHED_CAPACITY_SCALE; |
8c033469 LRV |
895 | } |
896 | ||
f2cb1360 IM |
897 | static int |
898 | build_overlap_sched_groups(struct sched_domain *sd, int cpu) | |
899 | { | |
91eaed0d | 900 | struct sched_group *first = NULL, *last = NULL, *sg; |
f2cb1360 IM |
901 | const struct cpumask *span = sched_domain_span(sd); |
902 | struct cpumask *covered = sched_domains_tmpmask; | |
903 | struct sd_data *sdd = sd->private; | |
904 | struct sched_domain *sibling; | |
905 | int i; | |
906 | ||
907 | cpumask_clear(covered); | |
908 | ||
0372dd27 | 909 | for_each_cpu_wrap(i, span, cpu) { |
f2cb1360 IM |
910 | struct cpumask *sg_span; |
911 | ||
912 | if (cpumask_test_cpu(i, covered)) | |
913 | continue; | |
914 | ||
915 | sibling = *per_cpu_ptr(sdd->sd, i); | |
916 | ||
c20e1ea4 LRV |
917 | /* |
918 | * Asymmetric node setups can result in situations where the | |
919 | * domain tree is of unequal depth, make sure to skip domains | |
920 | * that already cover the entire range. | |
921 | * | |
922 | * In that case build_sched_domains() will have terminated the | |
923 | * iteration early and our sibling sd spans will be empty. | |
924 | * Domains should always include the CPU they're built on, so | |
925 | * check that. | |
926 | */ | |
f2cb1360 IM |
927 | if (!cpumask_test_cpu(i, sched_domain_span(sibling))) |
928 | continue; | |
929 | ||
8c033469 | 930 | sg = build_group_from_child_sched_domain(sibling, cpu); |
f2cb1360 IM |
931 | if (!sg) |
932 | goto fail; | |
933 | ||
ae4df9d6 | 934 | sg_span = sched_group_span(sg); |
f2cb1360 IM |
935 | cpumask_or(covered, covered, sg_span); |
936 | ||
1676330e | 937 | init_overlap_sched_group(sd, sg); |
f2cb1360 | 938 | |
f2cb1360 IM |
939 | if (!first) |
940 | first = sg; | |
941 | if (last) | |
942 | last->next = sg; | |
943 | last = sg; | |
944 | last->next = first; | |
945 | } | |
91eaed0d | 946 | sd->groups = first; |
f2cb1360 IM |
947 | |
948 | return 0; | |
949 | ||
950 | fail: | |
951 | free_sched_groups(first, 0); | |
952 | ||
953 | return -ENOMEM; | |
954 | } | |
955 | ||
35a566e6 PZ |
956 | |
957 | /* | |
958 | * Package topology (also see the load-balance blurb in fair.c) | |
959 | * | |
960 | * The scheduler builds a tree structure to represent a number of important | |
961 | * topology features. By default (default_topology[]) these include: | |
962 | * | |
963 | * - Simultaneous multithreading (SMT) | |
964 | * - Multi-Core Cache (MC) | |
965 | * - Package (DIE) | |
966 | * | |
967 | * Where the last one more or less denotes everything up to a NUMA node. | |
968 | * | |
969 | * The tree consists of 3 primary data structures: | |
970 | * | |
971 | * sched_domain -> sched_group -> sched_group_capacity | |
972 | * ^ ^ ^ ^ | |
973 | * `-' `-' | |
974 | * | |
97fb7a0a | 975 | * The sched_domains are per-CPU and have a two way link (parent & child) and |
35a566e6 PZ |
976 | * denote the ever growing mask of CPUs belonging to that level of topology. |
977 | * | |
978 | * Each sched_domain has a circular (double) linked list of sched_group's, each | |
979 | * denoting the domains of the level below (or individual CPUs in case of the | |
980 | * first domain level). The sched_group linked by a sched_domain includes the | |
981 | * CPU of that sched_domain [*]. | |
982 | * | |
983 | * Take for instance a 2 threaded, 2 core, 2 cache cluster part: | |
984 | * | |
985 | * CPU 0 1 2 3 4 5 6 7 | |
986 | * | |
987 | * DIE [ ] | |
988 | * MC [ ] [ ] | |
989 | * SMT [ ] [ ] [ ] [ ] | |
990 | * | |
991 | * - or - | |
992 | * | |
993 | * DIE 0-7 0-7 0-7 0-7 0-7 0-7 0-7 0-7 | |
994 | * MC 0-3 0-3 0-3 0-3 4-7 4-7 4-7 4-7 | |
995 | * SMT 0-1 0-1 2-3 2-3 4-5 4-5 6-7 6-7 | |
996 | * | |
997 | * CPU 0 1 2 3 4 5 6 7 | |
998 | * | |
999 | * One way to think about it is: sched_domain moves you up and down among these | |
1000 | * topology levels, while sched_group moves you sideways through it, at child | |
1001 | * domain granularity. | |
1002 | * | |
1003 | * sched_group_capacity ensures each unique sched_group has shared storage. | |
1004 | * | |
1005 | * There are two related construction problems, both require a CPU that | |
1006 | * uniquely identify each group (for a given domain): | |
1007 | * | |
1008 | * - The first is the balance_cpu (see should_we_balance() and the | |
1009 | * load-balance blub in fair.c); for each group we only want 1 CPU to | |
1010 | * continue balancing at a higher domain. | |
1011 | * | |
1012 | * - The second is the sched_group_capacity; we want all identical groups | |
1013 | * to share a single sched_group_capacity. | |
1014 | * | |
1015 | * Since these topologies are exclusive by construction. That is, its | |
1016 | * impossible for an SMT thread to belong to multiple cores, and cores to | |
1017 | * be part of multiple caches. There is a very clear and unique location | |
1018 | * for each CPU in the hierarchy. | |
1019 | * | |
1020 | * Therefore computing a unique CPU for each group is trivial (the iteration | |
1021 | * mask is redundant and set all 1s; all CPUs in a group will end up at _that_ | |
1022 | * group), we can simply pick the first CPU in each group. | |
1023 | * | |
1024 | * | |
1025 | * [*] in other words, the first group of each domain is its child domain. | |
1026 | */ | |
1027 | ||
0c0e776a | 1028 | static struct sched_group *get_group(int cpu, struct sd_data *sdd) |
f2cb1360 IM |
1029 | { |
1030 | struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu); | |
1031 | struct sched_domain *child = sd->child; | |
0c0e776a | 1032 | struct sched_group *sg; |
f2cb1360 IM |
1033 | |
1034 | if (child) | |
1035 | cpu = cpumask_first(sched_domain_span(child)); | |
1036 | ||
0c0e776a PZ |
1037 | sg = *per_cpu_ptr(sdd->sg, cpu); |
1038 | sg->sgc = *per_cpu_ptr(sdd->sgc, cpu); | |
1039 | ||
1040 | /* For claim_allocations: */ | |
1041 | atomic_inc(&sg->ref); | |
1042 | atomic_inc(&sg->sgc->ref); | |
f2cb1360 | 1043 | |
0c0e776a | 1044 | if (child) { |
ae4df9d6 PZ |
1045 | cpumask_copy(sched_group_span(sg), sched_domain_span(child)); |
1046 | cpumask_copy(group_balance_mask(sg), sched_group_span(sg)); | |
0c0e776a | 1047 | } else { |
ae4df9d6 | 1048 | cpumask_set_cpu(cpu, sched_group_span(sg)); |
e5c14b1f | 1049 | cpumask_set_cpu(cpu, group_balance_mask(sg)); |
f2cb1360 IM |
1050 | } |
1051 | ||
ae4df9d6 | 1052 | sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sched_group_span(sg)); |
0c0e776a | 1053 | sg->sgc->min_capacity = SCHED_CAPACITY_SCALE; |
e3d6d0cb | 1054 | sg->sgc->max_capacity = SCHED_CAPACITY_SCALE; |
0c0e776a PZ |
1055 | |
1056 | return sg; | |
f2cb1360 IM |
1057 | } |
1058 | ||
1059 | /* | |
1060 | * build_sched_groups will build a circular linked list of the groups | |
1061 | * covered by the given span, and will set each group's ->cpumask correctly, | |
1062 | * and ->cpu_capacity to 0. | |
1063 | * | |
1064 | * Assumes the sched_domain tree is fully constructed | |
1065 | */ | |
1066 | static int | |
1067 | build_sched_groups(struct sched_domain *sd, int cpu) | |
1068 | { | |
1069 | struct sched_group *first = NULL, *last = NULL; | |
1070 | struct sd_data *sdd = sd->private; | |
1071 | const struct cpumask *span = sched_domain_span(sd); | |
1072 | struct cpumask *covered; | |
1073 | int i; | |
1074 | ||
f2cb1360 IM |
1075 | lockdep_assert_held(&sched_domains_mutex); |
1076 | covered = sched_domains_tmpmask; | |
1077 | ||
1078 | cpumask_clear(covered); | |
1079 | ||
0c0e776a | 1080 | for_each_cpu_wrap(i, span, cpu) { |
f2cb1360 | 1081 | struct sched_group *sg; |
f2cb1360 IM |
1082 | |
1083 | if (cpumask_test_cpu(i, covered)) | |
1084 | continue; | |
1085 | ||
0c0e776a | 1086 | sg = get_group(i, sdd); |
f2cb1360 | 1087 | |
ae4df9d6 | 1088 | cpumask_or(covered, covered, sched_group_span(sg)); |
f2cb1360 IM |
1089 | |
1090 | if (!first) | |
1091 | first = sg; | |
1092 | if (last) | |
1093 | last->next = sg; | |
1094 | last = sg; | |
1095 | } | |
1096 | last->next = first; | |
0c0e776a | 1097 | sd->groups = first; |
f2cb1360 IM |
1098 | |
1099 | return 0; | |
1100 | } | |
1101 | ||
1102 | /* | |
1103 | * Initialize sched groups cpu_capacity. | |
1104 | * | |
1105 | * cpu_capacity indicates the capacity of sched group, which is used while | |
1106 | * distributing the load between different sched groups in a sched domain. | |
1107 | * Typically cpu_capacity for all the groups in a sched domain will be same | |
1108 | * unless there are asymmetries in the topology. If there are asymmetries, | |
1109 | * group having more cpu_capacity will pickup more load compared to the | |
1110 | * group having less cpu_capacity. | |
1111 | */ | |
1112 | static void init_sched_groups_capacity(int cpu, struct sched_domain *sd) | |
1113 | { | |
1114 | struct sched_group *sg = sd->groups; | |
1115 | ||
1116 | WARN_ON(!sg); | |
1117 | ||
1118 | do { | |
1119 | int cpu, max_cpu = -1; | |
1120 | ||
ae4df9d6 | 1121 | sg->group_weight = cpumask_weight(sched_group_span(sg)); |
f2cb1360 IM |
1122 | |
1123 | if (!(sd->flags & SD_ASYM_PACKING)) | |
1124 | goto next; | |
1125 | ||
ae4df9d6 | 1126 | for_each_cpu(cpu, sched_group_span(sg)) { |
f2cb1360 IM |
1127 | if (max_cpu < 0) |
1128 | max_cpu = cpu; | |
1129 | else if (sched_asym_prefer(cpu, max_cpu)) | |
1130 | max_cpu = cpu; | |
1131 | } | |
1132 | sg->asym_prefer_cpu = max_cpu; | |
1133 | ||
1134 | next: | |
1135 | sg = sg->next; | |
1136 | } while (sg != sd->groups); | |
1137 | ||
1138 | if (cpu != group_balance_cpu(sg)) | |
1139 | return; | |
1140 | ||
1141 | update_group_capacity(sd, cpu); | |
1142 | } | |
1143 | ||
1144 | /* | |
1145 | * Initializers for schedule domains | |
1146 | * Non-inlined to reduce accumulated stack pressure in build_sched_domains() | |
1147 | */ | |
1148 | ||
1149 | static int default_relax_domain_level = -1; | |
1150 | int sched_domain_level_max; | |
1151 | ||
1152 | static int __init setup_relax_domain_level(char *str) | |
1153 | { | |
1154 | if (kstrtoint(str, 0, &default_relax_domain_level)) | |
1155 | pr_warn("Unable to set relax_domain_level\n"); | |
1156 | ||
1157 | return 1; | |
1158 | } | |
1159 | __setup("relax_domain_level=", setup_relax_domain_level); | |
1160 | ||
1161 | static void set_domain_attribute(struct sched_domain *sd, | |
1162 | struct sched_domain_attr *attr) | |
1163 | { | |
1164 | int request; | |
1165 | ||
1166 | if (!attr || attr->relax_domain_level < 0) { | |
1167 | if (default_relax_domain_level < 0) | |
1168 | return; | |
1169 | else | |
1170 | request = default_relax_domain_level; | |
1171 | } else | |
1172 | request = attr->relax_domain_level; | |
1173 | if (request < sd->level) { | |
1174 | /* Turn off idle balance on this domain: */ | |
1175 | sd->flags &= ~(SD_BALANCE_WAKE|SD_BALANCE_NEWIDLE); | |
1176 | } else { | |
1177 | /* Turn on idle balance on this domain: */ | |
1178 | sd->flags |= (SD_BALANCE_WAKE|SD_BALANCE_NEWIDLE); | |
1179 | } | |
1180 | } | |
1181 | ||
1182 | static void __sdt_free(const struct cpumask *cpu_map); | |
1183 | static int __sdt_alloc(const struct cpumask *cpu_map); | |
1184 | ||
1185 | static void __free_domain_allocs(struct s_data *d, enum s_alloc what, | |
1186 | const struct cpumask *cpu_map) | |
1187 | { | |
1188 | switch (what) { | |
1189 | case sa_rootdomain: | |
1190 | if (!atomic_read(&d->rd->refcount)) | |
1191 | free_rootdomain(&d->rd->rcu); | |
1192 | /* Fall through */ | |
1193 | case sa_sd: | |
1194 | free_percpu(d->sd); | |
1195 | /* Fall through */ | |
1196 | case sa_sd_storage: | |
1197 | __sdt_free(cpu_map); | |
1198 | /* Fall through */ | |
1199 | case sa_none: | |
1200 | break; | |
1201 | } | |
1202 | } | |
1203 | ||
1204 | static enum s_alloc | |
1205 | __visit_domain_allocation_hell(struct s_data *d, const struct cpumask *cpu_map) | |
1206 | { | |
1207 | memset(d, 0, sizeof(*d)); | |
1208 | ||
1209 | if (__sdt_alloc(cpu_map)) | |
1210 | return sa_sd_storage; | |
1211 | d->sd = alloc_percpu(struct sched_domain *); | |
1212 | if (!d->sd) | |
1213 | return sa_sd_storage; | |
1214 | d->rd = alloc_rootdomain(); | |
1215 | if (!d->rd) | |
1216 | return sa_sd; | |
97fb7a0a | 1217 | |
f2cb1360 IM |
1218 | return sa_rootdomain; |
1219 | } | |
1220 | ||
1221 | /* | |
1222 | * NULL the sd_data elements we've used to build the sched_domain and | |
1223 | * sched_group structure so that the subsequent __free_domain_allocs() | |
1224 | * will not free the data we're using. | |
1225 | */ | |
1226 | static void claim_allocations(int cpu, struct sched_domain *sd) | |
1227 | { | |
1228 | struct sd_data *sdd = sd->private; | |
1229 | ||
1230 | WARN_ON_ONCE(*per_cpu_ptr(sdd->sd, cpu) != sd); | |
1231 | *per_cpu_ptr(sdd->sd, cpu) = NULL; | |
1232 | ||
1233 | if (atomic_read(&(*per_cpu_ptr(sdd->sds, cpu))->ref)) | |
1234 | *per_cpu_ptr(sdd->sds, cpu) = NULL; | |
1235 | ||
1236 | if (atomic_read(&(*per_cpu_ptr(sdd->sg, cpu))->ref)) | |
1237 | *per_cpu_ptr(sdd->sg, cpu) = NULL; | |
1238 | ||
1239 | if (atomic_read(&(*per_cpu_ptr(sdd->sgc, cpu))->ref)) | |
1240 | *per_cpu_ptr(sdd->sgc, cpu) = NULL; | |
1241 | } | |
1242 | ||
1243 | #ifdef CONFIG_NUMA | |
f2cb1360 | 1244 | enum numa_topology_type sched_numa_topology_type; |
97fb7a0a IM |
1245 | |
1246 | static int sched_domains_numa_levels; | |
1247 | static int sched_domains_curr_level; | |
1248 | ||
1249 | int sched_max_numa_distance; | |
1250 | static int *sched_domains_numa_distance; | |
1251 | static struct cpumask ***sched_domains_numa_masks; | |
f2cb1360 IM |
1252 | #endif |
1253 | ||
1254 | /* | |
1255 | * SD_flags allowed in topology descriptions. | |
1256 | * | |
1257 | * These flags are purely descriptive of the topology and do not prescribe | |
1258 | * behaviour. Behaviour is artificial and mapped in the below sd_init() | |
1259 | * function: | |
1260 | * | |
1261 | * SD_SHARE_CPUCAPACITY - describes SMT topologies | |
1262 | * SD_SHARE_PKG_RESOURCES - describes shared caches | |
1263 | * SD_NUMA - describes NUMA topologies | |
1264 | * SD_SHARE_POWERDOMAIN - describes shared power domain | |
f2cb1360 IM |
1265 | * |
1266 | * Odd one out, which beside describing the topology has a quirk also | |
1267 | * prescribes the desired behaviour that goes along with it: | |
1268 | * | |
1269 | * SD_ASYM_PACKING - describes SMT quirks | |
1270 | */ | |
1271 | #define TOPOLOGY_SD_FLAGS \ | |
97fb7a0a | 1272 | (SD_SHARE_CPUCAPACITY | \ |
f2cb1360 | 1273 | SD_SHARE_PKG_RESOURCES | \ |
97fb7a0a IM |
1274 | SD_NUMA | \ |
1275 | SD_ASYM_PACKING | \ | |
f2cb1360 IM |
1276 | SD_SHARE_POWERDOMAIN) |
1277 | ||
1278 | static struct sched_domain * | |
1279 | sd_init(struct sched_domain_topology_level *tl, | |
1280 | const struct cpumask *cpu_map, | |
05484e09 | 1281 | struct sched_domain *child, int dflags, int cpu) |
f2cb1360 IM |
1282 | { |
1283 | struct sd_data *sdd = &tl->data; | |
1284 | struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu); | |
1285 | int sd_id, sd_weight, sd_flags = 0; | |
1286 | ||
1287 | #ifdef CONFIG_NUMA | |
1288 | /* | |
1289 | * Ugly hack to pass state to sd_numa_mask()... | |
1290 | */ | |
1291 | sched_domains_curr_level = tl->numa_level; | |
1292 | #endif | |
1293 | ||
1294 | sd_weight = cpumask_weight(tl->mask(cpu)); | |
1295 | ||
1296 | if (tl->sd_flags) | |
1297 | sd_flags = (*tl->sd_flags)(); | |
1298 | if (WARN_ONCE(sd_flags & ~TOPOLOGY_SD_FLAGS, | |
1299 | "wrong sd_flags in topology description\n")) | |
1300 | sd_flags &= ~TOPOLOGY_SD_FLAGS; | |
1301 | ||
05484e09 MR |
1302 | /* Apply detected topology flags */ |
1303 | sd_flags |= dflags; | |
1304 | ||
f2cb1360 IM |
1305 | *sd = (struct sched_domain){ |
1306 | .min_interval = sd_weight, | |
1307 | .max_interval = 2*sd_weight, | |
1308 | .busy_factor = 32, | |
1309 | .imbalance_pct = 125, | |
1310 | ||
1311 | .cache_nice_tries = 0, | |
1312 | .busy_idx = 0, | |
1313 | .idle_idx = 0, | |
1314 | .newidle_idx = 0, | |
1315 | .wake_idx = 0, | |
1316 | .forkexec_idx = 0, | |
1317 | ||
1318 | .flags = 1*SD_LOAD_BALANCE | |
1319 | | 1*SD_BALANCE_NEWIDLE | |
1320 | | 1*SD_BALANCE_EXEC | |
1321 | | 1*SD_BALANCE_FORK | |
1322 | | 0*SD_BALANCE_WAKE | |
1323 | | 1*SD_WAKE_AFFINE | |
1324 | | 0*SD_SHARE_CPUCAPACITY | |
1325 | | 0*SD_SHARE_PKG_RESOURCES | |
1326 | | 0*SD_SERIALIZE | |
9c63e84d | 1327 | | 1*SD_PREFER_SIBLING |
f2cb1360 IM |
1328 | | 0*SD_NUMA |
1329 | | sd_flags | |
1330 | , | |
1331 | ||
1332 | .last_balance = jiffies, | |
1333 | .balance_interval = sd_weight, | |
f2cb1360 IM |
1334 | .max_newidle_lb_cost = 0, |
1335 | .next_decay_max_lb_cost = jiffies, | |
1336 | .child = child, | |
1337 | #ifdef CONFIG_SCHED_DEBUG | |
1338 | .name = tl->name, | |
1339 | #endif | |
1340 | }; | |
1341 | ||
1342 | cpumask_and(sched_domain_span(sd), cpu_map, tl->mask(cpu)); | |
1343 | sd_id = cpumask_first(sched_domain_span(sd)); | |
1344 | ||
1345 | /* | |
1346 | * Convert topological properties into behaviour. | |
1347 | */ | |
1348 | ||
1349 | if (sd->flags & SD_ASYM_CPUCAPACITY) { | |
1350 | struct sched_domain *t = sd; | |
1351 | ||
9c63e84d MR |
1352 | /* |
1353 | * Don't attempt to spread across CPUs of different capacities. | |
1354 | */ | |
1355 | if (sd->child) | |
1356 | sd->child->flags &= ~SD_PREFER_SIBLING; | |
1357 | ||
f2cb1360 IM |
1358 | for_each_lower_domain(t) |
1359 | t->flags |= SD_BALANCE_WAKE; | |
1360 | } | |
1361 | ||
1362 | if (sd->flags & SD_SHARE_CPUCAPACITY) { | |
f2cb1360 | 1363 | sd->imbalance_pct = 110; |
f2cb1360 IM |
1364 | |
1365 | } else if (sd->flags & SD_SHARE_PKG_RESOURCES) { | |
1366 | sd->imbalance_pct = 117; | |
1367 | sd->cache_nice_tries = 1; | |
1368 | sd->busy_idx = 2; | |
1369 | ||
1370 | #ifdef CONFIG_NUMA | |
1371 | } else if (sd->flags & SD_NUMA) { | |
1372 | sd->cache_nice_tries = 2; | |
1373 | sd->busy_idx = 3; | |
1374 | sd->idle_idx = 2; | |
1375 | ||
9c63e84d | 1376 | sd->flags &= ~SD_PREFER_SIBLING; |
f2cb1360 IM |
1377 | sd->flags |= SD_SERIALIZE; |
1378 | if (sched_domains_numa_distance[tl->numa_level] > RECLAIM_DISTANCE) { | |
1379 | sd->flags &= ~(SD_BALANCE_EXEC | | |
1380 | SD_BALANCE_FORK | | |
1381 | SD_WAKE_AFFINE); | |
1382 | } | |
1383 | ||
1384 | #endif | |
1385 | } else { | |
f2cb1360 IM |
1386 | sd->cache_nice_tries = 1; |
1387 | sd->busy_idx = 2; | |
1388 | sd->idle_idx = 1; | |
1389 | } | |
1390 | ||
1391 | /* | |
1392 | * For all levels sharing cache; connect a sched_domain_shared | |
1393 | * instance. | |
1394 | */ | |
1395 | if (sd->flags & SD_SHARE_PKG_RESOURCES) { | |
1396 | sd->shared = *per_cpu_ptr(sdd->sds, sd_id); | |
1397 | atomic_inc(&sd->shared->ref); | |
1398 | atomic_set(&sd->shared->nr_busy_cpus, sd_weight); | |
1399 | } | |
1400 | ||
1401 | sd->private = sdd; | |
1402 | ||
1403 | return sd; | |
1404 | } | |
1405 | ||
1406 | /* | |
1407 | * Topology list, bottom-up. | |
1408 | */ | |
1409 | static struct sched_domain_topology_level default_topology[] = { | |
1410 | #ifdef CONFIG_SCHED_SMT | |
1411 | { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, | |
1412 | #endif | |
1413 | #ifdef CONFIG_SCHED_MC | |
1414 | { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, | |
1415 | #endif | |
1416 | { cpu_cpu_mask, SD_INIT_NAME(DIE) }, | |
1417 | { NULL, }, | |
1418 | }; | |
1419 | ||
1420 | static struct sched_domain_topology_level *sched_domain_topology = | |
1421 | default_topology; | |
1422 | ||
1423 | #define for_each_sd_topology(tl) \ | |
1424 | for (tl = sched_domain_topology; tl->mask; tl++) | |
1425 | ||
1426 | void set_sched_topology(struct sched_domain_topology_level *tl) | |
1427 | { | |
1428 | if (WARN_ON_ONCE(sched_smp_initialized)) | |
1429 | return; | |
1430 | ||
1431 | sched_domain_topology = tl; | |
1432 | } | |
1433 | ||
1434 | #ifdef CONFIG_NUMA | |
1435 | ||
1436 | static const struct cpumask *sd_numa_mask(int cpu) | |
1437 | { | |
1438 | return sched_domains_numa_masks[sched_domains_curr_level][cpu_to_node(cpu)]; | |
1439 | } | |
1440 | ||
1441 | static void sched_numa_warn(const char *str) | |
1442 | { | |
1443 | static int done = false; | |
1444 | int i,j; | |
1445 | ||
1446 | if (done) | |
1447 | return; | |
1448 | ||
1449 | done = true; | |
1450 | ||
1451 | printk(KERN_WARNING "ERROR: %s\n\n", str); | |
1452 | ||
1453 | for (i = 0; i < nr_node_ids; i++) { | |
1454 | printk(KERN_WARNING " "); | |
1455 | for (j = 0; j < nr_node_ids; j++) | |
1456 | printk(KERN_CONT "%02d ", node_distance(i,j)); | |
1457 | printk(KERN_CONT "\n"); | |
1458 | } | |
1459 | printk(KERN_WARNING "\n"); | |
1460 | } | |
1461 | ||
1462 | bool find_numa_distance(int distance) | |
1463 | { | |
1464 | int i; | |
1465 | ||
1466 | if (distance == node_distance(0, 0)) | |
1467 | return true; | |
1468 | ||
1469 | for (i = 0; i < sched_domains_numa_levels; i++) { | |
1470 | if (sched_domains_numa_distance[i] == distance) | |
1471 | return true; | |
1472 | } | |
1473 | ||
1474 | return false; | |
1475 | } | |
1476 | ||
1477 | /* | |
1478 | * A system can have three types of NUMA topology: | |
1479 | * NUMA_DIRECT: all nodes are directly connected, or not a NUMA system | |
1480 | * NUMA_GLUELESS_MESH: some nodes reachable through intermediary nodes | |
1481 | * NUMA_BACKPLANE: nodes can reach other nodes through a backplane | |
1482 | * | |
1483 | * The difference between a glueless mesh topology and a backplane | |
1484 | * topology lies in whether communication between not directly | |
1485 | * connected nodes goes through intermediary nodes (where programs | |
1486 | * could run), or through backplane controllers. This affects | |
1487 | * placement of programs. | |
1488 | * | |
1489 | * The type of topology can be discerned with the following tests: | |
1490 | * - If the maximum distance between any nodes is 1 hop, the system | |
1491 | * is directly connected. | |
1492 | * - If for two nodes A and B, located N > 1 hops away from each other, | |
1493 | * there is an intermediary node C, which is < N hops away from both | |
1494 | * nodes A and B, the system is a glueless mesh. | |
1495 | */ | |
1496 | static void init_numa_topology_type(void) | |
1497 | { | |
1498 | int a, b, c, n; | |
1499 | ||
1500 | n = sched_max_numa_distance; | |
1501 | ||
e5e96faf | 1502 | if (sched_domains_numa_levels <= 2) { |
f2cb1360 IM |
1503 | sched_numa_topology_type = NUMA_DIRECT; |
1504 | return; | |
1505 | } | |
1506 | ||
1507 | for_each_online_node(a) { | |
1508 | for_each_online_node(b) { | |
1509 | /* Find two nodes furthest removed from each other. */ | |
1510 | if (node_distance(a, b) < n) | |
1511 | continue; | |
1512 | ||
1513 | /* Is there an intermediary node between a and b? */ | |
1514 | for_each_online_node(c) { | |
1515 | if (node_distance(a, c) < n && | |
1516 | node_distance(b, c) < n) { | |
1517 | sched_numa_topology_type = | |
1518 | NUMA_GLUELESS_MESH; | |
1519 | return; | |
1520 | } | |
1521 | } | |
1522 | ||
1523 | sched_numa_topology_type = NUMA_BACKPLANE; | |
1524 | return; | |
1525 | } | |
1526 | } | |
1527 | } | |
1528 | ||
1529 | void sched_init_numa(void) | |
1530 | { | |
1531 | int next_distance, curr_distance = node_distance(0, 0); | |
1532 | struct sched_domain_topology_level *tl; | |
1533 | int level = 0; | |
1534 | int i, j, k; | |
1535 | ||
993f0b05 | 1536 | sched_domains_numa_distance = kzalloc(sizeof(int) * (nr_node_ids + 1), GFP_KERNEL); |
f2cb1360 IM |
1537 | if (!sched_domains_numa_distance) |
1538 | return; | |
1539 | ||
051f3ca0 SS |
1540 | /* Includes NUMA identity node at level 0. */ |
1541 | sched_domains_numa_distance[level++] = curr_distance; | |
1542 | sched_domains_numa_levels = level; | |
1543 | ||
f2cb1360 IM |
1544 | /* |
1545 | * O(nr_nodes^2) deduplicating selection sort -- in order to find the | |
1546 | * unique distances in the node_distance() table. | |
1547 | * | |
1548 | * Assumes node_distance(0,j) includes all distances in | |
1549 | * node_distance(i,j) in order to avoid cubic time. | |
1550 | */ | |
1551 | next_distance = curr_distance; | |
1552 | for (i = 0; i < nr_node_ids; i++) { | |
1553 | for (j = 0; j < nr_node_ids; j++) { | |
1554 | for (k = 0; k < nr_node_ids; k++) { | |
1555 | int distance = node_distance(i, k); | |
1556 | ||
1557 | if (distance > curr_distance && | |
1558 | (distance < next_distance || | |
1559 | next_distance == curr_distance)) | |
1560 | next_distance = distance; | |
1561 | ||
1562 | /* | |
1563 | * While not a strong assumption it would be nice to know | |
1564 | * about cases where if node A is connected to B, B is not | |
1565 | * equally connected to A. | |
1566 | */ | |
1567 | if (sched_debug() && node_distance(k, i) != distance) | |
1568 | sched_numa_warn("Node-distance not symmetric"); | |
1569 | ||
1570 | if (sched_debug() && i && !find_numa_distance(distance)) | |
1571 | sched_numa_warn("Node-0 not representative"); | |
1572 | } | |
1573 | if (next_distance != curr_distance) { | |
1574 | sched_domains_numa_distance[level++] = next_distance; | |
1575 | sched_domains_numa_levels = level; | |
1576 | curr_distance = next_distance; | |
1577 | } else break; | |
1578 | } | |
1579 | ||
1580 | /* | |
1581 | * In case of sched_debug() we verify the above assumption. | |
1582 | */ | |
1583 | if (!sched_debug()) | |
1584 | break; | |
1585 | } | |
1586 | ||
f2cb1360 | 1587 | /* |
051f3ca0 | 1588 | * 'level' contains the number of unique distances |
f2cb1360 IM |
1589 | * |
1590 | * The sched_domains_numa_distance[] array includes the actual distance | |
1591 | * numbers. | |
1592 | */ | |
1593 | ||
1594 | /* | |
1595 | * Here, we should temporarily reset sched_domains_numa_levels to 0. | |
1596 | * If it fails to allocate memory for array sched_domains_numa_masks[][], | |
1597 | * the array will contain less then 'level' members. This could be | |
1598 | * dangerous when we use it to iterate array sched_domains_numa_masks[][] | |
1599 | * in other functions. | |
1600 | * | |
1601 | * We reset it to 'level' at the end of this function. | |
1602 | */ | |
1603 | sched_domains_numa_levels = 0; | |
1604 | ||
1605 | sched_domains_numa_masks = kzalloc(sizeof(void *) * level, GFP_KERNEL); | |
1606 | if (!sched_domains_numa_masks) | |
1607 | return; | |
1608 | ||
1609 | /* | |
1610 | * Now for each level, construct a mask per node which contains all | |
1611 | * CPUs of nodes that are that many hops away from us. | |
1612 | */ | |
1613 | for (i = 0; i < level; i++) { | |
1614 | sched_domains_numa_masks[i] = | |
1615 | kzalloc(nr_node_ids * sizeof(void *), GFP_KERNEL); | |
1616 | if (!sched_domains_numa_masks[i]) | |
1617 | return; | |
1618 | ||
1619 | for (j = 0; j < nr_node_ids; j++) { | |
1620 | struct cpumask *mask = kzalloc(cpumask_size(), GFP_KERNEL); | |
1621 | if (!mask) | |
1622 | return; | |
1623 | ||
1624 | sched_domains_numa_masks[i][j] = mask; | |
1625 | ||
1626 | for_each_node(k) { | |
1627 | if (node_distance(j, k) > sched_domains_numa_distance[i]) | |
1628 | continue; | |
1629 | ||
1630 | cpumask_or(mask, mask, cpumask_of_node(k)); | |
1631 | } | |
1632 | } | |
1633 | } | |
1634 | ||
1635 | /* Compute default topology size */ | |
1636 | for (i = 0; sched_domain_topology[i].mask; i++); | |
1637 | ||
1638 | tl = kzalloc((i + level + 1) * | |
1639 | sizeof(struct sched_domain_topology_level), GFP_KERNEL); | |
1640 | if (!tl) | |
1641 | return; | |
1642 | ||
1643 | /* | |
1644 | * Copy the default topology bits.. | |
1645 | */ | |
1646 | for (i = 0; sched_domain_topology[i].mask; i++) | |
1647 | tl[i] = sched_domain_topology[i]; | |
1648 | ||
051f3ca0 SS |
1649 | /* |
1650 | * Add the NUMA identity distance, aka single NODE. | |
1651 | */ | |
1652 | tl[i++] = (struct sched_domain_topology_level){ | |
1653 | .mask = sd_numa_mask, | |
1654 | .numa_level = 0, | |
1655 | SD_INIT_NAME(NODE) | |
1656 | }; | |
1657 | ||
f2cb1360 IM |
1658 | /* |
1659 | * .. and append 'j' levels of NUMA goodness. | |
1660 | */ | |
051f3ca0 | 1661 | for (j = 1; j < level; i++, j++) { |
f2cb1360 IM |
1662 | tl[i] = (struct sched_domain_topology_level){ |
1663 | .mask = sd_numa_mask, | |
1664 | .sd_flags = cpu_numa_flags, | |
1665 | .flags = SDTL_OVERLAP, | |
1666 | .numa_level = j, | |
1667 | SD_INIT_NAME(NUMA) | |
1668 | }; | |
1669 | } | |
1670 | ||
1671 | sched_domain_topology = tl; | |
1672 | ||
1673 | sched_domains_numa_levels = level; | |
1674 | sched_max_numa_distance = sched_domains_numa_distance[level - 1]; | |
1675 | ||
1676 | init_numa_topology_type(); | |
1677 | } | |
1678 | ||
1679 | void sched_domains_numa_masks_set(unsigned int cpu) | |
1680 | { | |
1681 | int node = cpu_to_node(cpu); | |
1682 | int i, j; | |
1683 | ||
1684 | for (i = 0; i < sched_domains_numa_levels; i++) { | |
1685 | for (j = 0; j < nr_node_ids; j++) { | |
1686 | if (node_distance(j, node) <= sched_domains_numa_distance[i]) | |
1687 | cpumask_set_cpu(cpu, sched_domains_numa_masks[i][j]); | |
1688 | } | |
1689 | } | |
1690 | } | |
1691 | ||
1692 | void sched_domains_numa_masks_clear(unsigned int cpu) | |
1693 | { | |
1694 | int i, j; | |
1695 | ||
1696 | for (i = 0; i < sched_domains_numa_levels; i++) { | |
1697 | for (j = 0; j < nr_node_ids; j++) | |
1698 | cpumask_clear_cpu(cpu, sched_domains_numa_masks[i][j]); | |
1699 | } | |
1700 | } | |
1701 | ||
1702 | #endif /* CONFIG_NUMA */ | |
1703 | ||
1704 | static int __sdt_alloc(const struct cpumask *cpu_map) | |
1705 | { | |
1706 | struct sched_domain_topology_level *tl; | |
1707 | int j; | |
1708 | ||
1709 | for_each_sd_topology(tl) { | |
1710 | struct sd_data *sdd = &tl->data; | |
1711 | ||
1712 | sdd->sd = alloc_percpu(struct sched_domain *); | |
1713 | if (!sdd->sd) | |
1714 | return -ENOMEM; | |
1715 | ||
1716 | sdd->sds = alloc_percpu(struct sched_domain_shared *); | |
1717 | if (!sdd->sds) | |
1718 | return -ENOMEM; | |
1719 | ||
1720 | sdd->sg = alloc_percpu(struct sched_group *); | |
1721 | if (!sdd->sg) | |
1722 | return -ENOMEM; | |
1723 | ||
1724 | sdd->sgc = alloc_percpu(struct sched_group_capacity *); | |
1725 | if (!sdd->sgc) | |
1726 | return -ENOMEM; | |
1727 | ||
1728 | for_each_cpu(j, cpu_map) { | |
1729 | struct sched_domain *sd; | |
1730 | struct sched_domain_shared *sds; | |
1731 | struct sched_group *sg; | |
1732 | struct sched_group_capacity *sgc; | |
1733 | ||
1734 | sd = kzalloc_node(sizeof(struct sched_domain) + cpumask_size(), | |
1735 | GFP_KERNEL, cpu_to_node(j)); | |
1736 | if (!sd) | |
1737 | return -ENOMEM; | |
1738 | ||
1739 | *per_cpu_ptr(sdd->sd, j) = sd; | |
1740 | ||
1741 | sds = kzalloc_node(sizeof(struct sched_domain_shared), | |
1742 | GFP_KERNEL, cpu_to_node(j)); | |
1743 | if (!sds) | |
1744 | return -ENOMEM; | |
1745 | ||
1746 | *per_cpu_ptr(sdd->sds, j) = sds; | |
1747 | ||
1748 | sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(), | |
1749 | GFP_KERNEL, cpu_to_node(j)); | |
1750 | if (!sg) | |
1751 | return -ENOMEM; | |
1752 | ||
1753 | sg->next = sg; | |
1754 | ||
1755 | *per_cpu_ptr(sdd->sg, j) = sg; | |
1756 | ||
1757 | sgc = kzalloc_node(sizeof(struct sched_group_capacity) + cpumask_size(), | |
1758 | GFP_KERNEL, cpu_to_node(j)); | |
1759 | if (!sgc) | |
1760 | return -ENOMEM; | |
1761 | ||
005f874d PZ |
1762 | #ifdef CONFIG_SCHED_DEBUG |
1763 | sgc->id = j; | |
1764 | #endif | |
1765 | ||
f2cb1360 IM |
1766 | *per_cpu_ptr(sdd->sgc, j) = sgc; |
1767 | } | |
1768 | } | |
1769 | ||
1770 | return 0; | |
1771 | } | |
1772 | ||
1773 | static void __sdt_free(const struct cpumask *cpu_map) | |
1774 | { | |
1775 | struct sched_domain_topology_level *tl; | |
1776 | int j; | |
1777 | ||
1778 | for_each_sd_topology(tl) { | |
1779 | struct sd_data *sdd = &tl->data; | |
1780 | ||
1781 | for_each_cpu(j, cpu_map) { | |
1782 | struct sched_domain *sd; | |
1783 | ||
1784 | if (sdd->sd) { | |
1785 | sd = *per_cpu_ptr(sdd->sd, j); | |
1786 | if (sd && (sd->flags & SD_OVERLAP)) | |
1787 | free_sched_groups(sd->groups, 0); | |
1788 | kfree(*per_cpu_ptr(sdd->sd, j)); | |
1789 | } | |
1790 | ||
1791 | if (sdd->sds) | |
1792 | kfree(*per_cpu_ptr(sdd->sds, j)); | |
1793 | if (sdd->sg) | |
1794 | kfree(*per_cpu_ptr(sdd->sg, j)); | |
1795 | if (sdd->sgc) | |
1796 | kfree(*per_cpu_ptr(sdd->sgc, j)); | |
1797 | } | |
1798 | free_percpu(sdd->sd); | |
1799 | sdd->sd = NULL; | |
1800 | free_percpu(sdd->sds); | |
1801 | sdd->sds = NULL; | |
1802 | free_percpu(sdd->sg); | |
1803 | sdd->sg = NULL; | |
1804 | free_percpu(sdd->sgc); | |
1805 | sdd->sgc = NULL; | |
1806 | } | |
1807 | } | |
1808 | ||
181a80d1 | 1809 | static struct sched_domain *build_sched_domain(struct sched_domain_topology_level *tl, |
f2cb1360 | 1810 | const struct cpumask *cpu_map, struct sched_domain_attr *attr, |
05484e09 | 1811 | struct sched_domain *child, int dflags, int cpu) |
f2cb1360 | 1812 | { |
05484e09 | 1813 | struct sched_domain *sd = sd_init(tl, cpu_map, child, dflags, cpu); |
f2cb1360 IM |
1814 | |
1815 | if (child) { | |
1816 | sd->level = child->level + 1; | |
1817 | sched_domain_level_max = max(sched_domain_level_max, sd->level); | |
1818 | child->parent = sd; | |
1819 | ||
1820 | if (!cpumask_subset(sched_domain_span(child), | |
1821 | sched_domain_span(sd))) { | |
1822 | pr_err("BUG: arch topology borken\n"); | |
1823 | #ifdef CONFIG_SCHED_DEBUG | |
1824 | pr_err(" the %s domain not a subset of the %s domain\n", | |
1825 | child->name, sd->name); | |
1826 | #endif | |
97fb7a0a | 1827 | /* Fixup, ensure @sd has at least @child CPUs. */ |
f2cb1360 IM |
1828 | cpumask_or(sched_domain_span(sd), |
1829 | sched_domain_span(sd), | |
1830 | sched_domain_span(child)); | |
1831 | } | |
1832 | ||
1833 | } | |
1834 | set_domain_attribute(sd, attr); | |
1835 | ||
1836 | return sd; | |
1837 | } | |
1838 | ||
05484e09 MR |
1839 | /* |
1840 | * Find the sched_domain_topology_level where all CPU capacities are visible | |
1841 | * for all CPUs. | |
1842 | */ | |
1843 | static struct sched_domain_topology_level | |
1844 | *asym_cpu_capacity_level(const struct cpumask *cpu_map) | |
1845 | { | |
1846 | int i, j, asym_level = 0; | |
1847 | bool asym = false; | |
1848 | struct sched_domain_topology_level *tl, *asym_tl = NULL; | |
1849 | unsigned long cap; | |
1850 | ||
1851 | /* Is there any asymmetry? */ | |
1852 | cap = arch_scale_cpu_capacity(NULL, cpumask_first(cpu_map)); | |
1853 | ||
1854 | for_each_cpu(i, cpu_map) { | |
1855 | if (arch_scale_cpu_capacity(NULL, i) != cap) { | |
1856 | asym = true; | |
1857 | break; | |
1858 | } | |
1859 | } | |
1860 | ||
1861 | if (!asym) | |
1862 | return NULL; | |
1863 | ||
1864 | /* | |
1865 | * Examine topology from all CPU's point of views to detect the lowest | |
1866 | * sched_domain_topology_level where a highest capacity CPU is visible | |
1867 | * to everyone. | |
1868 | */ | |
1869 | for_each_cpu(i, cpu_map) { | |
1870 | unsigned long max_capacity = arch_scale_cpu_capacity(NULL, i); | |
1871 | int tl_id = 0; | |
1872 | ||
1873 | for_each_sd_topology(tl) { | |
1874 | if (tl_id < asym_level) | |
1875 | goto next_level; | |
1876 | ||
1877 | for_each_cpu_and(j, tl->mask(i), cpu_map) { | |
1878 | unsigned long capacity; | |
1879 | ||
1880 | capacity = arch_scale_cpu_capacity(NULL, j); | |
1881 | ||
1882 | if (capacity <= max_capacity) | |
1883 | continue; | |
1884 | ||
1885 | max_capacity = capacity; | |
1886 | asym_level = tl_id; | |
1887 | asym_tl = tl; | |
1888 | } | |
1889 | next_level: | |
1890 | tl_id++; | |
1891 | } | |
1892 | } | |
1893 | ||
1894 | return asym_tl; | |
1895 | } | |
1896 | ||
1897 | ||
f2cb1360 IM |
1898 | /* |
1899 | * Build sched domains for a given set of CPUs and attach the sched domains | |
1900 | * to the individual CPUs | |
1901 | */ | |
1902 | static int | |
1903 | build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *attr) | |
1904 | { | |
1905 | enum s_alloc alloc_state; | |
1906 | struct sched_domain *sd; | |
1907 | struct s_data d; | |
1908 | struct rq *rq = NULL; | |
1909 | int i, ret = -ENOMEM; | |
05484e09 | 1910 | struct sched_domain_topology_level *tl_asym; |
df054e84 | 1911 | bool has_asym = false; |
f2cb1360 IM |
1912 | |
1913 | alloc_state = __visit_domain_allocation_hell(&d, cpu_map); | |
1914 | if (alloc_state != sa_rootdomain) | |
1915 | goto error; | |
1916 | ||
05484e09 MR |
1917 | tl_asym = asym_cpu_capacity_level(cpu_map); |
1918 | ||
f2cb1360 IM |
1919 | /* Set up domains for CPUs specified by the cpu_map: */ |
1920 | for_each_cpu(i, cpu_map) { | |
1921 | struct sched_domain_topology_level *tl; | |
1922 | ||
1923 | sd = NULL; | |
1924 | for_each_sd_topology(tl) { | |
05484e09 MR |
1925 | int dflags = 0; |
1926 | ||
df054e84 | 1927 | if (tl == tl_asym) { |
05484e09 | 1928 | dflags |= SD_ASYM_CPUCAPACITY; |
df054e84 MR |
1929 | has_asym = true; |
1930 | } | |
05484e09 MR |
1931 | |
1932 | sd = build_sched_domain(tl, cpu_map, attr, sd, dflags, i); | |
1933 | ||
f2cb1360 IM |
1934 | if (tl == sched_domain_topology) |
1935 | *per_cpu_ptr(d.sd, i) = sd; | |
af85596c | 1936 | if (tl->flags & SDTL_OVERLAP) |
f2cb1360 IM |
1937 | sd->flags |= SD_OVERLAP; |
1938 | if (cpumask_equal(cpu_map, sched_domain_span(sd))) | |
1939 | break; | |
1940 | } | |
1941 | } | |
1942 | ||
1943 | /* Build the groups for the domains */ | |
1944 | for_each_cpu(i, cpu_map) { | |
1945 | for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) { | |
1946 | sd->span_weight = cpumask_weight(sched_domain_span(sd)); | |
1947 | if (sd->flags & SD_OVERLAP) { | |
1948 | if (build_overlap_sched_groups(sd, i)) | |
1949 | goto error; | |
1950 | } else { | |
1951 | if (build_sched_groups(sd, i)) | |
1952 | goto error; | |
1953 | } | |
1954 | } | |
1955 | } | |
1956 | ||
1957 | /* Calculate CPU capacity for physical packages and nodes */ | |
1958 | for (i = nr_cpumask_bits-1; i >= 0; i--) { | |
1959 | if (!cpumask_test_cpu(i, cpu_map)) | |
1960 | continue; | |
1961 | ||
1962 | for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) { | |
1963 | claim_allocations(i, sd); | |
1964 | init_sched_groups_capacity(i, sd); | |
1965 | } | |
1966 | } | |
1967 | ||
1968 | /* Attach the domains */ | |
1969 | rcu_read_lock(); | |
1970 | for_each_cpu(i, cpu_map) { | |
1971 | rq = cpu_rq(i); | |
1972 | sd = *per_cpu_ptr(d.sd, i); | |
1973 | ||
1974 | /* Use READ_ONCE()/WRITE_ONCE() to avoid load/store tearing: */ | |
1975 | if (rq->cpu_capacity_orig > READ_ONCE(d.rd->max_cpu_capacity)) | |
1976 | WRITE_ONCE(d.rd->max_cpu_capacity, rq->cpu_capacity_orig); | |
1977 | ||
1978 | cpu_attach_domain(sd, d.rd, i); | |
1979 | } | |
1980 | rcu_read_unlock(); | |
1981 | ||
df054e84 MR |
1982 | if (has_asym) |
1983 | static_branch_enable_cpuslocked(&sched_asym_cpucapacity); | |
1984 | ||
f2cb1360 | 1985 | if (rq && sched_debug_enabled) { |
bf5015a5 | 1986 | pr_info("root domain span: %*pbl (max cpu_capacity = %lu)\n", |
f2cb1360 IM |
1987 | cpumask_pr_args(cpu_map), rq->rd->max_cpu_capacity); |
1988 | } | |
1989 | ||
1990 | ret = 0; | |
1991 | error: | |
1992 | __free_domain_allocs(&d, alloc_state, cpu_map); | |
97fb7a0a | 1993 | |
f2cb1360 IM |
1994 | return ret; |
1995 | } | |
1996 | ||
1997 | /* Current sched domains: */ | |
1998 | static cpumask_var_t *doms_cur; | |
1999 | ||
2000 | /* Number of sched domains in 'doms_cur': */ | |
2001 | static int ndoms_cur; | |
2002 | ||
2003 | /* Attribues of custom domains in 'doms_cur' */ | |
2004 | static struct sched_domain_attr *dattr_cur; | |
2005 | ||
2006 | /* | |
2007 | * Special case: If a kmalloc() of a doms_cur partition (array of | |
2008 | * cpumask) fails, then fallback to a single sched domain, | |
2009 | * as determined by the single cpumask fallback_doms. | |
2010 | */ | |
8d5dc512 | 2011 | static cpumask_var_t fallback_doms; |
f2cb1360 IM |
2012 | |
2013 | /* | |
2014 | * arch_update_cpu_topology lets virtualized architectures update the | |
2015 | * CPU core maps. It is supposed to return 1 if the topology changed | |
2016 | * or 0 if it stayed the same. | |
2017 | */ | |
2018 | int __weak arch_update_cpu_topology(void) | |
2019 | { | |
2020 | return 0; | |
2021 | } | |
2022 | ||
2023 | cpumask_var_t *alloc_sched_domains(unsigned int ndoms) | |
2024 | { | |
2025 | int i; | |
2026 | cpumask_var_t *doms; | |
2027 | ||
6da2ec56 | 2028 | doms = kmalloc_array(ndoms, sizeof(*doms), GFP_KERNEL); |
f2cb1360 IM |
2029 | if (!doms) |
2030 | return NULL; | |
2031 | for (i = 0; i < ndoms; i++) { | |
2032 | if (!alloc_cpumask_var(&doms[i], GFP_KERNEL)) { | |
2033 | free_sched_domains(doms, i); | |
2034 | return NULL; | |
2035 | } | |
2036 | } | |
2037 | return doms; | |
2038 | } | |
2039 | ||
2040 | void free_sched_domains(cpumask_var_t doms[], unsigned int ndoms) | |
2041 | { | |
2042 | unsigned int i; | |
2043 | for (i = 0; i < ndoms; i++) | |
2044 | free_cpumask_var(doms[i]); | |
2045 | kfree(doms); | |
2046 | } | |
2047 | ||
2048 | /* | |
2049 | * Set up scheduler domains and groups. Callers must hold the hotplug lock. | |
2050 | * For now this just excludes isolated CPUs, but could be used to | |
2051 | * exclude other special cases in the future. | |
2052 | */ | |
8d5dc512 | 2053 | int sched_init_domains(const struct cpumask *cpu_map) |
f2cb1360 IM |
2054 | { |
2055 | int err; | |
2056 | ||
8d5dc512 | 2057 | zalloc_cpumask_var(&sched_domains_tmpmask, GFP_KERNEL); |
1676330e | 2058 | zalloc_cpumask_var(&sched_domains_tmpmask2, GFP_KERNEL); |
8d5dc512 PZ |
2059 | zalloc_cpumask_var(&fallback_doms, GFP_KERNEL); |
2060 | ||
f2cb1360 IM |
2061 | arch_update_cpu_topology(); |
2062 | ndoms_cur = 1; | |
2063 | doms_cur = alloc_sched_domains(ndoms_cur); | |
2064 | if (!doms_cur) | |
2065 | doms_cur = &fallback_doms; | |
edb93821 | 2066 | cpumask_and(doms_cur[0], cpu_map, housekeeping_cpumask(HK_FLAG_DOMAIN)); |
f2cb1360 IM |
2067 | err = build_sched_domains(doms_cur[0], NULL); |
2068 | register_sched_domain_sysctl(); | |
2069 | ||
2070 | return err; | |
2071 | } | |
2072 | ||
2073 | /* | |
2074 | * Detach sched domains from a group of CPUs specified in cpu_map | |
2075 | * These CPUs will now be attached to the NULL domain | |
2076 | */ | |
2077 | static void detach_destroy_domains(const struct cpumask *cpu_map) | |
2078 | { | |
2079 | int i; | |
2080 | ||
2081 | rcu_read_lock(); | |
2082 | for_each_cpu(i, cpu_map) | |
2083 | cpu_attach_domain(NULL, &def_root_domain, i); | |
2084 | rcu_read_unlock(); | |
2085 | } | |
2086 | ||
2087 | /* handle null as "default" */ | |
2088 | static int dattrs_equal(struct sched_domain_attr *cur, int idx_cur, | |
2089 | struct sched_domain_attr *new, int idx_new) | |
2090 | { | |
2091 | struct sched_domain_attr tmp; | |
2092 | ||
2093 | /* Fast path: */ | |
2094 | if (!new && !cur) | |
2095 | return 1; | |
2096 | ||
2097 | tmp = SD_ATTR_INIT; | |
97fb7a0a | 2098 | |
f2cb1360 IM |
2099 | return !memcmp(cur ? (cur + idx_cur) : &tmp, |
2100 | new ? (new + idx_new) : &tmp, | |
2101 | sizeof(struct sched_domain_attr)); | |
2102 | } | |
2103 | ||
2104 | /* | |
2105 | * Partition sched domains as specified by the 'ndoms_new' | |
2106 | * cpumasks in the array doms_new[] of cpumasks. This compares | |
2107 | * doms_new[] to the current sched domain partitioning, doms_cur[]. | |
2108 | * It destroys each deleted domain and builds each new domain. | |
2109 | * | |
2110 | * 'doms_new' is an array of cpumask_var_t's of length 'ndoms_new'. | |
2111 | * The masks don't intersect (don't overlap.) We should setup one | |
2112 | * sched domain for each mask. CPUs not in any of the cpumasks will | |
2113 | * not be load balanced. If the same cpumask appears both in the | |
2114 | * current 'doms_cur' domains and in the new 'doms_new', we can leave | |
2115 | * it as it is. | |
2116 | * | |
2117 | * The passed in 'doms_new' should be allocated using | |
2118 | * alloc_sched_domains. This routine takes ownership of it and will | |
2119 | * free_sched_domains it when done with it. If the caller failed the | |
2120 | * alloc call, then it can pass in doms_new == NULL && ndoms_new == 1, | |
2121 | * and partition_sched_domains() will fallback to the single partition | |
2122 | * 'fallback_doms', it also forces the domains to be rebuilt. | |
2123 | * | |
2124 | * If doms_new == NULL it will be replaced with cpu_online_mask. | |
2125 | * ndoms_new == 0 is a special case for destroying existing domains, | |
2126 | * and it will not create the default domain. | |
2127 | * | |
2128 | * Call with hotplug lock held | |
2129 | */ | |
2130 | void partition_sched_domains(int ndoms_new, cpumask_var_t doms_new[], | |
2131 | struct sched_domain_attr *dattr_new) | |
2132 | { | |
1f74de87 | 2133 | bool __maybe_unused has_eas = false; |
f2cb1360 IM |
2134 | int i, j, n; |
2135 | int new_topology; | |
2136 | ||
2137 | mutex_lock(&sched_domains_mutex); | |
2138 | ||
2139 | /* Always unregister in case we don't destroy any domains: */ | |
2140 | unregister_sched_domain_sysctl(); | |
2141 | ||
2142 | /* Let the architecture update CPU core mappings: */ | |
2143 | new_topology = arch_update_cpu_topology(); | |
2144 | ||
09e0dd8e PZ |
2145 | if (!doms_new) { |
2146 | WARN_ON_ONCE(dattr_new); | |
2147 | n = 0; | |
2148 | doms_new = alloc_sched_domains(1); | |
2149 | if (doms_new) { | |
2150 | n = 1; | |
edb93821 FW |
2151 | cpumask_and(doms_new[0], cpu_active_mask, |
2152 | housekeeping_cpumask(HK_FLAG_DOMAIN)); | |
09e0dd8e PZ |
2153 | } |
2154 | } else { | |
2155 | n = ndoms_new; | |
2156 | } | |
f2cb1360 IM |
2157 | |
2158 | /* Destroy deleted domains: */ | |
2159 | for (i = 0; i < ndoms_cur; i++) { | |
2160 | for (j = 0; j < n && !new_topology; j++) { | |
6aa140fa QP |
2161 | if (cpumask_equal(doms_cur[i], doms_new[j]) && |
2162 | dattrs_equal(dattr_cur, i, dattr_new, j)) | |
f2cb1360 IM |
2163 | goto match1; |
2164 | } | |
2165 | /* No match - a current sched domain not in new doms_new[] */ | |
2166 | detach_destroy_domains(doms_cur[i]); | |
2167 | match1: | |
2168 | ; | |
2169 | } | |
2170 | ||
2171 | n = ndoms_cur; | |
09e0dd8e | 2172 | if (!doms_new) { |
f2cb1360 IM |
2173 | n = 0; |
2174 | doms_new = &fallback_doms; | |
edb93821 FW |
2175 | cpumask_and(doms_new[0], cpu_active_mask, |
2176 | housekeeping_cpumask(HK_FLAG_DOMAIN)); | |
f2cb1360 IM |
2177 | } |
2178 | ||
2179 | /* Build new domains: */ | |
2180 | for (i = 0; i < ndoms_new; i++) { | |
2181 | for (j = 0; j < n && !new_topology; j++) { | |
6aa140fa QP |
2182 | if (cpumask_equal(doms_new[i], doms_cur[j]) && |
2183 | dattrs_equal(dattr_new, i, dattr_cur, j)) | |
f2cb1360 IM |
2184 | goto match2; |
2185 | } | |
2186 | /* No match - add a new doms_new */ | |
2187 | build_sched_domains(doms_new[i], dattr_new ? dattr_new + i : NULL); | |
2188 | match2: | |
2189 | ; | |
2190 | } | |
2191 | ||
531b5c9f | 2192 | #if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL) |
6aa140fa QP |
2193 | /* Build perf. domains: */ |
2194 | for (i = 0; i < ndoms_new; i++) { | |
531b5c9f | 2195 | for (j = 0; j < n && !sched_energy_update; j++) { |
6aa140fa | 2196 | if (cpumask_equal(doms_new[i], doms_cur[j]) && |
1f74de87 QP |
2197 | cpu_rq(cpumask_first(doms_cur[j]))->rd->pd) { |
2198 | has_eas = true; | |
6aa140fa | 2199 | goto match3; |
1f74de87 | 2200 | } |
6aa140fa QP |
2201 | } |
2202 | /* No match - add perf. domains for a new rd */ | |
1f74de87 | 2203 | has_eas |= build_perf_domains(doms_new[i]); |
6aa140fa QP |
2204 | match3: |
2205 | ; | |
2206 | } | |
1f74de87 | 2207 | sched_energy_set(has_eas); |
6aa140fa QP |
2208 | #endif |
2209 | ||
f2cb1360 IM |
2210 | /* Remember the new sched domains: */ |
2211 | if (doms_cur != &fallback_doms) | |
2212 | free_sched_domains(doms_cur, ndoms_cur); | |
2213 | ||
2214 | kfree(dattr_cur); | |
2215 | doms_cur = doms_new; | |
2216 | dattr_cur = dattr_new; | |
2217 | ndoms_cur = ndoms_new; | |
2218 | ||
2219 | register_sched_domain_sysctl(); | |
2220 | ||
2221 | mutex_unlock(&sched_domains_mutex); | |
2222 | } |