wifi: rtw89: support U-NII-4 channels on 5GHz band
[linux-block.git] / kernel / sched / topology.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
f2cb1360
IM
2/*
3 * Scheduler topology setup/handling methods
4 */
f2cb1360 5
cd7f5535
YN
6#include <linux/bsearch.h>
7
f2cb1360
IM
8DEFINE_MUTEX(sched_domains_mutex);
9
10/* Protected by sched_domains_mutex: */
ace80310 11static cpumask_var_t sched_domains_tmpmask;
12static cpumask_var_t sched_domains_tmpmask2;
f2cb1360
IM
13
14#ifdef CONFIG_SCHED_DEBUG
15
f2cb1360
IM
16static int __init sched_debug_setup(char *str)
17{
9406415f 18 sched_debug_verbose = true;
f2cb1360
IM
19
20 return 0;
21}
9406415f 22early_param("sched_verbose", sched_debug_setup);
f2cb1360
IM
23
24static inline bool sched_debug(void)
25{
9406415f 26 return sched_debug_verbose;
f2cb1360
IM
27}
28
848785df
VS
29#define SD_FLAG(_name, mflags) [__##_name] = { .meta_flags = mflags, .name = #_name },
30const struct sd_flag_debug sd_flag_debug[] = {
31#include <linux/sched/sd_flags.h>
32};
33#undef SD_FLAG
34
f2cb1360
IM
35static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level,
36 struct cpumask *groupmask)
37{
38 struct sched_group *group = sd->groups;
65c5e253
VS
39 unsigned long flags = sd->flags;
40 unsigned int idx;
f2cb1360
IM
41
42 cpumask_clear(groupmask);
43
005f874d 44 printk(KERN_DEBUG "%*s domain-%d: ", level, "", level);
005f874d 45 printk(KERN_CONT "span=%*pbl level=%s\n",
f2cb1360
IM
46 cpumask_pr_args(sched_domain_span(sd)), sd->name);
47
48 if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) {
97fb7a0a 49 printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu);
f2cb1360 50 }
6cd0c583 51 if (group && !cpumask_test_cpu(cpu, sched_group_span(group))) {
97fb7a0a 52 printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu);
f2cb1360
IM
53 }
54
65c5e253
VS
55 for_each_set_bit(idx, &flags, __SD_FLAG_CNT) {
56 unsigned int flag = BIT(idx);
57 unsigned int meta_flags = sd_flag_debug[idx].meta_flags;
58
59 if ((meta_flags & SDF_SHARED_CHILD) && sd->child &&
60 !(sd->child->flags & flag))
61 printk(KERN_ERR "ERROR: flag %s set here but not in child\n",
62 sd_flag_debug[idx].name);
63
64 if ((meta_flags & SDF_SHARED_PARENT) && sd->parent &&
65 !(sd->parent->flags & flag))
66 printk(KERN_ERR "ERROR: flag %s set here but not in parent\n",
67 sd_flag_debug[idx].name);
68 }
69
f2cb1360
IM
70 printk(KERN_DEBUG "%*s groups:", level + 1, "");
71 do {
72 if (!group) {
73 printk("\n");
74 printk(KERN_ERR "ERROR: group is NULL\n");
75 break;
76 }
77
1087ad4e 78 if (cpumask_empty(sched_group_span(group))) {
f2cb1360
IM
79 printk(KERN_CONT "\n");
80 printk(KERN_ERR "ERROR: empty group\n");
81 break;
82 }
83
84 if (!(sd->flags & SD_OVERLAP) &&
ae4df9d6 85 cpumask_intersects(groupmask, sched_group_span(group))) {
f2cb1360
IM
86 printk(KERN_CONT "\n");
87 printk(KERN_ERR "ERROR: repeated CPUs\n");
88 break;
89 }
90
ae4df9d6 91 cpumask_or(groupmask, groupmask, sched_group_span(group));
f2cb1360 92
005f874d
PZ
93 printk(KERN_CONT " %d:{ span=%*pbl",
94 group->sgc->id,
ae4df9d6 95 cpumask_pr_args(sched_group_span(group)));
b0151c25 96
af218122 97 if ((sd->flags & SD_OVERLAP) &&
ae4df9d6 98 !cpumask_equal(group_balance_mask(group), sched_group_span(group))) {
005f874d 99 printk(KERN_CONT " mask=%*pbl",
e5c14b1f 100 cpumask_pr_args(group_balance_mask(group)));
b0151c25
PZ
101 }
102
005f874d
PZ
103 if (group->sgc->capacity != SCHED_CAPACITY_SCALE)
104 printk(KERN_CONT " cap=%lu", group->sgc->capacity);
f2cb1360 105
a420b063
PZ
106 if (group == sd->groups && sd->child &&
107 !cpumask_equal(sched_domain_span(sd->child),
ae4df9d6 108 sched_group_span(group))) {
a420b063
PZ
109 printk(KERN_ERR "ERROR: domain->groups does not match domain->child\n");
110 }
111
005f874d
PZ
112 printk(KERN_CONT " }");
113
f2cb1360 114 group = group->next;
b0151c25
PZ
115
116 if (group != sd->groups)
117 printk(KERN_CONT ",");
118
f2cb1360
IM
119 } while (group != sd->groups);
120 printk(KERN_CONT "\n");
121
122 if (!cpumask_equal(sched_domain_span(sd), groupmask))
123 printk(KERN_ERR "ERROR: groups don't span domain->span\n");
124
125 if (sd->parent &&
126 !cpumask_subset(groupmask, sched_domain_span(sd->parent)))
97fb7a0a 127 printk(KERN_ERR "ERROR: parent span is not a superset of domain->span\n");
f2cb1360
IM
128 return 0;
129}
130
131static void sched_domain_debug(struct sched_domain *sd, int cpu)
132{
133 int level = 0;
134
9406415f 135 if (!sched_debug_verbose)
f2cb1360
IM
136 return;
137
138 if (!sd) {
139 printk(KERN_DEBUG "CPU%d attaching NULL sched-domain.\n", cpu);
140 return;
141 }
142
005f874d 143 printk(KERN_DEBUG "CPU%d attaching sched-domain(s):\n", cpu);
f2cb1360
IM
144
145 for (;;) {
146 if (sched_domain_debug_one(sd, cpu, level, sched_domains_tmpmask))
147 break;
148 level++;
149 sd = sd->parent;
150 if (!sd)
151 break;
152 }
153}
154#else /* !CONFIG_SCHED_DEBUG */
155
9406415f 156# define sched_debug_verbose 0
f2cb1360
IM
157# define sched_domain_debug(sd, cpu) do { } while (0)
158static inline bool sched_debug(void)
159{
160 return false;
161}
162#endif /* CONFIG_SCHED_DEBUG */
163
4fc472f1
VS
164/* Generate a mask of SD flags with the SDF_NEEDS_GROUPS metaflag */
165#define SD_FLAG(name, mflags) (name * !!((mflags) & SDF_NEEDS_GROUPS)) |
166static const unsigned int SD_DEGENERATE_GROUPS_MASK =
167#include <linux/sched/sd_flags.h>
1680;
169#undef SD_FLAG
170
f2cb1360
IM
171static int sd_degenerate(struct sched_domain *sd)
172{
173 if (cpumask_weight(sched_domain_span(sd)) == 1)
174 return 1;
175
176 /* Following flags need at least 2 groups */
6f349818
VS
177 if ((sd->flags & SD_DEGENERATE_GROUPS_MASK) &&
178 (sd->groups != sd->groups->next))
179 return 0;
f2cb1360
IM
180
181 /* Following flags don't use groups */
182 if (sd->flags & (SD_WAKE_AFFINE))
183 return 0;
184
185 return 1;
186}
187
188static int
189sd_parent_degenerate(struct sched_domain *sd, struct sched_domain *parent)
190{
191 unsigned long cflags = sd->flags, pflags = parent->flags;
192
193 if (sd_degenerate(parent))
194 return 1;
195
196 if (!cpumask_equal(sched_domain_span(sd), sched_domain_span(parent)))
197 return 0;
198
199 /* Flags needing groups don't count if only 1 group in parent */
ab65afb0 200 if (parent->groups == parent->groups->next)
3a6712c7 201 pflags &= ~SD_DEGENERATE_GROUPS_MASK;
ab65afb0 202
f2cb1360
IM
203 if (~cflags & pflags)
204 return 0;
205
206 return 1;
207}
208
531b5c9f 209#if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL)
f8a696f2 210DEFINE_STATIC_KEY_FALSE(sched_energy_present);
8a044141 211static unsigned int sysctl_sched_energy_aware = 1;
531b5c9f
QP
212DEFINE_MUTEX(sched_energy_mutex);
213bool sched_energy_update;
214
31f6a8c0
IV
215void rebuild_sched_domains_energy(void)
216{
217 mutex_lock(&sched_energy_mutex);
218 sched_energy_update = true;
219 rebuild_sched_domains();
220 sched_energy_update = false;
221 mutex_unlock(&sched_energy_mutex);
222}
223
8d5d0cfb 224#ifdef CONFIG_PROC_SYSCTL
8a044141 225static int sched_energy_aware_handler(struct ctl_table *table, int write,
32927393 226 void *buffer, size_t *lenp, loff_t *ppos)
8d5d0cfb
QP
227{
228 int ret, state;
229
230 if (write && !capable(CAP_SYS_ADMIN))
231 return -EPERM;
232
233 ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
234 if (!ret && write) {
235 state = static_branch_unlikely(&sched_energy_present);
31f6a8c0
IV
236 if (state != sysctl_sched_energy_aware)
237 rebuild_sched_domains_energy();
8d5d0cfb
QP
238 }
239
240 return ret;
241}
8a044141
ZN
242
243static struct ctl_table sched_energy_aware_sysctls[] = {
244 {
245 .procname = "sched_energy_aware",
246 .data = &sysctl_sched_energy_aware,
247 .maxlen = sizeof(unsigned int),
248 .mode = 0644,
249 .proc_handler = sched_energy_aware_handler,
250 .extra1 = SYSCTL_ZERO,
251 .extra2 = SYSCTL_ONE,
252 },
253 {}
254};
255
256static int __init sched_energy_aware_sysctl_init(void)
257{
258 register_sysctl_init("kernel", sched_energy_aware_sysctls);
259 return 0;
260}
261
262late_initcall(sched_energy_aware_sysctl_init);
8d5d0cfb
QP
263#endif
264
6aa140fa
QP
265static void free_pd(struct perf_domain *pd)
266{
267 struct perf_domain *tmp;
268
269 while (pd) {
270 tmp = pd->next;
271 kfree(pd);
272 pd = tmp;
273 }
274}
275
276static struct perf_domain *find_pd(struct perf_domain *pd, int cpu)
277{
278 while (pd) {
279 if (cpumask_test_cpu(cpu, perf_domain_span(pd)))
280 return pd;
281 pd = pd->next;
282 }
283
284 return NULL;
285}
286
287static struct perf_domain *pd_init(int cpu)
288{
289 struct em_perf_domain *obj = em_cpu_get(cpu);
290 struct perf_domain *pd;
291
292 if (!obj) {
293 if (sched_debug())
294 pr_info("%s: no EM found for CPU%d\n", __func__, cpu);
295 return NULL;
296 }
297
298 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
299 if (!pd)
300 return NULL;
301 pd->em_pd = obj;
302
303 return pd;
304}
305
306static void perf_domain_debug(const struct cpumask *cpu_map,
307 struct perf_domain *pd)
308{
309 if (!sched_debug() || !pd)
310 return;
311
312 printk(KERN_DEBUG "root_domain %*pbl:", cpumask_pr_args(cpu_map));
313
314 while (pd) {
521b512b 315 printk(KERN_CONT " pd%d:{ cpus=%*pbl nr_pstate=%d }",
6aa140fa
QP
316 cpumask_first(perf_domain_span(pd)),
317 cpumask_pr_args(perf_domain_span(pd)),
521b512b 318 em_pd_nr_perf_states(pd->em_pd));
6aa140fa
QP
319 pd = pd->next;
320 }
321
322 printk(KERN_CONT "\n");
323}
324
325static void destroy_perf_domain_rcu(struct rcu_head *rp)
326{
327 struct perf_domain *pd;
328
329 pd = container_of(rp, struct perf_domain, rcu);
330 free_pd(pd);
331}
332
1f74de87
QP
333static void sched_energy_set(bool has_eas)
334{
335 if (!has_eas && static_branch_unlikely(&sched_energy_present)) {
336 if (sched_debug())
337 pr_info("%s: stopping EAS\n", __func__);
338 static_branch_disable_cpuslocked(&sched_energy_present);
339 } else if (has_eas && !static_branch_unlikely(&sched_energy_present)) {
340 if (sched_debug())
341 pr_info("%s: starting EAS\n", __func__);
342 static_branch_enable_cpuslocked(&sched_energy_present);
343 }
344}
345
b68a4c0d
QP
346/*
347 * EAS can be used on a root domain if it meets all the following conditions:
348 * 1. an Energy Model (EM) is available;
349 * 2. the SD_ASYM_CPUCAPACITY flag is set in the sched_domain hierarchy.
38502ab4
VS
350 * 3. no SMT is detected.
351 * 4. the EM complexity is low enough to keep scheduling overheads low;
352 * 5. schedutil is driving the frequency of all CPUs of the rd;
fa50e2b4 353 * 6. frequency invariance support is present;
b68a4c0d
QP
354 *
355 * The complexity of the Energy Model is defined as:
356 *
521b512b 357 * C = nr_pd * (nr_cpus + nr_ps)
b68a4c0d
QP
358 *
359 * with parameters defined as:
360 * - nr_pd: the number of performance domains
361 * - nr_cpus: the number of CPUs
521b512b 362 * - nr_ps: the sum of the number of performance states of all performance
b68a4c0d 363 * domains (for example, on a system with 2 performance domains,
521b512b 364 * with 10 performance states each, nr_ps = 2 * 10 = 20).
b68a4c0d
QP
365 *
366 * It is generally not a good idea to use such a model in the wake-up path on
367 * very complex platforms because of the associated scheduling overheads. The
368 * arbitrary constraint below prevents that. It makes EAS usable up to 16 CPUs
521b512b 369 * with per-CPU DVFS and less than 8 performance states each, for example.
b68a4c0d
QP
370 */
371#define EM_MAX_COMPLEXITY 2048
372
531b5c9f 373extern struct cpufreq_governor schedutil_gov;
1f74de87 374static bool build_perf_domains(const struct cpumask *cpu_map)
6aa140fa 375{
521b512b 376 int i, nr_pd = 0, nr_ps = 0, nr_cpus = cpumask_weight(cpu_map);
6aa140fa
QP
377 struct perf_domain *pd = NULL, *tmp;
378 int cpu = cpumask_first(cpu_map);
379 struct root_domain *rd = cpu_rq(cpu)->rd;
531b5c9f
QP
380 struct cpufreq_policy *policy;
381 struct cpufreq_governor *gov;
b68a4c0d 382
8d5d0cfb
QP
383 if (!sysctl_sched_energy_aware)
384 goto free;
385
b68a4c0d
QP
386 /* EAS is enabled for asymmetric CPU capacity topologies. */
387 if (!per_cpu(sd_asym_cpucapacity, cpu)) {
388 if (sched_debug()) {
389 pr_info("rd %*pbl: CPUs do not have asymmetric capacities\n",
390 cpumask_pr_args(cpu_map));
391 }
392 goto free;
393 }
6aa140fa 394
38502ab4
VS
395 /* EAS definitely does *not* handle SMT */
396 if (sched_smt_active()) {
397 pr_warn("rd %*pbl: Disabling EAS, SMT is not supported\n",
398 cpumask_pr_args(cpu_map));
399 goto free;
400 }
401
fa50e2b4
IV
402 if (!arch_scale_freq_invariant()) {
403 if (sched_debug()) {
404 pr_warn("rd %*pbl: Disabling EAS: frequency-invariant load tracking not yet supported",
405 cpumask_pr_args(cpu_map));
406 }
407 goto free;
408 }
409
6aa140fa
QP
410 for_each_cpu(i, cpu_map) {
411 /* Skip already covered CPUs. */
412 if (find_pd(pd, i))
413 continue;
414
531b5c9f
QP
415 /* Do not attempt EAS if schedutil is not being used. */
416 policy = cpufreq_cpu_get(i);
417 if (!policy)
418 goto free;
419 gov = policy->governor;
420 cpufreq_cpu_put(policy);
421 if (gov != &schedutil_gov) {
422 if (rd->pd)
423 pr_warn("rd %*pbl: Disabling EAS, schedutil is mandatory\n",
424 cpumask_pr_args(cpu_map));
425 goto free;
426 }
427
6aa140fa
QP
428 /* Create the new pd and add it to the local list. */
429 tmp = pd_init(i);
430 if (!tmp)
431 goto free;
432 tmp->next = pd;
433 pd = tmp;
b68a4c0d
QP
434
435 /*
521b512b 436 * Count performance domains and performance states for the
b68a4c0d
QP
437 * complexity check.
438 */
439 nr_pd++;
521b512b 440 nr_ps += em_pd_nr_perf_states(pd->em_pd);
b68a4c0d
QP
441 }
442
443 /* Bail out if the Energy Model complexity is too high. */
521b512b 444 if (nr_pd * (nr_ps + nr_cpus) > EM_MAX_COMPLEXITY) {
b68a4c0d
QP
445 WARN(1, "rd %*pbl: Failed to start EAS, EM complexity is too high\n",
446 cpumask_pr_args(cpu_map));
447 goto free;
6aa140fa
QP
448 }
449
450 perf_domain_debug(cpu_map, pd);
451
452 /* Attach the new list of performance domains to the root domain. */
453 tmp = rd->pd;
454 rcu_assign_pointer(rd->pd, pd);
455 if (tmp)
456 call_rcu(&tmp->rcu, destroy_perf_domain_rcu);
457
1f74de87 458 return !!pd;
6aa140fa
QP
459
460free:
461 free_pd(pd);
462 tmp = rd->pd;
463 rcu_assign_pointer(rd->pd, NULL);
464 if (tmp)
465 call_rcu(&tmp->rcu, destroy_perf_domain_rcu);
1f74de87
QP
466
467 return false;
6aa140fa
QP
468}
469#else
470static void free_pd(struct perf_domain *pd) { }
531b5c9f 471#endif /* CONFIG_ENERGY_MODEL && CONFIG_CPU_FREQ_GOV_SCHEDUTIL*/
6aa140fa 472
f2cb1360
IM
473static void free_rootdomain(struct rcu_head *rcu)
474{
475 struct root_domain *rd = container_of(rcu, struct root_domain, rcu);
476
477 cpupri_cleanup(&rd->cpupri);
478 cpudl_cleanup(&rd->cpudl);
479 free_cpumask_var(rd->dlo_mask);
480 free_cpumask_var(rd->rto_mask);
481 free_cpumask_var(rd->online);
482 free_cpumask_var(rd->span);
6aa140fa 483 free_pd(rd->pd);
f2cb1360
IM
484 kfree(rd);
485}
486
487void rq_attach_root(struct rq *rq, struct root_domain *rd)
488{
489 struct root_domain *old_rd = NULL;
490 unsigned long flags;
491
5cb9eaa3 492 raw_spin_rq_lock_irqsave(rq, flags);
f2cb1360
IM
493
494 if (rq->rd) {
495 old_rd = rq->rd;
496
497 if (cpumask_test_cpu(rq->cpu, old_rd->online))
498 set_rq_offline(rq);
499
500 cpumask_clear_cpu(rq->cpu, old_rd->span);
501
502 /*
503 * If we dont want to free the old_rd yet then
504 * set old_rd to NULL to skip the freeing later
505 * in this function:
506 */
507 if (!atomic_dec_and_test(&old_rd->refcount))
508 old_rd = NULL;
509 }
510
511 atomic_inc(&rd->refcount);
512 rq->rd = rd;
513
514 cpumask_set_cpu(rq->cpu, rd->span);
515 if (cpumask_test_cpu(rq->cpu, cpu_active_mask))
516 set_rq_online(rq);
517
5cb9eaa3 518 raw_spin_rq_unlock_irqrestore(rq, flags);
f2cb1360
IM
519
520 if (old_rd)
337e9b07 521 call_rcu(&old_rd->rcu, free_rootdomain);
f2cb1360
IM
522}
523
364f5665
SRV
524void sched_get_rd(struct root_domain *rd)
525{
526 atomic_inc(&rd->refcount);
527}
528
529void sched_put_rd(struct root_domain *rd)
530{
531 if (!atomic_dec_and_test(&rd->refcount))
532 return;
533
337e9b07 534 call_rcu(&rd->rcu, free_rootdomain);
364f5665
SRV
535}
536
f2cb1360
IM
537static int init_rootdomain(struct root_domain *rd)
538{
f2cb1360
IM
539 if (!zalloc_cpumask_var(&rd->span, GFP_KERNEL))
540 goto out;
541 if (!zalloc_cpumask_var(&rd->online, GFP_KERNEL))
542 goto free_span;
543 if (!zalloc_cpumask_var(&rd->dlo_mask, GFP_KERNEL))
544 goto free_online;
545 if (!zalloc_cpumask_var(&rd->rto_mask, GFP_KERNEL))
546 goto free_dlo_mask;
547
4bdced5c
SRRH
548#ifdef HAVE_RT_PUSH_IPI
549 rd->rto_cpu = -1;
550 raw_spin_lock_init(&rd->rto_lock);
da6ff099 551 rd->rto_push_work = IRQ_WORK_INIT_HARD(rto_push_irq_work_func);
4bdced5c
SRRH
552#endif
553
26762423 554 rd->visit_gen = 0;
f2cb1360
IM
555 init_dl_bw(&rd->dl_bw);
556 if (cpudl_init(&rd->cpudl) != 0)
557 goto free_rto_mask;
558
559 if (cpupri_init(&rd->cpupri) != 0)
560 goto free_cpudl;
561 return 0;
562
563free_cpudl:
564 cpudl_cleanup(&rd->cpudl);
565free_rto_mask:
566 free_cpumask_var(rd->rto_mask);
567free_dlo_mask:
568 free_cpumask_var(rd->dlo_mask);
569free_online:
570 free_cpumask_var(rd->online);
571free_span:
572 free_cpumask_var(rd->span);
573out:
574 return -ENOMEM;
575}
576
577/*
578 * By default the system creates a single root-domain with all CPUs as
579 * members (mimicking the global state we have today).
580 */
581struct root_domain def_root_domain;
582
9a5322db 583void __init init_defrootdomain(void)
f2cb1360
IM
584{
585 init_rootdomain(&def_root_domain);
586
587 atomic_set(&def_root_domain.refcount, 1);
588}
589
590static struct root_domain *alloc_rootdomain(void)
591{
592 struct root_domain *rd;
593
4d13a06d 594 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
f2cb1360
IM
595 if (!rd)
596 return NULL;
597
598 if (init_rootdomain(rd) != 0) {
599 kfree(rd);
600 return NULL;
601 }
602
603 return rd;
604}
605
606static void free_sched_groups(struct sched_group *sg, int free_sgc)
607{
608 struct sched_group *tmp, *first;
609
610 if (!sg)
611 return;
612
613 first = sg;
614 do {
615 tmp = sg->next;
616
617 if (free_sgc && atomic_dec_and_test(&sg->sgc->ref))
618 kfree(sg->sgc);
619
213c5a45
SW
620 if (atomic_dec_and_test(&sg->ref))
621 kfree(sg);
f2cb1360
IM
622 sg = tmp;
623 } while (sg != first);
624}
625
626static void destroy_sched_domain(struct sched_domain *sd)
627{
628 /*
a090c4f2
PZ
629 * A normal sched domain may have multiple group references, an
630 * overlapping domain, having private groups, only one. Iterate,
631 * dropping group/capacity references, freeing where none remain.
f2cb1360 632 */
213c5a45
SW
633 free_sched_groups(sd->groups, 1);
634
f2cb1360
IM
635 if (sd->shared && atomic_dec_and_test(&sd->shared->ref))
636 kfree(sd->shared);
637 kfree(sd);
638}
639
640static void destroy_sched_domains_rcu(struct rcu_head *rcu)
641{
642 struct sched_domain *sd = container_of(rcu, struct sched_domain, rcu);
643
644 while (sd) {
645 struct sched_domain *parent = sd->parent;
646 destroy_sched_domain(sd);
647 sd = parent;
648 }
649}
650
651static void destroy_sched_domains(struct sched_domain *sd)
652{
653 if (sd)
654 call_rcu(&sd->rcu, destroy_sched_domains_rcu);
655}
656
657/*
658 * Keep a special pointer to the highest sched_domain that has
659 * SD_SHARE_PKG_RESOURCE set (Last Level Cache Domain) for this
660 * allows us to avoid some pointer chasing select_idle_sibling().
661 *
662 * Also keep a unique ID per domain (we use the first CPU number in
663 * the cpumask of the domain), this allows us to quickly tell if
664 * two CPUs are in the same cache domain, see cpus_share_cache().
665 */
994aeb7a 666DEFINE_PER_CPU(struct sched_domain __rcu *, sd_llc);
f2cb1360
IM
667DEFINE_PER_CPU(int, sd_llc_size);
668DEFINE_PER_CPU(int, sd_llc_id);
994aeb7a
JFG
669DEFINE_PER_CPU(struct sched_domain_shared __rcu *, sd_llc_shared);
670DEFINE_PER_CPU(struct sched_domain __rcu *, sd_numa);
671DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_packing);
672DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_cpucapacity);
df054e84 673DEFINE_STATIC_KEY_FALSE(sched_asym_cpucapacity);
f2cb1360
IM
674
675static void update_top_cache_domain(int cpu)
676{
677 struct sched_domain_shared *sds = NULL;
678 struct sched_domain *sd;
679 int id = cpu;
680 int size = 1;
681
682 sd = highest_flag_domain(cpu, SD_SHARE_PKG_RESOURCES);
683 if (sd) {
684 id = cpumask_first(sched_domain_span(sd));
685 size = cpumask_weight(sched_domain_span(sd));
686 sds = sd->shared;
687 }
688
689 rcu_assign_pointer(per_cpu(sd_llc, cpu), sd);
690 per_cpu(sd_llc_size, cpu) = size;
691 per_cpu(sd_llc_id, cpu) = id;
692 rcu_assign_pointer(per_cpu(sd_llc_shared, cpu), sds);
693
694 sd = lowest_flag_domain(cpu, SD_NUMA);
695 rcu_assign_pointer(per_cpu(sd_numa, cpu), sd);
696
697 sd = highest_flag_domain(cpu, SD_ASYM_PACKING);
011b27bb
QP
698 rcu_assign_pointer(per_cpu(sd_asym_packing, cpu), sd);
699
c744dc4a 700 sd = lowest_flag_domain(cpu, SD_ASYM_CPUCAPACITY_FULL);
011b27bb 701 rcu_assign_pointer(per_cpu(sd_asym_cpucapacity, cpu), sd);
f2cb1360
IM
702}
703
704/*
705 * Attach the domain 'sd' to 'cpu' as its base domain. Callers must
706 * hold the hotplug lock.
707 */
708static void
709cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu)
710{
711 struct rq *rq = cpu_rq(cpu);
712 struct sched_domain *tmp;
713
714 /* Remove the sched domains which do not contribute to scheduling. */
715 for (tmp = sd; tmp; ) {
716 struct sched_domain *parent = tmp->parent;
717 if (!parent)
718 break;
719
720 if (sd_parent_degenerate(tmp, parent)) {
721 tmp->parent = parent->parent;
722 if (parent->parent)
723 parent->parent->child = tmp;
724 /*
725 * Transfer SD_PREFER_SIBLING down in case of a
726 * degenerate parent; the spans match for this
727 * so the property transfers.
728 */
729 if (parent->flags & SD_PREFER_SIBLING)
730 tmp->flags |= SD_PREFER_SIBLING;
731 destroy_sched_domain(parent);
732 } else
733 tmp = tmp->parent;
734 }
735
736 if (sd && sd_degenerate(sd)) {
737 tmp = sd;
738 sd = sd->parent;
739 destroy_sched_domain(tmp);
16d364ba
RN
740 if (sd) {
741 struct sched_group *sg = sd->groups;
742
743 /*
744 * sched groups hold the flags of the child sched
745 * domain for convenience. Clear such flags since
746 * the child is being destroyed.
747 */
748 do {
749 sg->flags = 0;
750 } while (sg != sd->groups);
751
f2cb1360 752 sd->child = NULL;
16d364ba 753 }
f2cb1360
IM
754 }
755
756 sched_domain_debug(sd, cpu);
757
758 rq_attach_root(rq, rd);
759 tmp = rq->sd;
760 rcu_assign_pointer(rq->sd, sd);
bbdacdfe 761 dirty_sched_domain_sysctl(cpu);
f2cb1360
IM
762 destroy_sched_domains(tmp);
763
764 update_top_cache_domain(cpu);
765}
766
f2cb1360 767struct s_data {
99687cdb 768 struct sched_domain * __percpu *sd;
f2cb1360
IM
769 struct root_domain *rd;
770};
771
772enum s_alloc {
773 sa_rootdomain,
774 sa_sd,
775 sa_sd_storage,
776 sa_none,
777};
778
35a566e6
PZ
779/*
780 * Return the canonical balance CPU for this group, this is the first CPU
e5c14b1f 781 * of this group that's also in the balance mask.
35a566e6 782 *
e5c14b1f
PZ
783 * The balance mask are all those CPUs that could actually end up at this
784 * group. See build_balance_mask().
35a566e6
PZ
785 *
786 * Also see should_we_balance().
787 */
788int group_balance_cpu(struct sched_group *sg)
789{
e5c14b1f 790 return cpumask_first(group_balance_mask(sg));
35a566e6
PZ
791}
792
793
794/*
795 * NUMA topology (first read the regular topology blurb below)
796 *
797 * Given a node-distance table, for example:
798 *
799 * node 0 1 2 3
800 * 0: 10 20 30 20
801 * 1: 20 10 20 30
802 * 2: 30 20 10 20
803 * 3: 20 30 20 10
804 *
805 * which represents a 4 node ring topology like:
806 *
807 * 0 ----- 1
808 * | |
809 * | |
810 * | |
811 * 3 ----- 2
812 *
813 * We want to construct domains and groups to represent this. The way we go
814 * about doing this is to build the domains on 'hops'. For each NUMA level we
815 * construct the mask of all nodes reachable in @level hops.
816 *
817 * For the above NUMA topology that gives 3 levels:
818 *
819 * NUMA-2 0-3 0-3 0-3 0-3
820 * groups: {0-1,3},{1-3} {0-2},{0,2-3} {1-3},{0-1,3} {0,2-3},{0-2}
821 *
822 * NUMA-1 0-1,3 0-2 1-3 0,2-3
823 * groups: {0},{1},{3} {0},{1},{2} {1},{2},{3} {0},{2},{3}
824 *
825 * NUMA-0 0 1 2 3
826 *
827 *
828 * As can be seen; things don't nicely line up as with the regular topology.
829 * When we iterate a domain in child domain chunks some nodes can be
830 * represented multiple times -- hence the "overlap" naming for this part of
831 * the topology.
832 *
833 * In order to minimize this overlap, we only build enough groups to cover the
834 * domain. For instance Node-0 NUMA-2 would only get groups: 0-1,3 and 1-3.
835 *
836 * Because:
837 *
838 * - the first group of each domain is its child domain; this
839 * gets us the first 0-1,3
840 * - the only uncovered node is 2, who's child domain is 1-3.
841 *
842 * However, because of the overlap, computing a unique CPU for each group is
843 * more complicated. Consider for instance the groups of NODE-1 NUMA-2, both
844 * groups include the CPUs of Node-0, while those CPUs would not in fact ever
845 * end up at those groups (they would end up in group: 0-1,3).
846 *
e5c14b1f 847 * To correct this we have to introduce the group balance mask. This mask
35a566e6
PZ
848 * will contain those CPUs in the group that can reach this group given the
849 * (child) domain tree.
850 *
851 * With this we can once again compute balance_cpu and sched_group_capacity
852 * relations.
853 *
854 * XXX include words on how balance_cpu is unique and therefore can be
855 * used for sched_group_capacity links.
856 *
857 *
858 * Another 'interesting' topology is:
859 *
860 * node 0 1 2 3
861 * 0: 10 20 20 30
862 * 1: 20 10 20 20
863 * 2: 20 20 10 20
864 * 3: 30 20 20 10
865 *
866 * Which looks a little like:
867 *
868 * 0 ----- 1
869 * | / |
870 * | / |
871 * | / |
872 * 2 ----- 3
873 *
874 * This topology is asymmetric, nodes 1,2 are fully connected, but nodes 0,3
875 * are not.
876 *
877 * This leads to a few particularly weird cases where the sched_domain's are
97fb7a0a 878 * not of the same number for each CPU. Consider:
35a566e6
PZ
879 *
880 * NUMA-2 0-3 0-3
881 * groups: {0-2},{1-3} {1-3},{0-2}
882 *
883 * NUMA-1 0-2 0-3 0-3 1-3
884 *
885 * NUMA-0 0 1 2 3
886 *
887 */
888
889
f2cb1360 890/*
e5c14b1f
PZ
891 * Build the balance mask; it contains only those CPUs that can arrive at this
892 * group and should be considered to continue balancing.
35a566e6
PZ
893 *
894 * We do this during the group creation pass, therefore the group information
895 * isn't complete yet, however since each group represents a (child) domain we
896 * can fully construct this using the sched_domain bits (which are already
897 * complete).
f2cb1360 898 */
1676330e 899static void
e5c14b1f 900build_balance_mask(struct sched_domain *sd, struct sched_group *sg, struct cpumask *mask)
f2cb1360 901{
ae4df9d6 902 const struct cpumask *sg_span = sched_group_span(sg);
f2cb1360
IM
903 struct sd_data *sdd = sd->private;
904 struct sched_domain *sibling;
905 int i;
906
1676330e
PZ
907 cpumask_clear(mask);
908
f32d782e 909 for_each_cpu(i, sg_span) {
f2cb1360 910 sibling = *per_cpu_ptr(sdd->sd, i);
73bb059f
PZ
911
912 /*
913 * Can happen in the asymmetric case, where these siblings are
914 * unused. The mask will not be empty because those CPUs that
915 * do have the top domain _should_ span the domain.
916 */
917 if (!sibling->child)
918 continue;
919
920 /* If we would not end up here, we can't continue from here */
921 if (!cpumask_equal(sg_span, sched_domain_span(sibling->child)))
f2cb1360
IM
922 continue;
923
1676330e 924 cpumask_set_cpu(i, mask);
f2cb1360 925 }
73bb059f
PZ
926
927 /* We must not have empty masks here */
1676330e 928 WARN_ON_ONCE(cpumask_empty(mask));
f2cb1360
IM
929}
930
931/*
35a566e6
PZ
932 * XXX: This creates per-node group entries; since the load-balancer will
933 * immediately access remote memory to construct this group's load-balance
934 * statistics having the groups node local is of dubious benefit.
f2cb1360 935 */
8c033469
LRV
936static struct sched_group *
937build_group_from_child_sched_domain(struct sched_domain *sd, int cpu)
938{
939 struct sched_group *sg;
940 struct cpumask *sg_span;
941
942 sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(),
943 GFP_KERNEL, cpu_to_node(cpu));
944
945 if (!sg)
946 return NULL;
947
ae4df9d6 948 sg_span = sched_group_span(sg);
16d364ba 949 if (sd->child) {
8c033469 950 cpumask_copy(sg_span, sched_domain_span(sd->child));
16d364ba
RN
951 sg->flags = sd->child->flags;
952 } else {
8c033469 953 cpumask_copy(sg_span, sched_domain_span(sd));
16d364ba 954 }
8c033469 955
213c5a45 956 atomic_inc(&sg->ref);
8c033469
LRV
957 return sg;
958}
959
960static void init_overlap_sched_group(struct sched_domain *sd,
1676330e 961 struct sched_group *sg)
8c033469 962{
1676330e 963 struct cpumask *mask = sched_domains_tmpmask2;
8c033469
LRV
964 struct sd_data *sdd = sd->private;
965 struct cpumask *sg_span;
1676330e
PZ
966 int cpu;
967
e5c14b1f 968 build_balance_mask(sd, sg, mask);
0a2b65c0 969 cpu = cpumask_first(mask);
8c033469
LRV
970
971 sg->sgc = *per_cpu_ptr(sdd->sgc, cpu);
972 if (atomic_inc_return(&sg->sgc->ref) == 1)
e5c14b1f 973 cpumask_copy(group_balance_mask(sg), mask);
35a566e6 974 else
e5c14b1f 975 WARN_ON_ONCE(!cpumask_equal(group_balance_mask(sg), mask));
8c033469
LRV
976
977 /*
978 * Initialize sgc->capacity such that even if we mess up the
979 * domains and no possible iteration will get us here, we won't
980 * die on a /0 trap.
981 */
ae4df9d6 982 sg_span = sched_group_span(sg);
8c033469
LRV
983 sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sg_span);
984 sg->sgc->min_capacity = SCHED_CAPACITY_SCALE;
e3d6d0cb 985 sg->sgc->max_capacity = SCHED_CAPACITY_SCALE;
8c033469
LRV
986}
987
585b6d27
BS
988static struct sched_domain *
989find_descended_sibling(struct sched_domain *sd, struct sched_domain *sibling)
990{
991 /*
992 * The proper descendant would be the one whose child won't span out
993 * of sd
994 */
995 while (sibling->child &&
996 !cpumask_subset(sched_domain_span(sibling->child),
997 sched_domain_span(sd)))
998 sibling = sibling->child;
999
1000 /*
1001 * As we are referencing sgc across different topology level, we need
1002 * to go down to skip those sched_domains which don't contribute to
1003 * scheduling because they will be degenerated in cpu_attach_domain
1004 */
1005 while (sibling->child &&
1006 cpumask_equal(sched_domain_span(sibling->child),
1007 sched_domain_span(sibling)))
1008 sibling = sibling->child;
1009
1010 return sibling;
1011}
1012
f2cb1360
IM
1013static int
1014build_overlap_sched_groups(struct sched_domain *sd, int cpu)
1015{
91eaed0d 1016 struct sched_group *first = NULL, *last = NULL, *sg;
f2cb1360
IM
1017 const struct cpumask *span = sched_domain_span(sd);
1018 struct cpumask *covered = sched_domains_tmpmask;
1019 struct sd_data *sdd = sd->private;
1020 struct sched_domain *sibling;
1021 int i;
1022
1023 cpumask_clear(covered);
1024
0372dd27 1025 for_each_cpu_wrap(i, span, cpu) {
f2cb1360
IM
1026 struct cpumask *sg_span;
1027
1028 if (cpumask_test_cpu(i, covered))
1029 continue;
1030
1031 sibling = *per_cpu_ptr(sdd->sd, i);
1032
c20e1ea4
LRV
1033 /*
1034 * Asymmetric node setups can result in situations where the
1035 * domain tree is of unequal depth, make sure to skip domains
1036 * that already cover the entire range.
1037 *
1038 * In that case build_sched_domains() will have terminated the
1039 * iteration early and our sibling sd spans will be empty.
1040 * Domains should always include the CPU they're built on, so
1041 * check that.
1042 */
f2cb1360
IM
1043 if (!cpumask_test_cpu(i, sched_domain_span(sibling)))
1044 continue;
1045
585b6d27
BS
1046 /*
1047 * Usually we build sched_group by sibling's child sched_domain
1048 * But for machines whose NUMA diameter are 3 or above, we move
1049 * to build sched_group by sibling's proper descendant's child
1050 * domain because sibling's child sched_domain will span out of
1051 * the sched_domain being built as below.
1052 *
1053 * Smallest diameter=3 topology is:
1054 *
1055 * node 0 1 2 3
1056 * 0: 10 20 30 40
1057 * 1: 20 10 20 30
1058 * 2: 30 20 10 20
1059 * 3: 40 30 20 10
1060 *
1061 * 0 --- 1 --- 2 --- 3
1062 *
1063 * NUMA-3 0-3 N/A N/A 0-3
1064 * groups: {0-2},{1-3} {1-3},{0-2}
1065 *
1066 * NUMA-2 0-2 0-3 0-3 1-3
1067 * groups: {0-1},{1-3} {0-2},{2-3} {1-3},{0-1} {2-3},{0-2}
1068 *
1069 * NUMA-1 0-1 0-2 1-3 2-3
1070 * groups: {0},{1} {1},{2},{0} {2},{3},{1} {3},{2}
1071 *
1072 * NUMA-0 0 1 2 3
1073 *
1074 * The NUMA-2 groups for nodes 0 and 3 are obviously buggered, as the
1075 * group span isn't a subset of the domain span.
1076 */
1077 if (sibling->child &&
1078 !cpumask_subset(sched_domain_span(sibling->child), span))
1079 sibling = find_descended_sibling(sd, sibling);
1080
8c033469 1081 sg = build_group_from_child_sched_domain(sibling, cpu);
f2cb1360
IM
1082 if (!sg)
1083 goto fail;
1084
ae4df9d6 1085 sg_span = sched_group_span(sg);
f2cb1360
IM
1086 cpumask_or(covered, covered, sg_span);
1087
585b6d27 1088 init_overlap_sched_group(sibling, sg);
f2cb1360 1089
f2cb1360
IM
1090 if (!first)
1091 first = sg;
1092 if (last)
1093 last->next = sg;
1094 last = sg;
1095 last->next = first;
1096 }
91eaed0d 1097 sd->groups = first;
f2cb1360
IM
1098
1099 return 0;
1100
1101fail:
1102 free_sched_groups(first, 0);
1103
1104 return -ENOMEM;
1105}
1106
35a566e6
PZ
1107
1108/*
1109 * Package topology (also see the load-balance blurb in fair.c)
1110 *
1111 * The scheduler builds a tree structure to represent a number of important
1112 * topology features. By default (default_topology[]) these include:
1113 *
1114 * - Simultaneous multithreading (SMT)
1115 * - Multi-Core Cache (MC)
1116 * - Package (DIE)
1117 *
1118 * Where the last one more or less denotes everything up to a NUMA node.
1119 *
1120 * The tree consists of 3 primary data structures:
1121 *
1122 * sched_domain -> sched_group -> sched_group_capacity
1123 * ^ ^ ^ ^
1124 * `-' `-'
1125 *
97fb7a0a 1126 * The sched_domains are per-CPU and have a two way link (parent & child) and
35a566e6
PZ
1127 * denote the ever growing mask of CPUs belonging to that level of topology.
1128 *
1129 * Each sched_domain has a circular (double) linked list of sched_group's, each
1130 * denoting the domains of the level below (or individual CPUs in case of the
1131 * first domain level). The sched_group linked by a sched_domain includes the
1132 * CPU of that sched_domain [*].
1133 *
1134 * Take for instance a 2 threaded, 2 core, 2 cache cluster part:
1135 *
1136 * CPU 0 1 2 3 4 5 6 7
1137 *
1138 * DIE [ ]
1139 * MC [ ] [ ]
1140 * SMT [ ] [ ] [ ] [ ]
1141 *
1142 * - or -
1143 *
1144 * DIE 0-7 0-7 0-7 0-7 0-7 0-7 0-7 0-7
1145 * MC 0-3 0-3 0-3 0-3 4-7 4-7 4-7 4-7
1146 * SMT 0-1 0-1 2-3 2-3 4-5 4-5 6-7 6-7
1147 *
1148 * CPU 0 1 2 3 4 5 6 7
1149 *
1150 * One way to think about it is: sched_domain moves you up and down among these
1151 * topology levels, while sched_group moves you sideways through it, at child
1152 * domain granularity.
1153 *
1154 * sched_group_capacity ensures each unique sched_group has shared storage.
1155 *
1156 * There are two related construction problems, both require a CPU that
1157 * uniquely identify each group (for a given domain):
1158 *
1159 * - The first is the balance_cpu (see should_we_balance() and the
1160 * load-balance blub in fair.c); for each group we only want 1 CPU to
1161 * continue balancing at a higher domain.
1162 *
1163 * - The second is the sched_group_capacity; we want all identical groups
1164 * to share a single sched_group_capacity.
1165 *
1166 * Since these topologies are exclusive by construction. That is, its
1167 * impossible for an SMT thread to belong to multiple cores, and cores to
1168 * be part of multiple caches. There is a very clear and unique location
1169 * for each CPU in the hierarchy.
1170 *
1171 * Therefore computing a unique CPU for each group is trivial (the iteration
1172 * mask is redundant and set all 1s; all CPUs in a group will end up at _that_
1173 * group), we can simply pick the first CPU in each group.
1174 *
1175 *
1176 * [*] in other words, the first group of each domain is its child domain.
1177 */
1178
0c0e776a 1179static struct sched_group *get_group(int cpu, struct sd_data *sdd)
f2cb1360
IM
1180{
1181 struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu);
1182 struct sched_domain *child = sd->child;
0c0e776a 1183 struct sched_group *sg;
67d4f6ff 1184 bool already_visited;
f2cb1360
IM
1185
1186 if (child)
1187 cpu = cpumask_first(sched_domain_span(child));
1188
0c0e776a
PZ
1189 sg = *per_cpu_ptr(sdd->sg, cpu);
1190 sg->sgc = *per_cpu_ptr(sdd->sgc, cpu);
1191
67d4f6ff
VS
1192 /* Increase refcounts for claim_allocations: */
1193 already_visited = atomic_inc_return(&sg->ref) > 1;
1194 /* sgc visits should follow a similar trend as sg */
1195 WARN_ON(already_visited != (atomic_inc_return(&sg->sgc->ref) > 1));
1196
1197 /* If we have already visited that group, it's already initialized. */
1198 if (already_visited)
1199 return sg;
f2cb1360 1200
0c0e776a 1201 if (child) {
ae4df9d6
PZ
1202 cpumask_copy(sched_group_span(sg), sched_domain_span(child));
1203 cpumask_copy(group_balance_mask(sg), sched_group_span(sg));
16d364ba 1204 sg->flags = child->flags;
0c0e776a 1205 } else {
ae4df9d6 1206 cpumask_set_cpu(cpu, sched_group_span(sg));
e5c14b1f 1207 cpumask_set_cpu(cpu, group_balance_mask(sg));
f2cb1360
IM
1208 }
1209
ae4df9d6 1210 sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sched_group_span(sg));
0c0e776a 1211 sg->sgc->min_capacity = SCHED_CAPACITY_SCALE;
e3d6d0cb 1212 sg->sgc->max_capacity = SCHED_CAPACITY_SCALE;
0c0e776a
PZ
1213
1214 return sg;
f2cb1360
IM
1215}
1216
1217/*
1218 * build_sched_groups will build a circular linked list of the groups
d8743230
VS
1219 * covered by the given span, will set each group's ->cpumask correctly,
1220 * and will initialize their ->sgc.
f2cb1360
IM
1221 *
1222 * Assumes the sched_domain tree is fully constructed
1223 */
1224static int
1225build_sched_groups(struct sched_domain *sd, int cpu)
1226{
1227 struct sched_group *first = NULL, *last = NULL;
1228 struct sd_data *sdd = sd->private;
1229 const struct cpumask *span = sched_domain_span(sd);
1230 struct cpumask *covered;
1231 int i;
1232
f2cb1360
IM
1233 lockdep_assert_held(&sched_domains_mutex);
1234 covered = sched_domains_tmpmask;
1235
1236 cpumask_clear(covered);
1237
0c0e776a 1238 for_each_cpu_wrap(i, span, cpu) {
f2cb1360 1239 struct sched_group *sg;
f2cb1360
IM
1240
1241 if (cpumask_test_cpu(i, covered))
1242 continue;
1243
0c0e776a 1244 sg = get_group(i, sdd);
f2cb1360 1245
ae4df9d6 1246 cpumask_or(covered, covered, sched_group_span(sg));
f2cb1360
IM
1247
1248 if (!first)
1249 first = sg;
1250 if (last)
1251 last->next = sg;
1252 last = sg;
1253 }
1254 last->next = first;
0c0e776a 1255 sd->groups = first;
f2cb1360
IM
1256
1257 return 0;
1258}
1259
1260/*
1261 * Initialize sched groups cpu_capacity.
1262 *
1263 * cpu_capacity indicates the capacity of sched group, which is used while
1264 * distributing the load between different sched groups in a sched domain.
1265 * Typically cpu_capacity for all the groups in a sched domain will be same
1266 * unless there are asymmetries in the topology. If there are asymmetries,
1267 * group having more cpu_capacity will pickup more load compared to the
1268 * group having less cpu_capacity.
1269 */
1270static void init_sched_groups_capacity(int cpu, struct sched_domain *sd)
1271{
1272 struct sched_group *sg = sd->groups;
1273
1274 WARN_ON(!sg);
1275
1276 do {
1277 int cpu, max_cpu = -1;
1278
ae4df9d6 1279 sg->group_weight = cpumask_weight(sched_group_span(sg));
f2cb1360
IM
1280
1281 if (!(sd->flags & SD_ASYM_PACKING))
1282 goto next;
1283
ae4df9d6 1284 for_each_cpu(cpu, sched_group_span(sg)) {
f2cb1360
IM
1285 if (max_cpu < 0)
1286 max_cpu = cpu;
1287 else if (sched_asym_prefer(cpu, max_cpu))
1288 max_cpu = cpu;
1289 }
1290 sg->asym_prefer_cpu = max_cpu;
1291
1292next:
1293 sg = sg->next;
1294 } while (sg != sd->groups);
1295
1296 if (cpu != group_balance_cpu(sg))
1297 return;
1298
1299 update_group_capacity(sd, cpu);
1300}
1301
c744dc4a
BM
1302/*
1303 * Asymmetric CPU capacity bits
1304 */
1305struct asym_cap_data {
1306 struct list_head link;
1307 unsigned long capacity;
1308 unsigned long cpus[];
1309};
1310
1311/*
1312 * Set of available CPUs grouped by their corresponding capacities
1313 * Each list entry contains a CPU mask reflecting CPUs that share the same
1314 * capacity.
1315 * The lifespan of data is unlimited.
1316 */
1317static LIST_HEAD(asym_cap_list);
1318
1319#define cpu_capacity_span(asym_data) to_cpumask((asym_data)->cpus)
1320
1321/*
1322 * Verify whether there is any CPU capacity asymmetry in a given sched domain.
1323 * Provides sd_flags reflecting the asymmetry scope.
1324 */
1325static inline int
1326asym_cpu_capacity_classify(const struct cpumask *sd_span,
1327 const struct cpumask *cpu_map)
1328{
1329 struct asym_cap_data *entry;
1330 int count = 0, miss = 0;
1331
1332 /*
1333 * Count how many unique CPU capacities this domain spans across
1334 * (compare sched_domain CPUs mask with ones representing available
1335 * CPUs capacities). Take into account CPUs that might be offline:
1336 * skip those.
1337 */
1338 list_for_each_entry(entry, &asym_cap_list, link) {
1339 if (cpumask_intersects(sd_span, cpu_capacity_span(entry)))
1340 ++count;
1341 else if (cpumask_intersects(cpu_map, cpu_capacity_span(entry)))
1342 ++miss;
1343 }
1344
1345 WARN_ON_ONCE(!count && !list_empty(&asym_cap_list));
1346
1347 /* No asymmetry detected */
1348 if (count < 2)
1349 return 0;
1350 /* Some of the available CPU capacity values have not been detected */
1351 if (miss)
1352 return SD_ASYM_CPUCAPACITY;
1353
1354 /* Full asymmetry */
1355 return SD_ASYM_CPUCAPACITY | SD_ASYM_CPUCAPACITY_FULL;
1356
1357}
1358
1359static inline void asym_cpu_capacity_update_data(int cpu)
1360{
1361 unsigned long capacity = arch_scale_cpu_capacity(cpu);
1362 struct asym_cap_data *entry = NULL;
1363
1364 list_for_each_entry(entry, &asym_cap_list, link) {
1365 if (capacity == entry->capacity)
1366 goto done;
1367 }
1368
1369 entry = kzalloc(sizeof(*entry) + cpumask_size(), GFP_KERNEL);
1370 if (WARN_ONCE(!entry, "Failed to allocate memory for asymmetry data\n"))
1371 return;
1372 entry->capacity = capacity;
1373 list_add(&entry->link, &asym_cap_list);
1374done:
1375 __cpumask_set_cpu(cpu, cpu_capacity_span(entry));
1376}
1377
1378/*
1379 * Build-up/update list of CPUs grouped by their capacities
1380 * An update requires explicit request to rebuild sched domains
1381 * with state indicating CPU topology changes.
1382 */
1383static void asym_cpu_capacity_scan(void)
1384{
1385 struct asym_cap_data *entry, *next;
1386 int cpu;
1387
1388 list_for_each_entry(entry, &asym_cap_list, link)
1389 cpumask_clear(cpu_capacity_span(entry));
1390
04d4e665 1391 for_each_cpu_and(cpu, cpu_possible_mask, housekeeping_cpumask(HK_TYPE_DOMAIN))
c744dc4a
BM
1392 asym_cpu_capacity_update_data(cpu);
1393
1394 list_for_each_entry_safe(entry, next, &asym_cap_list, link) {
1395 if (cpumask_empty(cpu_capacity_span(entry))) {
1396 list_del(&entry->link);
1397 kfree(entry);
1398 }
1399 }
1400
1401 /*
1402 * Only one capacity value has been detected i.e. this system is symmetric.
1403 * No need to keep this data around.
1404 */
1405 if (list_is_singular(&asym_cap_list)) {
1406 entry = list_first_entry(&asym_cap_list, typeof(*entry), link);
1407 list_del(&entry->link);
1408 kfree(entry);
1409 }
1410}
1411
f2cb1360
IM
1412/*
1413 * Initializers for schedule domains
1414 * Non-inlined to reduce accumulated stack pressure in build_sched_domains()
1415 */
1416
1417static int default_relax_domain_level = -1;
1418int sched_domain_level_max;
1419
1420static int __init setup_relax_domain_level(char *str)
1421{
1422 if (kstrtoint(str, 0, &default_relax_domain_level))
1423 pr_warn("Unable to set relax_domain_level\n");
1424
1425 return 1;
1426}
1427__setup("relax_domain_level=", setup_relax_domain_level);
1428
1429static void set_domain_attribute(struct sched_domain *sd,
1430 struct sched_domain_attr *attr)
1431{
1432 int request;
1433
1434 if (!attr || attr->relax_domain_level < 0) {
1435 if (default_relax_domain_level < 0)
1436 return;
9ae7ab20 1437 request = default_relax_domain_level;
f2cb1360
IM
1438 } else
1439 request = attr->relax_domain_level;
9ae7ab20
VS
1440
1441 if (sd->level > request) {
f2cb1360
IM
1442 /* Turn off idle balance on this domain: */
1443 sd->flags &= ~(SD_BALANCE_WAKE|SD_BALANCE_NEWIDLE);
f2cb1360
IM
1444 }
1445}
1446
1447static void __sdt_free(const struct cpumask *cpu_map);
1448static int __sdt_alloc(const struct cpumask *cpu_map);
1449
1450static void __free_domain_allocs(struct s_data *d, enum s_alloc what,
1451 const struct cpumask *cpu_map)
1452{
1453 switch (what) {
1454 case sa_rootdomain:
1455 if (!atomic_read(&d->rd->refcount))
1456 free_rootdomain(&d->rd->rcu);
df561f66 1457 fallthrough;
f2cb1360
IM
1458 case sa_sd:
1459 free_percpu(d->sd);
df561f66 1460 fallthrough;
f2cb1360
IM
1461 case sa_sd_storage:
1462 __sdt_free(cpu_map);
df561f66 1463 fallthrough;
f2cb1360
IM
1464 case sa_none:
1465 break;
1466 }
1467}
1468
1469static enum s_alloc
1470__visit_domain_allocation_hell(struct s_data *d, const struct cpumask *cpu_map)
1471{
1472 memset(d, 0, sizeof(*d));
1473
1474 if (__sdt_alloc(cpu_map))
1475 return sa_sd_storage;
1476 d->sd = alloc_percpu(struct sched_domain *);
1477 if (!d->sd)
1478 return sa_sd_storage;
1479 d->rd = alloc_rootdomain();
1480 if (!d->rd)
1481 return sa_sd;
97fb7a0a 1482
f2cb1360
IM
1483 return sa_rootdomain;
1484}
1485
1486/*
1487 * NULL the sd_data elements we've used to build the sched_domain and
1488 * sched_group structure so that the subsequent __free_domain_allocs()
1489 * will not free the data we're using.
1490 */
1491static void claim_allocations(int cpu, struct sched_domain *sd)
1492{
1493 struct sd_data *sdd = sd->private;
1494
1495 WARN_ON_ONCE(*per_cpu_ptr(sdd->sd, cpu) != sd);
1496 *per_cpu_ptr(sdd->sd, cpu) = NULL;
1497
1498 if (atomic_read(&(*per_cpu_ptr(sdd->sds, cpu))->ref))
1499 *per_cpu_ptr(sdd->sds, cpu) = NULL;
1500
1501 if (atomic_read(&(*per_cpu_ptr(sdd->sg, cpu))->ref))
1502 *per_cpu_ptr(sdd->sg, cpu) = NULL;
1503
1504 if (atomic_read(&(*per_cpu_ptr(sdd->sgc, cpu))->ref))
1505 *per_cpu_ptr(sdd->sgc, cpu) = NULL;
1506}
1507
1508#ifdef CONFIG_NUMA
f2cb1360 1509enum numa_topology_type sched_numa_topology_type;
97fb7a0a
IM
1510
1511static int sched_domains_numa_levels;
1512static int sched_domains_curr_level;
1513
1514int sched_max_numa_distance;
1515static int *sched_domains_numa_distance;
1516static struct cpumask ***sched_domains_numa_masks;
f2cb1360
IM
1517#endif
1518
1519/*
1520 * SD_flags allowed in topology descriptions.
1521 *
1522 * These flags are purely descriptive of the topology and do not prescribe
1523 * behaviour. Behaviour is artificial and mapped in the below sd_init()
1524 * function:
1525 *
1526 * SD_SHARE_CPUCAPACITY - describes SMT topologies
1527 * SD_SHARE_PKG_RESOURCES - describes shared caches
1528 * SD_NUMA - describes NUMA topologies
f2cb1360
IM
1529 *
1530 * Odd one out, which beside describing the topology has a quirk also
1531 * prescribes the desired behaviour that goes along with it:
1532 *
1533 * SD_ASYM_PACKING - describes SMT quirks
1534 */
1535#define TOPOLOGY_SD_FLAGS \
97fb7a0a 1536 (SD_SHARE_CPUCAPACITY | \
f2cb1360 1537 SD_SHARE_PKG_RESOURCES | \
97fb7a0a 1538 SD_NUMA | \
cfe7ddcb 1539 SD_ASYM_PACKING)
f2cb1360
IM
1540
1541static struct sched_domain *
1542sd_init(struct sched_domain_topology_level *tl,
1543 const struct cpumask *cpu_map,
c744dc4a 1544 struct sched_domain *child, int cpu)
f2cb1360
IM
1545{
1546 struct sd_data *sdd = &tl->data;
1547 struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu);
1548 int sd_id, sd_weight, sd_flags = 0;
c744dc4a 1549 struct cpumask *sd_span;
f2cb1360
IM
1550
1551#ifdef CONFIG_NUMA
1552 /*
1553 * Ugly hack to pass state to sd_numa_mask()...
1554 */
1555 sched_domains_curr_level = tl->numa_level;
1556#endif
1557
1558 sd_weight = cpumask_weight(tl->mask(cpu));
1559
1560 if (tl->sd_flags)
1561 sd_flags = (*tl->sd_flags)();
1562 if (WARN_ONCE(sd_flags & ~TOPOLOGY_SD_FLAGS,
1563 "wrong sd_flags in topology description\n"))
9b1b234b 1564 sd_flags &= TOPOLOGY_SD_FLAGS;
f2cb1360
IM
1565
1566 *sd = (struct sched_domain){
1567 .min_interval = sd_weight,
1568 .max_interval = 2*sd_weight,
6e749913 1569 .busy_factor = 16,
2208cdaa 1570 .imbalance_pct = 117,
f2cb1360
IM
1571
1572 .cache_nice_tries = 0,
f2cb1360 1573
36c5bdc4 1574 .flags = 1*SD_BALANCE_NEWIDLE
f2cb1360
IM
1575 | 1*SD_BALANCE_EXEC
1576 | 1*SD_BALANCE_FORK
1577 | 0*SD_BALANCE_WAKE
1578 | 1*SD_WAKE_AFFINE
1579 | 0*SD_SHARE_CPUCAPACITY
1580 | 0*SD_SHARE_PKG_RESOURCES
1581 | 0*SD_SERIALIZE
9c63e84d 1582 | 1*SD_PREFER_SIBLING
f2cb1360
IM
1583 | 0*SD_NUMA
1584 | sd_flags
1585 ,
1586
1587 .last_balance = jiffies,
1588 .balance_interval = sd_weight,
f2cb1360 1589 .max_newidle_lb_cost = 0,
e60b56e4 1590 .last_decay_max_lb_cost = jiffies,
f2cb1360
IM
1591 .child = child,
1592#ifdef CONFIG_SCHED_DEBUG
1593 .name = tl->name,
1594#endif
1595 };
1596
c744dc4a
BM
1597 sd_span = sched_domain_span(sd);
1598 cpumask_and(sd_span, cpu_map, tl->mask(cpu));
1599 sd_id = cpumask_first(sd_span);
1600
1601 sd->flags |= asym_cpu_capacity_classify(sd_span, cpu_map);
1602
1603 WARN_ONCE((sd->flags & (SD_SHARE_CPUCAPACITY | SD_ASYM_CPUCAPACITY)) ==
1604 (SD_SHARE_CPUCAPACITY | SD_ASYM_CPUCAPACITY),
1605 "CPU capacity asymmetry not supported on SMT\n");
f2cb1360
IM
1606
1607 /*
1608 * Convert topological properties into behaviour.
1609 */
a526d466
MR
1610 /* Don't attempt to spread across CPUs of different capacities. */
1611 if ((sd->flags & SD_ASYM_CPUCAPACITY) && sd->child)
1612 sd->child->flags &= ~SD_PREFER_SIBLING;
f2cb1360
IM
1613
1614 if (sd->flags & SD_SHARE_CPUCAPACITY) {
f2cb1360 1615 sd->imbalance_pct = 110;
f2cb1360
IM
1616
1617 } else if (sd->flags & SD_SHARE_PKG_RESOURCES) {
1618 sd->imbalance_pct = 117;
1619 sd->cache_nice_tries = 1;
f2cb1360
IM
1620
1621#ifdef CONFIG_NUMA
1622 } else if (sd->flags & SD_NUMA) {
1623 sd->cache_nice_tries = 2;
f2cb1360 1624
9c63e84d 1625 sd->flags &= ~SD_PREFER_SIBLING;
f2cb1360 1626 sd->flags |= SD_SERIALIZE;
a55c7454 1627 if (sched_domains_numa_distance[tl->numa_level] > node_reclaim_distance) {
f2cb1360
IM
1628 sd->flags &= ~(SD_BALANCE_EXEC |
1629 SD_BALANCE_FORK |
1630 SD_WAKE_AFFINE);
1631 }
1632
1633#endif
1634 } else {
f2cb1360 1635 sd->cache_nice_tries = 1;
f2cb1360
IM
1636 }
1637
1638 /*
1639 * For all levels sharing cache; connect a sched_domain_shared
1640 * instance.
1641 */
1642 if (sd->flags & SD_SHARE_PKG_RESOURCES) {
1643 sd->shared = *per_cpu_ptr(sdd->sds, sd_id);
1644 atomic_inc(&sd->shared->ref);
1645 atomic_set(&sd->shared->nr_busy_cpus, sd_weight);
1646 }
1647
1648 sd->private = sdd;
1649
1650 return sd;
1651}
1652
1653/*
1654 * Topology list, bottom-up.
1655 */
1656static struct sched_domain_topology_level default_topology[] = {
1657#ifdef CONFIG_SCHED_SMT
1658 { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
1659#endif
778c558f
BS
1660
1661#ifdef CONFIG_SCHED_CLUSTER
1662 { cpu_clustergroup_mask, cpu_cluster_flags, SD_INIT_NAME(CLS) },
1663#endif
1664
f2cb1360
IM
1665#ifdef CONFIG_SCHED_MC
1666 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
1667#endif
1668 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1669 { NULL, },
1670};
1671
1672static struct sched_domain_topology_level *sched_domain_topology =
1673 default_topology;
0fb3978b 1674static struct sched_domain_topology_level *sched_domain_topology_saved;
f2cb1360
IM
1675
1676#define for_each_sd_topology(tl) \
1677 for (tl = sched_domain_topology; tl->mask; tl++)
1678
1679void set_sched_topology(struct sched_domain_topology_level *tl)
1680{
1681 if (WARN_ON_ONCE(sched_smp_initialized))
1682 return;
1683
1684 sched_domain_topology = tl;
0fb3978b 1685 sched_domain_topology_saved = NULL;
f2cb1360
IM
1686}
1687
1688#ifdef CONFIG_NUMA
1689
1690static const struct cpumask *sd_numa_mask(int cpu)
1691{
1692 return sched_domains_numa_masks[sched_domains_curr_level][cpu_to_node(cpu)];
1693}
1694
1695static void sched_numa_warn(const char *str)
1696{
1697 static int done = false;
1698 int i,j;
1699
1700 if (done)
1701 return;
1702
1703 done = true;
1704
1705 printk(KERN_WARNING "ERROR: %s\n\n", str);
1706
1707 for (i = 0; i < nr_node_ids; i++) {
1708 printk(KERN_WARNING " ");
0fb3978b
HY
1709 for (j = 0; j < nr_node_ids; j++) {
1710 if (!node_state(i, N_CPU) || !node_state(j, N_CPU))
1711 printk(KERN_CONT "(%02d) ", node_distance(i,j));
1712 else
1713 printk(KERN_CONT " %02d ", node_distance(i,j));
1714 }
f2cb1360
IM
1715 printk(KERN_CONT "\n");
1716 }
1717 printk(KERN_WARNING "\n");
1718}
1719
1720bool find_numa_distance(int distance)
1721{
0fb3978b
HY
1722 bool found = false;
1723 int i, *distances;
f2cb1360
IM
1724
1725 if (distance == node_distance(0, 0))
1726 return true;
1727
0fb3978b
HY
1728 rcu_read_lock();
1729 distances = rcu_dereference(sched_domains_numa_distance);
1730 if (!distances)
1731 goto unlock;
f2cb1360 1732 for (i = 0; i < sched_domains_numa_levels; i++) {
0fb3978b
HY
1733 if (distances[i] == distance) {
1734 found = true;
1735 break;
1736 }
f2cb1360 1737 }
0fb3978b
HY
1738unlock:
1739 rcu_read_unlock();
f2cb1360 1740
0fb3978b 1741 return found;
f2cb1360
IM
1742}
1743
0fb3978b
HY
1744#define for_each_cpu_node_but(n, nbut) \
1745 for_each_node_state(n, N_CPU) \
1746 if (n == nbut) \
1747 continue; \
1748 else
1749
f2cb1360
IM
1750/*
1751 * A system can have three types of NUMA topology:
1752 * NUMA_DIRECT: all nodes are directly connected, or not a NUMA system
1753 * NUMA_GLUELESS_MESH: some nodes reachable through intermediary nodes
1754 * NUMA_BACKPLANE: nodes can reach other nodes through a backplane
1755 *
1756 * The difference between a glueless mesh topology and a backplane
1757 * topology lies in whether communication between not directly
1758 * connected nodes goes through intermediary nodes (where programs
1759 * could run), or through backplane controllers. This affects
1760 * placement of programs.
1761 *
1762 * The type of topology can be discerned with the following tests:
1763 * - If the maximum distance between any nodes is 1 hop, the system
1764 * is directly connected.
1765 * - If for two nodes A and B, located N > 1 hops away from each other,
1766 * there is an intermediary node C, which is < N hops away from both
1767 * nodes A and B, the system is a glueless mesh.
1768 */
0fb3978b 1769static void init_numa_topology_type(int offline_node)
f2cb1360
IM
1770{
1771 int a, b, c, n;
1772
1773 n = sched_max_numa_distance;
1774
e5e96faf 1775 if (sched_domains_numa_levels <= 2) {
f2cb1360
IM
1776 sched_numa_topology_type = NUMA_DIRECT;
1777 return;
1778 }
1779
0fb3978b
HY
1780 for_each_cpu_node_but(a, offline_node) {
1781 for_each_cpu_node_but(b, offline_node) {
f2cb1360
IM
1782 /* Find two nodes furthest removed from each other. */
1783 if (node_distance(a, b) < n)
1784 continue;
1785
1786 /* Is there an intermediary node between a and b? */
0fb3978b 1787 for_each_cpu_node_but(c, offline_node) {
f2cb1360
IM
1788 if (node_distance(a, c) < n &&
1789 node_distance(b, c) < n) {
1790 sched_numa_topology_type =
1791 NUMA_GLUELESS_MESH;
1792 return;
1793 }
1794 }
1795
1796 sched_numa_topology_type = NUMA_BACKPLANE;
1797 return;
1798 }
1799 }
0fb3978b
HY
1800
1801 pr_err("Failed to find a NUMA topology type, defaulting to DIRECT\n");
1802 sched_numa_topology_type = NUMA_DIRECT;
f2cb1360
IM
1803}
1804
620a6dc4
VS
1805
1806#define NR_DISTANCE_VALUES (1 << DISTANCE_BITS)
1807
0fb3978b 1808void sched_init_numa(int offline_node)
f2cb1360 1809{
f2cb1360 1810 struct sched_domain_topology_level *tl;
620a6dc4
VS
1811 unsigned long *distance_map;
1812 int nr_levels = 0;
1813 int i, j;
0fb3978b
HY
1814 int *distances;
1815 struct cpumask ***masks;
051f3ca0 1816
f2cb1360
IM
1817 /*
1818 * O(nr_nodes^2) deduplicating selection sort -- in order to find the
1819 * unique distances in the node_distance() table.
f2cb1360 1820 */
620a6dc4
VS
1821 distance_map = bitmap_alloc(NR_DISTANCE_VALUES, GFP_KERNEL);
1822 if (!distance_map)
1823 return;
1824
1825 bitmap_zero(distance_map, NR_DISTANCE_VALUES);
0fb3978b
HY
1826 for_each_cpu_node_but(i, offline_node) {
1827 for_each_cpu_node_but(j, offline_node) {
620a6dc4 1828 int distance = node_distance(i, j);
f2cb1360 1829
620a6dc4
VS
1830 if (distance < LOCAL_DISTANCE || distance >= NR_DISTANCE_VALUES) {
1831 sched_numa_warn("Invalid distance value range");
0fb3978b 1832 bitmap_free(distance_map);
620a6dc4 1833 return;
f2cb1360 1834 }
620a6dc4
VS
1835
1836 bitmap_set(distance_map, distance, 1);
f2cb1360 1837 }
620a6dc4
VS
1838 }
1839 /*
1840 * We can now figure out how many unique distance values there are and
1841 * allocate memory accordingly.
1842 */
1843 nr_levels = bitmap_weight(distance_map, NR_DISTANCE_VALUES);
f2cb1360 1844
0fb3978b
HY
1845 distances = kcalloc(nr_levels, sizeof(int), GFP_KERNEL);
1846 if (!distances) {
620a6dc4
VS
1847 bitmap_free(distance_map);
1848 return;
f2cb1360
IM
1849 }
1850
620a6dc4
VS
1851 for (i = 0, j = 0; i < nr_levels; i++, j++) {
1852 j = find_next_bit(distance_map, NR_DISTANCE_VALUES, j);
0fb3978b 1853 distances[i] = j;
620a6dc4 1854 }
0fb3978b 1855 rcu_assign_pointer(sched_domains_numa_distance, distances);
620a6dc4
VS
1856
1857 bitmap_free(distance_map);
1858
f2cb1360 1859 /*
620a6dc4 1860 * 'nr_levels' contains the number of unique distances
f2cb1360
IM
1861 *
1862 * The sched_domains_numa_distance[] array includes the actual distance
1863 * numbers.
1864 */
1865
1866 /*
1867 * Here, we should temporarily reset sched_domains_numa_levels to 0.
1868 * If it fails to allocate memory for array sched_domains_numa_masks[][],
620a6dc4 1869 * the array will contain less then 'nr_levels' members. This could be
f2cb1360
IM
1870 * dangerous when we use it to iterate array sched_domains_numa_masks[][]
1871 * in other functions.
1872 *
620a6dc4 1873 * We reset it to 'nr_levels' at the end of this function.
f2cb1360
IM
1874 */
1875 sched_domains_numa_levels = 0;
1876
0fb3978b
HY
1877 masks = kzalloc(sizeof(void *) * nr_levels, GFP_KERNEL);
1878 if (!masks)
f2cb1360
IM
1879 return;
1880
1881 /*
1882 * Now for each level, construct a mask per node which contains all
1883 * CPUs of nodes that are that many hops away from us.
1884 */
620a6dc4 1885 for (i = 0; i < nr_levels; i++) {
0fb3978b
HY
1886 masks[i] = kzalloc(nr_node_ids * sizeof(void *), GFP_KERNEL);
1887 if (!masks[i])
f2cb1360
IM
1888 return;
1889
0fb3978b 1890 for_each_cpu_node_but(j, offline_node) {
f2cb1360 1891 struct cpumask *mask = kzalloc(cpumask_size(), GFP_KERNEL);
620a6dc4
VS
1892 int k;
1893
f2cb1360
IM
1894 if (!mask)
1895 return;
1896
0fb3978b 1897 masks[i][j] = mask;
0083242c 1898
0fb3978b 1899 for_each_cpu_node_but(k, offline_node) {
620a6dc4
VS
1900 if (sched_debug() && (node_distance(j, k) != node_distance(k, j)))
1901 sched_numa_warn("Node-distance not symmetric");
1902
f2cb1360
IM
1903 if (node_distance(j, k) > sched_domains_numa_distance[i])
1904 continue;
1905
1906 cpumask_or(mask, mask, cpumask_of_node(k));
1907 }
1908 }
1909 }
0fb3978b 1910 rcu_assign_pointer(sched_domains_numa_masks, masks);
f2cb1360
IM
1911
1912 /* Compute default topology size */
1913 for (i = 0; sched_domain_topology[i].mask; i++);
1914
71e5f664 1915 tl = kzalloc((i + nr_levels + 1) *
f2cb1360
IM
1916 sizeof(struct sched_domain_topology_level), GFP_KERNEL);
1917 if (!tl)
1918 return;
1919
1920 /*
1921 * Copy the default topology bits..
1922 */
1923 for (i = 0; sched_domain_topology[i].mask; i++)
1924 tl[i] = sched_domain_topology[i];
1925
051f3ca0
SS
1926 /*
1927 * Add the NUMA identity distance, aka single NODE.
1928 */
1929 tl[i++] = (struct sched_domain_topology_level){
1930 .mask = sd_numa_mask,
1931 .numa_level = 0,
1932 SD_INIT_NAME(NODE)
1933 };
1934
f2cb1360
IM
1935 /*
1936 * .. and append 'j' levels of NUMA goodness.
1937 */
620a6dc4 1938 for (j = 1; j < nr_levels; i++, j++) {
f2cb1360
IM
1939 tl[i] = (struct sched_domain_topology_level){
1940 .mask = sd_numa_mask,
1941 .sd_flags = cpu_numa_flags,
1942 .flags = SDTL_OVERLAP,
1943 .numa_level = j,
1944 SD_INIT_NAME(NUMA)
1945 };
1946 }
1947
0fb3978b 1948 sched_domain_topology_saved = sched_domain_topology;
f2cb1360
IM
1949 sched_domain_topology = tl;
1950
620a6dc4 1951 sched_domains_numa_levels = nr_levels;
0fb3978b 1952 WRITE_ONCE(sched_max_numa_distance, sched_domains_numa_distance[nr_levels - 1]);
0083242c 1953
0fb3978b 1954 init_numa_topology_type(offline_node);
0083242c
VS
1955}
1956
0083242c 1957
0fb3978b
HY
1958static void sched_reset_numa(void)
1959{
1960 int nr_levels, *distances;
1961 struct cpumask ***masks;
0083242c 1962
0fb3978b
HY
1963 nr_levels = sched_domains_numa_levels;
1964 sched_domains_numa_levels = 0;
1965 sched_max_numa_distance = 0;
1966 sched_numa_topology_type = NUMA_DIRECT;
1967 distances = sched_domains_numa_distance;
1968 rcu_assign_pointer(sched_domains_numa_distance, NULL);
1969 masks = sched_domains_numa_masks;
1970 rcu_assign_pointer(sched_domains_numa_masks, NULL);
1971 if (distances || masks) {
1972 int i, j;
1973
1974 synchronize_rcu();
1975 kfree(distances);
1976 for (i = 0; i < nr_levels && masks; i++) {
1977 if (!masks[i])
0083242c 1978 continue;
0fb3978b
HY
1979 for_each_node(j)
1980 kfree(masks[i][j]);
1981 kfree(masks[i]);
0083242c 1982 }
0fb3978b 1983 kfree(masks);
0083242c 1984 }
0fb3978b
HY
1985 if (sched_domain_topology_saved) {
1986 kfree(sched_domain_topology);
1987 sched_domain_topology = sched_domain_topology_saved;
1988 sched_domain_topology_saved = NULL;
1989 }
1990}
1991
1992/*
1993 * Call with hotplug lock held
1994 */
1995void sched_update_numa(int cpu, bool online)
1996{
1997 int node;
0083242c 1998
0fb3978b 1999 node = cpu_to_node(cpu);
0083242c 2000 /*
0fb3978b
HY
2001 * Scheduler NUMA topology is updated when the first CPU of a
2002 * node is onlined or the last CPU of a node is offlined.
0083242c 2003 */
0fb3978b
HY
2004 if (cpumask_weight(cpumask_of_node(node)) != 1)
2005 return;
2006
2007 sched_reset_numa();
2008 sched_init_numa(online ? NUMA_NO_NODE : node);
f2cb1360
IM
2009}
2010
2011void sched_domains_numa_masks_set(unsigned int cpu)
2012{
2013 int node = cpu_to_node(cpu);
2014 int i, j;
2015
2016 for (i = 0; i < sched_domains_numa_levels; i++) {
2017 for (j = 0; j < nr_node_ids; j++) {
0fb3978b 2018 if (!node_state(j, N_CPU))
0083242c
VS
2019 continue;
2020
2021 /* Set ourselves in the remote node's masks */
f2cb1360
IM
2022 if (node_distance(j, node) <= sched_domains_numa_distance[i])
2023 cpumask_set_cpu(cpu, sched_domains_numa_masks[i][j]);
2024 }
2025 }
2026}
2027
2028void sched_domains_numa_masks_clear(unsigned int cpu)
2029{
2030 int i, j;
2031
2032 for (i = 0; i < sched_domains_numa_levels; i++) {
0fb3978b
HY
2033 for (j = 0; j < nr_node_ids; j++) {
2034 if (sched_domains_numa_masks[i][j])
2035 cpumask_clear_cpu(cpu, sched_domains_numa_masks[i][j]);
2036 }
f2cb1360
IM
2037 }
2038}
2039
e0e8d491
WL
2040/*
2041 * sched_numa_find_closest() - given the NUMA topology, find the cpu
2042 * closest to @cpu from @cpumask.
2043 * cpumask: cpumask to find a cpu from
2044 * cpu: cpu to be close to
2045 *
2046 * returns: cpu, or nr_cpu_ids when nothing found.
2047 */
2048int sched_numa_find_closest(const struct cpumask *cpus, int cpu)
2049{
0fb3978b
HY
2050 int i, j = cpu_to_node(cpu), found = nr_cpu_ids;
2051 struct cpumask ***masks;
e0e8d491 2052
0fb3978b
HY
2053 rcu_read_lock();
2054 masks = rcu_dereference(sched_domains_numa_masks);
2055 if (!masks)
2056 goto unlock;
e0e8d491 2057 for (i = 0; i < sched_domains_numa_levels; i++) {
0fb3978b
HY
2058 if (!masks[i][j])
2059 break;
2060 cpu = cpumask_any_and(cpus, masks[i][j]);
2061 if (cpu < nr_cpu_ids) {
2062 found = cpu;
2063 break;
2064 }
e0e8d491 2065 }
0fb3978b
HY
2066unlock:
2067 rcu_read_unlock();
2068
2069 return found;
e0e8d491
WL
2070}
2071
cd7f5535
YN
2072struct __cmp_key {
2073 const struct cpumask *cpus;
2074 struct cpumask ***masks;
2075 int node;
2076 int cpu;
2077 int w;
2078};
2079
2080static int hop_cmp(const void *a, const void *b)
2081{
01bb11ad 2082 struct cpumask **prev_hop, **cur_hop = *(struct cpumask ***)b;
cd7f5535
YN
2083 struct __cmp_key *k = (struct __cmp_key *)a;
2084
2085 if (cpumask_weight_and(k->cpus, cur_hop[k->node]) <= k->cpu)
2086 return 1;
2087
01bb11ad
YN
2088 if (b == k->masks) {
2089 k->w = 0;
2090 return 0;
2091 }
2092
2093 prev_hop = *((struct cpumask ***)b - 1);
2094 k->w = cpumask_weight_and(k->cpus, prev_hop[k->node]);
cd7f5535
YN
2095 if (k->w <= k->cpu)
2096 return 0;
2097
2098 return -1;
2099}
2100
2101/*
2102 * sched_numa_find_nth_cpu() - given the NUMA topology, find the Nth next cpu
2103 * closest to @cpu from @cpumask.
2104 * cpumask: cpumask to find a cpu from
2105 * cpu: Nth cpu to find
2106 *
2107 * returns: cpu, or nr_cpu_ids when nothing found.
2108 */
2109int sched_numa_find_nth_cpu(const struct cpumask *cpus, int cpu, int node)
2110{
2111 struct __cmp_key k = { .cpus = cpus, .node = node, .cpu = cpu };
2112 struct cpumask ***hop_masks;
2113 int hop, ret = nr_cpu_ids;
2114
2115 rcu_read_lock();
2116
2117 k.masks = rcu_dereference(sched_domains_numa_masks);
2118 if (!k.masks)
2119 goto unlock;
2120
2121 hop_masks = bsearch(&k, k.masks, sched_domains_numa_levels, sizeof(k.masks[0]), hop_cmp);
2122 hop = hop_masks - k.masks;
2123
2124 ret = hop ?
2125 cpumask_nth_and_andnot(cpu - k.w, cpus, k.masks[hop][node], k.masks[hop-1][node]) :
2126 cpumask_nth_and(cpu, cpus, k.masks[0][node]);
2127unlock:
2128 rcu_read_unlock();
2129 return ret;
2130}
2131EXPORT_SYMBOL_GPL(sched_numa_find_nth_cpu);
9feae658
VS
2132
2133/**
2134 * sched_numa_hop_mask() - Get the cpumask of CPUs at most @hops hops away from
2135 * @node
2136 * @node: The node to count hops from.
2137 * @hops: Include CPUs up to that many hops away. 0 means local node.
2138 *
2139 * Return: On success, a pointer to a cpumask of CPUs at most @hops away from
2140 * @node, an error value otherwise.
2141 *
2142 * Requires rcu_lock to be held. Returned cpumask is only valid within that
2143 * read-side section, copy it if required beyond that.
2144 *
2145 * Note that not all hops are equal in distance; see sched_init_numa() for how
2146 * distances and masks are handled.
2147 * Also note that this is a reflection of sched_domains_numa_masks, which may change
2148 * during the lifetime of the system (offline nodes are taken out of the masks).
2149 */
2150const struct cpumask *sched_numa_hop_mask(unsigned int node, unsigned int hops)
2151{
2152 struct cpumask ***masks;
2153
2154 if (node >= nr_node_ids || hops >= sched_domains_numa_levels)
2155 return ERR_PTR(-EINVAL);
2156
2157 masks = rcu_dereference(sched_domains_numa_masks);
2158 if (!masks)
2159 return ERR_PTR(-EBUSY);
2160
2161 return masks[hops][node];
2162}
2163EXPORT_SYMBOL_GPL(sched_numa_hop_mask);
2164
f2cb1360
IM
2165#endif /* CONFIG_NUMA */
2166
2167static int __sdt_alloc(const struct cpumask *cpu_map)
2168{
2169 struct sched_domain_topology_level *tl;
2170 int j;
2171
2172 for_each_sd_topology(tl) {
2173 struct sd_data *sdd = &tl->data;
2174
2175 sdd->sd = alloc_percpu(struct sched_domain *);
2176 if (!sdd->sd)
2177 return -ENOMEM;
2178
2179 sdd->sds = alloc_percpu(struct sched_domain_shared *);
2180 if (!sdd->sds)
2181 return -ENOMEM;
2182
2183 sdd->sg = alloc_percpu(struct sched_group *);
2184 if (!sdd->sg)
2185 return -ENOMEM;
2186
2187 sdd->sgc = alloc_percpu(struct sched_group_capacity *);
2188 if (!sdd->sgc)
2189 return -ENOMEM;
2190
2191 for_each_cpu(j, cpu_map) {
2192 struct sched_domain *sd;
2193 struct sched_domain_shared *sds;
2194 struct sched_group *sg;
2195 struct sched_group_capacity *sgc;
2196
2197 sd = kzalloc_node(sizeof(struct sched_domain) + cpumask_size(),
2198 GFP_KERNEL, cpu_to_node(j));
2199 if (!sd)
2200 return -ENOMEM;
2201
2202 *per_cpu_ptr(sdd->sd, j) = sd;
2203
2204 sds = kzalloc_node(sizeof(struct sched_domain_shared),
2205 GFP_KERNEL, cpu_to_node(j));
2206 if (!sds)
2207 return -ENOMEM;
2208
2209 *per_cpu_ptr(sdd->sds, j) = sds;
2210
2211 sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(),
2212 GFP_KERNEL, cpu_to_node(j));
2213 if (!sg)
2214 return -ENOMEM;
2215
2216 sg->next = sg;
2217
2218 *per_cpu_ptr(sdd->sg, j) = sg;
2219
2220 sgc = kzalloc_node(sizeof(struct sched_group_capacity) + cpumask_size(),
2221 GFP_KERNEL, cpu_to_node(j));
2222 if (!sgc)
2223 return -ENOMEM;
2224
005f874d
PZ
2225#ifdef CONFIG_SCHED_DEBUG
2226 sgc->id = j;
2227#endif
2228
f2cb1360
IM
2229 *per_cpu_ptr(sdd->sgc, j) = sgc;
2230 }
2231 }
2232
2233 return 0;
2234}
2235
2236static void __sdt_free(const struct cpumask *cpu_map)
2237{
2238 struct sched_domain_topology_level *tl;
2239 int j;
2240
2241 for_each_sd_topology(tl) {
2242 struct sd_data *sdd = &tl->data;
2243
2244 for_each_cpu(j, cpu_map) {
2245 struct sched_domain *sd;
2246
2247 if (sdd->sd) {
2248 sd = *per_cpu_ptr(sdd->sd, j);
2249 if (sd && (sd->flags & SD_OVERLAP))
2250 free_sched_groups(sd->groups, 0);
2251 kfree(*per_cpu_ptr(sdd->sd, j));
2252 }
2253
2254 if (sdd->sds)
2255 kfree(*per_cpu_ptr(sdd->sds, j));
2256 if (sdd->sg)
2257 kfree(*per_cpu_ptr(sdd->sg, j));
2258 if (sdd->sgc)
2259 kfree(*per_cpu_ptr(sdd->sgc, j));
2260 }
2261 free_percpu(sdd->sd);
2262 sdd->sd = NULL;
2263 free_percpu(sdd->sds);
2264 sdd->sds = NULL;
2265 free_percpu(sdd->sg);
2266 sdd->sg = NULL;
2267 free_percpu(sdd->sgc);
2268 sdd->sgc = NULL;
2269 }
2270}
2271
181a80d1 2272static struct sched_domain *build_sched_domain(struct sched_domain_topology_level *tl,
f2cb1360 2273 const struct cpumask *cpu_map, struct sched_domain_attr *attr,
c744dc4a 2274 struct sched_domain *child, int cpu)
f2cb1360 2275{
c744dc4a 2276 struct sched_domain *sd = sd_init(tl, cpu_map, child, cpu);
f2cb1360
IM
2277
2278 if (child) {
2279 sd->level = child->level + 1;
2280 sched_domain_level_max = max(sched_domain_level_max, sd->level);
2281 child->parent = sd;
2282
2283 if (!cpumask_subset(sched_domain_span(child),
2284 sched_domain_span(sd))) {
2285 pr_err("BUG: arch topology borken\n");
2286#ifdef CONFIG_SCHED_DEBUG
2287 pr_err(" the %s domain not a subset of the %s domain\n",
2288 child->name, sd->name);
2289#endif
97fb7a0a 2290 /* Fixup, ensure @sd has at least @child CPUs. */
f2cb1360
IM
2291 cpumask_or(sched_domain_span(sd),
2292 sched_domain_span(sd),
2293 sched_domain_span(child));
2294 }
2295
2296 }
2297 set_domain_attribute(sd, attr);
2298
2299 return sd;
2300}
2301
ccf74128
VS
2302/*
2303 * Ensure topology masks are sane, i.e. there are no conflicts (overlaps) for
2304 * any two given CPUs at this (non-NUMA) topology level.
2305 */
2306static bool topology_span_sane(struct sched_domain_topology_level *tl,
2307 const struct cpumask *cpu_map, int cpu)
2308{
2309 int i;
2310
2311 /* NUMA levels are allowed to overlap */
2312 if (tl->flags & SDTL_OVERLAP)
2313 return true;
2314
2315 /*
2316 * Non-NUMA levels cannot partially overlap - they must be either
2317 * completely equal or completely disjoint. Otherwise we can end up
2318 * breaking the sched_group lists - i.e. a later get_group() pass
2319 * breaks the linking done for an earlier span.
2320 */
2321 for_each_cpu(i, cpu_map) {
2322 if (i == cpu)
2323 continue;
2324 /*
2325 * We should 'and' all those masks with 'cpu_map' to exactly
2326 * match the topology we're about to build, but that can only
2327 * remove CPUs, which only lessens our ability to detect
2328 * overlaps
2329 */
2330 if (!cpumask_equal(tl->mask(cpu), tl->mask(i)) &&
2331 cpumask_intersects(tl->mask(cpu), tl->mask(i)))
2332 return false;
2333 }
2334
2335 return true;
2336}
2337
f2cb1360
IM
2338/*
2339 * Build sched domains for a given set of CPUs and attach the sched domains
2340 * to the individual CPUs
2341 */
2342static int
2343build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *attr)
2344{
cd1cb335 2345 enum s_alloc alloc_state = sa_none;
f2cb1360
IM
2346 struct sched_domain *sd;
2347 struct s_data d;
2348 struct rq *rq = NULL;
2349 int i, ret = -ENOMEM;
df054e84 2350 bool has_asym = false;
f2cb1360 2351
cd1cb335
VS
2352 if (WARN_ON(cpumask_empty(cpu_map)))
2353 goto error;
2354
f2cb1360
IM
2355 alloc_state = __visit_domain_allocation_hell(&d, cpu_map);
2356 if (alloc_state != sa_rootdomain)
2357 goto error;
2358
2359 /* Set up domains for CPUs specified by the cpu_map: */
2360 for_each_cpu(i, cpu_map) {
2361 struct sched_domain_topology_level *tl;
2362
2363 sd = NULL;
2364 for_each_sd_topology(tl) {
05484e09 2365
ccf74128
VS
2366 if (WARN_ON(!topology_span_sane(tl, cpu_map, i)))
2367 goto error;
2368
c744dc4a
BM
2369 sd = build_sched_domain(tl, cpu_map, attr, sd, i);
2370
2371 has_asym |= sd->flags & SD_ASYM_CPUCAPACITY;
05484e09 2372
f2cb1360
IM
2373 if (tl == sched_domain_topology)
2374 *per_cpu_ptr(d.sd, i) = sd;
af85596c 2375 if (tl->flags & SDTL_OVERLAP)
f2cb1360
IM
2376 sd->flags |= SD_OVERLAP;
2377 if (cpumask_equal(cpu_map, sched_domain_span(sd)))
2378 break;
2379 }
2380 }
2381
2382 /* Build the groups for the domains */
2383 for_each_cpu(i, cpu_map) {
2384 for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) {
2385 sd->span_weight = cpumask_weight(sched_domain_span(sd));
2386 if (sd->flags & SD_OVERLAP) {
2387 if (build_overlap_sched_groups(sd, i))
2388 goto error;
2389 } else {
2390 if (build_sched_groups(sd, i))
2391 goto error;
2392 }
2393 }
2394 }
2395
e496132e
MG
2396 /*
2397 * Calculate an allowed NUMA imbalance such that LLCs do not get
2398 * imbalanced.
2399 */
2400 for_each_cpu(i, cpu_map) {
2401 unsigned int imb = 0;
2402 unsigned int imb_span = 1;
2403
2404 for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) {
2405 struct sched_domain *child = sd->child;
2406
2407 if (!(sd->flags & SD_SHARE_PKG_RESOURCES) && child &&
2408 (child->flags & SD_SHARE_PKG_RESOURCES)) {
7f434dff 2409 struct sched_domain __rcu *top_p;
e496132e
MG
2410 unsigned int nr_llcs;
2411
2412 /*
2413 * For a single LLC per node, allow an
026b98a9
MG
2414 * imbalance up to 12.5% of the node. This is
2415 * arbitrary cutoff based two factors -- SMT and
2416 * memory channels. For SMT-2, the intent is to
2417 * avoid premature sharing of HT resources but
2418 * SMT-4 or SMT-8 *may* benefit from a different
2419 * cutoff. For memory channels, this is a very
2420 * rough estimate of how many channels may be
2421 * active and is based on recent CPUs with
2422 * many cores.
e496132e
MG
2423 *
2424 * For multiple LLCs, allow an imbalance
2425 * until multiple tasks would share an LLC
2426 * on one node while LLCs on another node
026b98a9
MG
2427 * remain idle. This assumes that there are
2428 * enough logical CPUs per LLC to avoid SMT
2429 * factors and that there is a correlation
2430 * between LLCs and memory channels.
e496132e
MG
2431 */
2432 nr_llcs = sd->span_weight / child->span_weight;
2433 if (nr_llcs == 1)
026b98a9 2434 imb = sd->span_weight >> 3;
e496132e
MG
2435 else
2436 imb = nr_llcs;
026b98a9 2437 imb = max(1U, imb);
e496132e
MG
2438 sd->imb_numa_nr = imb;
2439
2440 /* Set span based on the first NUMA domain. */
7f434dff 2441 top_p = sd->parent;
e496132e 2442 while (top_p && !(top_p->flags & SD_NUMA)) {
7f434dff 2443 top_p = top_p->parent;
e496132e
MG
2444 }
2445 imb_span = top_p ? top_p->span_weight : sd->span_weight;
2446 } else {
2447 int factor = max(1U, (sd->span_weight / imb_span));
2448
2449 sd->imb_numa_nr = imb * factor;
2450 }
2451 }
2452 }
2453
f2cb1360
IM
2454 /* Calculate CPU capacity for physical packages and nodes */
2455 for (i = nr_cpumask_bits-1; i >= 0; i--) {
2456 if (!cpumask_test_cpu(i, cpu_map))
2457 continue;
2458
2459 for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) {
2460 claim_allocations(i, sd);
2461 init_sched_groups_capacity(i, sd);
2462 }
2463 }
2464
2465 /* Attach the domains */
2466 rcu_read_lock();
2467 for_each_cpu(i, cpu_map) {
2468 rq = cpu_rq(i);
2469 sd = *per_cpu_ptr(d.sd, i);
2470
2471 /* Use READ_ONCE()/WRITE_ONCE() to avoid load/store tearing: */
2472 if (rq->cpu_capacity_orig > READ_ONCE(d.rd->max_cpu_capacity))
2473 WRITE_ONCE(d.rd->max_cpu_capacity, rq->cpu_capacity_orig);
2474
2475 cpu_attach_domain(sd, d.rd, i);
2476 }
2477 rcu_read_unlock();
2478
df054e84 2479 if (has_asym)
e284df70 2480 static_branch_inc_cpuslocked(&sched_asym_cpucapacity);
df054e84 2481
9406415f 2482 if (rq && sched_debug_verbose) {
bf5015a5 2483 pr_info("root domain span: %*pbl (max cpu_capacity = %lu)\n",
f2cb1360
IM
2484 cpumask_pr_args(cpu_map), rq->rd->max_cpu_capacity);
2485 }
2486
2487 ret = 0;
2488error:
2489 __free_domain_allocs(&d, alloc_state, cpu_map);
97fb7a0a 2490
f2cb1360
IM
2491 return ret;
2492}
2493
2494/* Current sched domains: */
2495static cpumask_var_t *doms_cur;
2496
2497/* Number of sched domains in 'doms_cur': */
2498static int ndoms_cur;
2499
3b03706f 2500/* Attributes of custom domains in 'doms_cur' */
f2cb1360
IM
2501static struct sched_domain_attr *dattr_cur;
2502
2503/*
2504 * Special case: If a kmalloc() of a doms_cur partition (array of
2505 * cpumask) fails, then fallback to a single sched domain,
2506 * as determined by the single cpumask fallback_doms.
2507 */
8d5dc512 2508static cpumask_var_t fallback_doms;
f2cb1360
IM
2509
2510/*
2511 * arch_update_cpu_topology lets virtualized architectures update the
2512 * CPU core maps. It is supposed to return 1 if the topology changed
2513 * or 0 if it stayed the same.
2514 */
2515int __weak arch_update_cpu_topology(void)
2516{
2517 return 0;
2518}
2519
2520cpumask_var_t *alloc_sched_domains(unsigned int ndoms)
2521{
2522 int i;
2523 cpumask_var_t *doms;
2524
6da2ec56 2525 doms = kmalloc_array(ndoms, sizeof(*doms), GFP_KERNEL);
f2cb1360
IM
2526 if (!doms)
2527 return NULL;
2528 for (i = 0; i < ndoms; i++) {
2529 if (!alloc_cpumask_var(&doms[i], GFP_KERNEL)) {
2530 free_sched_domains(doms, i);
2531 return NULL;
2532 }
2533 }
2534 return doms;
2535}
2536
2537void free_sched_domains(cpumask_var_t doms[], unsigned int ndoms)
2538{
2539 unsigned int i;
2540 for (i = 0; i < ndoms; i++)
2541 free_cpumask_var(doms[i]);
2542 kfree(doms);
2543}
2544
2545/*
cb0c0414
JL
2546 * Set up scheduler domains and groups. For now this just excludes isolated
2547 * CPUs, but could be used to exclude other special cases in the future.
f2cb1360 2548 */
ef90cf22 2549int __init sched_init_domains(const struct cpumask *cpu_map)
f2cb1360
IM
2550{
2551 int err;
2552
8d5dc512 2553 zalloc_cpumask_var(&sched_domains_tmpmask, GFP_KERNEL);
1676330e 2554 zalloc_cpumask_var(&sched_domains_tmpmask2, GFP_KERNEL);
8d5dc512
PZ
2555 zalloc_cpumask_var(&fallback_doms, GFP_KERNEL);
2556
f2cb1360 2557 arch_update_cpu_topology();
c744dc4a 2558 asym_cpu_capacity_scan();
f2cb1360
IM
2559 ndoms_cur = 1;
2560 doms_cur = alloc_sched_domains(ndoms_cur);
2561 if (!doms_cur)
2562 doms_cur = &fallback_doms;
04d4e665 2563 cpumask_and(doms_cur[0], cpu_map, housekeeping_cpumask(HK_TYPE_DOMAIN));
f2cb1360 2564 err = build_sched_domains(doms_cur[0], NULL);
f2cb1360
IM
2565
2566 return err;
2567}
2568
2569/*
2570 * Detach sched domains from a group of CPUs specified in cpu_map
2571 * These CPUs will now be attached to the NULL domain
2572 */
2573static void detach_destroy_domains(const struct cpumask *cpu_map)
2574{
e284df70 2575 unsigned int cpu = cpumask_any(cpu_map);
f2cb1360
IM
2576 int i;
2577
e284df70
VS
2578 if (rcu_access_pointer(per_cpu(sd_asym_cpucapacity, cpu)))
2579 static_branch_dec_cpuslocked(&sched_asym_cpucapacity);
2580
f2cb1360
IM
2581 rcu_read_lock();
2582 for_each_cpu(i, cpu_map)
2583 cpu_attach_domain(NULL, &def_root_domain, i);
2584 rcu_read_unlock();
2585}
2586
2587/* handle null as "default" */
2588static int dattrs_equal(struct sched_domain_attr *cur, int idx_cur,
2589 struct sched_domain_attr *new, int idx_new)
2590{
2591 struct sched_domain_attr tmp;
2592
2593 /* Fast path: */
2594 if (!new && !cur)
2595 return 1;
2596
2597 tmp = SD_ATTR_INIT;
97fb7a0a 2598
f2cb1360
IM
2599 return !memcmp(cur ? (cur + idx_cur) : &tmp,
2600 new ? (new + idx_new) : &tmp,
2601 sizeof(struct sched_domain_attr));
2602}
2603
2604/*
2605 * Partition sched domains as specified by the 'ndoms_new'
2606 * cpumasks in the array doms_new[] of cpumasks. This compares
2607 * doms_new[] to the current sched domain partitioning, doms_cur[].
2608 * It destroys each deleted domain and builds each new domain.
2609 *
2610 * 'doms_new' is an array of cpumask_var_t's of length 'ndoms_new'.
2611 * The masks don't intersect (don't overlap.) We should setup one
2612 * sched domain for each mask. CPUs not in any of the cpumasks will
2613 * not be load balanced. If the same cpumask appears both in the
2614 * current 'doms_cur' domains and in the new 'doms_new', we can leave
2615 * it as it is.
2616 *
2617 * The passed in 'doms_new' should be allocated using
2618 * alloc_sched_domains. This routine takes ownership of it and will
2619 * free_sched_domains it when done with it. If the caller failed the
2620 * alloc call, then it can pass in doms_new == NULL && ndoms_new == 1,
2621 * and partition_sched_domains() will fallback to the single partition
2622 * 'fallback_doms', it also forces the domains to be rebuilt.
2623 *
2624 * If doms_new == NULL it will be replaced with cpu_online_mask.
2625 * ndoms_new == 0 is a special case for destroying existing domains,
2626 * and it will not create the default domain.
2627 *
c22645f4 2628 * Call with hotplug lock and sched_domains_mutex held
f2cb1360 2629 */
c22645f4
MP
2630void partition_sched_domains_locked(int ndoms_new, cpumask_var_t doms_new[],
2631 struct sched_domain_attr *dattr_new)
f2cb1360 2632{
1f74de87 2633 bool __maybe_unused has_eas = false;
f2cb1360
IM
2634 int i, j, n;
2635 int new_topology;
2636
c22645f4 2637 lockdep_assert_held(&sched_domains_mutex);
f2cb1360 2638
f2cb1360
IM
2639 /* Let the architecture update CPU core mappings: */
2640 new_topology = arch_update_cpu_topology();
c744dc4a
BM
2641 /* Trigger rebuilding CPU capacity asymmetry data */
2642 if (new_topology)
2643 asym_cpu_capacity_scan();
f2cb1360 2644
09e0dd8e
PZ
2645 if (!doms_new) {
2646 WARN_ON_ONCE(dattr_new);
2647 n = 0;
2648 doms_new = alloc_sched_domains(1);
2649 if (doms_new) {
2650 n = 1;
edb93821 2651 cpumask_and(doms_new[0], cpu_active_mask,
04d4e665 2652 housekeeping_cpumask(HK_TYPE_DOMAIN));
09e0dd8e
PZ
2653 }
2654 } else {
2655 n = ndoms_new;
2656 }
f2cb1360
IM
2657
2658 /* Destroy deleted domains: */
2659 for (i = 0; i < ndoms_cur; i++) {
2660 for (j = 0; j < n && !new_topology; j++) {
6aa140fa 2661 if (cpumask_equal(doms_cur[i], doms_new[j]) &&
f9a25f77
MP
2662 dattrs_equal(dattr_cur, i, dattr_new, j)) {
2663 struct root_domain *rd;
2664
2665 /*
2666 * This domain won't be destroyed and as such
2667 * its dl_bw->total_bw needs to be cleared. It
2668 * will be recomputed in function
2669 * update_tasks_root_domain().
2670 */
2671 rd = cpu_rq(cpumask_any(doms_cur[i]))->rd;
2672 dl_clear_root_domain(rd);
f2cb1360 2673 goto match1;
f9a25f77 2674 }
f2cb1360
IM
2675 }
2676 /* No match - a current sched domain not in new doms_new[] */
2677 detach_destroy_domains(doms_cur[i]);
2678match1:
2679 ;
2680 }
2681
2682 n = ndoms_cur;
09e0dd8e 2683 if (!doms_new) {
f2cb1360
IM
2684 n = 0;
2685 doms_new = &fallback_doms;
edb93821 2686 cpumask_and(doms_new[0], cpu_active_mask,
04d4e665 2687 housekeeping_cpumask(HK_TYPE_DOMAIN));
f2cb1360
IM
2688 }
2689
2690 /* Build new domains: */
2691 for (i = 0; i < ndoms_new; i++) {
2692 for (j = 0; j < n && !new_topology; j++) {
6aa140fa
QP
2693 if (cpumask_equal(doms_new[i], doms_cur[j]) &&
2694 dattrs_equal(dattr_new, i, dattr_cur, j))
f2cb1360
IM
2695 goto match2;
2696 }
2697 /* No match - add a new doms_new */
2698 build_sched_domains(doms_new[i], dattr_new ? dattr_new + i : NULL);
2699match2:
2700 ;
2701 }
2702
531b5c9f 2703#if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL)
6aa140fa
QP
2704 /* Build perf. domains: */
2705 for (i = 0; i < ndoms_new; i++) {
531b5c9f 2706 for (j = 0; j < n && !sched_energy_update; j++) {
6aa140fa 2707 if (cpumask_equal(doms_new[i], doms_cur[j]) &&
1f74de87
QP
2708 cpu_rq(cpumask_first(doms_cur[j]))->rd->pd) {
2709 has_eas = true;
6aa140fa 2710 goto match3;
1f74de87 2711 }
6aa140fa
QP
2712 }
2713 /* No match - add perf. domains for a new rd */
1f74de87 2714 has_eas |= build_perf_domains(doms_new[i]);
6aa140fa
QP
2715match3:
2716 ;
2717 }
1f74de87 2718 sched_energy_set(has_eas);
6aa140fa
QP
2719#endif
2720
f2cb1360
IM
2721 /* Remember the new sched domains: */
2722 if (doms_cur != &fallback_doms)
2723 free_sched_domains(doms_cur, ndoms_cur);
2724
2725 kfree(dattr_cur);
2726 doms_cur = doms_new;
2727 dattr_cur = dattr_new;
2728 ndoms_cur = ndoms_new;
2729
3b87f136 2730 update_sched_domain_debugfs();
c22645f4 2731}
f2cb1360 2732
c22645f4
MP
2733/*
2734 * Call with hotplug lock held
2735 */
2736void partition_sched_domains(int ndoms_new, cpumask_var_t doms_new[],
2737 struct sched_domain_attr *dattr_new)
2738{
2739 mutex_lock(&sched_domains_mutex);
2740 partition_sched_domains_locked(ndoms_new, doms_new, dattr_new);
f2cb1360
IM
2741 mutex_unlock(&sched_domains_mutex);
2742}