Commit | Line | Data |
---|---|---|
0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7b732a75 PZ |
7 | * |
8 | * For licensing details see kernel-base/COPYING | |
0793a61d TG |
9 | */ |
10 | ||
11 | #include <linux/fs.h> | |
b9cacc7b | 12 | #include <linux/mm.h> |
0793a61d TG |
13 | #include <linux/cpu.h> |
14 | #include <linux/smp.h> | |
04289bb9 | 15 | #include <linux/file.h> |
0793a61d TG |
16 | #include <linux/poll.h> |
17 | #include <linux/sysfs.h> | |
18 | #include <linux/ptrace.h> | |
19 | #include <linux/percpu.h> | |
b9cacc7b PZ |
20 | #include <linux/vmstat.h> |
21 | #include <linux/hardirq.h> | |
22 | #include <linux/rculist.h> | |
0793a61d TG |
23 | #include <linux/uaccess.h> |
24 | #include <linux/syscalls.h> | |
25 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 26 | #include <linux/kernel_stat.h> |
0793a61d TG |
27 | #include <linux/perf_counter.h> |
28 | ||
4e193bd4 TB |
29 | #include <asm/irq_regs.h> |
30 | ||
0793a61d TG |
31 | /* |
32 | * Each CPU has a list of per CPU counters: | |
33 | */ | |
34 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
35 | ||
088e2852 | 36 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
37 | static int perf_reserved_percpu __read_mostly; |
38 | static int perf_overcommit __read_mostly = 1; | |
39 | ||
40 | /* | |
41 | * Mutex for (sysadmin-configurable) counter reservations: | |
42 | */ | |
43 | static DEFINE_MUTEX(perf_resource_mutex); | |
44 | ||
45 | /* | |
46 | * Architecture provided APIs - weak aliases: | |
47 | */ | |
5c92d124 | 48 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 49 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 50 | { |
ff6f0541 | 51 | return NULL; |
0793a61d TG |
52 | } |
53 | ||
01b2838c | 54 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 55 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 56 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
57 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
58 | struct perf_cpu_context *cpuctx, | |
59 | struct perf_counter_context *ctx, int cpu) | |
60 | { | |
61 | return 0; | |
62 | } | |
0793a61d | 63 | |
4eb96fcf PM |
64 | void __weak perf_counter_print_debug(void) { } |
65 | ||
04289bb9 IM |
66 | static void |
67 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
68 | { | |
69 | struct perf_counter *group_leader = counter->group_leader; | |
70 | ||
71 | /* | |
72 | * Depending on whether it is a standalone or sibling counter, | |
73 | * add it straight to the context's counter list, or to the group | |
74 | * leader's sibling list: | |
75 | */ | |
76 | if (counter->group_leader == counter) | |
77 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
5c148194 | 78 | else { |
04289bb9 | 79 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); |
5c148194 PZ |
80 | group_leader->nr_siblings++; |
81 | } | |
592903cd PZ |
82 | |
83 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
84 | } |
85 | ||
86 | static void | |
87 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
88 | { | |
89 | struct perf_counter *sibling, *tmp; | |
90 | ||
91 | list_del_init(&counter->list_entry); | |
592903cd | 92 | list_del_rcu(&counter->event_entry); |
04289bb9 | 93 | |
5c148194 PZ |
94 | if (counter->group_leader != counter) |
95 | counter->group_leader->nr_siblings--; | |
96 | ||
04289bb9 IM |
97 | /* |
98 | * If this was a group counter with sibling counters then | |
99 | * upgrade the siblings to singleton counters by adding them | |
100 | * to the context list directly: | |
101 | */ | |
102 | list_for_each_entry_safe(sibling, tmp, | |
103 | &counter->sibling_list, list_entry) { | |
104 | ||
75564232 | 105 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
106 | sibling->group_leader = sibling; |
107 | } | |
108 | } | |
109 | ||
3b6f9e5c PM |
110 | static void |
111 | counter_sched_out(struct perf_counter *counter, | |
112 | struct perf_cpu_context *cpuctx, | |
113 | struct perf_counter_context *ctx) | |
114 | { | |
115 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
116 | return; | |
117 | ||
118 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
119 | counter->hw_ops->disable(counter); | |
120 | counter->oncpu = -1; | |
121 | ||
122 | if (!is_software_counter(counter)) | |
123 | cpuctx->active_oncpu--; | |
124 | ctx->nr_active--; | |
125 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
126 | cpuctx->exclusive = 0; | |
127 | } | |
128 | ||
d859e29f PM |
129 | static void |
130 | group_sched_out(struct perf_counter *group_counter, | |
131 | struct perf_cpu_context *cpuctx, | |
132 | struct perf_counter_context *ctx) | |
133 | { | |
134 | struct perf_counter *counter; | |
135 | ||
136 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
137 | return; | |
138 | ||
139 | counter_sched_out(group_counter, cpuctx, ctx); | |
140 | ||
141 | /* | |
142 | * Schedule out siblings (if any): | |
143 | */ | |
144 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
145 | counter_sched_out(counter, cpuctx, ctx); | |
146 | ||
147 | if (group_counter->hw_event.exclusive) | |
148 | cpuctx->exclusive = 0; | |
149 | } | |
150 | ||
0793a61d TG |
151 | /* |
152 | * Cross CPU call to remove a performance counter | |
153 | * | |
154 | * We disable the counter on the hardware level first. After that we | |
155 | * remove it from the context list. | |
156 | */ | |
04289bb9 | 157 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
158 | { |
159 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
160 | struct perf_counter *counter = info; | |
161 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 162 | unsigned long flags; |
5c92d124 | 163 | u64 perf_flags; |
0793a61d TG |
164 | |
165 | /* | |
166 | * If this is a task context, we need to check whether it is | |
167 | * the current task context of this cpu. If not it has been | |
168 | * scheduled out before the smp call arrived. | |
169 | */ | |
170 | if (ctx->task && cpuctx->task_ctx != ctx) | |
171 | return; | |
172 | ||
aa9c4c0f IM |
173 | curr_rq_lock_irq_save(&flags); |
174 | spin_lock(&ctx->lock); | |
0793a61d | 175 | |
3b6f9e5c PM |
176 | counter_sched_out(counter, cpuctx, ctx); |
177 | ||
178 | counter->task = NULL; | |
0793a61d TG |
179 | ctx->nr_counters--; |
180 | ||
181 | /* | |
182 | * Protect the list operation against NMI by disabling the | |
183 | * counters on a global level. NOP for non NMI based counters. | |
184 | */ | |
01b2838c | 185 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 186 | list_del_counter(counter, ctx); |
01b2838c | 187 | hw_perf_restore(perf_flags); |
0793a61d TG |
188 | |
189 | if (!ctx->task) { | |
190 | /* | |
191 | * Allow more per task counters with respect to the | |
192 | * reservation: | |
193 | */ | |
194 | cpuctx->max_pertask = | |
195 | min(perf_max_counters - ctx->nr_counters, | |
196 | perf_max_counters - perf_reserved_percpu); | |
197 | } | |
198 | ||
aa9c4c0f IM |
199 | spin_unlock(&ctx->lock); |
200 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
201 | } |
202 | ||
203 | ||
204 | /* | |
205 | * Remove the counter from a task's (or a CPU's) list of counters. | |
206 | * | |
d859e29f | 207 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
208 | * |
209 | * CPU counters are removed with a smp call. For task counters we only | |
210 | * call when the task is on a CPU. | |
211 | */ | |
04289bb9 | 212 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
213 | { |
214 | struct perf_counter_context *ctx = counter->ctx; | |
215 | struct task_struct *task = ctx->task; | |
216 | ||
217 | if (!task) { | |
218 | /* | |
219 | * Per cpu counters are removed via an smp call and | |
220 | * the removal is always sucessful. | |
221 | */ | |
222 | smp_call_function_single(counter->cpu, | |
04289bb9 | 223 | __perf_counter_remove_from_context, |
0793a61d TG |
224 | counter, 1); |
225 | return; | |
226 | } | |
227 | ||
228 | retry: | |
04289bb9 | 229 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
230 | counter); |
231 | ||
232 | spin_lock_irq(&ctx->lock); | |
233 | /* | |
234 | * If the context is active we need to retry the smp call. | |
235 | */ | |
04289bb9 | 236 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
237 | spin_unlock_irq(&ctx->lock); |
238 | goto retry; | |
239 | } | |
240 | ||
241 | /* | |
242 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 243 | * can remove the counter safely, if the call above did not |
0793a61d TG |
244 | * succeed. |
245 | */ | |
04289bb9 | 246 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 247 | ctx->nr_counters--; |
04289bb9 | 248 | list_del_counter(counter, ctx); |
0793a61d TG |
249 | counter->task = NULL; |
250 | } | |
251 | spin_unlock_irq(&ctx->lock); | |
252 | } | |
253 | ||
d859e29f PM |
254 | /* |
255 | * Cross CPU call to disable a performance counter | |
256 | */ | |
257 | static void __perf_counter_disable(void *info) | |
258 | { | |
259 | struct perf_counter *counter = info; | |
260 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
261 | struct perf_counter_context *ctx = counter->ctx; | |
262 | unsigned long flags; | |
263 | ||
264 | /* | |
265 | * If this is a per-task counter, need to check whether this | |
266 | * counter's task is the current task on this cpu. | |
267 | */ | |
268 | if (ctx->task && cpuctx->task_ctx != ctx) | |
269 | return; | |
270 | ||
271 | curr_rq_lock_irq_save(&flags); | |
272 | spin_lock(&ctx->lock); | |
273 | ||
274 | /* | |
275 | * If the counter is on, turn it off. | |
276 | * If it is in error state, leave it in error state. | |
277 | */ | |
278 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
279 | if (counter == counter->group_leader) | |
280 | group_sched_out(counter, cpuctx, ctx); | |
281 | else | |
282 | counter_sched_out(counter, cpuctx, ctx); | |
283 | counter->state = PERF_COUNTER_STATE_OFF; | |
284 | } | |
285 | ||
286 | spin_unlock(&ctx->lock); | |
287 | curr_rq_unlock_irq_restore(&flags); | |
288 | } | |
289 | ||
290 | /* | |
291 | * Disable a counter. | |
292 | */ | |
293 | static void perf_counter_disable(struct perf_counter *counter) | |
294 | { | |
295 | struct perf_counter_context *ctx = counter->ctx; | |
296 | struct task_struct *task = ctx->task; | |
297 | ||
298 | if (!task) { | |
299 | /* | |
300 | * Disable the counter on the cpu that it's on | |
301 | */ | |
302 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
303 | counter, 1); | |
304 | return; | |
305 | } | |
306 | ||
307 | retry: | |
308 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
309 | ||
310 | spin_lock_irq(&ctx->lock); | |
311 | /* | |
312 | * If the counter is still active, we need to retry the cross-call. | |
313 | */ | |
314 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
315 | spin_unlock_irq(&ctx->lock); | |
316 | goto retry; | |
317 | } | |
318 | ||
319 | /* | |
320 | * Since we have the lock this context can't be scheduled | |
321 | * in, so we can change the state safely. | |
322 | */ | |
323 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
324 | counter->state = PERF_COUNTER_STATE_OFF; | |
325 | ||
326 | spin_unlock_irq(&ctx->lock); | |
327 | } | |
328 | ||
329 | /* | |
330 | * Disable a counter and all its children. | |
331 | */ | |
332 | static void perf_counter_disable_family(struct perf_counter *counter) | |
333 | { | |
334 | struct perf_counter *child; | |
335 | ||
336 | perf_counter_disable(counter); | |
337 | ||
338 | /* | |
339 | * Lock the mutex to protect the list of children | |
340 | */ | |
341 | mutex_lock(&counter->mutex); | |
342 | list_for_each_entry(child, &counter->child_list, child_list) | |
343 | perf_counter_disable(child); | |
344 | mutex_unlock(&counter->mutex); | |
345 | } | |
346 | ||
235c7fc7 IM |
347 | static int |
348 | counter_sched_in(struct perf_counter *counter, | |
349 | struct perf_cpu_context *cpuctx, | |
350 | struct perf_counter_context *ctx, | |
351 | int cpu) | |
352 | { | |
3b6f9e5c | 353 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
354 | return 0; |
355 | ||
356 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
357 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
358 | /* | |
359 | * The new state must be visible before we turn it on in the hardware: | |
360 | */ | |
361 | smp_wmb(); | |
362 | ||
363 | if (counter->hw_ops->enable(counter)) { | |
364 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
365 | counter->oncpu = -1; | |
366 | return -EAGAIN; | |
367 | } | |
368 | ||
3b6f9e5c PM |
369 | if (!is_software_counter(counter)) |
370 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
371 | ctx->nr_active++; |
372 | ||
3b6f9e5c PM |
373 | if (counter->hw_event.exclusive) |
374 | cpuctx->exclusive = 1; | |
375 | ||
235c7fc7 IM |
376 | return 0; |
377 | } | |
378 | ||
3b6f9e5c PM |
379 | /* |
380 | * Return 1 for a group consisting entirely of software counters, | |
381 | * 0 if the group contains any hardware counters. | |
382 | */ | |
383 | static int is_software_only_group(struct perf_counter *leader) | |
384 | { | |
385 | struct perf_counter *counter; | |
386 | ||
387 | if (!is_software_counter(leader)) | |
388 | return 0; | |
5c148194 | 389 | |
3b6f9e5c PM |
390 | list_for_each_entry(counter, &leader->sibling_list, list_entry) |
391 | if (!is_software_counter(counter)) | |
392 | return 0; | |
5c148194 | 393 | |
3b6f9e5c PM |
394 | return 1; |
395 | } | |
396 | ||
397 | /* | |
398 | * Work out whether we can put this counter group on the CPU now. | |
399 | */ | |
400 | static int group_can_go_on(struct perf_counter *counter, | |
401 | struct perf_cpu_context *cpuctx, | |
402 | int can_add_hw) | |
403 | { | |
404 | /* | |
405 | * Groups consisting entirely of software counters can always go on. | |
406 | */ | |
407 | if (is_software_only_group(counter)) | |
408 | return 1; | |
409 | /* | |
410 | * If an exclusive group is already on, no other hardware | |
411 | * counters can go on. | |
412 | */ | |
413 | if (cpuctx->exclusive) | |
414 | return 0; | |
415 | /* | |
416 | * If this group is exclusive and there are already | |
417 | * counters on the CPU, it can't go on. | |
418 | */ | |
419 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
420 | return 0; | |
421 | /* | |
422 | * Otherwise, try to add it if all previous groups were able | |
423 | * to go on. | |
424 | */ | |
425 | return can_add_hw; | |
426 | } | |
427 | ||
0793a61d | 428 | /* |
235c7fc7 | 429 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
430 | */ |
431 | static void __perf_install_in_context(void *info) | |
432 | { | |
433 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
434 | struct perf_counter *counter = info; | |
435 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 436 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 437 | int cpu = smp_processor_id(); |
9b51f66d | 438 | unsigned long flags; |
5c92d124 | 439 | u64 perf_flags; |
3b6f9e5c | 440 | int err; |
0793a61d TG |
441 | |
442 | /* | |
443 | * If this is a task context, we need to check whether it is | |
444 | * the current task context of this cpu. If not it has been | |
445 | * scheduled out before the smp call arrived. | |
446 | */ | |
447 | if (ctx->task && cpuctx->task_ctx != ctx) | |
448 | return; | |
449 | ||
aa9c4c0f IM |
450 | curr_rq_lock_irq_save(&flags); |
451 | spin_lock(&ctx->lock); | |
0793a61d TG |
452 | |
453 | /* | |
454 | * Protect the list operation against NMI by disabling the | |
455 | * counters on a global level. NOP for non NMI based counters. | |
456 | */ | |
01b2838c | 457 | perf_flags = hw_perf_save_disable(); |
0793a61d | 458 | |
235c7fc7 | 459 | list_add_counter(counter, ctx); |
0793a61d | 460 | ctx->nr_counters++; |
c07c99b6 | 461 | counter->prev_state = PERF_COUNTER_STATE_OFF; |
0793a61d | 462 | |
d859e29f PM |
463 | /* |
464 | * Don't put the counter on if it is disabled or if | |
465 | * it is in a group and the group isn't on. | |
466 | */ | |
467 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
468 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
469 | goto unlock; | |
470 | ||
3b6f9e5c PM |
471 | /* |
472 | * An exclusive counter can't go on if there are already active | |
473 | * hardware counters, and no hardware counter can go on if there | |
474 | * is already an exclusive counter on. | |
475 | */ | |
d859e29f | 476 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
477 | err = -EEXIST; |
478 | else | |
479 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
480 | ||
d859e29f PM |
481 | if (err) { |
482 | /* | |
483 | * This counter couldn't go on. If it is in a group | |
484 | * then we have to pull the whole group off. | |
485 | * If the counter group is pinned then put it in error state. | |
486 | */ | |
487 | if (leader != counter) | |
488 | group_sched_out(leader, cpuctx, ctx); | |
489 | if (leader->hw_event.pinned) | |
490 | leader->state = PERF_COUNTER_STATE_ERROR; | |
491 | } | |
0793a61d | 492 | |
3b6f9e5c | 493 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
494 | cpuctx->max_pertask--; |
495 | ||
d859e29f | 496 | unlock: |
235c7fc7 IM |
497 | hw_perf_restore(perf_flags); |
498 | ||
aa9c4c0f IM |
499 | spin_unlock(&ctx->lock); |
500 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
501 | } |
502 | ||
503 | /* | |
504 | * Attach a performance counter to a context | |
505 | * | |
506 | * First we add the counter to the list with the hardware enable bit | |
507 | * in counter->hw_config cleared. | |
508 | * | |
509 | * If the counter is attached to a task which is on a CPU we use a smp | |
510 | * call to enable it in the task context. The task might have been | |
511 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
512 | * |
513 | * Must be called with ctx->mutex held. | |
0793a61d TG |
514 | */ |
515 | static void | |
516 | perf_install_in_context(struct perf_counter_context *ctx, | |
517 | struct perf_counter *counter, | |
518 | int cpu) | |
519 | { | |
520 | struct task_struct *task = ctx->task; | |
521 | ||
0793a61d TG |
522 | if (!task) { |
523 | /* | |
524 | * Per cpu counters are installed via an smp call and | |
525 | * the install is always sucessful. | |
526 | */ | |
527 | smp_call_function_single(cpu, __perf_install_in_context, | |
528 | counter, 1); | |
529 | return; | |
530 | } | |
531 | ||
532 | counter->task = task; | |
533 | retry: | |
534 | task_oncpu_function_call(task, __perf_install_in_context, | |
535 | counter); | |
536 | ||
537 | spin_lock_irq(&ctx->lock); | |
538 | /* | |
0793a61d TG |
539 | * we need to retry the smp call. |
540 | */ | |
d859e29f | 541 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
542 | spin_unlock_irq(&ctx->lock); |
543 | goto retry; | |
544 | } | |
545 | ||
546 | /* | |
547 | * The lock prevents that this context is scheduled in so we | |
548 | * can add the counter safely, if it the call above did not | |
549 | * succeed. | |
550 | */ | |
04289bb9 IM |
551 | if (list_empty(&counter->list_entry)) { |
552 | list_add_counter(counter, ctx); | |
0793a61d TG |
553 | ctx->nr_counters++; |
554 | } | |
555 | spin_unlock_irq(&ctx->lock); | |
556 | } | |
557 | ||
d859e29f PM |
558 | /* |
559 | * Cross CPU call to enable a performance counter | |
560 | */ | |
561 | static void __perf_counter_enable(void *info) | |
04289bb9 | 562 | { |
d859e29f PM |
563 | struct perf_counter *counter = info; |
564 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
565 | struct perf_counter_context *ctx = counter->ctx; | |
566 | struct perf_counter *leader = counter->group_leader; | |
567 | unsigned long flags; | |
568 | int err; | |
04289bb9 | 569 | |
d859e29f PM |
570 | /* |
571 | * If this is a per-task counter, need to check whether this | |
572 | * counter's task is the current task on this cpu. | |
573 | */ | |
574 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
575 | return; |
576 | ||
d859e29f PM |
577 | curr_rq_lock_irq_save(&flags); |
578 | spin_lock(&ctx->lock); | |
579 | ||
c07c99b6 | 580 | counter->prev_state = counter->state; |
d859e29f PM |
581 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
582 | goto unlock; | |
583 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
04289bb9 IM |
584 | |
585 | /* | |
d859e29f PM |
586 | * If the counter is in a group and isn't the group leader, |
587 | * then don't put it on unless the group is on. | |
04289bb9 | 588 | */ |
d859e29f PM |
589 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
590 | goto unlock; | |
3b6f9e5c | 591 | |
d859e29f PM |
592 | if (!group_can_go_on(counter, cpuctx, 1)) |
593 | err = -EEXIST; | |
594 | else | |
595 | err = counter_sched_in(counter, cpuctx, ctx, | |
596 | smp_processor_id()); | |
597 | ||
598 | if (err) { | |
599 | /* | |
600 | * If this counter can't go on and it's part of a | |
601 | * group, then the whole group has to come off. | |
602 | */ | |
603 | if (leader != counter) | |
604 | group_sched_out(leader, cpuctx, ctx); | |
605 | if (leader->hw_event.pinned) | |
606 | leader->state = PERF_COUNTER_STATE_ERROR; | |
607 | } | |
608 | ||
609 | unlock: | |
610 | spin_unlock(&ctx->lock); | |
611 | curr_rq_unlock_irq_restore(&flags); | |
612 | } | |
613 | ||
614 | /* | |
615 | * Enable a counter. | |
616 | */ | |
617 | static void perf_counter_enable(struct perf_counter *counter) | |
618 | { | |
619 | struct perf_counter_context *ctx = counter->ctx; | |
620 | struct task_struct *task = ctx->task; | |
621 | ||
622 | if (!task) { | |
623 | /* | |
624 | * Enable the counter on the cpu that it's on | |
625 | */ | |
626 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
627 | counter, 1); | |
628 | return; | |
629 | } | |
630 | ||
631 | spin_lock_irq(&ctx->lock); | |
632 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
633 | goto out; | |
634 | ||
635 | /* | |
636 | * If the counter is in error state, clear that first. | |
637 | * That way, if we see the counter in error state below, we | |
638 | * know that it has gone back into error state, as distinct | |
639 | * from the task having been scheduled away before the | |
640 | * cross-call arrived. | |
641 | */ | |
642 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
643 | counter->state = PERF_COUNTER_STATE_OFF; | |
644 | ||
645 | retry: | |
646 | spin_unlock_irq(&ctx->lock); | |
647 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
648 | ||
649 | spin_lock_irq(&ctx->lock); | |
650 | ||
651 | /* | |
652 | * If the context is active and the counter is still off, | |
653 | * we need to retry the cross-call. | |
654 | */ | |
655 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
656 | goto retry; | |
657 | ||
658 | /* | |
659 | * Since we have the lock this context can't be scheduled | |
660 | * in, so we can change the state safely. | |
661 | */ | |
662 | if (counter->state == PERF_COUNTER_STATE_OFF) | |
663 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
664 | out: | |
665 | spin_unlock_irq(&ctx->lock); | |
666 | } | |
667 | ||
668 | /* | |
669 | * Enable a counter and all its children. | |
670 | */ | |
671 | static void perf_counter_enable_family(struct perf_counter *counter) | |
672 | { | |
673 | struct perf_counter *child; | |
674 | ||
675 | perf_counter_enable(counter); | |
676 | ||
677 | /* | |
678 | * Lock the mutex to protect the list of children | |
679 | */ | |
680 | mutex_lock(&counter->mutex); | |
681 | list_for_each_entry(child, &counter->child_list, child_list) | |
682 | perf_counter_enable(child); | |
683 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
684 | } |
685 | ||
235c7fc7 IM |
686 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
687 | struct perf_cpu_context *cpuctx) | |
688 | { | |
689 | struct perf_counter *counter; | |
3cbed429 | 690 | u64 flags; |
235c7fc7 | 691 | |
d859e29f PM |
692 | spin_lock(&ctx->lock); |
693 | ctx->is_active = 0; | |
235c7fc7 | 694 | if (likely(!ctx->nr_counters)) |
d859e29f | 695 | goto out; |
235c7fc7 | 696 | |
3cbed429 | 697 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
698 | if (ctx->nr_active) { |
699 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
700 | group_sched_out(counter, cpuctx, ctx); | |
701 | } | |
3cbed429 | 702 | hw_perf_restore(flags); |
d859e29f | 703 | out: |
235c7fc7 IM |
704 | spin_unlock(&ctx->lock); |
705 | } | |
706 | ||
0793a61d TG |
707 | /* |
708 | * Called from scheduler to remove the counters of the current task, | |
709 | * with interrupts disabled. | |
710 | * | |
711 | * We stop each counter and update the counter value in counter->count. | |
712 | * | |
7671581f | 713 | * This does not protect us against NMI, but disable() |
0793a61d TG |
714 | * sets the disabled bit in the control field of counter _before_ |
715 | * accessing the counter control register. If a NMI hits, then it will | |
716 | * not restart the counter. | |
717 | */ | |
718 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
719 | { | |
720 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
721 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
4a0deca6 | 722 | struct pt_regs *regs; |
0793a61d TG |
723 | |
724 | if (likely(!cpuctx->task_ctx)) | |
725 | return; | |
726 | ||
4a0deca6 PZ |
727 | regs = task_pt_regs(task); |
728 | perf_swcounter_event(PERF_COUNT_CONTEXT_SWITCHES, 1, 1, regs); | |
235c7fc7 IM |
729 | __perf_counter_sched_out(ctx, cpuctx); |
730 | ||
0793a61d TG |
731 | cpuctx->task_ctx = NULL; |
732 | } | |
733 | ||
235c7fc7 | 734 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 735 | { |
235c7fc7 | 736 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
737 | } |
738 | ||
7995888f | 739 | static int |
04289bb9 IM |
740 | group_sched_in(struct perf_counter *group_counter, |
741 | struct perf_cpu_context *cpuctx, | |
742 | struct perf_counter_context *ctx, | |
743 | int cpu) | |
744 | { | |
95cdd2e7 | 745 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
746 | int ret; |
747 | ||
748 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
749 | return 0; | |
750 | ||
751 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
752 | if (ret) | |
753 | return ret < 0 ? ret : 0; | |
04289bb9 | 754 | |
c07c99b6 | 755 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
756 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
757 | return -EAGAIN; | |
04289bb9 IM |
758 | |
759 | /* | |
760 | * Schedule in siblings as one group (if any): | |
761 | */ | |
7995888f | 762 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 763 | counter->prev_state = counter->state; |
95cdd2e7 IM |
764 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
765 | partial_group = counter; | |
766 | goto group_error; | |
767 | } | |
95cdd2e7 IM |
768 | } |
769 | ||
3cbed429 | 770 | return 0; |
95cdd2e7 IM |
771 | |
772 | group_error: | |
773 | /* | |
774 | * Groups can be scheduled in as one unit only, so undo any | |
775 | * partial group before returning: | |
776 | */ | |
777 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
778 | if (counter == partial_group) | |
779 | break; | |
780 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 781 | } |
95cdd2e7 | 782 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 783 | |
95cdd2e7 | 784 | return -EAGAIN; |
04289bb9 IM |
785 | } |
786 | ||
235c7fc7 IM |
787 | static void |
788 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
789 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 790 | { |
0793a61d | 791 | struct perf_counter *counter; |
3cbed429 | 792 | u64 flags; |
dd0e6ba2 | 793 | int can_add_hw = 1; |
0793a61d | 794 | |
d859e29f PM |
795 | spin_lock(&ctx->lock); |
796 | ctx->is_active = 1; | |
0793a61d | 797 | if (likely(!ctx->nr_counters)) |
d859e29f | 798 | goto out; |
0793a61d | 799 | |
3cbed429 | 800 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
801 | |
802 | /* | |
803 | * First go through the list and put on any pinned groups | |
804 | * in order to give them the best chance of going on. | |
805 | */ | |
806 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
807 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
808 | !counter->hw_event.pinned) | |
809 | continue; | |
810 | if (counter->cpu != -1 && counter->cpu != cpu) | |
811 | continue; | |
812 | ||
813 | if (group_can_go_on(counter, cpuctx, 1)) | |
814 | group_sched_in(counter, cpuctx, ctx, cpu); | |
815 | ||
816 | /* | |
817 | * If this pinned group hasn't been scheduled, | |
818 | * put it in error state. | |
819 | */ | |
820 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
821 | counter->state = PERF_COUNTER_STATE_ERROR; | |
822 | } | |
823 | ||
04289bb9 | 824 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
825 | /* |
826 | * Ignore counters in OFF or ERROR state, and | |
827 | * ignore pinned counters since we did them already. | |
828 | */ | |
829 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
830 | counter->hw_event.pinned) | |
831 | continue; | |
832 | ||
04289bb9 IM |
833 | /* |
834 | * Listen to the 'cpu' scheduling filter constraint | |
835 | * of counters: | |
836 | */ | |
0793a61d TG |
837 | if (counter->cpu != -1 && counter->cpu != cpu) |
838 | continue; | |
839 | ||
3b6f9e5c | 840 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
841 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
842 | can_add_hw = 0; | |
3b6f9e5c | 843 | } |
0793a61d | 844 | } |
3cbed429 | 845 | hw_perf_restore(flags); |
d859e29f | 846 | out: |
0793a61d | 847 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
848 | } |
849 | ||
850 | /* | |
851 | * Called from scheduler to add the counters of the current task | |
852 | * with interrupts disabled. | |
853 | * | |
854 | * We restore the counter value and then enable it. | |
855 | * | |
856 | * This does not protect us against NMI, but enable() | |
857 | * sets the enabled bit in the control field of counter _before_ | |
858 | * accessing the counter control register. If a NMI hits, then it will | |
859 | * keep the counter running. | |
860 | */ | |
861 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
862 | { | |
863 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
864 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 865 | |
235c7fc7 | 866 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
867 | cpuctx->task_ctx = ctx; |
868 | } | |
869 | ||
235c7fc7 IM |
870 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
871 | { | |
872 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
873 | ||
874 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
875 | } | |
876 | ||
1d1c7ddb IM |
877 | int perf_counter_task_disable(void) |
878 | { | |
879 | struct task_struct *curr = current; | |
880 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
881 | struct perf_counter *counter; | |
aa9c4c0f | 882 | unsigned long flags; |
1d1c7ddb IM |
883 | u64 perf_flags; |
884 | int cpu; | |
885 | ||
886 | if (likely(!ctx->nr_counters)) | |
887 | return 0; | |
888 | ||
aa9c4c0f | 889 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
890 | cpu = smp_processor_id(); |
891 | ||
aa9c4c0f IM |
892 | /* force the update of the task clock: */ |
893 | __task_delta_exec(curr, 1); | |
894 | ||
1d1c7ddb IM |
895 | perf_counter_task_sched_out(curr, cpu); |
896 | ||
897 | spin_lock(&ctx->lock); | |
898 | ||
899 | /* | |
900 | * Disable all the counters: | |
901 | */ | |
902 | perf_flags = hw_perf_save_disable(); | |
903 | ||
3b6f9e5c PM |
904 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
905 | if (counter->state != PERF_COUNTER_STATE_ERROR) | |
906 | counter->state = PERF_COUNTER_STATE_OFF; | |
907 | } | |
9b51f66d | 908 | |
1d1c7ddb IM |
909 | hw_perf_restore(perf_flags); |
910 | ||
911 | spin_unlock(&ctx->lock); | |
912 | ||
aa9c4c0f | 913 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
914 | |
915 | return 0; | |
916 | } | |
917 | ||
918 | int perf_counter_task_enable(void) | |
919 | { | |
920 | struct task_struct *curr = current; | |
921 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
922 | struct perf_counter *counter; | |
aa9c4c0f | 923 | unsigned long flags; |
1d1c7ddb IM |
924 | u64 perf_flags; |
925 | int cpu; | |
926 | ||
927 | if (likely(!ctx->nr_counters)) | |
928 | return 0; | |
929 | ||
aa9c4c0f | 930 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
931 | cpu = smp_processor_id(); |
932 | ||
aa9c4c0f IM |
933 | /* force the update of the task clock: */ |
934 | __task_delta_exec(curr, 1); | |
935 | ||
235c7fc7 IM |
936 | perf_counter_task_sched_out(curr, cpu); |
937 | ||
1d1c7ddb IM |
938 | spin_lock(&ctx->lock); |
939 | ||
940 | /* | |
941 | * Disable all the counters: | |
942 | */ | |
943 | perf_flags = hw_perf_save_disable(); | |
944 | ||
945 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 946 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 947 | continue; |
6a930700 | 948 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
aa9c4c0f | 949 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
950 | } |
951 | hw_perf_restore(perf_flags); | |
952 | ||
953 | spin_unlock(&ctx->lock); | |
954 | ||
955 | perf_counter_task_sched_in(curr, cpu); | |
956 | ||
aa9c4c0f | 957 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
958 | |
959 | return 0; | |
960 | } | |
961 | ||
235c7fc7 IM |
962 | /* |
963 | * Round-robin a context's counters: | |
964 | */ | |
965 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 966 | { |
0793a61d | 967 | struct perf_counter *counter; |
5c92d124 | 968 | u64 perf_flags; |
0793a61d | 969 | |
235c7fc7 | 970 | if (!ctx->nr_counters) |
0793a61d TG |
971 | return; |
972 | ||
0793a61d | 973 | spin_lock(&ctx->lock); |
0793a61d | 974 | /* |
04289bb9 | 975 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 976 | */ |
01b2838c | 977 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 978 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 979 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
980 | break; |
981 | } | |
01b2838c | 982 | hw_perf_restore(perf_flags); |
0793a61d TG |
983 | |
984 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
985 | } |
986 | ||
987 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
988 | { | |
989 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
990 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
991 | const int rotate_percpu = 0; | |
992 | ||
993 | if (rotate_percpu) | |
994 | perf_counter_cpu_sched_out(cpuctx); | |
995 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 996 | |
235c7fc7 IM |
997 | if (rotate_percpu) |
998 | rotate_ctx(&cpuctx->ctx); | |
999 | rotate_ctx(ctx); | |
1000 | ||
1001 | if (rotate_percpu) | |
1002 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
1003 | perf_counter_task_sched_in(curr, cpu); |
1004 | } | |
1005 | ||
0793a61d TG |
1006 | /* |
1007 | * Cross CPU call to read the hardware counter | |
1008 | */ | |
7671581f | 1009 | static void __read(void *info) |
0793a61d | 1010 | { |
621a01ea | 1011 | struct perf_counter *counter = info; |
aa9c4c0f | 1012 | unsigned long flags; |
621a01ea | 1013 | |
aa9c4c0f | 1014 | curr_rq_lock_irq_save(&flags); |
7671581f | 1015 | counter->hw_ops->read(counter); |
aa9c4c0f | 1016 | curr_rq_unlock_irq_restore(&flags); |
0793a61d TG |
1017 | } |
1018 | ||
04289bb9 | 1019 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1020 | { |
1021 | /* | |
1022 | * If counter is enabled and currently active on a CPU, update the | |
1023 | * value in the counter structure: | |
1024 | */ | |
6a930700 | 1025 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1026 | smp_call_function_single(counter->oncpu, |
7671581f | 1027 | __read, counter, 1); |
0793a61d TG |
1028 | } |
1029 | ||
ee06094f | 1030 | return atomic64_read(&counter->count); |
0793a61d TG |
1031 | } |
1032 | ||
0793a61d TG |
1033 | static void put_context(struct perf_counter_context *ctx) |
1034 | { | |
1035 | if (ctx->task) | |
1036 | put_task_struct(ctx->task); | |
1037 | } | |
1038 | ||
1039 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1040 | { | |
1041 | struct perf_cpu_context *cpuctx; | |
1042 | struct perf_counter_context *ctx; | |
1043 | struct task_struct *task; | |
1044 | ||
1045 | /* | |
1046 | * If cpu is not a wildcard then this is a percpu counter: | |
1047 | */ | |
1048 | if (cpu != -1) { | |
1049 | /* Must be root to operate on a CPU counter: */ | |
1050 | if (!capable(CAP_SYS_ADMIN)) | |
1051 | return ERR_PTR(-EACCES); | |
1052 | ||
1053 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1054 | return ERR_PTR(-EINVAL); | |
1055 | ||
1056 | /* | |
1057 | * We could be clever and allow to attach a counter to an | |
1058 | * offline CPU and activate it when the CPU comes up, but | |
1059 | * that's for later. | |
1060 | */ | |
1061 | if (!cpu_isset(cpu, cpu_online_map)) | |
1062 | return ERR_PTR(-ENODEV); | |
1063 | ||
1064 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1065 | ctx = &cpuctx->ctx; | |
1066 | ||
0793a61d TG |
1067 | return ctx; |
1068 | } | |
1069 | ||
1070 | rcu_read_lock(); | |
1071 | if (!pid) | |
1072 | task = current; | |
1073 | else | |
1074 | task = find_task_by_vpid(pid); | |
1075 | if (task) | |
1076 | get_task_struct(task); | |
1077 | rcu_read_unlock(); | |
1078 | ||
1079 | if (!task) | |
1080 | return ERR_PTR(-ESRCH); | |
1081 | ||
1082 | ctx = &task->perf_counter_ctx; | |
1083 | ctx->task = task; | |
1084 | ||
1085 | /* Reuse ptrace permission checks for now. */ | |
1086 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1087 | put_context(ctx); | |
1088 | return ERR_PTR(-EACCES); | |
1089 | } | |
1090 | ||
1091 | return ctx; | |
1092 | } | |
1093 | ||
592903cd PZ |
1094 | static void free_counter_rcu(struct rcu_head *head) |
1095 | { | |
1096 | struct perf_counter *counter; | |
1097 | ||
1098 | counter = container_of(head, struct perf_counter, rcu_head); | |
1099 | kfree(counter); | |
1100 | } | |
1101 | ||
f1600952 PZ |
1102 | static void free_counter(struct perf_counter *counter) |
1103 | { | |
e077df4f PZ |
1104 | if (counter->destroy) |
1105 | counter->destroy(counter); | |
1106 | ||
f1600952 PZ |
1107 | call_rcu(&counter->rcu_head, free_counter_rcu); |
1108 | } | |
1109 | ||
0793a61d TG |
1110 | /* |
1111 | * Called when the last reference to the file is gone. | |
1112 | */ | |
1113 | static int perf_release(struct inode *inode, struct file *file) | |
1114 | { | |
1115 | struct perf_counter *counter = file->private_data; | |
1116 | struct perf_counter_context *ctx = counter->ctx; | |
1117 | ||
1118 | file->private_data = NULL; | |
1119 | ||
d859e29f | 1120 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1121 | mutex_lock(&counter->mutex); |
1122 | ||
04289bb9 | 1123 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1124 | |
1125 | mutex_unlock(&counter->mutex); | |
d859e29f | 1126 | mutex_unlock(&ctx->mutex); |
0793a61d | 1127 | |
f1600952 | 1128 | free_counter(counter); |
5af75917 | 1129 | put_context(ctx); |
0793a61d TG |
1130 | |
1131 | return 0; | |
1132 | } | |
1133 | ||
1134 | /* | |
1135 | * Read the performance counter - simple non blocking version for now | |
1136 | */ | |
1137 | static ssize_t | |
1138 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1139 | { | |
1140 | u64 cntval; | |
1141 | ||
7b732a75 | 1142 | if (count < sizeof(cntval)) |
0793a61d TG |
1143 | return -EINVAL; |
1144 | ||
3b6f9e5c PM |
1145 | /* |
1146 | * Return end-of-file for a read on a counter that is in | |
1147 | * error state (i.e. because it was pinned but it couldn't be | |
1148 | * scheduled on to the CPU at some point). | |
1149 | */ | |
1150 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1151 | return 0; | |
1152 | ||
0793a61d | 1153 | mutex_lock(&counter->mutex); |
04289bb9 | 1154 | cntval = perf_counter_read(counter); |
0793a61d TG |
1155 | mutex_unlock(&counter->mutex); |
1156 | ||
1157 | return put_user(cntval, (u64 __user *) buf) ? -EFAULT : sizeof(cntval); | |
1158 | } | |
1159 | ||
0793a61d TG |
1160 | static ssize_t |
1161 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1162 | { | |
1163 | struct perf_counter *counter = file->private_data; | |
1164 | ||
7b732a75 | 1165 | return perf_read_hw(counter, buf, count); |
0793a61d TG |
1166 | } |
1167 | ||
1168 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1169 | { | |
1170 | struct perf_counter *counter = file->private_data; | |
c7138f37 PZ |
1171 | struct perf_mmap_data *data; |
1172 | unsigned int events; | |
1173 | ||
1174 | rcu_read_lock(); | |
1175 | data = rcu_dereference(counter->data); | |
1176 | if (data) | |
1177 | events = atomic_xchg(&data->wakeup, 0); | |
1178 | else | |
1179 | events = POLL_HUP; | |
1180 | rcu_read_unlock(); | |
0793a61d TG |
1181 | |
1182 | poll_wait(file, &counter->waitq, wait); | |
1183 | ||
0793a61d TG |
1184 | return events; |
1185 | } | |
1186 | ||
d859e29f PM |
1187 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1188 | { | |
1189 | struct perf_counter *counter = file->private_data; | |
1190 | int err = 0; | |
1191 | ||
1192 | switch (cmd) { | |
1193 | case PERF_COUNTER_IOC_ENABLE: | |
1194 | perf_counter_enable_family(counter); | |
1195 | break; | |
1196 | case PERF_COUNTER_IOC_DISABLE: | |
1197 | perf_counter_disable_family(counter); | |
1198 | break; | |
1199 | default: | |
1200 | err = -ENOTTY; | |
1201 | } | |
1202 | return err; | |
1203 | } | |
1204 | ||
7b732a75 PZ |
1205 | static void __perf_counter_update_userpage(struct perf_counter *counter, |
1206 | struct perf_mmap_data *data) | |
37d81828 | 1207 | { |
7b732a75 | 1208 | struct perf_counter_mmap_page *userpg = data->user_page; |
37d81828 | 1209 | |
7b732a75 PZ |
1210 | /* |
1211 | * Disable preemption so as to not let the corresponding user-space | |
1212 | * spin too long if we get preempted. | |
1213 | */ | |
1214 | preempt_disable(); | |
37d81828 PM |
1215 | ++userpg->lock; |
1216 | smp_wmb(); | |
1217 | userpg->index = counter->hw.idx; | |
1218 | userpg->offset = atomic64_read(&counter->count); | |
1219 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) | |
1220 | userpg->offset -= atomic64_read(&counter->hw.prev_count); | |
7b732a75 PZ |
1221 | |
1222 | userpg->data_head = atomic_read(&data->head); | |
37d81828 PM |
1223 | smp_wmb(); |
1224 | ++userpg->lock; | |
7b732a75 PZ |
1225 | preempt_enable(); |
1226 | } | |
1227 | ||
1228 | void perf_counter_update_userpage(struct perf_counter *counter) | |
1229 | { | |
1230 | struct perf_mmap_data *data; | |
1231 | ||
1232 | rcu_read_lock(); | |
1233 | data = rcu_dereference(counter->data); | |
1234 | if (data) | |
1235 | __perf_counter_update_userpage(counter, data); | |
1236 | rcu_read_unlock(); | |
37d81828 PM |
1237 | } |
1238 | ||
1239 | static int perf_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |
1240 | { | |
1241 | struct perf_counter *counter = vma->vm_file->private_data; | |
7b732a75 PZ |
1242 | struct perf_mmap_data *data; |
1243 | int ret = VM_FAULT_SIGBUS; | |
1244 | ||
1245 | rcu_read_lock(); | |
1246 | data = rcu_dereference(counter->data); | |
1247 | if (!data) | |
1248 | goto unlock; | |
1249 | ||
1250 | if (vmf->pgoff == 0) { | |
1251 | vmf->page = virt_to_page(data->user_page); | |
1252 | } else { | |
1253 | int nr = vmf->pgoff - 1; | |
37d81828 | 1254 | |
7b732a75 PZ |
1255 | if ((unsigned)nr > data->nr_pages) |
1256 | goto unlock; | |
37d81828 | 1257 | |
7b732a75 PZ |
1258 | vmf->page = virt_to_page(data->data_pages[nr]); |
1259 | } | |
37d81828 | 1260 | get_page(vmf->page); |
7b732a75 PZ |
1261 | ret = 0; |
1262 | unlock: | |
1263 | rcu_read_unlock(); | |
1264 | ||
1265 | return ret; | |
1266 | } | |
1267 | ||
1268 | static int perf_mmap_data_alloc(struct perf_counter *counter, int nr_pages) | |
1269 | { | |
1270 | struct perf_mmap_data *data; | |
1271 | unsigned long size; | |
1272 | int i; | |
1273 | ||
1274 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1275 | ||
1276 | size = sizeof(struct perf_mmap_data); | |
1277 | size += nr_pages * sizeof(void *); | |
1278 | ||
1279 | data = kzalloc(size, GFP_KERNEL); | |
1280 | if (!data) | |
1281 | goto fail; | |
1282 | ||
1283 | data->user_page = (void *)get_zeroed_page(GFP_KERNEL); | |
1284 | if (!data->user_page) | |
1285 | goto fail_user_page; | |
1286 | ||
1287 | for (i = 0; i < nr_pages; i++) { | |
1288 | data->data_pages[i] = (void *)get_zeroed_page(GFP_KERNEL); | |
1289 | if (!data->data_pages[i]) | |
1290 | goto fail_data_pages; | |
1291 | } | |
1292 | ||
1293 | data->nr_pages = nr_pages; | |
1294 | ||
1295 | rcu_assign_pointer(counter->data, data); | |
1296 | ||
37d81828 | 1297 | return 0; |
7b732a75 PZ |
1298 | |
1299 | fail_data_pages: | |
1300 | for (i--; i >= 0; i--) | |
1301 | free_page((unsigned long)data->data_pages[i]); | |
1302 | ||
1303 | free_page((unsigned long)data->user_page); | |
1304 | ||
1305 | fail_user_page: | |
1306 | kfree(data); | |
1307 | ||
1308 | fail: | |
1309 | return -ENOMEM; | |
1310 | } | |
1311 | ||
1312 | static void __perf_mmap_data_free(struct rcu_head *rcu_head) | |
1313 | { | |
1314 | struct perf_mmap_data *data = container_of(rcu_head, | |
1315 | struct perf_mmap_data, rcu_head); | |
1316 | int i; | |
1317 | ||
1318 | free_page((unsigned long)data->user_page); | |
1319 | for (i = 0; i < data->nr_pages; i++) | |
1320 | free_page((unsigned long)data->data_pages[i]); | |
1321 | kfree(data); | |
1322 | } | |
1323 | ||
1324 | static void perf_mmap_data_free(struct perf_counter *counter) | |
1325 | { | |
1326 | struct perf_mmap_data *data = counter->data; | |
1327 | ||
1328 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1329 | ||
1330 | rcu_assign_pointer(counter->data, NULL); | |
1331 | call_rcu(&data->rcu_head, __perf_mmap_data_free); | |
1332 | } | |
1333 | ||
1334 | static void perf_mmap_open(struct vm_area_struct *vma) | |
1335 | { | |
1336 | struct perf_counter *counter = vma->vm_file->private_data; | |
1337 | ||
1338 | atomic_inc(&counter->mmap_count); | |
1339 | } | |
1340 | ||
1341 | static void perf_mmap_close(struct vm_area_struct *vma) | |
1342 | { | |
1343 | struct perf_counter *counter = vma->vm_file->private_data; | |
1344 | ||
1345 | if (atomic_dec_and_mutex_lock(&counter->mmap_count, | |
1346 | &counter->mmap_mutex)) { | |
1347 | perf_mmap_data_free(counter); | |
1348 | mutex_unlock(&counter->mmap_mutex); | |
1349 | } | |
37d81828 PM |
1350 | } |
1351 | ||
1352 | static struct vm_operations_struct perf_mmap_vmops = { | |
7b732a75 PZ |
1353 | .open = perf_mmap_open, |
1354 | .close = perf_mmap_close, | |
37d81828 PM |
1355 | .fault = perf_mmap_fault, |
1356 | }; | |
1357 | ||
1358 | static int perf_mmap(struct file *file, struct vm_area_struct *vma) | |
1359 | { | |
1360 | struct perf_counter *counter = file->private_data; | |
7b732a75 PZ |
1361 | unsigned long vma_size; |
1362 | unsigned long nr_pages; | |
1363 | unsigned long locked, lock_limit; | |
1364 | int ret = 0; | |
37d81828 PM |
1365 | |
1366 | if (!(vma->vm_flags & VM_SHARED) || (vma->vm_flags & VM_WRITE)) | |
1367 | return -EINVAL; | |
7b732a75 PZ |
1368 | |
1369 | vma_size = vma->vm_end - vma->vm_start; | |
1370 | nr_pages = (vma_size / PAGE_SIZE) - 1; | |
1371 | ||
7730d865 PZ |
1372 | /* |
1373 | * If we have data pages ensure they're a power-of-two number, so we | |
1374 | * can do bitmasks instead of modulo. | |
1375 | */ | |
1376 | if (nr_pages != 0 && !is_power_of_2(nr_pages)) | |
37d81828 PM |
1377 | return -EINVAL; |
1378 | ||
7b732a75 | 1379 | if (vma_size != PAGE_SIZE * (1 + nr_pages)) |
37d81828 PM |
1380 | return -EINVAL; |
1381 | ||
7b732a75 PZ |
1382 | if (vma->vm_pgoff != 0) |
1383 | return -EINVAL; | |
37d81828 | 1384 | |
7b732a75 PZ |
1385 | locked = vma_size >> PAGE_SHIFT; |
1386 | locked += vma->vm_mm->locked_vm; | |
1387 | ||
1388 | lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; | |
1389 | lock_limit >>= PAGE_SHIFT; | |
1390 | ||
1391 | if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) | |
1392 | return -EPERM; | |
1393 | ||
1394 | mutex_lock(&counter->mmap_mutex); | |
1395 | if (atomic_inc_not_zero(&counter->mmap_count)) | |
1396 | goto out; | |
1397 | ||
1398 | WARN_ON(counter->data); | |
1399 | ret = perf_mmap_data_alloc(counter, nr_pages); | |
1400 | if (!ret) | |
1401 | atomic_set(&counter->mmap_count, 1); | |
1402 | out: | |
1403 | mutex_unlock(&counter->mmap_mutex); | |
37d81828 PM |
1404 | |
1405 | vma->vm_flags &= ~VM_MAYWRITE; | |
1406 | vma->vm_flags |= VM_RESERVED; | |
1407 | vma->vm_ops = &perf_mmap_vmops; | |
7b732a75 PZ |
1408 | |
1409 | return ret; | |
37d81828 PM |
1410 | } |
1411 | ||
0793a61d TG |
1412 | static const struct file_operations perf_fops = { |
1413 | .release = perf_release, | |
1414 | .read = perf_read, | |
1415 | .poll = perf_poll, | |
d859e29f PM |
1416 | .unlocked_ioctl = perf_ioctl, |
1417 | .compat_ioctl = perf_ioctl, | |
37d81828 | 1418 | .mmap = perf_mmap, |
0793a61d TG |
1419 | }; |
1420 | ||
0322cd6e PZ |
1421 | /* |
1422 | * Output | |
1423 | */ | |
1424 | ||
b9cacc7b PZ |
1425 | struct perf_output_handle { |
1426 | struct perf_counter *counter; | |
1427 | struct perf_mmap_data *data; | |
1428 | unsigned int offset; | |
63e35b25 | 1429 | unsigned int head; |
b9cacc7b PZ |
1430 | int wakeup; |
1431 | }; | |
1432 | ||
1433 | static int perf_output_begin(struct perf_output_handle *handle, | |
1434 | struct perf_counter *counter, unsigned int size) | |
0322cd6e | 1435 | { |
7b732a75 | 1436 | struct perf_mmap_data *data; |
b9cacc7b | 1437 | unsigned int offset, head; |
0322cd6e | 1438 | |
7b732a75 | 1439 | rcu_read_lock(); |
7b732a75 PZ |
1440 | data = rcu_dereference(counter->data); |
1441 | if (!data) | |
1442 | goto out; | |
1443 | ||
1444 | if (!data->nr_pages) | |
1445 | goto out; | |
1446 | ||
7b732a75 PZ |
1447 | do { |
1448 | offset = head = atomic_read(&data->head); | |
c7138f37 | 1449 | head += size; |
7b732a75 PZ |
1450 | } while (atomic_cmpxchg(&data->head, offset, head) != offset); |
1451 | ||
b9cacc7b PZ |
1452 | handle->counter = counter; |
1453 | handle->data = data; | |
1454 | handle->offset = offset; | |
63e35b25 | 1455 | handle->head = head; |
b9cacc7b | 1456 | handle->wakeup = (offset >> PAGE_SHIFT) != (head >> PAGE_SHIFT); |
0322cd6e | 1457 | |
b9cacc7b | 1458 | return 0; |
7b732a75 | 1459 | |
b9cacc7b PZ |
1460 | out: |
1461 | rcu_read_unlock(); | |
7b732a75 | 1462 | |
b9cacc7b PZ |
1463 | return -ENOSPC; |
1464 | } | |
7b732a75 | 1465 | |
b9cacc7b PZ |
1466 | static void perf_output_copy(struct perf_output_handle *handle, |
1467 | void *buf, unsigned int len) | |
1468 | { | |
1469 | unsigned int pages_mask; | |
1470 | unsigned int offset; | |
1471 | unsigned int size; | |
1472 | void **pages; | |
1473 | ||
1474 | offset = handle->offset; | |
1475 | pages_mask = handle->data->nr_pages - 1; | |
1476 | pages = handle->data->data_pages; | |
1477 | ||
1478 | do { | |
1479 | unsigned int page_offset; | |
1480 | int nr; | |
1481 | ||
1482 | nr = (offset >> PAGE_SHIFT) & pages_mask; | |
1483 | page_offset = offset & (PAGE_SIZE - 1); | |
1484 | size = min_t(unsigned int, PAGE_SIZE - page_offset, len); | |
1485 | ||
1486 | memcpy(pages[nr] + page_offset, buf, size); | |
1487 | ||
1488 | len -= size; | |
1489 | buf += size; | |
1490 | offset += size; | |
1491 | } while (len); | |
1492 | ||
1493 | handle->offset = offset; | |
63e35b25 PZ |
1494 | |
1495 | WARN_ON_ONCE(handle->offset > handle->head); | |
b9cacc7b PZ |
1496 | } |
1497 | ||
5c148194 PZ |
1498 | #define perf_output_put(handle, x) \ |
1499 | perf_output_copy((handle), &(x), sizeof(x)) | |
1500 | ||
b9cacc7b PZ |
1501 | static void perf_output_end(struct perf_output_handle *handle, int nmi) |
1502 | { | |
1503 | if (handle->wakeup) { | |
1504 | (void)atomic_xchg(&handle->data->wakeup, POLL_IN); | |
1505 | __perf_counter_update_userpage(handle->counter, handle->data); | |
7b732a75 | 1506 | if (nmi) { |
b9cacc7b | 1507 | handle->counter->wakeup_pending = 1; |
7b732a75 PZ |
1508 | set_perf_counter_pending(); |
1509 | } else | |
b9cacc7b | 1510 | wake_up(&handle->counter->waitq); |
0322cd6e | 1511 | } |
7b732a75 | 1512 | rcu_read_unlock(); |
b9cacc7b PZ |
1513 | } |
1514 | ||
1515 | static int perf_output_write(struct perf_counter *counter, int nmi, | |
1516 | void *buf, ssize_t size) | |
1517 | { | |
1518 | struct perf_output_handle handle; | |
1519 | int ret; | |
7b732a75 | 1520 | |
b9cacc7b PZ |
1521 | ret = perf_output_begin(&handle, counter, size); |
1522 | if (ret) | |
1523 | goto out; | |
1524 | ||
1525 | perf_output_copy(&handle, buf, size); | |
1526 | perf_output_end(&handle, nmi); | |
1527 | ||
1528 | out: | |
7b732a75 PZ |
1529 | return ret; |
1530 | } | |
1531 | ||
1532 | static void perf_output_simple(struct perf_counter *counter, | |
1533 | int nmi, struct pt_regs *regs) | |
1534 | { | |
ea5d20cf | 1535 | unsigned int size; |
5c148194 PZ |
1536 | struct { |
1537 | struct perf_event_header header; | |
1538 | u64 ip; | |
ea5d20cf | 1539 | u32 pid, tid; |
5c148194 | 1540 | } event; |
7b732a75 | 1541 | |
5c148194 | 1542 | event.header.type = PERF_EVENT_IP; |
5c148194 | 1543 | event.ip = instruction_pointer(regs); |
7b732a75 | 1544 | |
ea5d20cf PZ |
1545 | size = sizeof(event); |
1546 | ||
1547 | if (counter->hw_event.include_tid) { | |
1548 | /* namespace issues */ | |
1549 | event.pid = current->group_leader->pid; | |
1550 | event.tid = current->pid; | |
1551 | ||
1552 | event.header.type |= __PERF_EVENT_TID; | |
1553 | } else | |
1554 | size -= sizeof(u64); | |
1555 | ||
1556 | event.header.size = size; | |
1557 | ||
1558 | perf_output_write(counter, nmi, &event, size); | |
0322cd6e PZ |
1559 | } |
1560 | ||
7b732a75 | 1561 | static void perf_output_group(struct perf_counter *counter, int nmi) |
0322cd6e | 1562 | { |
5c148194 PZ |
1563 | struct perf_output_handle handle; |
1564 | struct perf_event_header header; | |
0322cd6e | 1565 | struct perf_counter *leader, *sub; |
5c148194 PZ |
1566 | unsigned int size; |
1567 | struct { | |
1568 | u64 event; | |
1569 | u64 counter; | |
1570 | } entry; | |
1571 | int ret; | |
1572 | ||
1573 | size = sizeof(header) + counter->nr_siblings * sizeof(entry); | |
1574 | ||
1575 | ret = perf_output_begin(&handle, counter, size); | |
1576 | if (ret) | |
1577 | return; | |
1578 | ||
1579 | header.type = PERF_EVENT_GROUP; | |
1580 | header.size = size; | |
1581 | ||
1582 | perf_output_put(&handle, header); | |
0322cd6e PZ |
1583 | |
1584 | leader = counter->group_leader; | |
1585 | list_for_each_entry(sub, &leader->sibling_list, list_entry) { | |
1586 | if (sub != counter) | |
1587 | sub->hw_ops->read(sub); | |
7b732a75 PZ |
1588 | |
1589 | entry.event = sub->hw_event.config; | |
1590 | entry.counter = atomic64_read(&sub->count); | |
1591 | ||
5c148194 | 1592 | perf_output_put(&handle, entry); |
0322cd6e | 1593 | } |
5c148194 PZ |
1594 | |
1595 | perf_output_end(&handle, nmi); | |
0322cd6e PZ |
1596 | } |
1597 | ||
1598 | void perf_counter_output(struct perf_counter *counter, | |
1599 | int nmi, struct pt_regs *regs) | |
1600 | { | |
1601 | switch (counter->hw_event.record_type) { | |
1602 | case PERF_RECORD_SIMPLE: | |
1603 | return; | |
1604 | ||
1605 | case PERF_RECORD_IRQ: | |
7b732a75 | 1606 | perf_output_simple(counter, nmi, regs); |
0322cd6e PZ |
1607 | break; |
1608 | ||
1609 | case PERF_RECORD_GROUP: | |
7b732a75 | 1610 | perf_output_group(counter, nmi); |
0322cd6e PZ |
1611 | break; |
1612 | } | |
0322cd6e PZ |
1613 | } |
1614 | ||
15dbf27c PZ |
1615 | /* |
1616 | * Generic software counter infrastructure | |
1617 | */ | |
1618 | ||
1619 | static void perf_swcounter_update(struct perf_counter *counter) | |
1620 | { | |
1621 | struct hw_perf_counter *hwc = &counter->hw; | |
1622 | u64 prev, now; | |
1623 | s64 delta; | |
1624 | ||
1625 | again: | |
1626 | prev = atomic64_read(&hwc->prev_count); | |
1627 | now = atomic64_read(&hwc->count); | |
1628 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
1629 | goto again; | |
1630 | ||
1631 | delta = now - prev; | |
1632 | ||
1633 | atomic64_add(delta, &counter->count); | |
1634 | atomic64_sub(delta, &hwc->period_left); | |
1635 | } | |
1636 | ||
1637 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
1638 | { | |
1639 | struct hw_perf_counter *hwc = &counter->hw; | |
1640 | s64 left = atomic64_read(&hwc->period_left); | |
1641 | s64 period = hwc->irq_period; | |
1642 | ||
1643 | if (unlikely(left <= -period)) { | |
1644 | left = period; | |
1645 | atomic64_set(&hwc->period_left, left); | |
1646 | } | |
1647 | ||
1648 | if (unlikely(left <= 0)) { | |
1649 | left += period; | |
1650 | atomic64_add(period, &hwc->period_left); | |
1651 | } | |
1652 | ||
1653 | atomic64_set(&hwc->prev_count, -left); | |
1654 | atomic64_set(&hwc->count, -left); | |
1655 | } | |
1656 | ||
d6d020e9 PZ |
1657 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
1658 | { | |
1659 | struct perf_counter *counter; | |
1660 | struct pt_regs *regs; | |
1661 | ||
1662 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
1663 | counter->hw_ops->read(counter); | |
1664 | ||
1665 | regs = get_irq_regs(); | |
1666 | /* | |
1667 | * In case we exclude kernel IPs or are somehow not in interrupt | |
1668 | * context, provide the next best thing, the user IP. | |
1669 | */ | |
1670 | if ((counter->hw_event.exclude_kernel || !regs) && | |
1671 | !counter->hw_event.exclude_user) | |
1672 | regs = task_pt_regs(current); | |
1673 | ||
1674 | if (regs) | |
0322cd6e | 1675 | perf_counter_output(counter, 0, regs); |
d6d020e9 PZ |
1676 | |
1677 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
1678 | ||
1679 | return HRTIMER_RESTART; | |
1680 | } | |
1681 | ||
1682 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
1683 | int nmi, struct pt_regs *regs) | |
1684 | { | |
b8e83514 PZ |
1685 | perf_swcounter_update(counter); |
1686 | perf_swcounter_set_period(counter); | |
0322cd6e | 1687 | perf_counter_output(counter, nmi, regs); |
d6d020e9 PZ |
1688 | } |
1689 | ||
15dbf27c | 1690 | static int perf_swcounter_match(struct perf_counter *counter, |
b8e83514 PZ |
1691 | enum perf_event_types type, |
1692 | u32 event, struct pt_regs *regs) | |
15dbf27c PZ |
1693 | { |
1694 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
1695 | return 0; | |
1696 | ||
f4a2deb4 | 1697 | if (perf_event_raw(&counter->hw_event)) |
b8e83514 PZ |
1698 | return 0; |
1699 | ||
f4a2deb4 | 1700 | if (perf_event_type(&counter->hw_event) != type) |
15dbf27c PZ |
1701 | return 0; |
1702 | ||
f4a2deb4 | 1703 | if (perf_event_id(&counter->hw_event) != event) |
15dbf27c PZ |
1704 | return 0; |
1705 | ||
1706 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
1707 | return 0; | |
1708 | ||
1709 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
1710 | return 0; | |
1711 | ||
1712 | return 1; | |
1713 | } | |
1714 | ||
d6d020e9 PZ |
1715 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
1716 | int nmi, struct pt_regs *regs) | |
1717 | { | |
1718 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
1719 | if (counter->hw.irq_period && !neg) | |
1720 | perf_swcounter_overflow(counter, nmi, regs); | |
1721 | } | |
1722 | ||
15dbf27c | 1723 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
b8e83514 PZ |
1724 | enum perf_event_types type, u32 event, |
1725 | u64 nr, int nmi, struct pt_regs *regs) | |
15dbf27c PZ |
1726 | { |
1727 | struct perf_counter *counter; | |
15dbf27c | 1728 | |
01ef09d9 | 1729 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) |
15dbf27c PZ |
1730 | return; |
1731 | ||
592903cd PZ |
1732 | rcu_read_lock(); |
1733 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
b8e83514 | 1734 | if (perf_swcounter_match(counter, type, event, regs)) |
d6d020e9 | 1735 | perf_swcounter_add(counter, nr, nmi, regs); |
15dbf27c | 1736 | } |
592903cd | 1737 | rcu_read_unlock(); |
15dbf27c PZ |
1738 | } |
1739 | ||
96f6d444 PZ |
1740 | static int *perf_swcounter_recursion_context(struct perf_cpu_context *cpuctx) |
1741 | { | |
1742 | if (in_nmi()) | |
1743 | return &cpuctx->recursion[3]; | |
1744 | ||
1745 | if (in_irq()) | |
1746 | return &cpuctx->recursion[2]; | |
1747 | ||
1748 | if (in_softirq()) | |
1749 | return &cpuctx->recursion[1]; | |
1750 | ||
1751 | return &cpuctx->recursion[0]; | |
1752 | } | |
1753 | ||
b8e83514 PZ |
1754 | static void __perf_swcounter_event(enum perf_event_types type, u32 event, |
1755 | u64 nr, int nmi, struct pt_regs *regs) | |
15dbf27c PZ |
1756 | { |
1757 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
96f6d444 PZ |
1758 | int *recursion = perf_swcounter_recursion_context(cpuctx); |
1759 | ||
1760 | if (*recursion) | |
1761 | goto out; | |
1762 | ||
1763 | (*recursion)++; | |
1764 | barrier(); | |
15dbf27c | 1765 | |
b8e83514 PZ |
1766 | perf_swcounter_ctx_event(&cpuctx->ctx, type, event, nr, nmi, regs); |
1767 | if (cpuctx->task_ctx) { | |
1768 | perf_swcounter_ctx_event(cpuctx->task_ctx, type, event, | |
1769 | nr, nmi, regs); | |
1770 | } | |
15dbf27c | 1771 | |
96f6d444 PZ |
1772 | barrier(); |
1773 | (*recursion)--; | |
1774 | ||
1775 | out: | |
15dbf27c PZ |
1776 | put_cpu_var(perf_cpu_context); |
1777 | } | |
1778 | ||
b8e83514 PZ |
1779 | void perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs) |
1780 | { | |
1781 | __perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi, regs); | |
1782 | } | |
1783 | ||
15dbf27c PZ |
1784 | static void perf_swcounter_read(struct perf_counter *counter) |
1785 | { | |
1786 | perf_swcounter_update(counter); | |
1787 | } | |
1788 | ||
1789 | static int perf_swcounter_enable(struct perf_counter *counter) | |
1790 | { | |
1791 | perf_swcounter_set_period(counter); | |
1792 | return 0; | |
1793 | } | |
1794 | ||
1795 | static void perf_swcounter_disable(struct perf_counter *counter) | |
1796 | { | |
1797 | perf_swcounter_update(counter); | |
1798 | } | |
1799 | ||
ac17dc8e PZ |
1800 | static const struct hw_perf_counter_ops perf_ops_generic = { |
1801 | .enable = perf_swcounter_enable, | |
1802 | .disable = perf_swcounter_disable, | |
1803 | .read = perf_swcounter_read, | |
1804 | }; | |
1805 | ||
15dbf27c PZ |
1806 | /* |
1807 | * Software counter: cpu wall time clock | |
1808 | */ | |
1809 | ||
9abf8a08 PM |
1810 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
1811 | { | |
1812 | int cpu = raw_smp_processor_id(); | |
1813 | s64 prev; | |
1814 | u64 now; | |
1815 | ||
1816 | now = cpu_clock(cpu); | |
1817 | prev = atomic64_read(&counter->hw.prev_count); | |
1818 | atomic64_set(&counter->hw.prev_count, now); | |
1819 | atomic64_add(now - prev, &counter->count); | |
1820 | } | |
1821 | ||
d6d020e9 PZ |
1822 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
1823 | { | |
1824 | struct hw_perf_counter *hwc = &counter->hw; | |
1825 | int cpu = raw_smp_processor_id(); | |
1826 | ||
1827 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
1828 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1829 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1830 | if (hwc->irq_period) { |
d6d020e9 PZ |
1831 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1832 | ns_to_ktime(hwc->irq_period), 0, | |
1833 | HRTIMER_MODE_REL, 0); | |
1834 | } | |
1835 | ||
1836 | return 0; | |
1837 | } | |
1838 | ||
5c92d124 IM |
1839 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
1840 | { | |
d6d020e9 | 1841 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 1842 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1843 | } |
1844 | ||
1845 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
1846 | { | |
9abf8a08 | 1847 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1848 | } |
1849 | ||
1850 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
1851 | .enable = cpu_clock_perf_counter_enable, |
1852 | .disable = cpu_clock_perf_counter_disable, | |
1853 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
1854 | }; |
1855 | ||
15dbf27c PZ |
1856 | /* |
1857 | * Software counter: task time clock | |
1858 | */ | |
1859 | ||
aa9c4c0f IM |
1860 | /* |
1861 | * Called from within the scheduler: | |
1862 | */ | |
1863 | static u64 task_clock_perf_counter_val(struct perf_counter *counter, int update) | |
bae43c99 | 1864 | { |
aa9c4c0f IM |
1865 | struct task_struct *curr = counter->task; |
1866 | u64 delta; | |
1867 | ||
aa9c4c0f IM |
1868 | delta = __task_delta_exec(curr, update); |
1869 | ||
1870 | return curr->se.sum_exec_runtime + delta; | |
1871 | } | |
1872 | ||
1873 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) | |
1874 | { | |
1875 | u64 prev; | |
8cb391e8 IM |
1876 | s64 delta; |
1877 | ||
1878 | prev = atomic64_read(&counter->hw.prev_count); | |
8cb391e8 IM |
1879 | |
1880 | atomic64_set(&counter->hw.prev_count, now); | |
1881 | ||
1882 | delta = now - prev; | |
8cb391e8 IM |
1883 | |
1884 | atomic64_add(delta, &counter->count); | |
bae43c99 IM |
1885 | } |
1886 | ||
95cdd2e7 | 1887 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 1888 | { |
d6d020e9 PZ |
1889 | struct hw_perf_counter *hwc = &counter->hw; |
1890 | ||
1891 | atomic64_set(&hwc->prev_count, task_clock_perf_counter_val(counter, 0)); | |
039fc91e PZ |
1892 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1893 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1894 | if (hwc->irq_period) { |
d6d020e9 PZ |
1895 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1896 | ns_to_ktime(hwc->irq_period), 0, | |
1897 | HRTIMER_MODE_REL, 0); | |
1898 | } | |
95cdd2e7 IM |
1899 | |
1900 | return 0; | |
8cb391e8 IM |
1901 | } |
1902 | ||
1903 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 1904 | { |
d6d020e9 PZ |
1905 | hrtimer_cancel(&counter->hw.hrtimer); |
1906 | task_clock_perf_counter_update(counter, | |
1907 | task_clock_perf_counter_val(counter, 0)); | |
1908 | } | |
aa9c4c0f | 1909 | |
d6d020e9 PZ |
1910 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
1911 | { | |
1912 | task_clock_perf_counter_update(counter, | |
1913 | task_clock_perf_counter_val(counter, 1)); | |
bae43c99 IM |
1914 | } |
1915 | ||
1916 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
1917 | .enable = task_clock_perf_counter_enable, |
1918 | .disable = task_clock_perf_counter_disable, | |
1919 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
1920 | }; |
1921 | ||
15dbf27c PZ |
1922 | /* |
1923 | * Software counter: cpu migrations | |
1924 | */ | |
1925 | ||
23a185ca | 1926 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 1927 | { |
23a185ca PM |
1928 | struct task_struct *curr = counter->ctx->task; |
1929 | ||
1930 | if (curr) | |
1931 | return curr->se.nr_migrations; | |
1932 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
1933 | } |
1934 | ||
1935 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
1936 | { | |
1937 | u64 prev, now; | |
1938 | s64 delta; | |
1939 | ||
1940 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 1941 | now = get_cpu_migrations(counter); |
6c594c21 IM |
1942 | |
1943 | atomic64_set(&counter->hw.prev_count, now); | |
1944 | ||
1945 | delta = now - prev; | |
6c594c21 IM |
1946 | |
1947 | atomic64_add(delta, &counter->count); | |
1948 | } | |
1949 | ||
1950 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
1951 | { | |
1952 | cpu_migrations_perf_counter_update(counter); | |
1953 | } | |
1954 | ||
95cdd2e7 | 1955 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 1956 | { |
c07c99b6 PM |
1957 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
1958 | atomic64_set(&counter->hw.prev_count, | |
1959 | get_cpu_migrations(counter)); | |
95cdd2e7 | 1960 | return 0; |
6c594c21 IM |
1961 | } |
1962 | ||
1963 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
1964 | { | |
1965 | cpu_migrations_perf_counter_update(counter); | |
1966 | } | |
1967 | ||
1968 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
1969 | .enable = cpu_migrations_perf_counter_enable, |
1970 | .disable = cpu_migrations_perf_counter_disable, | |
1971 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
1972 | }; |
1973 | ||
e077df4f PZ |
1974 | #ifdef CONFIG_EVENT_PROFILE |
1975 | void perf_tpcounter_event(int event_id) | |
1976 | { | |
b8e83514 PZ |
1977 | struct pt_regs *regs = get_irq_regs(); |
1978 | ||
1979 | if (!regs) | |
1980 | regs = task_pt_regs(current); | |
1981 | ||
1982 | __perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, 1, 1, regs); | |
e077df4f PZ |
1983 | } |
1984 | ||
1985 | extern int ftrace_profile_enable(int); | |
1986 | extern void ftrace_profile_disable(int); | |
1987 | ||
1988 | static void tp_perf_counter_destroy(struct perf_counter *counter) | |
1989 | { | |
f4a2deb4 | 1990 | ftrace_profile_disable(perf_event_id(&counter->hw_event)); |
e077df4f PZ |
1991 | } |
1992 | ||
1993 | static const struct hw_perf_counter_ops * | |
1994 | tp_perf_counter_init(struct perf_counter *counter) | |
1995 | { | |
f4a2deb4 | 1996 | int event_id = perf_event_id(&counter->hw_event); |
e077df4f PZ |
1997 | int ret; |
1998 | ||
1999 | ret = ftrace_profile_enable(event_id); | |
2000 | if (ret) | |
2001 | return NULL; | |
2002 | ||
2003 | counter->destroy = tp_perf_counter_destroy; | |
b8e83514 | 2004 | counter->hw.irq_period = counter->hw_event.irq_period; |
e077df4f PZ |
2005 | |
2006 | return &perf_ops_generic; | |
2007 | } | |
2008 | #else | |
2009 | static const struct hw_perf_counter_ops * | |
2010 | tp_perf_counter_init(struct perf_counter *counter) | |
2011 | { | |
2012 | return NULL; | |
2013 | } | |
2014 | #endif | |
2015 | ||
5c92d124 IM |
2016 | static const struct hw_perf_counter_ops * |
2017 | sw_perf_counter_init(struct perf_counter *counter) | |
2018 | { | |
15dbf27c | 2019 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 2020 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 2021 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 2022 | |
0475f9ea PM |
2023 | /* |
2024 | * Software counters (currently) can't in general distinguish | |
2025 | * between user, kernel and hypervisor events. | |
2026 | * However, context switches and cpu migrations are considered | |
2027 | * to be kernel events, and page faults are never hypervisor | |
2028 | * events. | |
2029 | */ | |
f4a2deb4 | 2030 | switch (perf_event_id(&counter->hw_event)) { |
5c92d124 | 2031 | case PERF_COUNT_CPU_CLOCK: |
d6d020e9 PZ |
2032 | hw_ops = &perf_ops_cpu_clock; |
2033 | ||
2034 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2035 | hw_event->irq_period = 10000; | |
5c92d124 | 2036 | break; |
bae43c99 | 2037 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
2038 | /* |
2039 | * If the user instantiates this as a per-cpu counter, | |
2040 | * use the cpu_clock counter instead. | |
2041 | */ | |
2042 | if (counter->ctx->task) | |
2043 | hw_ops = &perf_ops_task_clock; | |
2044 | else | |
2045 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
2046 | |
2047 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2048 | hw_event->irq_period = 10000; | |
bae43c99 | 2049 | break; |
e06c61a8 | 2050 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
2051 | case PERF_COUNT_PAGE_FAULTS_MIN: |
2052 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
5d6a27d8 | 2053 | case PERF_COUNT_CONTEXT_SWITCHES: |
4a0deca6 | 2054 | hw_ops = &perf_ops_generic; |
5d6a27d8 | 2055 | break; |
6c594c21 | 2056 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
2057 | if (!counter->hw_event.exclude_kernel) |
2058 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 2059 | break; |
5c92d124 | 2060 | } |
15dbf27c PZ |
2061 | |
2062 | if (hw_ops) | |
2063 | hwc->irq_period = hw_event->irq_period; | |
2064 | ||
5c92d124 IM |
2065 | return hw_ops; |
2066 | } | |
2067 | ||
0793a61d TG |
2068 | /* |
2069 | * Allocate and initialize a counter structure | |
2070 | */ | |
2071 | static struct perf_counter * | |
04289bb9 IM |
2072 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
2073 | int cpu, | |
23a185ca | 2074 | struct perf_counter_context *ctx, |
9b51f66d IM |
2075 | struct perf_counter *group_leader, |
2076 | gfp_t gfpflags) | |
0793a61d | 2077 | { |
5c92d124 | 2078 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 2079 | struct perf_counter *counter; |
0793a61d | 2080 | |
9b51f66d | 2081 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d TG |
2082 | if (!counter) |
2083 | return NULL; | |
2084 | ||
04289bb9 IM |
2085 | /* |
2086 | * Single counters are their own group leaders, with an | |
2087 | * empty sibling list: | |
2088 | */ | |
2089 | if (!group_leader) | |
2090 | group_leader = counter; | |
2091 | ||
0793a61d | 2092 | mutex_init(&counter->mutex); |
04289bb9 | 2093 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 2094 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 2095 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
2096 | init_waitqueue_head(&counter->waitq); |
2097 | ||
7b732a75 PZ |
2098 | mutex_init(&counter->mmap_mutex); |
2099 | ||
d859e29f PM |
2100 | INIT_LIST_HEAD(&counter->child_list); |
2101 | ||
9f66a381 IM |
2102 | counter->cpu = cpu; |
2103 | counter->hw_event = *hw_event; | |
2104 | counter->wakeup_pending = 0; | |
04289bb9 | 2105 | counter->group_leader = group_leader; |
621a01ea | 2106 | counter->hw_ops = NULL; |
23a185ca | 2107 | counter->ctx = ctx; |
621a01ea | 2108 | |
235c7fc7 | 2109 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
2110 | if (hw_event->disabled) |
2111 | counter->state = PERF_COUNTER_STATE_OFF; | |
2112 | ||
5c92d124 | 2113 | hw_ops = NULL; |
b8e83514 | 2114 | |
f4a2deb4 | 2115 | if (perf_event_raw(hw_event)) { |
b8e83514 | 2116 | hw_ops = hw_perf_counter_init(counter); |
f4a2deb4 PZ |
2117 | goto done; |
2118 | } | |
2119 | ||
2120 | switch (perf_event_type(hw_event)) { | |
b8e83514 | 2121 | case PERF_TYPE_HARDWARE: |
5c92d124 | 2122 | hw_ops = hw_perf_counter_init(counter); |
b8e83514 PZ |
2123 | break; |
2124 | ||
2125 | case PERF_TYPE_SOFTWARE: | |
2126 | hw_ops = sw_perf_counter_init(counter); | |
2127 | break; | |
2128 | ||
2129 | case PERF_TYPE_TRACEPOINT: | |
2130 | hw_ops = tp_perf_counter_init(counter); | |
2131 | break; | |
2132 | } | |
5c92d124 | 2133 | |
621a01ea IM |
2134 | if (!hw_ops) { |
2135 | kfree(counter); | |
2136 | return NULL; | |
2137 | } | |
f4a2deb4 | 2138 | done: |
621a01ea | 2139 | counter->hw_ops = hw_ops; |
0793a61d TG |
2140 | |
2141 | return counter; | |
2142 | } | |
2143 | ||
2144 | /** | |
2743a5b0 | 2145 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
2146 | * |
2147 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 2148 | * @pid: target pid |
9f66a381 IM |
2149 | * @cpu: target cpu |
2150 | * @group_fd: group leader counter fd | |
0793a61d | 2151 | */ |
2743a5b0 | 2152 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 2153 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 2154 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 2155 | { |
04289bb9 | 2156 | struct perf_counter *counter, *group_leader; |
9f66a381 | 2157 | struct perf_counter_hw_event hw_event; |
04289bb9 | 2158 | struct perf_counter_context *ctx; |
9b51f66d | 2159 | struct file *counter_file = NULL; |
04289bb9 IM |
2160 | struct file *group_file = NULL; |
2161 | int fput_needed = 0; | |
9b51f66d | 2162 | int fput_needed2 = 0; |
0793a61d TG |
2163 | int ret; |
2164 | ||
2743a5b0 PM |
2165 | /* for future expandability... */ |
2166 | if (flags) | |
2167 | return -EINVAL; | |
2168 | ||
9f66a381 | 2169 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
2170 | return -EFAULT; |
2171 | ||
04289bb9 | 2172 | /* |
ccff286d IM |
2173 | * Get the target context (task or percpu): |
2174 | */ | |
2175 | ctx = find_get_context(pid, cpu); | |
2176 | if (IS_ERR(ctx)) | |
2177 | return PTR_ERR(ctx); | |
2178 | ||
2179 | /* | |
2180 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
2181 | */ |
2182 | group_leader = NULL; | |
2183 | if (group_fd != -1) { | |
2184 | ret = -EINVAL; | |
2185 | group_file = fget_light(group_fd, &fput_needed); | |
2186 | if (!group_file) | |
ccff286d | 2187 | goto err_put_context; |
04289bb9 | 2188 | if (group_file->f_op != &perf_fops) |
ccff286d | 2189 | goto err_put_context; |
04289bb9 IM |
2190 | |
2191 | group_leader = group_file->private_data; | |
2192 | /* | |
ccff286d IM |
2193 | * Do not allow a recursive hierarchy (this new sibling |
2194 | * becoming part of another group-sibling): | |
2195 | */ | |
2196 | if (group_leader->group_leader != group_leader) | |
2197 | goto err_put_context; | |
2198 | /* | |
2199 | * Do not allow to attach to a group in a different | |
2200 | * task or CPU context: | |
04289bb9 | 2201 | */ |
ccff286d IM |
2202 | if (group_leader->ctx != ctx) |
2203 | goto err_put_context; | |
3b6f9e5c PM |
2204 | /* |
2205 | * Only a group leader can be exclusive or pinned | |
2206 | */ | |
2207 | if (hw_event.exclusive || hw_event.pinned) | |
2208 | goto err_put_context; | |
04289bb9 IM |
2209 | } |
2210 | ||
5c92d124 | 2211 | ret = -EINVAL; |
23a185ca PM |
2212 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
2213 | GFP_KERNEL); | |
0793a61d TG |
2214 | if (!counter) |
2215 | goto err_put_context; | |
2216 | ||
0793a61d TG |
2217 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
2218 | if (ret < 0) | |
9b51f66d IM |
2219 | goto err_free_put_context; |
2220 | ||
2221 | counter_file = fget_light(ret, &fput_needed2); | |
2222 | if (!counter_file) | |
2223 | goto err_free_put_context; | |
2224 | ||
2225 | counter->filp = counter_file; | |
d859e29f | 2226 | mutex_lock(&ctx->mutex); |
9b51f66d | 2227 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 2228 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
2229 | |
2230 | fput_light(counter_file, fput_needed2); | |
0793a61d | 2231 | |
04289bb9 IM |
2232 | out_fput: |
2233 | fput_light(group_file, fput_needed); | |
2234 | ||
0793a61d TG |
2235 | return ret; |
2236 | ||
9b51f66d | 2237 | err_free_put_context: |
0793a61d TG |
2238 | kfree(counter); |
2239 | ||
2240 | err_put_context: | |
2241 | put_context(ctx); | |
2242 | ||
04289bb9 | 2243 | goto out_fput; |
0793a61d TG |
2244 | } |
2245 | ||
9b51f66d IM |
2246 | /* |
2247 | * Initialize the perf_counter context in a task_struct: | |
2248 | */ | |
2249 | static void | |
2250 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
2251 | struct task_struct *task) | |
2252 | { | |
2253 | memset(ctx, 0, sizeof(*ctx)); | |
2254 | spin_lock_init(&ctx->lock); | |
d859e29f | 2255 | mutex_init(&ctx->mutex); |
9b51f66d | 2256 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2257 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2258 | ctx->task = task; |
2259 | } | |
2260 | ||
2261 | /* | |
2262 | * inherit a counter from parent task to child task: | |
2263 | */ | |
d859e29f | 2264 | static struct perf_counter * |
9b51f66d IM |
2265 | inherit_counter(struct perf_counter *parent_counter, |
2266 | struct task_struct *parent, | |
2267 | struct perf_counter_context *parent_ctx, | |
2268 | struct task_struct *child, | |
d859e29f | 2269 | struct perf_counter *group_leader, |
9b51f66d IM |
2270 | struct perf_counter_context *child_ctx) |
2271 | { | |
2272 | struct perf_counter *child_counter; | |
2273 | ||
d859e29f PM |
2274 | /* |
2275 | * Instead of creating recursive hierarchies of counters, | |
2276 | * we link inherited counters back to the original parent, | |
2277 | * which has a filp for sure, which we use as the reference | |
2278 | * count: | |
2279 | */ | |
2280 | if (parent_counter->parent) | |
2281 | parent_counter = parent_counter->parent; | |
2282 | ||
9b51f66d | 2283 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2284 | parent_counter->cpu, child_ctx, |
2285 | group_leader, GFP_KERNEL); | |
9b51f66d | 2286 | if (!child_counter) |
d859e29f | 2287 | return NULL; |
9b51f66d IM |
2288 | |
2289 | /* | |
2290 | * Link it up in the child's context: | |
2291 | */ | |
9b51f66d IM |
2292 | child_counter->task = child; |
2293 | list_add_counter(child_counter, child_ctx); | |
2294 | child_ctx->nr_counters++; | |
2295 | ||
2296 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2297 | /* |
2298 | * inherit into child's child as well: | |
2299 | */ | |
2300 | child_counter->hw_event.inherit = 1; | |
2301 | ||
2302 | /* | |
2303 | * Get a reference to the parent filp - we will fput it | |
2304 | * when the child counter exits. This is safe to do because | |
2305 | * we are in the parent and we know that the filp still | |
2306 | * exists and has a nonzero count: | |
2307 | */ | |
2308 | atomic_long_inc(&parent_counter->filp->f_count); | |
2309 | ||
d859e29f PM |
2310 | /* |
2311 | * Link this into the parent counter's child list | |
2312 | */ | |
2313 | mutex_lock(&parent_counter->mutex); | |
2314 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2315 | ||
2316 | /* | |
2317 | * Make the child state follow the state of the parent counter, | |
2318 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2319 | * so we won't race with perf_counter_{en,dis}able_family. | |
2320 | */ | |
2321 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2322 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2323 | else | |
2324 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2325 | ||
2326 | mutex_unlock(&parent_counter->mutex); | |
2327 | ||
2328 | return child_counter; | |
2329 | } | |
2330 | ||
2331 | static int inherit_group(struct perf_counter *parent_counter, | |
2332 | struct task_struct *parent, | |
2333 | struct perf_counter_context *parent_ctx, | |
2334 | struct task_struct *child, | |
2335 | struct perf_counter_context *child_ctx) | |
2336 | { | |
2337 | struct perf_counter *leader; | |
2338 | struct perf_counter *sub; | |
2339 | ||
2340 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2341 | child, NULL, child_ctx); | |
2342 | if (!leader) | |
2343 | return -ENOMEM; | |
2344 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { | |
2345 | if (!inherit_counter(sub, parent, parent_ctx, | |
2346 | child, leader, child_ctx)) | |
2347 | return -ENOMEM; | |
2348 | } | |
9b51f66d IM |
2349 | return 0; |
2350 | } | |
2351 | ||
d859e29f PM |
2352 | static void sync_child_counter(struct perf_counter *child_counter, |
2353 | struct perf_counter *parent_counter) | |
2354 | { | |
2355 | u64 parent_val, child_val; | |
2356 | ||
2357 | parent_val = atomic64_read(&parent_counter->count); | |
2358 | child_val = atomic64_read(&child_counter->count); | |
2359 | ||
2360 | /* | |
2361 | * Add back the child's count to the parent's count: | |
2362 | */ | |
2363 | atomic64_add(child_val, &parent_counter->count); | |
2364 | ||
2365 | /* | |
2366 | * Remove this counter from the parent's list | |
2367 | */ | |
2368 | mutex_lock(&parent_counter->mutex); | |
2369 | list_del_init(&child_counter->child_list); | |
2370 | mutex_unlock(&parent_counter->mutex); | |
2371 | ||
2372 | /* | |
2373 | * Release the parent counter, if this was the last | |
2374 | * reference to it. | |
2375 | */ | |
2376 | fput(parent_counter->filp); | |
2377 | } | |
2378 | ||
9b51f66d IM |
2379 | static void |
2380 | __perf_counter_exit_task(struct task_struct *child, | |
2381 | struct perf_counter *child_counter, | |
2382 | struct perf_counter_context *child_ctx) | |
2383 | { | |
2384 | struct perf_counter *parent_counter; | |
d859e29f | 2385 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
2386 | |
2387 | /* | |
235c7fc7 IM |
2388 | * If we do not self-reap then we have to wait for the |
2389 | * child task to unschedule (it will happen for sure), | |
2390 | * so that its counter is at its final count. (This | |
2391 | * condition triggers rarely - child tasks usually get | |
2392 | * off their CPU before the parent has a chance to | |
2393 | * get this far into the reaping action) | |
9b51f66d | 2394 | */ |
235c7fc7 IM |
2395 | if (child != current) { |
2396 | wait_task_inactive(child, 0); | |
2397 | list_del_init(&child_counter->list_entry); | |
2398 | } else { | |
0cc0c027 | 2399 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
2400 | unsigned long flags; |
2401 | u64 perf_flags; | |
2402 | ||
2403 | /* | |
2404 | * Disable and unlink this counter. | |
2405 | * | |
2406 | * Be careful about zapping the list - IRQ/NMI context | |
2407 | * could still be processing it: | |
2408 | */ | |
2409 | curr_rq_lock_irq_save(&flags); | |
2410 | perf_flags = hw_perf_save_disable(); | |
0cc0c027 IM |
2411 | |
2412 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
2413 | ||
d859e29f | 2414 | group_sched_out(child_counter, cpuctx, child_ctx); |
0cc0c027 | 2415 | |
235c7fc7 | 2416 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 2417 | |
235c7fc7 | 2418 | child_ctx->nr_counters--; |
9b51f66d | 2419 | |
235c7fc7 IM |
2420 | hw_perf_restore(perf_flags); |
2421 | curr_rq_unlock_irq_restore(&flags); | |
2422 | } | |
9b51f66d IM |
2423 | |
2424 | parent_counter = child_counter->parent; | |
2425 | /* | |
2426 | * It can happen that parent exits first, and has counters | |
2427 | * that are still around due to the child reference. These | |
2428 | * counters need to be zapped - but otherwise linger. | |
2429 | */ | |
d859e29f PM |
2430 | if (parent_counter) { |
2431 | sync_child_counter(child_counter, parent_counter); | |
2432 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
2433 | list_entry) { | |
4bcf349a | 2434 | if (sub->parent) { |
d859e29f | 2435 | sync_child_counter(sub, sub->parent); |
f1600952 | 2436 | free_counter(sub); |
4bcf349a | 2437 | } |
d859e29f | 2438 | } |
f1600952 | 2439 | free_counter(child_counter); |
4bcf349a | 2440 | } |
9b51f66d IM |
2441 | } |
2442 | ||
2443 | /* | |
d859e29f | 2444 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 2445 | * |
d859e29f | 2446 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
2447 | * anymore so new counters will not be added. |
2448 | */ | |
2449 | void perf_counter_exit_task(struct task_struct *child) | |
2450 | { | |
2451 | struct perf_counter *child_counter, *tmp; | |
2452 | struct perf_counter_context *child_ctx; | |
2453 | ||
2454 | child_ctx = &child->perf_counter_ctx; | |
2455 | ||
2456 | if (likely(!child_ctx->nr_counters)) | |
2457 | return; | |
2458 | ||
2459 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
2460 | list_entry) | |
2461 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
2462 | } | |
2463 | ||
2464 | /* | |
2465 | * Initialize the perf_counter context in task_struct | |
2466 | */ | |
2467 | void perf_counter_init_task(struct task_struct *child) | |
2468 | { | |
2469 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 2470 | struct perf_counter *counter; |
9b51f66d | 2471 | struct task_struct *parent = current; |
9b51f66d IM |
2472 | |
2473 | child_ctx = &child->perf_counter_ctx; | |
2474 | parent_ctx = &parent->perf_counter_ctx; | |
2475 | ||
2476 | __perf_counter_init_context(child_ctx, child); | |
2477 | ||
2478 | /* | |
2479 | * This is executed from the parent task context, so inherit | |
2480 | * counters that have been marked for cloning: | |
2481 | */ | |
2482 | ||
2483 | if (likely(!parent_ctx->nr_counters)) | |
2484 | return; | |
2485 | ||
2486 | /* | |
2487 | * Lock the parent list. No need to lock the child - not PID | |
2488 | * hashed yet and not running, so nobody can access it. | |
2489 | */ | |
d859e29f | 2490 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
2491 | |
2492 | /* | |
2493 | * We dont have to disable NMIs - we are only looking at | |
2494 | * the list, not manipulating it: | |
2495 | */ | |
2496 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 2497 | if (!counter->hw_event.inherit) |
9b51f66d IM |
2498 | continue; |
2499 | ||
d859e29f | 2500 | if (inherit_group(counter, parent, |
9b51f66d IM |
2501 | parent_ctx, child, child_ctx)) |
2502 | break; | |
2503 | } | |
2504 | ||
d859e29f | 2505 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
2506 | } |
2507 | ||
04289bb9 | 2508 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 2509 | { |
04289bb9 | 2510 | struct perf_cpu_context *cpuctx; |
0793a61d | 2511 | |
04289bb9 IM |
2512 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
2513 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
2514 | |
2515 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 2516 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 2517 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 2518 | |
01d0287f | 2519 | hw_perf_counter_setup(cpu); |
0793a61d TG |
2520 | } |
2521 | ||
2522 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 2523 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
2524 | { |
2525 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
2526 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2527 | struct perf_counter *counter, *tmp; | |
2528 | ||
04289bb9 IM |
2529 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
2530 | __perf_counter_remove_from_context(counter); | |
0793a61d | 2531 | } |
04289bb9 | 2532 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 2533 | { |
d859e29f PM |
2534 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
2535 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2536 | ||
2537 | mutex_lock(&ctx->mutex); | |
04289bb9 | 2538 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 2539 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
2540 | } |
2541 | #else | |
04289bb9 | 2542 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
2543 | #endif |
2544 | ||
2545 | static int __cpuinit | |
2546 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
2547 | { | |
2548 | unsigned int cpu = (long)hcpu; | |
2549 | ||
2550 | switch (action) { | |
2551 | ||
2552 | case CPU_UP_PREPARE: | |
2553 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 2554 | perf_counter_init_cpu(cpu); |
0793a61d TG |
2555 | break; |
2556 | ||
2557 | case CPU_DOWN_PREPARE: | |
2558 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 2559 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
2560 | break; |
2561 | ||
2562 | default: | |
2563 | break; | |
2564 | } | |
2565 | ||
2566 | return NOTIFY_OK; | |
2567 | } | |
2568 | ||
2569 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
2570 | .notifier_call = perf_cpu_notify, | |
2571 | }; | |
2572 | ||
2573 | static int __init perf_counter_init(void) | |
2574 | { | |
2575 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
2576 | (void *)(long)smp_processor_id()); | |
2577 | register_cpu_notifier(&perf_cpu_nb); | |
2578 | ||
2579 | return 0; | |
2580 | } | |
2581 | early_initcall(perf_counter_init); | |
2582 | ||
2583 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
2584 | { | |
2585 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
2586 | } | |
2587 | ||
2588 | static ssize_t | |
2589 | perf_set_reserve_percpu(struct sysdev_class *class, | |
2590 | const char *buf, | |
2591 | size_t count) | |
2592 | { | |
2593 | struct perf_cpu_context *cpuctx; | |
2594 | unsigned long val; | |
2595 | int err, cpu, mpt; | |
2596 | ||
2597 | err = strict_strtoul(buf, 10, &val); | |
2598 | if (err) | |
2599 | return err; | |
2600 | if (val > perf_max_counters) | |
2601 | return -EINVAL; | |
2602 | ||
2603 | mutex_lock(&perf_resource_mutex); | |
2604 | perf_reserved_percpu = val; | |
2605 | for_each_online_cpu(cpu) { | |
2606 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
2607 | spin_lock_irq(&cpuctx->ctx.lock); | |
2608 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
2609 | perf_max_counters - perf_reserved_percpu); | |
2610 | cpuctx->max_pertask = mpt; | |
2611 | spin_unlock_irq(&cpuctx->ctx.lock); | |
2612 | } | |
2613 | mutex_unlock(&perf_resource_mutex); | |
2614 | ||
2615 | return count; | |
2616 | } | |
2617 | ||
2618 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
2619 | { | |
2620 | return sprintf(buf, "%d\n", perf_overcommit); | |
2621 | } | |
2622 | ||
2623 | static ssize_t | |
2624 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
2625 | { | |
2626 | unsigned long val; | |
2627 | int err; | |
2628 | ||
2629 | err = strict_strtoul(buf, 10, &val); | |
2630 | if (err) | |
2631 | return err; | |
2632 | if (val > 1) | |
2633 | return -EINVAL; | |
2634 | ||
2635 | mutex_lock(&perf_resource_mutex); | |
2636 | perf_overcommit = val; | |
2637 | mutex_unlock(&perf_resource_mutex); | |
2638 | ||
2639 | return count; | |
2640 | } | |
2641 | ||
2642 | static SYSDEV_CLASS_ATTR( | |
2643 | reserve_percpu, | |
2644 | 0644, | |
2645 | perf_show_reserve_percpu, | |
2646 | perf_set_reserve_percpu | |
2647 | ); | |
2648 | ||
2649 | static SYSDEV_CLASS_ATTR( | |
2650 | overcommit, | |
2651 | 0644, | |
2652 | perf_show_overcommit, | |
2653 | perf_set_overcommit | |
2654 | ); | |
2655 | ||
2656 | static struct attribute *perfclass_attrs[] = { | |
2657 | &attr_reserve_percpu.attr, | |
2658 | &attr_overcommit.attr, | |
2659 | NULL | |
2660 | }; | |
2661 | ||
2662 | static struct attribute_group perfclass_attr_group = { | |
2663 | .attrs = perfclass_attrs, | |
2664 | .name = "perf_counters", | |
2665 | }; | |
2666 | ||
2667 | static int __init perf_counter_sysfs_init(void) | |
2668 | { | |
2669 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
2670 | &perfclass_attr_group); | |
2671 | } | |
2672 | device_initcall(perf_counter_sysfs_init); |