Commit | Line | Data |
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0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
4 | * Copyright(C) 2008 Thomas Gleixner <tglx@linutronix.de> | |
5 | * Copyright(C) 2008 Red Hat, Inc., Ingo Molnar | |
6 | * | |
7 | * For licencing details see kernel-base/COPYING | |
8 | */ | |
9 | ||
10 | #include <linux/fs.h> | |
11 | #include <linux/cpu.h> | |
12 | #include <linux/smp.h> | |
04289bb9 | 13 | #include <linux/file.h> |
0793a61d TG |
14 | #include <linux/poll.h> |
15 | #include <linux/sysfs.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/percpu.h> | |
18 | #include <linux/uaccess.h> | |
19 | #include <linux/syscalls.h> | |
20 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 21 | #include <linux/kernel_stat.h> |
0793a61d | 22 | #include <linux/perf_counter.h> |
23a185ca PM |
23 | #include <linux/mm.h> |
24 | #include <linux/vmstat.h> | |
592903cd | 25 | #include <linux/rculist.h> |
0793a61d TG |
26 | |
27 | /* | |
28 | * Each CPU has a list of per CPU counters: | |
29 | */ | |
30 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
31 | ||
088e2852 | 32 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
33 | static int perf_reserved_percpu __read_mostly; |
34 | static int perf_overcommit __read_mostly = 1; | |
35 | ||
36 | /* | |
37 | * Mutex for (sysadmin-configurable) counter reservations: | |
38 | */ | |
39 | static DEFINE_MUTEX(perf_resource_mutex); | |
40 | ||
41 | /* | |
42 | * Architecture provided APIs - weak aliases: | |
43 | */ | |
5c92d124 | 44 | extern __weak const struct hw_perf_counter_ops * |
621a01ea | 45 | hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 46 | { |
ff6f0541 | 47 | return NULL; |
0793a61d TG |
48 | } |
49 | ||
01b2838c | 50 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 51 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 52 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
53 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
54 | struct perf_cpu_context *cpuctx, | |
55 | struct perf_counter_context *ctx, int cpu) | |
56 | { | |
57 | return 0; | |
58 | } | |
0793a61d | 59 | |
4eb96fcf PM |
60 | void __weak perf_counter_print_debug(void) { } |
61 | ||
04289bb9 IM |
62 | static void |
63 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
64 | { | |
65 | struct perf_counter *group_leader = counter->group_leader; | |
66 | ||
67 | /* | |
68 | * Depending on whether it is a standalone or sibling counter, | |
69 | * add it straight to the context's counter list, or to the group | |
70 | * leader's sibling list: | |
71 | */ | |
72 | if (counter->group_leader == counter) | |
73 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
74 | else | |
75 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); | |
592903cd PZ |
76 | |
77 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
78 | } |
79 | ||
80 | static void | |
81 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
82 | { | |
83 | struct perf_counter *sibling, *tmp; | |
84 | ||
85 | list_del_init(&counter->list_entry); | |
592903cd | 86 | list_del_rcu(&counter->event_entry); |
04289bb9 | 87 | |
04289bb9 IM |
88 | /* |
89 | * If this was a group counter with sibling counters then | |
90 | * upgrade the siblings to singleton counters by adding them | |
91 | * to the context list directly: | |
92 | */ | |
93 | list_for_each_entry_safe(sibling, tmp, | |
94 | &counter->sibling_list, list_entry) { | |
95 | ||
75564232 | 96 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
97 | sibling->group_leader = sibling; |
98 | } | |
99 | } | |
100 | ||
3b6f9e5c PM |
101 | static void |
102 | counter_sched_out(struct perf_counter *counter, | |
103 | struct perf_cpu_context *cpuctx, | |
104 | struct perf_counter_context *ctx) | |
105 | { | |
106 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
107 | return; | |
108 | ||
109 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
110 | counter->hw_ops->disable(counter); | |
111 | counter->oncpu = -1; | |
112 | ||
113 | if (!is_software_counter(counter)) | |
114 | cpuctx->active_oncpu--; | |
115 | ctx->nr_active--; | |
116 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
117 | cpuctx->exclusive = 0; | |
118 | } | |
119 | ||
d859e29f PM |
120 | static void |
121 | group_sched_out(struct perf_counter *group_counter, | |
122 | struct perf_cpu_context *cpuctx, | |
123 | struct perf_counter_context *ctx) | |
124 | { | |
125 | struct perf_counter *counter; | |
126 | ||
127 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
128 | return; | |
129 | ||
130 | counter_sched_out(group_counter, cpuctx, ctx); | |
131 | ||
132 | /* | |
133 | * Schedule out siblings (if any): | |
134 | */ | |
135 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
136 | counter_sched_out(counter, cpuctx, ctx); | |
137 | ||
138 | if (group_counter->hw_event.exclusive) | |
139 | cpuctx->exclusive = 0; | |
140 | } | |
141 | ||
0793a61d TG |
142 | /* |
143 | * Cross CPU call to remove a performance counter | |
144 | * | |
145 | * We disable the counter on the hardware level first. After that we | |
146 | * remove it from the context list. | |
147 | */ | |
04289bb9 | 148 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
149 | { |
150 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
151 | struct perf_counter *counter = info; | |
152 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 153 | unsigned long flags; |
5c92d124 | 154 | u64 perf_flags; |
0793a61d TG |
155 | |
156 | /* | |
157 | * If this is a task context, we need to check whether it is | |
158 | * the current task context of this cpu. If not it has been | |
159 | * scheduled out before the smp call arrived. | |
160 | */ | |
161 | if (ctx->task && cpuctx->task_ctx != ctx) | |
162 | return; | |
163 | ||
aa9c4c0f IM |
164 | curr_rq_lock_irq_save(&flags); |
165 | spin_lock(&ctx->lock); | |
0793a61d | 166 | |
3b6f9e5c PM |
167 | counter_sched_out(counter, cpuctx, ctx); |
168 | ||
169 | counter->task = NULL; | |
0793a61d TG |
170 | ctx->nr_counters--; |
171 | ||
172 | /* | |
173 | * Protect the list operation against NMI by disabling the | |
174 | * counters on a global level. NOP for non NMI based counters. | |
175 | */ | |
01b2838c | 176 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 177 | list_del_counter(counter, ctx); |
01b2838c | 178 | hw_perf_restore(perf_flags); |
0793a61d TG |
179 | |
180 | if (!ctx->task) { | |
181 | /* | |
182 | * Allow more per task counters with respect to the | |
183 | * reservation: | |
184 | */ | |
185 | cpuctx->max_pertask = | |
186 | min(perf_max_counters - ctx->nr_counters, | |
187 | perf_max_counters - perf_reserved_percpu); | |
188 | } | |
189 | ||
aa9c4c0f IM |
190 | spin_unlock(&ctx->lock); |
191 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
192 | } |
193 | ||
194 | ||
195 | /* | |
196 | * Remove the counter from a task's (or a CPU's) list of counters. | |
197 | * | |
d859e29f | 198 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
199 | * |
200 | * CPU counters are removed with a smp call. For task counters we only | |
201 | * call when the task is on a CPU. | |
202 | */ | |
04289bb9 | 203 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
204 | { |
205 | struct perf_counter_context *ctx = counter->ctx; | |
206 | struct task_struct *task = ctx->task; | |
207 | ||
208 | if (!task) { | |
209 | /* | |
210 | * Per cpu counters are removed via an smp call and | |
211 | * the removal is always sucessful. | |
212 | */ | |
213 | smp_call_function_single(counter->cpu, | |
04289bb9 | 214 | __perf_counter_remove_from_context, |
0793a61d TG |
215 | counter, 1); |
216 | return; | |
217 | } | |
218 | ||
219 | retry: | |
04289bb9 | 220 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
221 | counter); |
222 | ||
223 | spin_lock_irq(&ctx->lock); | |
224 | /* | |
225 | * If the context is active we need to retry the smp call. | |
226 | */ | |
04289bb9 | 227 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
228 | spin_unlock_irq(&ctx->lock); |
229 | goto retry; | |
230 | } | |
231 | ||
232 | /* | |
233 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 234 | * can remove the counter safely, if the call above did not |
0793a61d TG |
235 | * succeed. |
236 | */ | |
04289bb9 | 237 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 238 | ctx->nr_counters--; |
04289bb9 | 239 | list_del_counter(counter, ctx); |
0793a61d TG |
240 | counter->task = NULL; |
241 | } | |
242 | spin_unlock_irq(&ctx->lock); | |
243 | } | |
244 | ||
d859e29f PM |
245 | /* |
246 | * Cross CPU call to disable a performance counter | |
247 | */ | |
248 | static void __perf_counter_disable(void *info) | |
249 | { | |
250 | struct perf_counter *counter = info; | |
251 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
252 | struct perf_counter_context *ctx = counter->ctx; | |
253 | unsigned long flags; | |
254 | ||
255 | /* | |
256 | * If this is a per-task counter, need to check whether this | |
257 | * counter's task is the current task on this cpu. | |
258 | */ | |
259 | if (ctx->task && cpuctx->task_ctx != ctx) | |
260 | return; | |
261 | ||
262 | curr_rq_lock_irq_save(&flags); | |
263 | spin_lock(&ctx->lock); | |
264 | ||
265 | /* | |
266 | * If the counter is on, turn it off. | |
267 | * If it is in error state, leave it in error state. | |
268 | */ | |
269 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
270 | if (counter == counter->group_leader) | |
271 | group_sched_out(counter, cpuctx, ctx); | |
272 | else | |
273 | counter_sched_out(counter, cpuctx, ctx); | |
274 | counter->state = PERF_COUNTER_STATE_OFF; | |
275 | } | |
276 | ||
277 | spin_unlock(&ctx->lock); | |
278 | curr_rq_unlock_irq_restore(&flags); | |
279 | } | |
280 | ||
281 | /* | |
282 | * Disable a counter. | |
283 | */ | |
284 | static void perf_counter_disable(struct perf_counter *counter) | |
285 | { | |
286 | struct perf_counter_context *ctx = counter->ctx; | |
287 | struct task_struct *task = ctx->task; | |
288 | ||
289 | if (!task) { | |
290 | /* | |
291 | * Disable the counter on the cpu that it's on | |
292 | */ | |
293 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
294 | counter, 1); | |
295 | return; | |
296 | } | |
297 | ||
298 | retry: | |
299 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
300 | ||
301 | spin_lock_irq(&ctx->lock); | |
302 | /* | |
303 | * If the counter is still active, we need to retry the cross-call. | |
304 | */ | |
305 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
306 | spin_unlock_irq(&ctx->lock); | |
307 | goto retry; | |
308 | } | |
309 | ||
310 | /* | |
311 | * Since we have the lock this context can't be scheduled | |
312 | * in, so we can change the state safely. | |
313 | */ | |
314 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
315 | counter->state = PERF_COUNTER_STATE_OFF; | |
316 | ||
317 | spin_unlock_irq(&ctx->lock); | |
318 | } | |
319 | ||
320 | /* | |
321 | * Disable a counter and all its children. | |
322 | */ | |
323 | static void perf_counter_disable_family(struct perf_counter *counter) | |
324 | { | |
325 | struct perf_counter *child; | |
326 | ||
327 | perf_counter_disable(counter); | |
328 | ||
329 | /* | |
330 | * Lock the mutex to protect the list of children | |
331 | */ | |
332 | mutex_lock(&counter->mutex); | |
333 | list_for_each_entry(child, &counter->child_list, child_list) | |
334 | perf_counter_disable(child); | |
335 | mutex_unlock(&counter->mutex); | |
336 | } | |
337 | ||
235c7fc7 IM |
338 | static int |
339 | counter_sched_in(struct perf_counter *counter, | |
340 | struct perf_cpu_context *cpuctx, | |
341 | struct perf_counter_context *ctx, | |
342 | int cpu) | |
343 | { | |
3b6f9e5c | 344 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
345 | return 0; |
346 | ||
347 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
348 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
349 | /* | |
350 | * The new state must be visible before we turn it on in the hardware: | |
351 | */ | |
352 | smp_wmb(); | |
353 | ||
354 | if (counter->hw_ops->enable(counter)) { | |
355 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
356 | counter->oncpu = -1; | |
357 | return -EAGAIN; | |
358 | } | |
359 | ||
3b6f9e5c PM |
360 | if (!is_software_counter(counter)) |
361 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
362 | ctx->nr_active++; |
363 | ||
3b6f9e5c PM |
364 | if (counter->hw_event.exclusive) |
365 | cpuctx->exclusive = 1; | |
366 | ||
235c7fc7 IM |
367 | return 0; |
368 | } | |
369 | ||
3b6f9e5c PM |
370 | /* |
371 | * Return 1 for a group consisting entirely of software counters, | |
372 | * 0 if the group contains any hardware counters. | |
373 | */ | |
374 | static int is_software_only_group(struct perf_counter *leader) | |
375 | { | |
376 | struct perf_counter *counter; | |
377 | ||
378 | if (!is_software_counter(leader)) | |
379 | return 0; | |
380 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
381 | if (!is_software_counter(counter)) | |
382 | return 0; | |
383 | return 1; | |
384 | } | |
385 | ||
386 | /* | |
387 | * Work out whether we can put this counter group on the CPU now. | |
388 | */ | |
389 | static int group_can_go_on(struct perf_counter *counter, | |
390 | struct perf_cpu_context *cpuctx, | |
391 | int can_add_hw) | |
392 | { | |
393 | /* | |
394 | * Groups consisting entirely of software counters can always go on. | |
395 | */ | |
396 | if (is_software_only_group(counter)) | |
397 | return 1; | |
398 | /* | |
399 | * If an exclusive group is already on, no other hardware | |
400 | * counters can go on. | |
401 | */ | |
402 | if (cpuctx->exclusive) | |
403 | return 0; | |
404 | /* | |
405 | * If this group is exclusive and there are already | |
406 | * counters on the CPU, it can't go on. | |
407 | */ | |
408 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
409 | return 0; | |
410 | /* | |
411 | * Otherwise, try to add it if all previous groups were able | |
412 | * to go on. | |
413 | */ | |
414 | return can_add_hw; | |
415 | } | |
416 | ||
0793a61d | 417 | /* |
235c7fc7 | 418 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
419 | */ |
420 | static void __perf_install_in_context(void *info) | |
421 | { | |
422 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
423 | struct perf_counter *counter = info; | |
424 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 425 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 426 | int cpu = smp_processor_id(); |
9b51f66d | 427 | unsigned long flags; |
5c92d124 | 428 | u64 perf_flags; |
3b6f9e5c | 429 | int err; |
0793a61d TG |
430 | |
431 | /* | |
432 | * If this is a task context, we need to check whether it is | |
433 | * the current task context of this cpu. If not it has been | |
434 | * scheduled out before the smp call arrived. | |
435 | */ | |
436 | if (ctx->task && cpuctx->task_ctx != ctx) | |
437 | return; | |
438 | ||
aa9c4c0f IM |
439 | curr_rq_lock_irq_save(&flags); |
440 | spin_lock(&ctx->lock); | |
0793a61d TG |
441 | |
442 | /* | |
443 | * Protect the list operation against NMI by disabling the | |
444 | * counters on a global level. NOP for non NMI based counters. | |
445 | */ | |
01b2838c | 446 | perf_flags = hw_perf_save_disable(); |
0793a61d | 447 | |
235c7fc7 | 448 | list_add_counter(counter, ctx); |
0793a61d | 449 | ctx->nr_counters++; |
c07c99b6 | 450 | counter->prev_state = PERF_COUNTER_STATE_OFF; |
0793a61d | 451 | |
d859e29f PM |
452 | /* |
453 | * Don't put the counter on if it is disabled or if | |
454 | * it is in a group and the group isn't on. | |
455 | */ | |
456 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
457 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
458 | goto unlock; | |
459 | ||
3b6f9e5c PM |
460 | /* |
461 | * An exclusive counter can't go on if there are already active | |
462 | * hardware counters, and no hardware counter can go on if there | |
463 | * is already an exclusive counter on. | |
464 | */ | |
d859e29f | 465 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
466 | err = -EEXIST; |
467 | else | |
468 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
469 | ||
d859e29f PM |
470 | if (err) { |
471 | /* | |
472 | * This counter couldn't go on. If it is in a group | |
473 | * then we have to pull the whole group off. | |
474 | * If the counter group is pinned then put it in error state. | |
475 | */ | |
476 | if (leader != counter) | |
477 | group_sched_out(leader, cpuctx, ctx); | |
478 | if (leader->hw_event.pinned) | |
479 | leader->state = PERF_COUNTER_STATE_ERROR; | |
480 | } | |
0793a61d | 481 | |
3b6f9e5c | 482 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
483 | cpuctx->max_pertask--; |
484 | ||
d859e29f | 485 | unlock: |
235c7fc7 IM |
486 | hw_perf_restore(perf_flags); |
487 | ||
aa9c4c0f IM |
488 | spin_unlock(&ctx->lock); |
489 | curr_rq_unlock_irq_restore(&flags); | |
0793a61d TG |
490 | } |
491 | ||
492 | /* | |
493 | * Attach a performance counter to a context | |
494 | * | |
495 | * First we add the counter to the list with the hardware enable bit | |
496 | * in counter->hw_config cleared. | |
497 | * | |
498 | * If the counter is attached to a task which is on a CPU we use a smp | |
499 | * call to enable it in the task context. The task might have been | |
500 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
501 | * |
502 | * Must be called with ctx->mutex held. | |
0793a61d TG |
503 | */ |
504 | static void | |
505 | perf_install_in_context(struct perf_counter_context *ctx, | |
506 | struct perf_counter *counter, | |
507 | int cpu) | |
508 | { | |
509 | struct task_struct *task = ctx->task; | |
510 | ||
0793a61d TG |
511 | if (!task) { |
512 | /* | |
513 | * Per cpu counters are installed via an smp call and | |
514 | * the install is always sucessful. | |
515 | */ | |
516 | smp_call_function_single(cpu, __perf_install_in_context, | |
517 | counter, 1); | |
518 | return; | |
519 | } | |
520 | ||
521 | counter->task = task; | |
522 | retry: | |
523 | task_oncpu_function_call(task, __perf_install_in_context, | |
524 | counter); | |
525 | ||
526 | spin_lock_irq(&ctx->lock); | |
527 | /* | |
0793a61d TG |
528 | * we need to retry the smp call. |
529 | */ | |
d859e29f | 530 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
531 | spin_unlock_irq(&ctx->lock); |
532 | goto retry; | |
533 | } | |
534 | ||
535 | /* | |
536 | * The lock prevents that this context is scheduled in so we | |
537 | * can add the counter safely, if it the call above did not | |
538 | * succeed. | |
539 | */ | |
04289bb9 IM |
540 | if (list_empty(&counter->list_entry)) { |
541 | list_add_counter(counter, ctx); | |
0793a61d TG |
542 | ctx->nr_counters++; |
543 | } | |
544 | spin_unlock_irq(&ctx->lock); | |
545 | } | |
546 | ||
d859e29f PM |
547 | /* |
548 | * Cross CPU call to enable a performance counter | |
549 | */ | |
550 | static void __perf_counter_enable(void *info) | |
04289bb9 | 551 | { |
d859e29f PM |
552 | struct perf_counter *counter = info; |
553 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
554 | struct perf_counter_context *ctx = counter->ctx; | |
555 | struct perf_counter *leader = counter->group_leader; | |
556 | unsigned long flags; | |
557 | int err; | |
04289bb9 | 558 | |
d859e29f PM |
559 | /* |
560 | * If this is a per-task counter, need to check whether this | |
561 | * counter's task is the current task on this cpu. | |
562 | */ | |
563 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
564 | return; |
565 | ||
d859e29f PM |
566 | curr_rq_lock_irq_save(&flags); |
567 | spin_lock(&ctx->lock); | |
568 | ||
c07c99b6 | 569 | counter->prev_state = counter->state; |
d859e29f PM |
570 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
571 | goto unlock; | |
572 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
04289bb9 IM |
573 | |
574 | /* | |
d859e29f PM |
575 | * If the counter is in a group and isn't the group leader, |
576 | * then don't put it on unless the group is on. | |
04289bb9 | 577 | */ |
d859e29f PM |
578 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
579 | goto unlock; | |
3b6f9e5c | 580 | |
d859e29f PM |
581 | if (!group_can_go_on(counter, cpuctx, 1)) |
582 | err = -EEXIST; | |
583 | else | |
584 | err = counter_sched_in(counter, cpuctx, ctx, | |
585 | smp_processor_id()); | |
586 | ||
587 | if (err) { | |
588 | /* | |
589 | * If this counter can't go on and it's part of a | |
590 | * group, then the whole group has to come off. | |
591 | */ | |
592 | if (leader != counter) | |
593 | group_sched_out(leader, cpuctx, ctx); | |
594 | if (leader->hw_event.pinned) | |
595 | leader->state = PERF_COUNTER_STATE_ERROR; | |
596 | } | |
597 | ||
598 | unlock: | |
599 | spin_unlock(&ctx->lock); | |
600 | curr_rq_unlock_irq_restore(&flags); | |
601 | } | |
602 | ||
603 | /* | |
604 | * Enable a counter. | |
605 | */ | |
606 | static void perf_counter_enable(struct perf_counter *counter) | |
607 | { | |
608 | struct perf_counter_context *ctx = counter->ctx; | |
609 | struct task_struct *task = ctx->task; | |
610 | ||
611 | if (!task) { | |
612 | /* | |
613 | * Enable the counter on the cpu that it's on | |
614 | */ | |
615 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
616 | counter, 1); | |
617 | return; | |
618 | } | |
619 | ||
620 | spin_lock_irq(&ctx->lock); | |
621 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
622 | goto out; | |
623 | ||
624 | /* | |
625 | * If the counter is in error state, clear that first. | |
626 | * That way, if we see the counter in error state below, we | |
627 | * know that it has gone back into error state, as distinct | |
628 | * from the task having been scheduled away before the | |
629 | * cross-call arrived. | |
630 | */ | |
631 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
632 | counter->state = PERF_COUNTER_STATE_OFF; | |
633 | ||
634 | retry: | |
635 | spin_unlock_irq(&ctx->lock); | |
636 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
637 | ||
638 | spin_lock_irq(&ctx->lock); | |
639 | ||
640 | /* | |
641 | * If the context is active and the counter is still off, | |
642 | * we need to retry the cross-call. | |
643 | */ | |
644 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
645 | goto retry; | |
646 | ||
647 | /* | |
648 | * Since we have the lock this context can't be scheduled | |
649 | * in, so we can change the state safely. | |
650 | */ | |
651 | if (counter->state == PERF_COUNTER_STATE_OFF) | |
652 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
653 | out: | |
654 | spin_unlock_irq(&ctx->lock); | |
655 | } | |
656 | ||
657 | /* | |
658 | * Enable a counter and all its children. | |
659 | */ | |
660 | static void perf_counter_enable_family(struct perf_counter *counter) | |
661 | { | |
662 | struct perf_counter *child; | |
663 | ||
664 | perf_counter_enable(counter); | |
665 | ||
666 | /* | |
667 | * Lock the mutex to protect the list of children | |
668 | */ | |
669 | mutex_lock(&counter->mutex); | |
670 | list_for_each_entry(child, &counter->child_list, child_list) | |
671 | perf_counter_enable(child); | |
672 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
673 | } |
674 | ||
235c7fc7 IM |
675 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
676 | struct perf_cpu_context *cpuctx) | |
677 | { | |
678 | struct perf_counter *counter; | |
3cbed429 | 679 | u64 flags; |
235c7fc7 | 680 | |
d859e29f PM |
681 | spin_lock(&ctx->lock); |
682 | ctx->is_active = 0; | |
235c7fc7 | 683 | if (likely(!ctx->nr_counters)) |
d859e29f | 684 | goto out; |
235c7fc7 | 685 | |
3cbed429 | 686 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
687 | if (ctx->nr_active) { |
688 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
689 | group_sched_out(counter, cpuctx, ctx); | |
690 | } | |
3cbed429 | 691 | hw_perf_restore(flags); |
d859e29f | 692 | out: |
235c7fc7 IM |
693 | spin_unlock(&ctx->lock); |
694 | } | |
695 | ||
0793a61d TG |
696 | /* |
697 | * Called from scheduler to remove the counters of the current task, | |
698 | * with interrupts disabled. | |
699 | * | |
700 | * We stop each counter and update the counter value in counter->count. | |
701 | * | |
7671581f | 702 | * This does not protect us against NMI, but disable() |
0793a61d TG |
703 | * sets the disabled bit in the control field of counter _before_ |
704 | * accessing the counter control register. If a NMI hits, then it will | |
705 | * not restart the counter. | |
706 | */ | |
707 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
708 | { | |
709 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
710 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
0793a61d TG |
711 | |
712 | if (likely(!cpuctx->task_ctx)) | |
713 | return; | |
714 | ||
235c7fc7 IM |
715 | __perf_counter_sched_out(ctx, cpuctx); |
716 | ||
0793a61d TG |
717 | cpuctx->task_ctx = NULL; |
718 | } | |
719 | ||
235c7fc7 | 720 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 721 | { |
235c7fc7 | 722 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
723 | } |
724 | ||
7995888f | 725 | static int |
04289bb9 IM |
726 | group_sched_in(struct perf_counter *group_counter, |
727 | struct perf_cpu_context *cpuctx, | |
728 | struct perf_counter_context *ctx, | |
729 | int cpu) | |
730 | { | |
95cdd2e7 | 731 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
732 | int ret; |
733 | ||
734 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
735 | return 0; | |
736 | ||
737 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
738 | if (ret) | |
739 | return ret < 0 ? ret : 0; | |
04289bb9 | 740 | |
c07c99b6 | 741 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
742 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
743 | return -EAGAIN; | |
04289bb9 IM |
744 | |
745 | /* | |
746 | * Schedule in siblings as one group (if any): | |
747 | */ | |
7995888f | 748 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 749 | counter->prev_state = counter->state; |
95cdd2e7 IM |
750 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
751 | partial_group = counter; | |
752 | goto group_error; | |
753 | } | |
95cdd2e7 IM |
754 | } |
755 | ||
3cbed429 | 756 | return 0; |
95cdd2e7 IM |
757 | |
758 | group_error: | |
759 | /* | |
760 | * Groups can be scheduled in as one unit only, so undo any | |
761 | * partial group before returning: | |
762 | */ | |
763 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
764 | if (counter == partial_group) | |
765 | break; | |
766 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 767 | } |
95cdd2e7 | 768 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 769 | |
95cdd2e7 | 770 | return -EAGAIN; |
04289bb9 IM |
771 | } |
772 | ||
235c7fc7 IM |
773 | static void |
774 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
775 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 776 | { |
0793a61d | 777 | struct perf_counter *counter; |
3cbed429 | 778 | u64 flags; |
dd0e6ba2 | 779 | int can_add_hw = 1; |
0793a61d | 780 | |
d859e29f PM |
781 | spin_lock(&ctx->lock); |
782 | ctx->is_active = 1; | |
0793a61d | 783 | if (likely(!ctx->nr_counters)) |
d859e29f | 784 | goto out; |
0793a61d | 785 | |
3cbed429 | 786 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
787 | |
788 | /* | |
789 | * First go through the list and put on any pinned groups | |
790 | * in order to give them the best chance of going on. | |
791 | */ | |
792 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
793 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
794 | !counter->hw_event.pinned) | |
795 | continue; | |
796 | if (counter->cpu != -1 && counter->cpu != cpu) | |
797 | continue; | |
798 | ||
799 | if (group_can_go_on(counter, cpuctx, 1)) | |
800 | group_sched_in(counter, cpuctx, ctx, cpu); | |
801 | ||
802 | /* | |
803 | * If this pinned group hasn't been scheduled, | |
804 | * put it in error state. | |
805 | */ | |
806 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
807 | counter->state = PERF_COUNTER_STATE_ERROR; | |
808 | } | |
809 | ||
04289bb9 | 810 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
811 | /* |
812 | * Ignore counters in OFF or ERROR state, and | |
813 | * ignore pinned counters since we did them already. | |
814 | */ | |
815 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
816 | counter->hw_event.pinned) | |
817 | continue; | |
818 | ||
04289bb9 IM |
819 | /* |
820 | * Listen to the 'cpu' scheduling filter constraint | |
821 | * of counters: | |
822 | */ | |
0793a61d TG |
823 | if (counter->cpu != -1 && counter->cpu != cpu) |
824 | continue; | |
825 | ||
3b6f9e5c | 826 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
827 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
828 | can_add_hw = 0; | |
3b6f9e5c | 829 | } |
0793a61d | 830 | } |
3cbed429 | 831 | hw_perf_restore(flags); |
d859e29f | 832 | out: |
0793a61d | 833 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
834 | } |
835 | ||
836 | /* | |
837 | * Called from scheduler to add the counters of the current task | |
838 | * with interrupts disabled. | |
839 | * | |
840 | * We restore the counter value and then enable it. | |
841 | * | |
842 | * This does not protect us against NMI, but enable() | |
843 | * sets the enabled bit in the control field of counter _before_ | |
844 | * accessing the counter control register. If a NMI hits, then it will | |
845 | * keep the counter running. | |
846 | */ | |
847 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
848 | { | |
849 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
850 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 851 | |
235c7fc7 | 852 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
853 | cpuctx->task_ctx = ctx; |
854 | } | |
855 | ||
235c7fc7 IM |
856 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
857 | { | |
858 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
859 | ||
860 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
861 | } | |
862 | ||
1d1c7ddb IM |
863 | int perf_counter_task_disable(void) |
864 | { | |
865 | struct task_struct *curr = current; | |
866 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
867 | struct perf_counter *counter; | |
aa9c4c0f | 868 | unsigned long flags; |
1d1c7ddb IM |
869 | u64 perf_flags; |
870 | int cpu; | |
871 | ||
872 | if (likely(!ctx->nr_counters)) | |
873 | return 0; | |
874 | ||
aa9c4c0f | 875 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
876 | cpu = smp_processor_id(); |
877 | ||
aa9c4c0f IM |
878 | /* force the update of the task clock: */ |
879 | __task_delta_exec(curr, 1); | |
880 | ||
1d1c7ddb IM |
881 | perf_counter_task_sched_out(curr, cpu); |
882 | ||
883 | spin_lock(&ctx->lock); | |
884 | ||
885 | /* | |
886 | * Disable all the counters: | |
887 | */ | |
888 | perf_flags = hw_perf_save_disable(); | |
889 | ||
3b6f9e5c PM |
890 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
891 | if (counter->state != PERF_COUNTER_STATE_ERROR) | |
892 | counter->state = PERF_COUNTER_STATE_OFF; | |
893 | } | |
9b51f66d | 894 | |
1d1c7ddb IM |
895 | hw_perf_restore(perf_flags); |
896 | ||
897 | spin_unlock(&ctx->lock); | |
898 | ||
aa9c4c0f | 899 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
900 | |
901 | return 0; | |
902 | } | |
903 | ||
904 | int perf_counter_task_enable(void) | |
905 | { | |
906 | struct task_struct *curr = current; | |
907 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
908 | struct perf_counter *counter; | |
aa9c4c0f | 909 | unsigned long flags; |
1d1c7ddb IM |
910 | u64 perf_flags; |
911 | int cpu; | |
912 | ||
913 | if (likely(!ctx->nr_counters)) | |
914 | return 0; | |
915 | ||
aa9c4c0f | 916 | curr_rq_lock_irq_save(&flags); |
1d1c7ddb IM |
917 | cpu = smp_processor_id(); |
918 | ||
aa9c4c0f IM |
919 | /* force the update of the task clock: */ |
920 | __task_delta_exec(curr, 1); | |
921 | ||
235c7fc7 IM |
922 | perf_counter_task_sched_out(curr, cpu); |
923 | ||
1d1c7ddb IM |
924 | spin_lock(&ctx->lock); |
925 | ||
926 | /* | |
927 | * Disable all the counters: | |
928 | */ | |
929 | perf_flags = hw_perf_save_disable(); | |
930 | ||
931 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 932 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 933 | continue; |
6a930700 | 934 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
aa9c4c0f | 935 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
936 | } |
937 | hw_perf_restore(perf_flags); | |
938 | ||
939 | spin_unlock(&ctx->lock); | |
940 | ||
941 | perf_counter_task_sched_in(curr, cpu); | |
942 | ||
aa9c4c0f | 943 | curr_rq_unlock_irq_restore(&flags); |
1d1c7ddb IM |
944 | |
945 | return 0; | |
946 | } | |
947 | ||
235c7fc7 IM |
948 | /* |
949 | * Round-robin a context's counters: | |
950 | */ | |
951 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 952 | { |
0793a61d | 953 | struct perf_counter *counter; |
5c92d124 | 954 | u64 perf_flags; |
0793a61d | 955 | |
235c7fc7 | 956 | if (!ctx->nr_counters) |
0793a61d TG |
957 | return; |
958 | ||
0793a61d | 959 | spin_lock(&ctx->lock); |
0793a61d | 960 | /* |
04289bb9 | 961 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 962 | */ |
01b2838c | 963 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 964 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 965 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
966 | break; |
967 | } | |
01b2838c | 968 | hw_perf_restore(perf_flags); |
0793a61d TG |
969 | |
970 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
971 | } |
972 | ||
973 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
974 | { | |
975 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
976 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
977 | const int rotate_percpu = 0; | |
978 | ||
979 | if (rotate_percpu) | |
980 | perf_counter_cpu_sched_out(cpuctx); | |
981 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 982 | |
235c7fc7 IM |
983 | if (rotate_percpu) |
984 | rotate_ctx(&cpuctx->ctx); | |
985 | rotate_ctx(ctx); | |
986 | ||
987 | if (rotate_percpu) | |
988 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
989 | perf_counter_task_sched_in(curr, cpu); |
990 | } | |
991 | ||
0793a61d TG |
992 | /* |
993 | * Cross CPU call to read the hardware counter | |
994 | */ | |
7671581f | 995 | static void __read(void *info) |
0793a61d | 996 | { |
621a01ea | 997 | struct perf_counter *counter = info; |
aa9c4c0f | 998 | unsigned long flags; |
621a01ea | 999 | |
aa9c4c0f | 1000 | curr_rq_lock_irq_save(&flags); |
7671581f | 1001 | counter->hw_ops->read(counter); |
aa9c4c0f | 1002 | curr_rq_unlock_irq_restore(&flags); |
0793a61d TG |
1003 | } |
1004 | ||
04289bb9 | 1005 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1006 | { |
1007 | /* | |
1008 | * If counter is enabled and currently active on a CPU, update the | |
1009 | * value in the counter structure: | |
1010 | */ | |
6a930700 | 1011 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1012 | smp_call_function_single(counter->oncpu, |
7671581f | 1013 | __read, counter, 1); |
0793a61d TG |
1014 | } |
1015 | ||
ee06094f | 1016 | return atomic64_read(&counter->count); |
0793a61d TG |
1017 | } |
1018 | ||
1019 | /* | |
1020 | * Cross CPU call to switch performance data pointers | |
1021 | */ | |
1022 | static void __perf_switch_irq_data(void *info) | |
1023 | { | |
1024 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
1025 | struct perf_counter *counter = info; | |
1026 | struct perf_counter_context *ctx = counter->ctx; | |
1027 | struct perf_data *oldirqdata = counter->irqdata; | |
1028 | ||
1029 | /* | |
1030 | * If this is a task context, we need to check whether it is | |
1031 | * the current task context of this cpu. If not it has been | |
1032 | * scheduled out before the smp call arrived. | |
1033 | */ | |
1034 | if (ctx->task) { | |
1035 | if (cpuctx->task_ctx != ctx) | |
1036 | return; | |
1037 | spin_lock(&ctx->lock); | |
1038 | } | |
1039 | ||
1040 | /* Change the pointer NMI safe */ | |
1041 | atomic_long_set((atomic_long_t *)&counter->irqdata, | |
1042 | (unsigned long) counter->usrdata); | |
1043 | counter->usrdata = oldirqdata; | |
1044 | ||
1045 | if (ctx->task) | |
1046 | spin_unlock(&ctx->lock); | |
1047 | } | |
1048 | ||
1049 | static struct perf_data *perf_switch_irq_data(struct perf_counter *counter) | |
1050 | { | |
1051 | struct perf_counter_context *ctx = counter->ctx; | |
1052 | struct perf_data *oldirqdata = counter->irqdata; | |
1053 | struct task_struct *task = ctx->task; | |
1054 | ||
1055 | if (!task) { | |
1056 | smp_call_function_single(counter->cpu, | |
1057 | __perf_switch_irq_data, | |
1058 | counter, 1); | |
1059 | return counter->usrdata; | |
1060 | } | |
1061 | ||
1062 | retry: | |
1063 | spin_lock_irq(&ctx->lock); | |
6a930700 | 1064 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) { |
0793a61d TG |
1065 | counter->irqdata = counter->usrdata; |
1066 | counter->usrdata = oldirqdata; | |
1067 | spin_unlock_irq(&ctx->lock); | |
1068 | return oldirqdata; | |
1069 | } | |
1070 | spin_unlock_irq(&ctx->lock); | |
1071 | task_oncpu_function_call(task, __perf_switch_irq_data, counter); | |
1072 | /* Might have failed, because task was scheduled out */ | |
1073 | if (counter->irqdata == oldirqdata) | |
1074 | goto retry; | |
1075 | ||
1076 | return counter->usrdata; | |
1077 | } | |
1078 | ||
1079 | static void put_context(struct perf_counter_context *ctx) | |
1080 | { | |
1081 | if (ctx->task) | |
1082 | put_task_struct(ctx->task); | |
1083 | } | |
1084 | ||
1085 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1086 | { | |
1087 | struct perf_cpu_context *cpuctx; | |
1088 | struct perf_counter_context *ctx; | |
1089 | struct task_struct *task; | |
1090 | ||
1091 | /* | |
1092 | * If cpu is not a wildcard then this is a percpu counter: | |
1093 | */ | |
1094 | if (cpu != -1) { | |
1095 | /* Must be root to operate on a CPU counter: */ | |
1096 | if (!capable(CAP_SYS_ADMIN)) | |
1097 | return ERR_PTR(-EACCES); | |
1098 | ||
1099 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1100 | return ERR_PTR(-EINVAL); | |
1101 | ||
1102 | /* | |
1103 | * We could be clever and allow to attach a counter to an | |
1104 | * offline CPU and activate it when the CPU comes up, but | |
1105 | * that's for later. | |
1106 | */ | |
1107 | if (!cpu_isset(cpu, cpu_online_map)) | |
1108 | return ERR_PTR(-ENODEV); | |
1109 | ||
1110 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1111 | ctx = &cpuctx->ctx; | |
1112 | ||
0793a61d TG |
1113 | return ctx; |
1114 | } | |
1115 | ||
1116 | rcu_read_lock(); | |
1117 | if (!pid) | |
1118 | task = current; | |
1119 | else | |
1120 | task = find_task_by_vpid(pid); | |
1121 | if (task) | |
1122 | get_task_struct(task); | |
1123 | rcu_read_unlock(); | |
1124 | ||
1125 | if (!task) | |
1126 | return ERR_PTR(-ESRCH); | |
1127 | ||
1128 | ctx = &task->perf_counter_ctx; | |
1129 | ctx->task = task; | |
1130 | ||
1131 | /* Reuse ptrace permission checks for now. */ | |
1132 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1133 | put_context(ctx); | |
1134 | return ERR_PTR(-EACCES); | |
1135 | } | |
1136 | ||
1137 | return ctx; | |
1138 | } | |
1139 | ||
592903cd PZ |
1140 | static void free_counter_rcu(struct rcu_head *head) |
1141 | { | |
1142 | struct perf_counter *counter; | |
1143 | ||
1144 | counter = container_of(head, struct perf_counter, rcu_head); | |
1145 | kfree(counter); | |
1146 | } | |
1147 | ||
0793a61d TG |
1148 | /* |
1149 | * Called when the last reference to the file is gone. | |
1150 | */ | |
1151 | static int perf_release(struct inode *inode, struct file *file) | |
1152 | { | |
1153 | struct perf_counter *counter = file->private_data; | |
1154 | struct perf_counter_context *ctx = counter->ctx; | |
1155 | ||
1156 | file->private_data = NULL; | |
1157 | ||
d859e29f | 1158 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1159 | mutex_lock(&counter->mutex); |
1160 | ||
04289bb9 | 1161 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1162 | |
1163 | mutex_unlock(&counter->mutex); | |
d859e29f | 1164 | mutex_unlock(&ctx->mutex); |
0793a61d | 1165 | |
592903cd | 1166 | call_rcu(&counter->rcu_head, free_counter_rcu); |
5af75917 | 1167 | put_context(ctx); |
0793a61d TG |
1168 | |
1169 | return 0; | |
1170 | } | |
1171 | ||
1172 | /* | |
1173 | * Read the performance counter - simple non blocking version for now | |
1174 | */ | |
1175 | static ssize_t | |
1176 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1177 | { | |
1178 | u64 cntval; | |
1179 | ||
1180 | if (count != sizeof(cntval)) | |
1181 | return -EINVAL; | |
1182 | ||
3b6f9e5c PM |
1183 | /* |
1184 | * Return end-of-file for a read on a counter that is in | |
1185 | * error state (i.e. because it was pinned but it couldn't be | |
1186 | * scheduled on to the CPU at some point). | |
1187 | */ | |
1188 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1189 | return 0; | |
1190 | ||
0793a61d | 1191 | mutex_lock(&counter->mutex); |
04289bb9 | 1192 | cntval = perf_counter_read(counter); |
0793a61d TG |
1193 | mutex_unlock(&counter->mutex); |
1194 | ||
1195 | return put_user(cntval, (u64 __user *) buf) ? -EFAULT : sizeof(cntval); | |
1196 | } | |
1197 | ||
1198 | static ssize_t | |
1199 | perf_copy_usrdata(struct perf_data *usrdata, char __user *buf, size_t count) | |
1200 | { | |
1201 | if (!usrdata->len) | |
1202 | return 0; | |
1203 | ||
1204 | count = min(count, (size_t)usrdata->len); | |
1205 | if (copy_to_user(buf, usrdata->data + usrdata->rd_idx, count)) | |
1206 | return -EFAULT; | |
1207 | ||
1208 | /* Adjust the counters */ | |
1209 | usrdata->len -= count; | |
1210 | if (!usrdata->len) | |
1211 | usrdata->rd_idx = 0; | |
1212 | else | |
1213 | usrdata->rd_idx += count; | |
1214 | ||
1215 | return count; | |
1216 | } | |
1217 | ||
1218 | static ssize_t | |
1219 | perf_read_irq_data(struct perf_counter *counter, | |
1220 | char __user *buf, | |
1221 | size_t count, | |
1222 | int nonblocking) | |
1223 | { | |
1224 | struct perf_data *irqdata, *usrdata; | |
1225 | DECLARE_WAITQUEUE(wait, current); | |
3b6f9e5c | 1226 | ssize_t res, res2; |
0793a61d TG |
1227 | |
1228 | irqdata = counter->irqdata; | |
1229 | usrdata = counter->usrdata; | |
1230 | ||
1231 | if (usrdata->len + irqdata->len >= count) | |
1232 | goto read_pending; | |
1233 | ||
1234 | if (nonblocking) | |
1235 | return -EAGAIN; | |
1236 | ||
1237 | spin_lock_irq(&counter->waitq.lock); | |
1238 | __add_wait_queue(&counter->waitq, &wait); | |
1239 | for (;;) { | |
1240 | set_current_state(TASK_INTERRUPTIBLE); | |
1241 | if (usrdata->len + irqdata->len >= count) | |
1242 | break; | |
1243 | ||
1244 | if (signal_pending(current)) | |
1245 | break; | |
1246 | ||
3b6f9e5c PM |
1247 | if (counter->state == PERF_COUNTER_STATE_ERROR) |
1248 | break; | |
1249 | ||
0793a61d TG |
1250 | spin_unlock_irq(&counter->waitq.lock); |
1251 | schedule(); | |
1252 | spin_lock_irq(&counter->waitq.lock); | |
1253 | } | |
1254 | __remove_wait_queue(&counter->waitq, &wait); | |
1255 | __set_current_state(TASK_RUNNING); | |
1256 | spin_unlock_irq(&counter->waitq.lock); | |
1257 | ||
3b6f9e5c PM |
1258 | if (usrdata->len + irqdata->len < count && |
1259 | counter->state != PERF_COUNTER_STATE_ERROR) | |
0793a61d TG |
1260 | return -ERESTARTSYS; |
1261 | read_pending: | |
1262 | mutex_lock(&counter->mutex); | |
1263 | ||
1264 | /* Drain pending data first: */ | |
1265 | res = perf_copy_usrdata(usrdata, buf, count); | |
1266 | if (res < 0 || res == count) | |
1267 | goto out; | |
1268 | ||
1269 | /* Switch irq buffer: */ | |
1270 | usrdata = perf_switch_irq_data(counter); | |
3b6f9e5c PM |
1271 | res2 = perf_copy_usrdata(usrdata, buf + res, count - res); |
1272 | if (res2 < 0) { | |
0793a61d TG |
1273 | if (!res) |
1274 | res = -EFAULT; | |
1275 | } else { | |
3b6f9e5c | 1276 | res += res2; |
0793a61d TG |
1277 | } |
1278 | out: | |
1279 | mutex_unlock(&counter->mutex); | |
1280 | ||
1281 | return res; | |
1282 | } | |
1283 | ||
1284 | static ssize_t | |
1285 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1286 | { | |
1287 | struct perf_counter *counter = file->private_data; | |
1288 | ||
9f66a381 | 1289 | switch (counter->hw_event.record_type) { |
0793a61d TG |
1290 | case PERF_RECORD_SIMPLE: |
1291 | return perf_read_hw(counter, buf, count); | |
1292 | ||
1293 | case PERF_RECORD_IRQ: | |
1294 | case PERF_RECORD_GROUP: | |
1295 | return perf_read_irq_data(counter, buf, count, | |
1296 | file->f_flags & O_NONBLOCK); | |
1297 | } | |
1298 | return -EINVAL; | |
1299 | } | |
1300 | ||
1301 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1302 | { | |
1303 | struct perf_counter *counter = file->private_data; | |
1304 | unsigned int events = 0; | |
1305 | unsigned long flags; | |
1306 | ||
1307 | poll_wait(file, &counter->waitq, wait); | |
1308 | ||
1309 | spin_lock_irqsave(&counter->waitq.lock, flags); | |
1310 | if (counter->usrdata->len || counter->irqdata->len) | |
1311 | events |= POLLIN; | |
1312 | spin_unlock_irqrestore(&counter->waitq.lock, flags); | |
1313 | ||
1314 | return events; | |
1315 | } | |
1316 | ||
d859e29f PM |
1317 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1318 | { | |
1319 | struct perf_counter *counter = file->private_data; | |
1320 | int err = 0; | |
1321 | ||
1322 | switch (cmd) { | |
1323 | case PERF_COUNTER_IOC_ENABLE: | |
1324 | perf_counter_enable_family(counter); | |
1325 | break; | |
1326 | case PERF_COUNTER_IOC_DISABLE: | |
1327 | perf_counter_disable_family(counter); | |
1328 | break; | |
1329 | default: | |
1330 | err = -ENOTTY; | |
1331 | } | |
1332 | return err; | |
1333 | } | |
1334 | ||
0793a61d TG |
1335 | static const struct file_operations perf_fops = { |
1336 | .release = perf_release, | |
1337 | .read = perf_read, | |
1338 | .poll = perf_poll, | |
d859e29f PM |
1339 | .unlocked_ioctl = perf_ioctl, |
1340 | .compat_ioctl = perf_ioctl, | |
0793a61d TG |
1341 | }; |
1342 | ||
15dbf27c PZ |
1343 | /* |
1344 | * Generic software counter infrastructure | |
1345 | */ | |
1346 | ||
1347 | static void perf_swcounter_update(struct perf_counter *counter) | |
1348 | { | |
1349 | struct hw_perf_counter *hwc = &counter->hw; | |
1350 | u64 prev, now; | |
1351 | s64 delta; | |
1352 | ||
1353 | again: | |
1354 | prev = atomic64_read(&hwc->prev_count); | |
1355 | now = atomic64_read(&hwc->count); | |
1356 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
1357 | goto again; | |
1358 | ||
1359 | delta = now - prev; | |
1360 | ||
1361 | atomic64_add(delta, &counter->count); | |
1362 | atomic64_sub(delta, &hwc->period_left); | |
1363 | } | |
1364 | ||
1365 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
1366 | { | |
1367 | struct hw_perf_counter *hwc = &counter->hw; | |
1368 | s64 left = atomic64_read(&hwc->period_left); | |
1369 | s64 period = hwc->irq_period; | |
1370 | ||
1371 | if (unlikely(left <= -period)) { | |
1372 | left = period; | |
1373 | atomic64_set(&hwc->period_left, left); | |
1374 | } | |
1375 | ||
1376 | if (unlikely(left <= 0)) { | |
1377 | left += period; | |
1378 | atomic64_add(period, &hwc->period_left); | |
1379 | } | |
1380 | ||
1381 | atomic64_set(&hwc->prev_count, -left); | |
1382 | atomic64_set(&hwc->count, -left); | |
1383 | } | |
1384 | ||
1385 | static void perf_swcounter_save_and_restart(struct perf_counter *counter) | |
1386 | { | |
1387 | perf_swcounter_update(counter); | |
1388 | perf_swcounter_set_period(counter); | |
1389 | } | |
1390 | ||
1391 | static void perf_swcounter_store_irq(struct perf_counter *counter, u64 data) | |
1392 | { | |
1393 | struct perf_data *irqdata = counter->irqdata; | |
1394 | ||
1395 | if (irqdata->len > PERF_DATA_BUFLEN - sizeof(u64)) { | |
1396 | irqdata->overrun++; | |
1397 | } else { | |
1398 | u64 *p = (u64 *) &irqdata->data[irqdata->len]; | |
1399 | ||
1400 | *p = data; | |
1401 | irqdata->len += sizeof(u64); | |
1402 | } | |
1403 | } | |
1404 | ||
1405 | static void perf_swcounter_handle_group(struct perf_counter *sibling) | |
1406 | { | |
1407 | struct perf_counter *counter, *group_leader = sibling->group_leader; | |
1408 | ||
1409 | list_for_each_entry(counter, &group_leader->sibling_list, list_entry) { | |
d6d020e9 | 1410 | counter->hw_ops->read(counter); |
15dbf27c PZ |
1411 | perf_swcounter_store_irq(sibling, counter->hw_event.type); |
1412 | perf_swcounter_store_irq(sibling, atomic64_read(&counter->count)); | |
1413 | } | |
1414 | } | |
1415 | ||
1416 | static void perf_swcounter_interrupt(struct perf_counter *counter, | |
1417 | int nmi, struct pt_regs *regs) | |
1418 | { | |
15dbf27c PZ |
1419 | switch (counter->hw_event.record_type) { |
1420 | case PERF_RECORD_SIMPLE: | |
1421 | break; | |
1422 | ||
1423 | case PERF_RECORD_IRQ: | |
1424 | perf_swcounter_store_irq(counter, instruction_pointer(regs)); | |
1425 | break; | |
1426 | ||
1427 | case PERF_RECORD_GROUP: | |
1428 | perf_swcounter_handle_group(counter); | |
1429 | break; | |
1430 | } | |
1431 | ||
1432 | if (nmi) { | |
1433 | counter->wakeup_pending = 1; | |
1434 | set_tsk_thread_flag(current, TIF_PERF_COUNTERS); | |
1435 | } else | |
1436 | wake_up(&counter->waitq); | |
1437 | } | |
1438 | ||
d6d020e9 PZ |
1439 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
1440 | { | |
1441 | struct perf_counter *counter; | |
1442 | struct pt_regs *regs; | |
1443 | ||
1444 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
1445 | counter->hw_ops->read(counter); | |
1446 | ||
1447 | regs = get_irq_regs(); | |
1448 | /* | |
1449 | * In case we exclude kernel IPs or are somehow not in interrupt | |
1450 | * context, provide the next best thing, the user IP. | |
1451 | */ | |
1452 | if ((counter->hw_event.exclude_kernel || !regs) && | |
1453 | !counter->hw_event.exclude_user) | |
1454 | regs = task_pt_regs(current); | |
1455 | ||
1456 | if (regs) | |
1457 | perf_swcounter_interrupt(counter, 0, regs); | |
1458 | ||
1459 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
1460 | ||
1461 | return HRTIMER_RESTART; | |
1462 | } | |
1463 | ||
1464 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
1465 | int nmi, struct pt_regs *regs) | |
1466 | { | |
1467 | perf_swcounter_save_and_restart(counter); | |
1468 | perf_swcounter_interrupt(counter, nmi, regs); | |
1469 | } | |
1470 | ||
15dbf27c PZ |
1471 | static int perf_swcounter_match(struct perf_counter *counter, |
1472 | enum hw_event_types event, | |
1473 | struct pt_regs *regs) | |
1474 | { | |
1475 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
1476 | return 0; | |
1477 | ||
1478 | if (counter->hw_event.raw) | |
1479 | return 0; | |
1480 | ||
1481 | if (counter->hw_event.type != event) | |
1482 | return 0; | |
1483 | ||
1484 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
1485 | return 0; | |
1486 | ||
1487 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
1488 | return 0; | |
1489 | ||
1490 | return 1; | |
1491 | } | |
1492 | ||
d6d020e9 PZ |
1493 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
1494 | int nmi, struct pt_regs *regs) | |
1495 | { | |
1496 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
1497 | if (counter->hw.irq_period && !neg) | |
1498 | perf_swcounter_overflow(counter, nmi, regs); | |
1499 | } | |
1500 | ||
15dbf27c PZ |
1501 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
1502 | enum hw_event_types event, u64 nr, | |
1503 | int nmi, struct pt_regs *regs) | |
1504 | { | |
1505 | struct perf_counter *counter; | |
15dbf27c | 1506 | |
592903cd | 1507 | if (list_empty(&ctx->event_list)) |
15dbf27c PZ |
1508 | return; |
1509 | ||
592903cd PZ |
1510 | rcu_read_lock(); |
1511 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
d6d020e9 PZ |
1512 | if (perf_swcounter_match(counter, event, regs)) |
1513 | perf_swcounter_add(counter, nr, nmi, regs); | |
15dbf27c | 1514 | } |
592903cd | 1515 | rcu_read_unlock(); |
15dbf27c PZ |
1516 | } |
1517 | ||
1518 | void perf_swcounter_event(enum hw_event_types event, u64 nr, | |
1519 | int nmi, struct pt_regs *regs) | |
1520 | { | |
1521 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
1522 | ||
1523 | perf_swcounter_ctx_event(&cpuctx->ctx, event, nr, nmi, regs); | |
1524 | if (cpuctx->task_ctx) | |
1525 | perf_swcounter_ctx_event(cpuctx->task_ctx, event, nr, nmi, regs); | |
1526 | ||
1527 | put_cpu_var(perf_cpu_context); | |
1528 | } | |
1529 | ||
1530 | static void perf_swcounter_read(struct perf_counter *counter) | |
1531 | { | |
1532 | perf_swcounter_update(counter); | |
1533 | } | |
1534 | ||
1535 | static int perf_swcounter_enable(struct perf_counter *counter) | |
1536 | { | |
1537 | perf_swcounter_set_period(counter); | |
1538 | return 0; | |
1539 | } | |
1540 | ||
1541 | static void perf_swcounter_disable(struct perf_counter *counter) | |
1542 | { | |
1543 | perf_swcounter_update(counter); | |
1544 | } | |
1545 | ||
ac17dc8e PZ |
1546 | static const struct hw_perf_counter_ops perf_ops_generic = { |
1547 | .enable = perf_swcounter_enable, | |
1548 | .disable = perf_swcounter_disable, | |
1549 | .read = perf_swcounter_read, | |
1550 | }; | |
1551 | ||
15dbf27c PZ |
1552 | /* |
1553 | * Software counter: cpu wall time clock | |
1554 | */ | |
1555 | ||
9abf8a08 PM |
1556 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
1557 | { | |
1558 | int cpu = raw_smp_processor_id(); | |
1559 | s64 prev; | |
1560 | u64 now; | |
1561 | ||
1562 | now = cpu_clock(cpu); | |
1563 | prev = atomic64_read(&counter->hw.prev_count); | |
1564 | atomic64_set(&counter->hw.prev_count, now); | |
1565 | atomic64_add(now - prev, &counter->count); | |
1566 | } | |
1567 | ||
d6d020e9 PZ |
1568 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
1569 | { | |
1570 | struct hw_perf_counter *hwc = &counter->hw; | |
1571 | int cpu = raw_smp_processor_id(); | |
1572 | ||
1573 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
1574 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1575 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1576 | if (hwc->irq_period) { |
d6d020e9 PZ |
1577 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1578 | ns_to_ktime(hwc->irq_period), 0, | |
1579 | HRTIMER_MODE_REL, 0); | |
1580 | } | |
1581 | ||
1582 | return 0; | |
1583 | } | |
1584 | ||
5c92d124 IM |
1585 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
1586 | { | |
d6d020e9 | 1587 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 1588 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1589 | } |
1590 | ||
1591 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
1592 | { | |
9abf8a08 | 1593 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
1594 | } |
1595 | ||
1596 | static const struct hw_perf_counter_ops perf_ops_cpu_clock = { | |
7671581f IM |
1597 | .enable = cpu_clock_perf_counter_enable, |
1598 | .disable = cpu_clock_perf_counter_disable, | |
1599 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
1600 | }; |
1601 | ||
15dbf27c PZ |
1602 | /* |
1603 | * Software counter: task time clock | |
1604 | */ | |
1605 | ||
aa9c4c0f IM |
1606 | /* |
1607 | * Called from within the scheduler: | |
1608 | */ | |
1609 | static u64 task_clock_perf_counter_val(struct perf_counter *counter, int update) | |
bae43c99 | 1610 | { |
aa9c4c0f IM |
1611 | struct task_struct *curr = counter->task; |
1612 | u64 delta; | |
1613 | ||
aa9c4c0f IM |
1614 | delta = __task_delta_exec(curr, update); |
1615 | ||
1616 | return curr->se.sum_exec_runtime + delta; | |
1617 | } | |
1618 | ||
1619 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) | |
1620 | { | |
1621 | u64 prev; | |
8cb391e8 IM |
1622 | s64 delta; |
1623 | ||
1624 | prev = atomic64_read(&counter->hw.prev_count); | |
8cb391e8 IM |
1625 | |
1626 | atomic64_set(&counter->hw.prev_count, now); | |
1627 | ||
1628 | delta = now - prev; | |
8cb391e8 IM |
1629 | |
1630 | atomic64_add(delta, &counter->count); | |
bae43c99 IM |
1631 | } |
1632 | ||
95cdd2e7 | 1633 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 1634 | { |
d6d020e9 PZ |
1635 | struct hw_perf_counter *hwc = &counter->hw; |
1636 | ||
1637 | atomic64_set(&hwc->prev_count, task_clock_perf_counter_val(counter, 0)); | |
039fc91e PZ |
1638 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
1639 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 1640 | if (hwc->irq_period) { |
d6d020e9 PZ |
1641 | __hrtimer_start_range_ns(&hwc->hrtimer, |
1642 | ns_to_ktime(hwc->irq_period), 0, | |
1643 | HRTIMER_MODE_REL, 0); | |
1644 | } | |
95cdd2e7 IM |
1645 | |
1646 | return 0; | |
8cb391e8 IM |
1647 | } |
1648 | ||
1649 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 1650 | { |
d6d020e9 PZ |
1651 | hrtimer_cancel(&counter->hw.hrtimer); |
1652 | task_clock_perf_counter_update(counter, | |
1653 | task_clock_perf_counter_val(counter, 0)); | |
1654 | } | |
aa9c4c0f | 1655 | |
d6d020e9 PZ |
1656 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
1657 | { | |
1658 | task_clock_perf_counter_update(counter, | |
1659 | task_clock_perf_counter_val(counter, 1)); | |
bae43c99 IM |
1660 | } |
1661 | ||
1662 | static const struct hw_perf_counter_ops perf_ops_task_clock = { | |
7671581f IM |
1663 | .enable = task_clock_perf_counter_enable, |
1664 | .disable = task_clock_perf_counter_disable, | |
1665 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
1666 | }; |
1667 | ||
15dbf27c PZ |
1668 | /* |
1669 | * Software counter: context switches | |
1670 | */ | |
1671 | ||
23a185ca | 1672 | static u64 get_context_switches(struct perf_counter *counter) |
5d6a27d8 | 1673 | { |
23a185ca | 1674 | struct task_struct *curr = counter->ctx->task; |
5d6a27d8 | 1675 | |
23a185ca PM |
1676 | if (curr) |
1677 | return curr->nvcsw + curr->nivcsw; | |
1678 | return cpu_nr_switches(smp_processor_id()); | |
5d6a27d8 IM |
1679 | } |
1680 | ||
1681 | static void context_switches_perf_counter_update(struct perf_counter *counter) | |
1682 | { | |
1683 | u64 prev, now; | |
1684 | s64 delta; | |
1685 | ||
1686 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 1687 | now = get_context_switches(counter); |
5d6a27d8 IM |
1688 | |
1689 | atomic64_set(&counter->hw.prev_count, now); | |
1690 | ||
1691 | delta = now - prev; | |
5d6a27d8 IM |
1692 | |
1693 | atomic64_add(delta, &counter->count); | |
1694 | } | |
1695 | ||
1696 | static void context_switches_perf_counter_read(struct perf_counter *counter) | |
1697 | { | |
1698 | context_switches_perf_counter_update(counter); | |
1699 | } | |
1700 | ||
95cdd2e7 | 1701 | static int context_switches_perf_counter_enable(struct perf_counter *counter) |
5d6a27d8 | 1702 | { |
c07c99b6 PM |
1703 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
1704 | atomic64_set(&counter->hw.prev_count, | |
1705 | get_context_switches(counter)); | |
95cdd2e7 | 1706 | return 0; |
5d6a27d8 IM |
1707 | } |
1708 | ||
1709 | static void context_switches_perf_counter_disable(struct perf_counter *counter) | |
1710 | { | |
1711 | context_switches_perf_counter_update(counter); | |
1712 | } | |
1713 | ||
1714 | static const struct hw_perf_counter_ops perf_ops_context_switches = { | |
7671581f IM |
1715 | .enable = context_switches_perf_counter_enable, |
1716 | .disable = context_switches_perf_counter_disable, | |
1717 | .read = context_switches_perf_counter_read, | |
5d6a27d8 IM |
1718 | }; |
1719 | ||
15dbf27c PZ |
1720 | /* |
1721 | * Software counter: cpu migrations | |
1722 | */ | |
1723 | ||
23a185ca | 1724 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 1725 | { |
23a185ca PM |
1726 | struct task_struct *curr = counter->ctx->task; |
1727 | ||
1728 | if (curr) | |
1729 | return curr->se.nr_migrations; | |
1730 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
1731 | } |
1732 | ||
1733 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
1734 | { | |
1735 | u64 prev, now; | |
1736 | s64 delta; | |
1737 | ||
1738 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 1739 | now = get_cpu_migrations(counter); |
6c594c21 IM |
1740 | |
1741 | atomic64_set(&counter->hw.prev_count, now); | |
1742 | ||
1743 | delta = now - prev; | |
6c594c21 IM |
1744 | |
1745 | atomic64_add(delta, &counter->count); | |
1746 | } | |
1747 | ||
1748 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
1749 | { | |
1750 | cpu_migrations_perf_counter_update(counter); | |
1751 | } | |
1752 | ||
95cdd2e7 | 1753 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 1754 | { |
c07c99b6 PM |
1755 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
1756 | atomic64_set(&counter->hw.prev_count, | |
1757 | get_cpu_migrations(counter)); | |
95cdd2e7 | 1758 | return 0; |
6c594c21 IM |
1759 | } |
1760 | ||
1761 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
1762 | { | |
1763 | cpu_migrations_perf_counter_update(counter); | |
1764 | } | |
1765 | ||
1766 | static const struct hw_perf_counter_ops perf_ops_cpu_migrations = { | |
7671581f IM |
1767 | .enable = cpu_migrations_perf_counter_enable, |
1768 | .disable = cpu_migrations_perf_counter_disable, | |
1769 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
1770 | }; |
1771 | ||
5c92d124 IM |
1772 | static const struct hw_perf_counter_ops * |
1773 | sw_perf_counter_init(struct perf_counter *counter) | |
1774 | { | |
15dbf27c | 1775 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
5c92d124 | 1776 | const struct hw_perf_counter_ops *hw_ops = NULL; |
15dbf27c | 1777 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 1778 | |
0475f9ea PM |
1779 | /* |
1780 | * Software counters (currently) can't in general distinguish | |
1781 | * between user, kernel and hypervisor events. | |
1782 | * However, context switches and cpu migrations are considered | |
1783 | * to be kernel events, and page faults are never hypervisor | |
1784 | * events. | |
1785 | */ | |
5c92d124 IM |
1786 | switch (counter->hw_event.type) { |
1787 | case PERF_COUNT_CPU_CLOCK: | |
d6d020e9 PZ |
1788 | hw_ops = &perf_ops_cpu_clock; |
1789 | ||
1790 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
1791 | hw_event->irq_period = 10000; | |
5c92d124 | 1792 | break; |
bae43c99 | 1793 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
1794 | /* |
1795 | * If the user instantiates this as a per-cpu counter, | |
1796 | * use the cpu_clock counter instead. | |
1797 | */ | |
1798 | if (counter->ctx->task) | |
1799 | hw_ops = &perf_ops_task_clock; | |
1800 | else | |
1801 | hw_ops = &perf_ops_cpu_clock; | |
d6d020e9 PZ |
1802 | |
1803 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
1804 | hw_event->irq_period = 10000; | |
bae43c99 | 1805 | break; |
e06c61a8 | 1806 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
1807 | case PERF_COUNT_PAGE_FAULTS_MIN: |
1808 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
1809 | hw_ops = &perf_ops_generic; | |
e06c61a8 | 1810 | break; |
5d6a27d8 | 1811 | case PERF_COUNT_CONTEXT_SWITCHES: |
0475f9ea PM |
1812 | if (!counter->hw_event.exclude_kernel) |
1813 | hw_ops = &perf_ops_context_switches; | |
5d6a27d8 | 1814 | break; |
6c594c21 | 1815 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea PM |
1816 | if (!counter->hw_event.exclude_kernel) |
1817 | hw_ops = &perf_ops_cpu_migrations; | |
6c594c21 | 1818 | break; |
5c92d124 IM |
1819 | default: |
1820 | break; | |
1821 | } | |
15dbf27c PZ |
1822 | |
1823 | if (hw_ops) | |
1824 | hwc->irq_period = hw_event->irq_period; | |
1825 | ||
5c92d124 IM |
1826 | return hw_ops; |
1827 | } | |
1828 | ||
0793a61d TG |
1829 | /* |
1830 | * Allocate and initialize a counter structure | |
1831 | */ | |
1832 | static struct perf_counter * | |
04289bb9 IM |
1833 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
1834 | int cpu, | |
23a185ca | 1835 | struct perf_counter_context *ctx, |
9b51f66d IM |
1836 | struct perf_counter *group_leader, |
1837 | gfp_t gfpflags) | |
0793a61d | 1838 | { |
5c92d124 | 1839 | const struct hw_perf_counter_ops *hw_ops; |
621a01ea | 1840 | struct perf_counter *counter; |
0793a61d | 1841 | |
9b51f66d | 1842 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d TG |
1843 | if (!counter) |
1844 | return NULL; | |
1845 | ||
04289bb9 IM |
1846 | /* |
1847 | * Single counters are their own group leaders, with an | |
1848 | * empty sibling list: | |
1849 | */ | |
1850 | if (!group_leader) | |
1851 | group_leader = counter; | |
1852 | ||
0793a61d | 1853 | mutex_init(&counter->mutex); |
04289bb9 | 1854 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 1855 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 1856 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
1857 | init_waitqueue_head(&counter->waitq); |
1858 | ||
d859e29f PM |
1859 | INIT_LIST_HEAD(&counter->child_list); |
1860 | ||
9f66a381 IM |
1861 | counter->irqdata = &counter->data[0]; |
1862 | counter->usrdata = &counter->data[1]; | |
1863 | counter->cpu = cpu; | |
1864 | counter->hw_event = *hw_event; | |
1865 | counter->wakeup_pending = 0; | |
04289bb9 | 1866 | counter->group_leader = group_leader; |
621a01ea | 1867 | counter->hw_ops = NULL; |
23a185ca | 1868 | counter->ctx = ctx; |
621a01ea | 1869 | |
235c7fc7 | 1870 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
1871 | if (hw_event->disabled) |
1872 | counter->state = PERF_COUNTER_STATE_OFF; | |
1873 | ||
5c92d124 IM |
1874 | hw_ops = NULL; |
1875 | if (!hw_event->raw && hw_event->type < 0) | |
1876 | hw_ops = sw_perf_counter_init(counter); | |
23a185ca | 1877 | else |
5c92d124 | 1878 | hw_ops = hw_perf_counter_init(counter); |
5c92d124 | 1879 | |
621a01ea IM |
1880 | if (!hw_ops) { |
1881 | kfree(counter); | |
1882 | return NULL; | |
1883 | } | |
1884 | counter->hw_ops = hw_ops; | |
0793a61d TG |
1885 | |
1886 | return counter; | |
1887 | } | |
1888 | ||
1889 | /** | |
2743a5b0 | 1890 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
1891 | * |
1892 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 1893 | * @pid: target pid |
9f66a381 IM |
1894 | * @cpu: target cpu |
1895 | * @group_fd: group leader counter fd | |
0793a61d | 1896 | */ |
2743a5b0 | 1897 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 1898 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 1899 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 1900 | { |
04289bb9 | 1901 | struct perf_counter *counter, *group_leader; |
9f66a381 | 1902 | struct perf_counter_hw_event hw_event; |
04289bb9 | 1903 | struct perf_counter_context *ctx; |
9b51f66d | 1904 | struct file *counter_file = NULL; |
04289bb9 IM |
1905 | struct file *group_file = NULL; |
1906 | int fput_needed = 0; | |
9b51f66d | 1907 | int fput_needed2 = 0; |
0793a61d TG |
1908 | int ret; |
1909 | ||
2743a5b0 PM |
1910 | /* for future expandability... */ |
1911 | if (flags) | |
1912 | return -EINVAL; | |
1913 | ||
9f66a381 | 1914 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
1915 | return -EFAULT; |
1916 | ||
04289bb9 | 1917 | /* |
ccff286d IM |
1918 | * Get the target context (task or percpu): |
1919 | */ | |
1920 | ctx = find_get_context(pid, cpu); | |
1921 | if (IS_ERR(ctx)) | |
1922 | return PTR_ERR(ctx); | |
1923 | ||
1924 | /* | |
1925 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
1926 | */ |
1927 | group_leader = NULL; | |
1928 | if (group_fd != -1) { | |
1929 | ret = -EINVAL; | |
1930 | group_file = fget_light(group_fd, &fput_needed); | |
1931 | if (!group_file) | |
ccff286d | 1932 | goto err_put_context; |
04289bb9 | 1933 | if (group_file->f_op != &perf_fops) |
ccff286d | 1934 | goto err_put_context; |
04289bb9 IM |
1935 | |
1936 | group_leader = group_file->private_data; | |
1937 | /* | |
ccff286d IM |
1938 | * Do not allow a recursive hierarchy (this new sibling |
1939 | * becoming part of another group-sibling): | |
1940 | */ | |
1941 | if (group_leader->group_leader != group_leader) | |
1942 | goto err_put_context; | |
1943 | /* | |
1944 | * Do not allow to attach to a group in a different | |
1945 | * task or CPU context: | |
04289bb9 | 1946 | */ |
ccff286d IM |
1947 | if (group_leader->ctx != ctx) |
1948 | goto err_put_context; | |
3b6f9e5c PM |
1949 | /* |
1950 | * Only a group leader can be exclusive or pinned | |
1951 | */ | |
1952 | if (hw_event.exclusive || hw_event.pinned) | |
1953 | goto err_put_context; | |
04289bb9 IM |
1954 | } |
1955 | ||
5c92d124 | 1956 | ret = -EINVAL; |
23a185ca PM |
1957 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
1958 | GFP_KERNEL); | |
0793a61d TG |
1959 | if (!counter) |
1960 | goto err_put_context; | |
1961 | ||
0793a61d TG |
1962 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
1963 | if (ret < 0) | |
9b51f66d IM |
1964 | goto err_free_put_context; |
1965 | ||
1966 | counter_file = fget_light(ret, &fput_needed2); | |
1967 | if (!counter_file) | |
1968 | goto err_free_put_context; | |
1969 | ||
1970 | counter->filp = counter_file; | |
d859e29f | 1971 | mutex_lock(&ctx->mutex); |
9b51f66d | 1972 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 1973 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
1974 | |
1975 | fput_light(counter_file, fput_needed2); | |
0793a61d | 1976 | |
04289bb9 IM |
1977 | out_fput: |
1978 | fput_light(group_file, fput_needed); | |
1979 | ||
0793a61d TG |
1980 | return ret; |
1981 | ||
9b51f66d | 1982 | err_free_put_context: |
0793a61d TG |
1983 | kfree(counter); |
1984 | ||
1985 | err_put_context: | |
1986 | put_context(ctx); | |
1987 | ||
04289bb9 | 1988 | goto out_fput; |
0793a61d TG |
1989 | } |
1990 | ||
9b51f66d IM |
1991 | /* |
1992 | * Initialize the perf_counter context in a task_struct: | |
1993 | */ | |
1994 | static void | |
1995 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
1996 | struct task_struct *task) | |
1997 | { | |
1998 | memset(ctx, 0, sizeof(*ctx)); | |
1999 | spin_lock_init(&ctx->lock); | |
d859e29f | 2000 | mutex_init(&ctx->mutex); |
9b51f66d | 2001 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2002 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2003 | ctx->task = task; |
2004 | } | |
2005 | ||
2006 | /* | |
2007 | * inherit a counter from parent task to child task: | |
2008 | */ | |
d859e29f | 2009 | static struct perf_counter * |
9b51f66d IM |
2010 | inherit_counter(struct perf_counter *parent_counter, |
2011 | struct task_struct *parent, | |
2012 | struct perf_counter_context *parent_ctx, | |
2013 | struct task_struct *child, | |
d859e29f | 2014 | struct perf_counter *group_leader, |
9b51f66d IM |
2015 | struct perf_counter_context *child_ctx) |
2016 | { | |
2017 | struct perf_counter *child_counter; | |
2018 | ||
d859e29f PM |
2019 | /* |
2020 | * Instead of creating recursive hierarchies of counters, | |
2021 | * we link inherited counters back to the original parent, | |
2022 | * which has a filp for sure, which we use as the reference | |
2023 | * count: | |
2024 | */ | |
2025 | if (parent_counter->parent) | |
2026 | parent_counter = parent_counter->parent; | |
2027 | ||
9b51f66d | 2028 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2029 | parent_counter->cpu, child_ctx, |
2030 | group_leader, GFP_KERNEL); | |
9b51f66d | 2031 | if (!child_counter) |
d859e29f | 2032 | return NULL; |
9b51f66d IM |
2033 | |
2034 | /* | |
2035 | * Link it up in the child's context: | |
2036 | */ | |
9b51f66d IM |
2037 | child_counter->task = child; |
2038 | list_add_counter(child_counter, child_ctx); | |
2039 | child_ctx->nr_counters++; | |
2040 | ||
2041 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2042 | /* |
2043 | * inherit into child's child as well: | |
2044 | */ | |
2045 | child_counter->hw_event.inherit = 1; | |
2046 | ||
2047 | /* | |
2048 | * Get a reference to the parent filp - we will fput it | |
2049 | * when the child counter exits. This is safe to do because | |
2050 | * we are in the parent and we know that the filp still | |
2051 | * exists and has a nonzero count: | |
2052 | */ | |
2053 | atomic_long_inc(&parent_counter->filp->f_count); | |
2054 | ||
d859e29f PM |
2055 | /* |
2056 | * Link this into the parent counter's child list | |
2057 | */ | |
2058 | mutex_lock(&parent_counter->mutex); | |
2059 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2060 | ||
2061 | /* | |
2062 | * Make the child state follow the state of the parent counter, | |
2063 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2064 | * so we won't race with perf_counter_{en,dis}able_family. | |
2065 | */ | |
2066 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2067 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2068 | else | |
2069 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2070 | ||
2071 | mutex_unlock(&parent_counter->mutex); | |
2072 | ||
2073 | return child_counter; | |
2074 | } | |
2075 | ||
2076 | static int inherit_group(struct perf_counter *parent_counter, | |
2077 | struct task_struct *parent, | |
2078 | struct perf_counter_context *parent_ctx, | |
2079 | struct task_struct *child, | |
2080 | struct perf_counter_context *child_ctx) | |
2081 | { | |
2082 | struct perf_counter *leader; | |
2083 | struct perf_counter *sub; | |
2084 | ||
2085 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2086 | child, NULL, child_ctx); | |
2087 | if (!leader) | |
2088 | return -ENOMEM; | |
2089 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { | |
2090 | if (!inherit_counter(sub, parent, parent_ctx, | |
2091 | child, leader, child_ctx)) | |
2092 | return -ENOMEM; | |
2093 | } | |
9b51f66d IM |
2094 | return 0; |
2095 | } | |
2096 | ||
d859e29f PM |
2097 | static void sync_child_counter(struct perf_counter *child_counter, |
2098 | struct perf_counter *parent_counter) | |
2099 | { | |
2100 | u64 parent_val, child_val; | |
2101 | ||
2102 | parent_val = atomic64_read(&parent_counter->count); | |
2103 | child_val = atomic64_read(&child_counter->count); | |
2104 | ||
2105 | /* | |
2106 | * Add back the child's count to the parent's count: | |
2107 | */ | |
2108 | atomic64_add(child_val, &parent_counter->count); | |
2109 | ||
2110 | /* | |
2111 | * Remove this counter from the parent's list | |
2112 | */ | |
2113 | mutex_lock(&parent_counter->mutex); | |
2114 | list_del_init(&child_counter->child_list); | |
2115 | mutex_unlock(&parent_counter->mutex); | |
2116 | ||
2117 | /* | |
2118 | * Release the parent counter, if this was the last | |
2119 | * reference to it. | |
2120 | */ | |
2121 | fput(parent_counter->filp); | |
2122 | } | |
2123 | ||
9b51f66d IM |
2124 | static void |
2125 | __perf_counter_exit_task(struct task_struct *child, | |
2126 | struct perf_counter *child_counter, | |
2127 | struct perf_counter_context *child_ctx) | |
2128 | { | |
2129 | struct perf_counter *parent_counter; | |
d859e29f | 2130 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
2131 | |
2132 | /* | |
235c7fc7 IM |
2133 | * If we do not self-reap then we have to wait for the |
2134 | * child task to unschedule (it will happen for sure), | |
2135 | * so that its counter is at its final count. (This | |
2136 | * condition triggers rarely - child tasks usually get | |
2137 | * off their CPU before the parent has a chance to | |
2138 | * get this far into the reaping action) | |
9b51f66d | 2139 | */ |
235c7fc7 IM |
2140 | if (child != current) { |
2141 | wait_task_inactive(child, 0); | |
2142 | list_del_init(&child_counter->list_entry); | |
2143 | } else { | |
0cc0c027 | 2144 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
2145 | unsigned long flags; |
2146 | u64 perf_flags; | |
2147 | ||
2148 | /* | |
2149 | * Disable and unlink this counter. | |
2150 | * | |
2151 | * Be careful about zapping the list - IRQ/NMI context | |
2152 | * could still be processing it: | |
2153 | */ | |
2154 | curr_rq_lock_irq_save(&flags); | |
2155 | perf_flags = hw_perf_save_disable(); | |
0cc0c027 IM |
2156 | |
2157 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
2158 | ||
d859e29f | 2159 | group_sched_out(child_counter, cpuctx, child_ctx); |
0cc0c027 | 2160 | |
235c7fc7 | 2161 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 2162 | |
235c7fc7 | 2163 | child_ctx->nr_counters--; |
9b51f66d | 2164 | |
235c7fc7 IM |
2165 | hw_perf_restore(perf_flags); |
2166 | curr_rq_unlock_irq_restore(&flags); | |
2167 | } | |
9b51f66d IM |
2168 | |
2169 | parent_counter = child_counter->parent; | |
2170 | /* | |
2171 | * It can happen that parent exits first, and has counters | |
2172 | * that are still around due to the child reference. These | |
2173 | * counters need to be zapped - but otherwise linger. | |
2174 | */ | |
d859e29f PM |
2175 | if (parent_counter) { |
2176 | sync_child_counter(child_counter, parent_counter); | |
2177 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
2178 | list_entry) { | |
4bcf349a | 2179 | if (sub->parent) { |
d859e29f | 2180 | sync_child_counter(sub, sub->parent); |
4bcf349a PM |
2181 | kfree(sub); |
2182 | } | |
d859e29f | 2183 | } |
65d37086 | 2184 | kfree(child_counter); |
4bcf349a | 2185 | } |
9b51f66d IM |
2186 | } |
2187 | ||
2188 | /* | |
d859e29f | 2189 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 2190 | * |
d859e29f | 2191 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
2192 | * anymore so new counters will not be added. |
2193 | */ | |
2194 | void perf_counter_exit_task(struct task_struct *child) | |
2195 | { | |
2196 | struct perf_counter *child_counter, *tmp; | |
2197 | struct perf_counter_context *child_ctx; | |
2198 | ||
2199 | child_ctx = &child->perf_counter_ctx; | |
2200 | ||
2201 | if (likely(!child_ctx->nr_counters)) | |
2202 | return; | |
2203 | ||
2204 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
2205 | list_entry) | |
2206 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
2207 | } | |
2208 | ||
2209 | /* | |
2210 | * Initialize the perf_counter context in task_struct | |
2211 | */ | |
2212 | void perf_counter_init_task(struct task_struct *child) | |
2213 | { | |
2214 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 2215 | struct perf_counter *counter; |
9b51f66d | 2216 | struct task_struct *parent = current; |
9b51f66d IM |
2217 | |
2218 | child_ctx = &child->perf_counter_ctx; | |
2219 | parent_ctx = &parent->perf_counter_ctx; | |
2220 | ||
2221 | __perf_counter_init_context(child_ctx, child); | |
2222 | ||
2223 | /* | |
2224 | * This is executed from the parent task context, so inherit | |
2225 | * counters that have been marked for cloning: | |
2226 | */ | |
2227 | ||
2228 | if (likely(!parent_ctx->nr_counters)) | |
2229 | return; | |
2230 | ||
2231 | /* | |
2232 | * Lock the parent list. No need to lock the child - not PID | |
2233 | * hashed yet and not running, so nobody can access it. | |
2234 | */ | |
d859e29f | 2235 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
2236 | |
2237 | /* | |
2238 | * We dont have to disable NMIs - we are only looking at | |
2239 | * the list, not manipulating it: | |
2240 | */ | |
2241 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 2242 | if (!counter->hw_event.inherit) |
9b51f66d IM |
2243 | continue; |
2244 | ||
d859e29f | 2245 | if (inherit_group(counter, parent, |
9b51f66d IM |
2246 | parent_ctx, child, child_ctx)) |
2247 | break; | |
2248 | } | |
2249 | ||
d859e29f | 2250 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
2251 | } |
2252 | ||
04289bb9 | 2253 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 2254 | { |
04289bb9 | 2255 | struct perf_cpu_context *cpuctx; |
0793a61d | 2256 | |
04289bb9 IM |
2257 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
2258 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
2259 | |
2260 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 2261 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 2262 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 2263 | |
01d0287f | 2264 | hw_perf_counter_setup(cpu); |
0793a61d TG |
2265 | } |
2266 | ||
2267 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 2268 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
2269 | { |
2270 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
2271 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2272 | struct perf_counter *counter, *tmp; | |
2273 | ||
04289bb9 IM |
2274 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
2275 | __perf_counter_remove_from_context(counter); | |
0793a61d | 2276 | } |
04289bb9 | 2277 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 2278 | { |
d859e29f PM |
2279 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
2280 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
2281 | ||
2282 | mutex_lock(&ctx->mutex); | |
04289bb9 | 2283 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 2284 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
2285 | } |
2286 | #else | |
04289bb9 | 2287 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
2288 | #endif |
2289 | ||
2290 | static int __cpuinit | |
2291 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
2292 | { | |
2293 | unsigned int cpu = (long)hcpu; | |
2294 | ||
2295 | switch (action) { | |
2296 | ||
2297 | case CPU_UP_PREPARE: | |
2298 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 2299 | perf_counter_init_cpu(cpu); |
0793a61d TG |
2300 | break; |
2301 | ||
2302 | case CPU_DOWN_PREPARE: | |
2303 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 2304 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
2305 | break; |
2306 | ||
2307 | default: | |
2308 | break; | |
2309 | } | |
2310 | ||
2311 | return NOTIFY_OK; | |
2312 | } | |
2313 | ||
2314 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
2315 | .notifier_call = perf_cpu_notify, | |
2316 | }; | |
2317 | ||
2318 | static int __init perf_counter_init(void) | |
2319 | { | |
2320 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
2321 | (void *)(long)smp_processor_id()); | |
2322 | register_cpu_notifier(&perf_cpu_nb); | |
2323 | ||
2324 | return 0; | |
2325 | } | |
2326 | early_initcall(perf_counter_init); | |
2327 | ||
2328 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
2329 | { | |
2330 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
2331 | } | |
2332 | ||
2333 | static ssize_t | |
2334 | perf_set_reserve_percpu(struct sysdev_class *class, | |
2335 | const char *buf, | |
2336 | size_t count) | |
2337 | { | |
2338 | struct perf_cpu_context *cpuctx; | |
2339 | unsigned long val; | |
2340 | int err, cpu, mpt; | |
2341 | ||
2342 | err = strict_strtoul(buf, 10, &val); | |
2343 | if (err) | |
2344 | return err; | |
2345 | if (val > perf_max_counters) | |
2346 | return -EINVAL; | |
2347 | ||
2348 | mutex_lock(&perf_resource_mutex); | |
2349 | perf_reserved_percpu = val; | |
2350 | for_each_online_cpu(cpu) { | |
2351 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
2352 | spin_lock_irq(&cpuctx->ctx.lock); | |
2353 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
2354 | perf_max_counters - perf_reserved_percpu); | |
2355 | cpuctx->max_pertask = mpt; | |
2356 | spin_unlock_irq(&cpuctx->ctx.lock); | |
2357 | } | |
2358 | mutex_unlock(&perf_resource_mutex); | |
2359 | ||
2360 | return count; | |
2361 | } | |
2362 | ||
2363 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
2364 | { | |
2365 | return sprintf(buf, "%d\n", perf_overcommit); | |
2366 | } | |
2367 | ||
2368 | static ssize_t | |
2369 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
2370 | { | |
2371 | unsigned long val; | |
2372 | int err; | |
2373 | ||
2374 | err = strict_strtoul(buf, 10, &val); | |
2375 | if (err) | |
2376 | return err; | |
2377 | if (val > 1) | |
2378 | return -EINVAL; | |
2379 | ||
2380 | mutex_lock(&perf_resource_mutex); | |
2381 | perf_overcommit = val; | |
2382 | mutex_unlock(&perf_resource_mutex); | |
2383 | ||
2384 | return count; | |
2385 | } | |
2386 | ||
2387 | static SYSDEV_CLASS_ATTR( | |
2388 | reserve_percpu, | |
2389 | 0644, | |
2390 | perf_show_reserve_percpu, | |
2391 | perf_set_reserve_percpu | |
2392 | ); | |
2393 | ||
2394 | static SYSDEV_CLASS_ATTR( | |
2395 | overcommit, | |
2396 | 0644, | |
2397 | perf_show_overcommit, | |
2398 | perf_set_overcommit | |
2399 | ); | |
2400 | ||
2401 | static struct attribute *perfclass_attrs[] = { | |
2402 | &attr_reserve_percpu.attr, | |
2403 | &attr_overcommit.attr, | |
2404 | NULL | |
2405 | }; | |
2406 | ||
2407 | static struct attribute_group perfclass_attr_group = { | |
2408 | .attrs = perfclass_attrs, | |
2409 | .name = "perf_counters", | |
2410 | }; | |
2411 | ||
2412 | static int __init perf_counter_sysfs_init(void) | |
2413 | { | |
2414 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
2415 | &perfclass_attr_group); | |
2416 | } | |
2417 | device_initcall(perf_counter_sysfs_init); |