genirq/cpuhotplug: Enforce affinity setting on startup of managed irqs
[linux-block.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
0881e7bd 20#include <linux/sched/task.h>
ae7e81c0 21#include <uapi/linux/sched/types.h>
4d1d61a6 22#include <linux/task_work.h>
1da177e4
LT
23
24#include "internals.h"
25
8d32a307
TG
26#ifdef CONFIG_IRQ_FORCED_THREADING
27__read_mostly bool force_irqthreads;
28
29static int __init setup_forced_irqthreads(char *arg)
30{
31 force_irqthreads = true;
32 return 0;
33}
34early_param("threadirqs", setup_forced_irqthreads);
35#endif
36
18258f72 37static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 38{
32f4125e 39 bool inprogress;
1da177e4 40
a98ce5c6
HX
41 do {
42 unsigned long flags;
43
44 /*
45 * Wait until we're out of the critical section. This might
46 * give the wrong answer due to the lack of memory barriers.
47 */
32f4125e 48 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
49 cpu_relax();
50
51 /* Ok, that indicated we're done: double-check carefully. */
239007b8 52 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 53 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 54 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
55
56 /* Oops, that failed? */
32f4125e 57 } while (inprogress);
18258f72
TG
58}
59
60/**
61 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
62 * @irq: interrupt number to wait for
63 *
64 * This function waits for any pending hard IRQ handlers for this
65 * interrupt to complete before returning. If you use this
66 * function while holding a resource the IRQ handler may need you
67 * will deadlock. It does not take associated threaded handlers
68 * into account.
69 *
70 * Do not use this for shutdown scenarios where you must be sure
71 * that all parts (hardirq and threaded handler) have completed.
72 *
02cea395
PZ
73 * Returns: false if a threaded handler is active.
74 *
18258f72
TG
75 * This function may be called - with care - from IRQ context.
76 */
02cea395 77bool synchronize_hardirq(unsigned int irq)
18258f72
TG
78{
79 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 80
02cea395 81 if (desc) {
18258f72 82 __synchronize_hardirq(desc);
02cea395
PZ
83 return !atomic_read(&desc->threads_active);
84 }
85
86 return true;
18258f72
TG
87}
88EXPORT_SYMBOL(synchronize_hardirq);
89
90/**
91 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
92 * @irq: interrupt number to wait for
93 *
94 * This function waits for any pending IRQ handlers for this interrupt
95 * to complete before returning. If you use this function while
96 * holding a resource the IRQ handler may need you will deadlock.
97 *
98 * This function may be called - with care - from IRQ context.
99 */
100void synchronize_irq(unsigned int irq)
101{
102 struct irq_desc *desc = irq_to_desc(irq);
103
104 if (desc) {
105 __synchronize_hardirq(desc);
106 /*
107 * We made sure that no hardirq handler is
108 * running. Now verify that no threaded handlers are
109 * active.
110 */
111 wait_event(desc->wait_for_threads,
112 !atomic_read(&desc->threads_active));
113 }
1da177e4 114}
1da177e4
LT
115EXPORT_SYMBOL(synchronize_irq);
116
3aa551c9
TG
117#ifdef CONFIG_SMP
118cpumask_var_t irq_default_affinity;
119
9c255583 120static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
121{
122 if (!desc || !irqd_can_balance(&desc->irq_data) ||
123 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
124 return false;
125 return true;
e019c249
JL
126}
127
771ee3b0
TG
128/**
129 * irq_can_set_affinity - Check if the affinity of a given irq can be set
130 * @irq: Interrupt to check
131 *
132 */
133int irq_can_set_affinity(unsigned int irq)
134{
e019c249 135 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
136}
137
9c255583
TG
138/**
139 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
140 * @irq: Interrupt to check
141 *
142 * Like irq_can_set_affinity() above, but additionally checks for the
143 * AFFINITY_MANAGED flag.
144 */
145bool irq_can_set_affinity_usr(unsigned int irq)
146{
147 struct irq_desc *desc = irq_to_desc(irq);
148
149 return __irq_can_set_affinity(desc) &&
150 !irqd_affinity_is_managed(&desc->irq_data);
151}
152
591d2fb0
TG
153/**
154 * irq_set_thread_affinity - Notify irq threads to adjust affinity
155 * @desc: irq descriptor which has affitnity changed
156 *
157 * We just set IRQTF_AFFINITY and delegate the affinity setting
158 * to the interrupt thread itself. We can not call
159 * set_cpus_allowed_ptr() here as we hold desc->lock and this
160 * code can be called from hard interrupt context.
161 */
162void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 163{
f944b5a7 164 struct irqaction *action;
3aa551c9 165
f944b5a7 166 for_each_action_of_desc(desc, action)
3aa551c9 167 if (action->thread)
591d2fb0 168 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
169}
170
19e1d4e9
TG
171static void irq_validate_effective_affinity(struct irq_data *data)
172{
173#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
174 const struct cpumask *m = irq_data_get_effective_affinity_mask(data);
175 struct irq_chip *chip = irq_data_get_irq_chip(data);
176
177 if (!cpumask_empty(m))
178 return;
179 pr_warn_once("irq_chip %s did not update eff. affinity mask of irq %u\n",
180 chip->name, data->irq);
181#endif
182}
183
818b0f3b
JL
184int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
185 bool force)
186{
187 struct irq_desc *desc = irq_data_to_desc(data);
188 struct irq_chip *chip = irq_data_get_irq_chip(data);
189 int ret;
190
e43b3b58
TG
191 if (!chip || !chip->irq_set_affinity)
192 return -EINVAL;
193
01f8fa4f 194 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
195 switch (ret) {
196 case IRQ_SET_MASK_OK:
2cb62547 197 case IRQ_SET_MASK_OK_DONE:
9df872fa 198 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b 199 case IRQ_SET_MASK_OK_NOCOPY:
19e1d4e9 200 irq_validate_effective_affinity(data);
818b0f3b
JL
201 irq_set_thread_affinity(desc);
202 ret = 0;
203 }
204
205 return ret;
206}
207
01f8fa4f
TG
208int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
209 bool force)
771ee3b0 210{
c2d0c555
DD
211 struct irq_chip *chip = irq_data_get_irq_chip(data);
212 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 213 int ret = 0;
771ee3b0 214
c2d0c555 215 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
216 return -EINVAL;
217
0ef5ca1e 218 if (irq_can_move_pcntxt(data)) {
01f8fa4f 219 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 220 } else {
c2d0c555 221 irqd_set_move_pending(data);
1fa46f1f 222 irq_copy_pending(desc, mask);
57b150cc 223 }
1fa46f1f 224
cd7eab44
BH
225 if (desc->affinity_notify) {
226 kref_get(&desc->affinity_notify->kref);
227 schedule_work(&desc->affinity_notify->work);
228 }
c2d0c555
DD
229 irqd_set(data, IRQD_AFFINITY_SET);
230
231 return ret;
232}
233
01f8fa4f 234int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
235{
236 struct irq_desc *desc = irq_to_desc(irq);
237 unsigned long flags;
238 int ret;
239
240 if (!desc)
241 return -EINVAL;
242
243 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 244 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 245 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 246 return ret;
771ee3b0
TG
247}
248
e7a297b0
PWJ
249int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
250{
e7a297b0 251 unsigned long flags;
31d9d9b6 252 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
253
254 if (!desc)
255 return -EINVAL;
e7a297b0 256 desc->affinity_hint = m;
02725e74 257 irq_put_desc_unlock(desc, flags);
e2e64a93 258 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
259 if (m)
260 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
261 return 0;
262}
263EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
264
cd7eab44
BH
265static void irq_affinity_notify(struct work_struct *work)
266{
267 struct irq_affinity_notify *notify =
268 container_of(work, struct irq_affinity_notify, work);
269 struct irq_desc *desc = irq_to_desc(notify->irq);
270 cpumask_var_t cpumask;
271 unsigned long flags;
272
1fa46f1f 273 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
274 goto out;
275
276 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 277 if (irq_move_pending(&desc->irq_data))
1fa46f1f 278 irq_get_pending(cpumask, desc);
cd7eab44 279 else
9df872fa 280 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
281 raw_spin_unlock_irqrestore(&desc->lock, flags);
282
283 notify->notify(notify, cpumask);
284
285 free_cpumask_var(cpumask);
286out:
287 kref_put(&notify->kref, notify->release);
288}
289
290/**
291 * irq_set_affinity_notifier - control notification of IRQ affinity changes
292 * @irq: Interrupt for which to enable/disable notification
293 * @notify: Context for notification, or %NULL to disable
294 * notification. Function pointers must be initialised;
295 * the other fields will be initialised by this function.
296 *
297 * Must be called in process context. Notification may only be enabled
298 * after the IRQ is allocated and must be disabled before the IRQ is
299 * freed using free_irq().
300 */
301int
302irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
303{
304 struct irq_desc *desc = irq_to_desc(irq);
305 struct irq_affinity_notify *old_notify;
306 unsigned long flags;
307
308 /* The release function is promised process context */
309 might_sleep();
310
311 if (!desc)
312 return -EINVAL;
313
314 /* Complete initialisation of *notify */
315 if (notify) {
316 notify->irq = irq;
317 kref_init(&notify->kref);
318 INIT_WORK(&notify->work, irq_affinity_notify);
319 }
320
321 raw_spin_lock_irqsave(&desc->lock, flags);
322 old_notify = desc->affinity_notify;
323 desc->affinity_notify = notify;
324 raw_spin_unlock_irqrestore(&desc->lock, flags);
325
326 if (old_notify)
327 kref_put(&old_notify->kref, old_notify->release);
328
329 return 0;
330}
331EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
332
18404756
MK
333#ifndef CONFIG_AUTO_IRQ_AFFINITY
334/*
335 * Generic version of the affinity autoselector.
336 */
43564bd9 337int irq_setup_affinity(struct irq_desc *desc)
18404756 338{
569bda8d 339 struct cpumask *set = irq_default_affinity;
cba4235e
TG
340 int ret, node = irq_desc_get_node(desc);
341 static DEFINE_RAW_SPINLOCK(mask_lock);
342 static struct cpumask mask;
569bda8d 343
b008207c 344 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 345 if (!__irq_can_set_affinity(desc))
18404756
MK
346 return 0;
347
cba4235e 348 raw_spin_lock(&mask_lock);
f6d87f4b 349 /*
9332ef9d 350 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 351 * setup, but make sure that one of the targets is online.
f6d87f4b 352 */
06ee6d57
TG
353 if (irqd_affinity_is_managed(&desc->irq_data) ||
354 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 355 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 356 cpu_online_mask))
9df872fa 357 set = desc->irq_common_data.affinity;
0c6f8a8b 358 else
2bdd1055 359 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 360 }
18404756 361
cba4235e 362 cpumask_and(&mask, cpu_online_mask, set);
241fc640
PB
363 if (node != NUMA_NO_NODE) {
364 const struct cpumask *nodemask = cpumask_of_node(node);
365
366 /* make sure at least one of the cpus in nodemask is online */
cba4235e
TG
367 if (cpumask_intersects(&mask, nodemask))
368 cpumask_and(&mask, &mask, nodemask);
241fc640 369 }
cba4235e
TG
370 ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
371 raw_spin_unlock(&mask_lock);
372 return ret;
18404756 373}
f6d87f4b 374#else
a8a98eac 375/* Wrapper for ALPHA specific affinity selector magic */
cba4235e 376int irq_setup_affinity(struct irq_desc *desc)
f6d87f4b 377{
cba4235e 378 return irq_select_affinity(irq_desc_get_irq(desc));
f6d87f4b 379}
18404756
MK
380#endif
381
f6d87f4b 382/*
cba4235e 383 * Called when a bogus affinity is set via /proc/irq
f6d87f4b 384 */
cba4235e 385int irq_select_affinity_usr(unsigned int irq)
f6d87f4b
TG
386{
387 struct irq_desc *desc = irq_to_desc(irq);
388 unsigned long flags;
389 int ret;
390
239007b8 391 raw_spin_lock_irqsave(&desc->lock, flags);
cba4235e 392 ret = irq_setup_affinity(desc);
239007b8 393 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
394 return ret;
395}
1da177e4
LT
396#endif
397
fcf1ae2f
FW
398/**
399 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
400 * @irq: interrupt number to set affinity
401 * @vcpu_info: vCPU specific data
402 *
403 * This function uses the vCPU specific data to set the vCPU
404 * affinity for an irq. The vCPU specific data is passed from
405 * outside, such as KVM. One example code path is as below:
406 * KVM -> IOMMU -> irq_set_vcpu_affinity().
407 */
408int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
409{
410 unsigned long flags;
411 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
412 struct irq_data *data;
413 struct irq_chip *chip;
414 int ret = -ENOSYS;
415
416 if (!desc)
417 return -EINVAL;
418
419 data = irq_desc_get_irq_data(desc);
0abce64a
MZ
420 do {
421 chip = irq_data_get_irq_chip(data);
422 if (chip && chip->irq_set_vcpu_affinity)
423 break;
424#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
425 data = data->parent_data;
426#else
427 data = NULL;
428#endif
429 } while (data);
430
431 if (data)
fcf1ae2f
FW
432 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
433 irq_put_desc_unlock(desc, flags);
434
435 return ret;
436}
437EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
438
79ff1cda 439void __disable_irq(struct irq_desc *desc)
0a0c5168 440{
3aae994f 441 if (!desc->depth++)
87923470 442 irq_disable(desc);
0a0c5168
RW
443}
444
02725e74
TG
445static int __disable_irq_nosync(unsigned int irq)
446{
447 unsigned long flags;
31d9d9b6 448 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
449
450 if (!desc)
451 return -EINVAL;
79ff1cda 452 __disable_irq(desc);
02725e74
TG
453 irq_put_desc_busunlock(desc, flags);
454 return 0;
455}
456
1da177e4
LT
457/**
458 * disable_irq_nosync - disable an irq without waiting
459 * @irq: Interrupt to disable
460 *
461 * Disable the selected interrupt line. Disables and Enables are
462 * nested.
463 * Unlike disable_irq(), this function does not ensure existing
464 * instances of the IRQ handler have completed before returning.
465 *
466 * This function may be called from IRQ context.
467 */
468void disable_irq_nosync(unsigned int irq)
469{
02725e74 470 __disable_irq_nosync(irq);
1da177e4 471}
1da177e4
LT
472EXPORT_SYMBOL(disable_irq_nosync);
473
474/**
475 * disable_irq - disable an irq and wait for completion
476 * @irq: Interrupt to disable
477 *
478 * Disable the selected interrupt line. Enables and Disables are
479 * nested.
480 * This function waits for any pending IRQ handlers for this interrupt
481 * to complete before returning. If you use this function while
482 * holding a resource the IRQ handler may need you will deadlock.
483 *
484 * This function may be called - with care - from IRQ context.
485 */
486void disable_irq(unsigned int irq)
487{
02725e74 488 if (!__disable_irq_nosync(irq))
1da177e4
LT
489 synchronize_irq(irq);
490}
1da177e4
LT
491EXPORT_SYMBOL(disable_irq);
492
02cea395
PZ
493/**
494 * disable_hardirq - disables an irq and waits for hardirq completion
495 * @irq: Interrupt to disable
496 *
497 * Disable the selected interrupt line. Enables and Disables are
498 * nested.
499 * This function waits for any pending hard IRQ handlers for this
500 * interrupt to complete before returning. If you use this function while
501 * holding a resource the hard IRQ handler may need you will deadlock.
502 *
503 * When used to optimistically disable an interrupt from atomic context
504 * the return value must be checked.
505 *
506 * Returns: false if a threaded handler is active.
507 *
508 * This function may be called - with care - from IRQ context.
509 */
510bool disable_hardirq(unsigned int irq)
511{
512 if (!__disable_irq_nosync(irq))
513 return synchronize_hardirq(irq);
514
515 return false;
516}
517EXPORT_SYMBOL_GPL(disable_hardirq);
518
79ff1cda 519void __enable_irq(struct irq_desc *desc)
1adb0850
TG
520{
521 switch (desc->depth) {
522 case 0:
0a0c5168 523 err_out:
79ff1cda
JL
524 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
525 irq_desc_get_irq(desc));
1adb0850
TG
526 break;
527 case 1: {
c531e836 528 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 529 goto err_out;
1adb0850 530 /* Prevent probing on this irq: */
1ccb4e61 531 irq_settings_set_noprobe(desc);
201d7f47
TG
532 /*
533 * Call irq_startup() not irq_enable() here because the
534 * interrupt might be marked NOAUTOEN. So irq_startup()
535 * needs to be invoked when it gets enabled the first
536 * time. If it was already started up, then irq_startup()
537 * will invoke irq_enable() under the hood.
538 */
4cde9c6b 539 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
201d7f47 540 break;
1adb0850
TG
541 }
542 default:
543 desc->depth--;
544 }
545}
546
1da177e4
LT
547/**
548 * enable_irq - enable handling of an irq
549 * @irq: Interrupt to enable
550 *
551 * Undoes the effect of one call to disable_irq(). If this
552 * matches the last disable, processing of interrupts on this
553 * IRQ line is re-enabled.
554 *
70aedd24 555 * This function may be called from IRQ context only when
6b8ff312 556 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
557 */
558void enable_irq(unsigned int irq)
559{
1da177e4 560 unsigned long flags;
31d9d9b6 561 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 562
7d94f7ca 563 if (!desc)
c2b5a251 564 return;
50f7c032
TG
565 if (WARN(!desc->irq_data.chip,
566 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 567 goto out;
2656c366 568
79ff1cda 569 __enable_irq(desc);
02725e74
TG
570out:
571 irq_put_desc_busunlock(desc, flags);
1da177e4 572}
1da177e4
LT
573EXPORT_SYMBOL(enable_irq);
574
0c5d1eb7 575static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 576{
08678b08 577 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
578 int ret = -ENXIO;
579
60f96b41
SS
580 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
581 return 0;
582
2f7e99bb
TG
583 if (desc->irq_data.chip->irq_set_wake)
584 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
585
586 return ret;
587}
588
ba9a2331 589/**
a0cd9ca2 590 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
591 * @irq: interrupt to control
592 * @on: enable/disable power management wakeup
593 *
15a647eb
DB
594 * Enable/disable power management wakeup mode, which is
595 * disabled by default. Enables and disables must match,
596 * just as they match for non-wakeup mode support.
597 *
598 * Wakeup mode lets this IRQ wake the system from sleep
599 * states like "suspend to RAM".
ba9a2331 600 */
a0cd9ca2 601int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 602{
ba9a2331 603 unsigned long flags;
31d9d9b6 604 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 605 int ret = 0;
ba9a2331 606
13863a66
JJ
607 if (!desc)
608 return -EINVAL;
609
15a647eb
DB
610 /* wakeup-capable irqs can be shared between drivers that
611 * don't need to have the same sleep mode behaviors.
612 */
15a647eb 613 if (on) {
2db87321
UKK
614 if (desc->wake_depth++ == 0) {
615 ret = set_irq_wake_real(irq, on);
616 if (ret)
617 desc->wake_depth = 0;
618 else
7f94226f 619 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 620 }
15a647eb
DB
621 } else {
622 if (desc->wake_depth == 0) {
7a2c4770 623 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
624 } else if (--desc->wake_depth == 0) {
625 ret = set_irq_wake_real(irq, on);
626 if (ret)
627 desc->wake_depth = 1;
628 else
7f94226f 629 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 630 }
15a647eb 631 }
02725e74 632 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
633 return ret;
634}
a0cd9ca2 635EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 636
1da177e4
LT
637/*
638 * Internal function that tells the architecture code whether a
639 * particular irq has been exclusively allocated or is available
640 * for driver use.
641 */
642int can_request_irq(unsigned int irq, unsigned long irqflags)
643{
cc8c3b78 644 unsigned long flags;
31d9d9b6 645 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 646 int canrequest = 0;
1da177e4 647
7d94f7ca
YL
648 if (!desc)
649 return 0;
650
02725e74 651 if (irq_settings_can_request(desc)) {
2779db8d
BH
652 if (!desc->action ||
653 irqflags & desc->action->flags & IRQF_SHARED)
654 canrequest = 1;
02725e74
TG
655 }
656 irq_put_desc_unlock(desc, flags);
657 return canrequest;
1da177e4
LT
658}
659
a1ff541a 660int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 661{
6b8ff312 662 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 663 int ret, unmask = 0;
82736f4d 664
b2ba2c30 665 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
666 /*
667 * IRQF_TRIGGER_* but the PIC does not support multiple
668 * flow-types?
669 */
a1ff541a
JL
670 pr_debug("No set_type function for IRQ %d (%s)\n",
671 irq_desc_get_irq(desc),
f5d89470 672 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
673 return 0;
674 }
675
d4d5e089 676 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 677 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 678 mask_irq(desc);
32f4125e 679 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
680 unmask = 1;
681 }
682
00b992de
AK
683 /* Mask all flags except trigger mode */
684 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 685 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 686
876dbd4c
TG
687 switch (ret) {
688 case IRQ_SET_MASK_OK:
2cb62547 689 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
690 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
691 irqd_set(&desc->irq_data, flags);
692
693 case IRQ_SET_MASK_OK_NOCOPY:
694 flags = irqd_get_trigger_type(&desc->irq_data);
695 irq_settings_set_trigger_mask(desc, flags);
696 irqd_clear(&desc->irq_data, IRQD_LEVEL);
697 irq_settings_clr_level(desc);
698 if (flags & IRQ_TYPE_LEVEL_MASK) {
699 irq_settings_set_level(desc);
700 irqd_set(&desc->irq_data, IRQD_LEVEL);
701 }
46732475 702
d4d5e089 703 ret = 0;
8fff39e0 704 break;
876dbd4c 705 default:
97fd75b7 706 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 707 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 708 }
d4d5e089
TG
709 if (unmask)
710 unmask_irq(desc);
82736f4d
UKK
711 return ret;
712}
713
293a7a0a
TG
714#ifdef CONFIG_HARDIRQS_SW_RESEND
715int irq_set_parent(int irq, int parent_irq)
716{
717 unsigned long flags;
718 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
719
720 if (!desc)
721 return -EINVAL;
722
723 desc->parent_irq = parent_irq;
724
725 irq_put_desc_unlock(desc, flags);
726 return 0;
727}
3118dac5 728EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
729#endif
730
b25c340c
TG
731/*
732 * Default primary interrupt handler for threaded interrupts. Is
733 * assigned as primary handler when request_threaded_irq is called
734 * with handler == NULL. Useful for oneshot interrupts.
735 */
736static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
737{
738 return IRQ_WAKE_THREAD;
739}
740
399b5da2
TG
741/*
742 * Primary handler for nested threaded interrupts. Should never be
743 * called.
744 */
745static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
746{
747 WARN(1, "Primary handler called for nested irq %d\n", irq);
748 return IRQ_NONE;
749}
750
2a1d3ab8
TG
751static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
752{
753 WARN(1, "Secondary action handler called for irq %d\n", irq);
754 return IRQ_NONE;
755}
756
3aa551c9
TG
757static int irq_wait_for_interrupt(struct irqaction *action)
758{
550acb19
IY
759 set_current_state(TASK_INTERRUPTIBLE);
760
3aa551c9 761 while (!kthread_should_stop()) {
f48fe81e
TG
762
763 if (test_and_clear_bit(IRQTF_RUNTHREAD,
764 &action->thread_flags)) {
3aa551c9
TG
765 __set_current_state(TASK_RUNNING);
766 return 0;
f48fe81e
TG
767 }
768 schedule();
550acb19 769 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 770 }
550acb19 771 __set_current_state(TASK_RUNNING);
3aa551c9
TG
772 return -1;
773}
774
b25c340c
TG
775/*
776 * Oneshot interrupts keep the irq line masked until the threaded
777 * handler finished. unmask if the interrupt has not been disabled and
778 * is marked MASKED.
779 */
b5faba21 780static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 781 struct irqaction *action)
b25c340c 782{
2a1d3ab8
TG
783 if (!(desc->istate & IRQS_ONESHOT) ||
784 action->handler == irq_forced_secondary_handler)
b5faba21 785 return;
0b1adaa0 786again:
3876ec9e 787 chip_bus_lock(desc);
239007b8 788 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
789
790 /*
791 * Implausible though it may be we need to protect us against
792 * the following scenario:
793 *
794 * The thread is faster done than the hard interrupt handler
795 * on the other CPU. If we unmask the irq line then the
796 * interrupt can come in again and masks the line, leaves due
009b4c3b 797 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
798 *
799 * This also serializes the state of shared oneshot handlers
800 * versus "desc->threads_onehsot |= action->thread_mask;" in
801 * irq_wake_thread(). See the comment there which explains the
802 * serialization.
0b1adaa0 803 */
32f4125e 804 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 805 raw_spin_unlock_irq(&desc->lock);
3876ec9e 806 chip_bus_sync_unlock(desc);
0b1adaa0
TG
807 cpu_relax();
808 goto again;
809 }
810
b5faba21
TG
811 /*
812 * Now check again, whether the thread should run. Otherwise
813 * we would clear the threads_oneshot bit of this thread which
814 * was just set.
815 */
f3f79e38 816 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
817 goto out_unlock;
818
819 desc->threads_oneshot &= ~action->thread_mask;
820
32f4125e
TG
821 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
822 irqd_irq_masked(&desc->irq_data))
328a4978 823 unmask_threaded_irq(desc);
32f4125e 824
b5faba21 825out_unlock:
239007b8 826 raw_spin_unlock_irq(&desc->lock);
3876ec9e 827 chip_bus_sync_unlock(desc);
b25c340c
TG
828}
829
61f38261 830#ifdef CONFIG_SMP
591d2fb0 831/*
b04c644e 832 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
833 */
834static void
835irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
836{
837 cpumask_var_t mask;
04aa530e 838 bool valid = true;
591d2fb0
TG
839
840 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
841 return;
842
843 /*
844 * In case we are out of memory we set IRQTF_AFFINITY again and
845 * try again next time
846 */
847 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
848 set_bit(IRQTF_AFFINITY, &action->thread_flags);
849 return;
850 }
851
239007b8 852 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
853 /*
854 * This code is triggered unconditionally. Check the affinity
855 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
856 */
d170fe7d 857 if (cpumask_available(desc->irq_common_data.affinity))
9df872fa 858 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
859 else
860 valid = false;
239007b8 861 raw_spin_unlock_irq(&desc->lock);
591d2fb0 862
04aa530e
TG
863 if (valid)
864 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
865 free_cpumask_var(mask);
866}
61f38261
BP
867#else
868static inline void
869irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
870#endif
591d2fb0 871
8d32a307
TG
872/*
873 * Interrupts which are not explicitely requested as threaded
874 * interrupts rely on the implicit bh/preempt disable of the hard irq
875 * context. So we need to disable bh here to avoid deadlocks and other
876 * side effects.
877 */
3a43e05f 878static irqreturn_t
8d32a307
TG
879irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
880{
3a43e05f
SAS
881 irqreturn_t ret;
882
8d32a307 883 local_bh_disable();
3a43e05f 884 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 885 irq_finalize_oneshot(desc, action);
8d32a307 886 local_bh_enable();
3a43e05f 887 return ret;
8d32a307
TG
888}
889
890/*
f788e7bf 891 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
892 * preemtible - many of them need to sleep and wait for slow busses to
893 * complete.
894 */
3a43e05f
SAS
895static irqreturn_t irq_thread_fn(struct irq_desc *desc,
896 struct irqaction *action)
8d32a307 897{
3a43e05f
SAS
898 irqreturn_t ret;
899
900 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 901 irq_finalize_oneshot(desc, action);
3a43e05f 902 return ret;
8d32a307
TG
903}
904
7140ea19
IY
905static void wake_threads_waitq(struct irq_desc *desc)
906{
c685689f 907 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
908 wake_up(&desc->wait_for_threads);
909}
910
67d12145 911static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
912{
913 struct task_struct *tsk = current;
914 struct irq_desc *desc;
915 struct irqaction *action;
916
917 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
918 return;
919
920 action = kthread_data(tsk);
921
fb21affa 922 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 923 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
924
925
926 desc = irq_to_desc(action->irq);
927 /*
928 * If IRQTF_RUNTHREAD is set, we need to decrement
929 * desc->threads_active and wake possible waiters.
930 */
931 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
932 wake_threads_waitq(desc);
933
934 /* Prevent a stale desc->threads_oneshot */
935 irq_finalize_oneshot(desc, action);
936}
937
2a1d3ab8
TG
938static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
939{
940 struct irqaction *secondary = action->secondary;
941
942 if (WARN_ON_ONCE(!secondary))
943 return;
944
945 raw_spin_lock_irq(&desc->lock);
946 __irq_wake_thread(desc, secondary);
947 raw_spin_unlock_irq(&desc->lock);
948}
949
3aa551c9
TG
950/*
951 * Interrupt handler thread
952 */
953static int irq_thread(void *data)
954{
67d12145 955 struct callback_head on_exit_work;
3aa551c9
TG
956 struct irqaction *action = data;
957 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
958 irqreturn_t (*handler_fn)(struct irq_desc *desc,
959 struct irqaction *action);
3aa551c9 960
540b60e2 961 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
962 &action->thread_flags))
963 handler_fn = irq_forced_thread_fn;
964 else
965 handler_fn = irq_thread_fn;
966
41f9d29f 967 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 968 task_work_add(current, &on_exit_work, false);
3aa551c9 969
f3de44ed
SM
970 irq_thread_check_affinity(desc, action);
971
3aa551c9 972 while (!irq_wait_for_interrupt(action)) {
7140ea19 973 irqreturn_t action_ret;
3aa551c9 974
591d2fb0
TG
975 irq_thread_check_affinity(desc, action);
976
7140ea19 977 action_ret = handler_fn(desc, action);
1e77d0a1
TG
978 if (action_ret == IRQ_HANDLED)
979 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
980 if (action_ret == IRQ_WAKE_THREAD)
981 irq_wake_secondary(desc, action);
3aa551c9 982
7140ea19 983 wake_threads_waitq(desc);
3aa551c9
TG
984 }
985
7140ea19
IY
986 /*
987 * This is the regular exit path. __free_irq() is stopping the
988 * thread via kthread_stop() after calling
989 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
990 * oneshot mask bit can be set. We cannot verify that as we
991 * cannot touch the oneshot mask at this point anymore as
992 * __setup_irq() might have given out currents thread_mask
993 * again.
3aa551c9 994 */
4d1d61a6 995 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
996 return 0;
997}
998
a92444c6
TG
999/**
1000 * irq_wake_thread - wake the irq thread for the action identified by dev_id
1001 * @irq: Interrupt line
1002 * @dev_id: Device identity for which the thread should be woken
1003 *
1004 */
1005void irq_wake_thread(unsigned int irq, void *dev_id)
1006{
1007 struct irq_desc *desc = irq_to_desc(irq);
1008 struct irqaction *action;
1009 unsigned long flags;
1010
1011 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1012 return;
1013
1014 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 1015 for_each_action_of_desc(desc, action) {
a92444c6
TG
1016 if (action->dev_id == dev_id) {
1017 if (action->thread)
1018 __irq_wake_thread(desc, action);
1019 break;
1020 }
1021 }
1022 raw_spin_unlock_irqrestore(&desc->lock, flags);
1023}
1024EXPORT_SYMBOL_GPL(irq_wake_thread);
1025
2a1d3ab8 1026static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1027{
1028 if (!force_irqthreads)
2a1d3ab8 1029 return 0;
8d32a307 1030 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1031 return 0;
8d32a307
TG
1032
1033 new->flags |= IRQF_ONESHOT;
1034
2a1d3ab8
TG
1035 /*
1036 * Handle the case where we have a real primary handler and a
1037 * thread handler. We force thread them as well by creating a
1038 * secondary action.
1039 */
1040 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1041 /* Allocate the secondary action */
1042 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1043 if (!new->secondary)
1044 return -ENOMEM;
1045 new->secondary->handler = irq_forced_secondary_handler;
1046 new->secondary->thread_fn = new->thread_fn;
1047 new->secondary->dev_id = new->dev_id;
1048 new->secondary->irq = new->irq;
1049 new->secondary->name = new->name;
8d32a307 1050 }
2a1d3ab8
TG
1051 /* Deal with the primary handler */
1052 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1053 new->thread_fn = new->handler;
1054 new->handler = irq_default_primary_handler;
1055 return 0;
8d32a307
TG
1056}
1057
c1bacbae
TG
1058static int irq_request_resources(struct irq_desc *desc)
1059{
1060 struct irq_data *d = &desc->irq_data;
1061 struct irq_chip *c = d->chip;
1062
1063 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1064}
1065
1066static void irq_release_resources(struct irq_desc *desc)
1067{
1068 struct irq_data *d = &desc->irq_data;
1069 struct irq_chip *c = d->chip;
1070
1071 if (c->irq_release_resources)
1072 c->irq_release_resources(d);
1073}
1074
2a1d3ab8
TG
1075static int
1076setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1077{
1078 struct task_struct *t;
1079 struct sched_param param = {
1080 .sched_priority = MAX_USER_RT_PRIO/2,
1081 };
1082
1083 if (!secondary) {
1084 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1085 new->name);
1086 } else {
1087 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1088 new->name);
1089 param.sched_priority -= 1;
1090 }
1091
1092 if (IS_ERR(t))
1093 return PTR_ERR(t);
1094
1095 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1096
1097 /*
1098 * We keep the reference to the task struct even if
1099 * the thread dies to avoid that the interrupt code
1100 * references an already freed task_struct.
1101 */
1102 get_task_struct(t);
1103 new->thread = t;
1104 /*
1105 * Tell the thread to set its affinity. This is
1106 * important for shared interrupt handlers as we do
1107 * not invoke setup_affinity() for the secondary
1108 * handlers as everything is already set up. Even for
1109 * interrupts marked with IRQF_NO_BALANCE this is
1110 * correct as we want the thread to move to the cpu(s)
1111 * on which the requesting code placed the interrupt.
1112 */
1113 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1114 return 0;
1115}
1116
1da177e4
LT
1117/*
1118 * Internal function to register an irqaction - typically used to
1119 * allocate special interrupts that are part of the architecture.
19d39a38
TG
1120 *
1121 * Locking rules:
1122 *
1123 * desc->request_mutex Provides serialization against a concurrent free_irq()
1124 * chip_bus_lock Provides serialization for slow bus operations
1125 * desc->lock Provides serialization against hard interrupts
1126 *
1127 * chip_bus_lock and desc->lock are sufficient for all other management and
1128 * interrupt related functions. desc->request_mutex solely serializes
1129 * request/free_irq().
1da177e4 1130 */
d3c60047 1131static int
327ec569 1132__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1133{
f17c7545 1134 struct irqaction *old, **old_ptr;
b5faba21 1135 unsigned long flags, thread_mask = 0;
3b8249e7 1136 int ret, nested, shared = 0;
1da177e4 1137
7d94f7ca 1138 if (!desc)
c2b5a251
MW
1139 return -EINVAL;
1140
6b8ff312 1141 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1142 return -ENOSYS;
b6873807
SAS
1143 if (!try_module_get(desc->owner))
1144 return -ENODEV;
1da177e4 1145
2a1d3ab8
TG
1146 new->irq = irq;
1147
4b357dae
JH
1148 /*
1149 * If the trigger type is not specified by the caller,
1150 * then use the default for this interrupt.
1151 */
1152 if (!(new->flags & IRQF_TRIGGER_MASK))
1153 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1154
3aa551c9 1155 /*
399b5da2
TG
1156 * Check whether the interrupt nests into another interrupt
1157 * thread.
1158 */
1ccb4e61 1159 nested = irq_settings_is_nested_thread(desc);
399b5da2 1160 if (nested) {
b6873807
SAS
1161 if (!new->thread_fn) {
1162 ret = -EINVAL;
1163 goto out_mput;
1164 }
399b5da2
TG
1165 /*
1166 * Replace the primary handler which was provided from
1167 * the driver for non nested interrupt handling by the
1168 * dummy function which warns when called.
1169 */
1170 new->handler = irq_nested_primary_handler;
8d32a307 1171 } else {
2a1d3ab8
TG
1172 if (irq_settings_can_thread(desc)) {
1173 ret = irq_setup_forced_threading(new);
1174 if (ret)
1175 goto out_mput;
1176 }
399b5da2
TG
1177 }
1178
3aa551c9 1179 /*
399b5da2
TG
1180 * Create a handler thread when a thread function is supplied
1181 * and the interrupt does not nest into another interrupt
1182 * thread.
3aa551c9 1183 */
399b5da2 1184 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1185 ret = setup_irq_thread(new, irq, false);
1186 if (ret)
b6873807 1187 goto out_mput;
2a1d3ab8
TG
1188 if (new->secondary) {
1189 ret = setup_irq_thread(new->secondary, irq, true);
1190 if (ret)
1191 goto out_thread;
b6873807 1192 }
3aa551c9
TG
1193 }
1194
dc9b229a
TG
1195 /*
1196 * Drivers are often written to work w/o knowledge about the
1197 * underlying irq chip implementation, so a request for a
1198 * threaded irq without a primary hard irq context handler
1199 * requires the ONESHOT flag to be set. Some irq chips like
1200 * MSI based interrupts are per se one shot safe. Check the
1201 * chip flags, so we can avoid the unmask dance at the end of
1202 * the threaded handler for those.
1203 */
1204 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1205 new->flags &= ~IRQF_ONESHOT;
1206
19d39a38
TG
1207 /*
1208 * Protects against a concurrent __free_irq() call which might wait
1209 * for synchronize_irq() to complete without holding the optional
1210 * chip bus lock and desc->lock.
1211 */
9114014c 1212 mutex_lock(&desc->request_mutex);
19d39a38
TG
1213
1214 /*
1215 * Acquire bus lock as the irq_request_resources() callback below
1216 * might rely on the serialization or the magic power management
1217 * functions which are abusing the irq_bus_lock() callback,
1218 */
1219 chip_bus_lock(desc);
1220
1221 /* First installed action requests resources. */
46e48e25
TG
1222 if (!desc->action) {
1223 ret = irq_request_resources(desc);
1224 if (ret) {
1225 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1226 new->name, irq, desc->irq_data.chip->name);
19d39a38 1227 goto out_bus_unlock;
46e48e25
TG
1228 }
1229 }
9114014c 1230
1da177e4
LT
1231 /*
1232 * The following block of code has to be executed atomically
19d39a38
TG
1233 * protected against a concurrent interrupt and any of the other
1234 * management calls which are not serialized via
1235 * desc->request_mutex or the optional bus lock.
1da177e4 1236 */
239007b8 1237 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1238 old_ptr = &desc->action;
1239 old = *old_ptr;
06fcb0c6 1240 if (old) {
e76de9f8
TG
1241 /*
1242 * Can't share interrupts unless both agree to and are
1243 * the same type (level, edge, polarity). So both flag
3cca53b0 1244 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1245 * set the trigger type must match. Also all must
1246 * agree on ONESHOT.
e76de9f8 1247 */
382bd4de
HG
1248 unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
1249
3cca53b0 1250 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1251 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1252 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1253 goto mismatch;
1254
f5163427 1255 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1256 if ((old->flags & IRQF_PERCPU) !=
1257 (new->flags & IRQF_PERCPU))
f5163427 1258 goto mismatch;
1da177e4
LT
1259
1260 /* add new interrupt at end of irq queue */
1261 do {
52abb700
TG
1262 /*
1263 * Or all existing action->thread_mask bits,
1264 * so we can find the next zero bit for this
1265 * new action.
1266 */
b5faba21 1267 thread_mask |= old->thread_mask;
f17c7545
IM
1268 old_ptr = &old->next;
1269 old = *old_ptr;
1da177e4
LT
1270 } while (old);
1271 shared = 1;
1272 }
1273
b5faba21 1274 /*
52abb700
TG
1275 * Setup the thread mask for this irqaction for ONESHOT. For
1276 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1277 * conditional in irq_wake_thread().
b5faba21 1278 */
52abb700
TG
1279 if (new->flags & IRQF_ONESHOT) {
1280 /*
1281 * Unlikely to have 32 resp 64 irqs sharing one line,
1282 * but who knows.
1283 */
1284 if (thread_mask == ~0UL) {
1285 ret = -EBUSY;
cba4235e 1286 goto out_unlock;
52abb700
TG
1287 }
1288 /*
1289 * The thread_mask for the action is or'ed to
1290 * desc->thread_active to indicate that the
1291 * IRQF_ONESHOT thread handler has been woken, but not
1292 * yet finished. The bit is cleared when a thread
1293 * completes. When all threads of a shared interrupt
1294 * line have completed desc->threads_active becomes
1295 * zero and the interrupt line is unmasked. See
1296 * handle.c:irq_wake_thread() for further information.
1297 *
1298 * If no thread is woken by primary (hard irq context)
1299 * interrupt handlers, then desc->threads_active is
1300 * also checked for zero to unmask the irq line in the
1301 * affected hard irq flow handlers
1302 * (handle_[fasteoi|level]_irq).
1303 *
1304 * The new action gets the first zero bit of
1305 * thread_mask assigned. See the loop above which or's
1306 * all existing action->thread_mask bits.
1307 */
1308 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1309
dc9b229a
TG
1310 } else if (new->handler == irq_default_primary_handler &&
1311 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1312 /*
1313 * The interrupt was requested with handler = NULL, so
1314 * we use the default primary handler for it. But it
1315 * does not have the oneshot flag set. In combination
1316 * with level interrupts this is deadly, because the
1317 * default primary handler just wakes the thread, then
1318 * the irq lines is reenabled, but the device still
1319 * has the level irq asserted. Rinse and repeat....
1320 *
1321 * While this works for edge type interrupts, we play
1322 * it safe and reject unconditionally because we can't
1323 * say for sure which type this interrupt really
1324 * has. The type flags are unreliable as the
1325 * underlying chip implementation can override them.
1326 */
97fd75b7 1327 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1328 irq);
1329 ret = -EINVAL;
cba4235e 1330 goto out_unlock;
b5faba21 1331 }
b5faba21 1332
1da177e4 1333 if (!shared) {
3aa551c9
TG
1334 init_waitqueue_head(&desc->wait_for_threads);
1335
e76de9f8 1336 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1337 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1338 ret = __irq_set_trigger(desc,
1339 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1340
19d39a38 1341 if (ret)
cba4235e 1342 goto out_unlock;
091738a2 1343 }
6a6de9ef 1344
009b4c3b 1345 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1346 IRQS_ONESHOT | IRQS_WAITING);
1347 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1348
a005677b
TG
1349 if (new->flags & IRQF_PERCPU) {
1350 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1351 irq_settings_set_per_cpu(desc);
1352 }
6a58fb3b 1353
b25c340c 1354 if (new->flags & IRQF_ONESHOT)
3d67baec 1355 desc->istate |= IRQS_ONESHOT;
b25c340c 1356
2e051552
TG
1357 /* Exclude IRQ from balancing if requested */
1358 if (new->flags & IRQF_NOBALANCING) {
1359 irq_settings_set_no_balancing(desc);
1360 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1361 }
1362
04c848d3 1363 if (irq_settings_can_autoenable(desc)) {
4cde9c6b 1364 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
04c848d3
TG
1365 } else {
1366 /*
1367 * Shared interrupts do not go well with disabling
1368 * auto enable. The sharing interrupt might request
1369 * it while it's still disabled and then wait for
1370 * interrupts forever.
1371 */
1372 WARN_ON_ONCE(new->flags & IRQF_SHARED);
e76de9f8
TG
1373 /* Undo nested disables: */
1374 desc->depth = 1;
04c848d3 1375 }
18404756 1376
876dbd4c
TG
1377 } else if (new->flags & IRQF_TRIGGER_MASK) {
1378 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1379 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1380
1381 if (nmsk != omsk)
1382 /* hope the handler works with current trigger mode */
a395d6a7 1383 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1384 irq, omsk, nmsk);
1da177e4 1385 }
82736f4d 1386
f17c7545 1387 *old_ptr = new;
82736f4d 1388
cab303be
TG
1389 irq_pm_install_action(desc, new);
1390
8528b0f1
LT
1391 /* Reset broken irq detection when installing new handler */
1392 desc->irq_count = 0;
1393 desc->irqs_unhandled = 0;
1adb0850
TG
1394
1395 /*
1396 * Check whether we disabled the irq via the spurious handler
1397 * before. Reenable it and give it another chance.
1398 */
7acdd53e
TG
1399 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1400 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1401 __enable_irq(desc);
1adb0850
TG
1402 }
1403
239007b8 1404 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a90795e 1405 chip_bus_sync_unlock(desc);
9114014c 1406 mutex_unlock(&desc->request_mutex);
1da177e4 1407
b2d3d61a
DL
1408 irq_setup_timings(desc, new);
1409
69ab8494
TG
1410 /*
1411 * Strictly no need to wake it up, but hung_task complains
1412 * when no hard interrupt wakes the thread up.
1413 */
1414 if (new->thread)
1415 wake_up_process(new->thread);
2a1d3ab8
TG
1416 if (new->secondary)
1417 wake_up_process(new->secondary->thread);
69ab8494 1418
2c6927a3 1419 register_irq_proc(irq, desc);
087cdfb6 1420 irq_add_debugfs_entry(irq, desc);
1da177e4
LT
1421 new->dir = NULL;
1422 register_handler_proc(irq, new);
1da177e4 1423 return 0;
f5163427
DS
1424
1425mismatch:
3cca53b0 1426 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1427 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1428 irq, new->flags, new->name, old->flags, old->name);
1429#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1430 dump_stack();
3f050447 1431#endif
f5d89470 1432 }
3aa551c9
TG
1433 ret = -EBUSY;
1434
cba4235e 1435out_unlock:
1c389795 1436 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7 1437
46e48e25
TG
1438 if (!desc->action)
1439 irq_release_resources(desc);
19d39a38
TG
1440out_bus_unlock:
1441 chip_bus_sync_unlock(desc);
9114014c
TG
1442 mutex_unlock(&desc->request_mutex);
1443
3aa551c9 1444out_thread:
3aa551c9
TG
1445 if (new->thread) {
1446 struct task_struct *t = new->thread;
1447
1448 new->thread = NULL;
05d74efa 1449 kthread_stop(t);
3aa551c9
TG
1450 put_task_struct(t);
1451 }
2a1d3ab8
TG
1452 if (new->secondary && new->secondary->thread) {
1453 struct task_struct *t = new->secondary->thread;
1454
1455 new->secondary->thread = NULL;
1456 kthread_stop(t);
1457 put_task_struct(t);
1458 }
b6873807
SAS
1459out_mput:
1460 module_put(desc->owner);
3aa551c9 1461 return ret;
1da177e4
LT
1462}
1463
d3c60047
TG
1464/**
1465 * setup_irq - setup an interrupt
1466 * @irq: Interrupt line to setup
1467 * @act: irqaction for the interrupt
1468 *
1469 * Used to statically setup interrupts in the early boot process.
1470 */
1471int setup_irq(unsigned int irq, struct irqaction *act)
1472{
986c011d 1473 int retval;
d3c60047
TG
1474 struct irq_desc *desc = irq_to_desc(irq);
1475
9b5d585d 1476 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1477 return -EINVAL;
be45beb2
JH
1478
1479 retval = irq_chip_pm_get(&desc->irq_data);
1480 if (retval < 0)
1481 return retval;
1482
986c011d 1483 retval = __setup_irq(irq, desc, act);
986c011d 1484
be45beb2
JH
1485 if (retval)
1486 irq_chip_pm_put(&desc->irq_data);
1487
986c011d 1488 return retval;
d3c60047 1489}
eb53b4e8 1490EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1491
31d9d9b6 1492/*
cbf94f06
MD
1493 * Internal function to unregister an irqaction - used to free
1494 * regular and special interrupts that are part of the architecture.
1da177e4 1495 */
cbf94f06 1496static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1497{
d3c60047 1498 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1499 struct irqaction *action, **action_ptr;
1da177e4
LT
1500 unsigned long flags;
1501
ae88a23b 1502 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1503
7d94f7ca 1504 if (!desc)
f21cfb25 1505 return NULL;
1da177e4 1506
9114014c 1507 mutex_lock(&desc->request_mutex);
abc7e40c 1508 chip_bus_lock(desc);
239007b8 1509 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1510
1511 /*
1512 * There can be multiple actions per IRQ descriptor, find the right
1513 * one based on the dev_id:
1514 */
f17c7545 1515 action_ptr = &desc->action;
1da177e4 1516 for (;;) {
f17c7545 1517 action = *action_ptr;
1da177e4 1518
ae88a23b
IM
1519 if (!action) {
1520 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1521 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1522 chip_bus_sync_unlock(desc);
19d39a38 1523 mutex_unlock(&desc->request_mutex);
f21cfb25 1524 return NULL;
ae88a23b 1525 }
1da177e4 1526
8316e381
IM
1527 if (action->dev_id == dev_id)
1528 break;
f17c7545 1529 action_ptr = &action->next;
ae88a23b 1530 }
dbce706e 1531
ae88a23b 1532 /* Found it - now remove it from the list of entries: */
f17c7545 1533 *action_ptr = action->next;
ae88a23b 1534
cab303be
TG
1535 irq_pm_remove_action(desc, action);
1536
ae88a23b 1537 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1538 if (!desc->action) {
e9849777 1539 irq_settings_clr_disable_unlazy(desc);
46999238 1540 irq_shutdown(desc);
c1bacbae 1541 }
3aa551c9 1542
e7a297b0
PWJ
1543#ifdef CONFIG_SMP
1544 /* make sure affinity_hint is cleaned up */
1545 if (WARN_ON_ONCE(desc->affinity_hint))
1546 desc->affinity_hint = NULL;
1547#endif
1548
239007b8 1549 raw_spin_unlock_irqrestore(&desc->lock, flags);
19d39a38
TG
1550 /*
1551 * Drop bus_lock here so the changes which were done in the chip
1552 * callbacks above are synced out to the irq chips which hang
1553 * behind a slow bus (I2C, SPI) before calling synchronize_irq().
1554 *
1555 * Aside of that the bus_lock can also be taken from the threaded
1556 * handler in irq_finalize_oneshot() which results in a deadlock
1557 * because synchronize_irq() would wait forever for the thread to
1558 * complete, which is blocked on the bus lock.
1559 *
1560 * The still held desc->request_mutex() protects against a
1561 * concurrent request_irq() of this irq so the release of resources
1562 * and timing data is properly serialized.
1563 */
abc7e40c 1564 chip_bus_sync_unlock(desc);
ae88a23b
IM
1565
1566 unregister_handler_proc(irq, action);
1567
1568 /* Make sure it's not being used on another CPU: */
1569 synchronize_irq(irq);
1da177e4 1570
70edcd77 1571#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1572 /*
1573 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1574 * event to happen even now it's being freed, so let's make sure that
1575 * is so by doing an extra call to the handler ....
1576 *
1577 * ( We do this after actually deregistering it, to make sure that a
1578 * 'real' IRQ doesn't run in * parallel with our fake. )
1579 */
1580 if (action->flags & IRQF_SHARED) {
1581 local_irq_save(flags);
1582 action->handler(irq, dev_id);
1583 local_irq_restore(flags);
1da177e4 1584 }
ae88a23b 1585#endif
2d860ad7
LT
1586
1587 if (action->thread) {
05d74efa 1588 kthread_stop(action->thread);
2d860ad7 1589 put_task_struct(action->thread);
2a1d3ab8
TG
1590 if (action->secondary && action->secondary->thread) {
1591 kthread_stop(action->secondary->thread);
1592 put_task_struct(action->secondary->thread);
1593 }
2d860ad7
LT
1594 }
1595
19d39a38 1596 /* Last action releases resources */
2343877f 1597 if (!desc->action) {
19d39a38
TG
1598 /*
1599 * Reaquire bus lock as irq_release_resources() might
1600 * require it to deallocate resources over the slow bus.
1601 */
1602 chip_bus_lock(desc);
46e48e25 1603 irq_release_resources(desc);
19d39a38 1604 chip_bus_sync_unlock(desc);
2343877f
TG
1605 irq_remove_timings(desc);
1606 }
46e48e25 1607
9114014c
TG
1608 mutex_unlock(&desc->request_mutex);
1609
be45beb2 1610 irq_chip_pm_put(&desc->irq_data);
b6873807 1611 module_put(desc->owner);
2a1d3ab8 1612 kfree(action->secondary);
f21cfb25
MD
1613 return action;
1614}
1615
cbf94f06
MD
1616/**
1617 * remove_irq - free an interrupt
1618 * @irq: Interrupt line to free
1619 * @act: irqaction for the interrupt
1620 *
1621 * Used to remove interrupts statically setup by the early boot process.
1622 */
1623void remove_irq(unsigned int irq, struct irqaction *act)
1624{
31d9d9b6
MZ
1625 struct irq_desc *desc = irq_to_desc(irq);
1626
1627 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
a7e60e55 1628 __free_irq(irq, act->dev_id);
cbf94f06 1629}
eb53b4e8 1630EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1631
f21cfb25
MD
1632/**
1633 * free_irq - free an interrupt allocated with request_irq
1634 * @irq: Interrupt line to free
1635 * @dev_id: Device identity to free
1636 *
1637 * Remove an interrupt handler. The handler is removed and if the
1638 * interrupt line is no longer in use by any driver it is disabled.
1639 * On a shared IRQ the caller must ensure the interrupt is disabled
1640 * on the card it drives before calling this function. The function
1641 * does not return until any executing interrupts for this IRQ
1642 * have completed.
1643 *
1644 * This function must not be called from interrupt context.
25ce4be7
CH
1645 *
1646 * Returns the devname argument passed to request_irq.
f21cfb25 1647 */
25ce4be7 1648const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1649{
70aedd24 1650 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1651 struct irqaction *action;
1652 const char *devname;
70aedd24 1653
31d9d9b6 1654 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1655 return NULL;
70aedd24 1656
cd7eab44
BH
1657#ifdef CONFIG_SMP
1658 if (WARN_ON(desc->affinity_notify))
1659 desc->affinity_notify = NULL;
1660#endif
1661
25ce4be7 1662 action = __free_irq(irq, dev_id);
2827a418
AM
1663
1664 if (!action)
1665 return NULL;
1666
25ce4be7
CH
1667 devname = action->name;
1668 kfree(action);
1669 return devname;
1da177e4 1670}
1da177e4
LT
1671EXPORT_SYMBOL(free_irq);
1672
1673/**
3aa551c9 1674 * request_threaded_irq - allocate an interrupt line
1da177e4 1675 * @irq: Interrupt line to allocate
3aa551c9
TG
1676 * @handler: Function to be called when the IRQ occurs.
1677 * Primary handler for threaded interrupts
b25c340c
TG
1678 * If NULL and thread_fn != NULL the default
1679 * primary handler is installed
f48fe81e
TG
1680 * @thread_fn: Function called from the irq handler thread
1681 * If NULL, no irq thread is created
1da177e4
LT
1682 * @irqflags: Interrupt type flags
1683 * @devname: An ascii name for the claiming device
1684 * @dev_id: A cookie passed back to the handler function
1685 *
1686 * This call allocates interrupt resources and enables the
1687 * interrupt line and IRQ handling. From the point this
1688 * call is made your handler function may be invoked. Since
1689 * your handler function must clear any interrupt the board
1690 * raises, you must take care both to initialise your hardware
1691 * and to set up the interrupt handler in the right order.
1692 *
3aa551c9 1693 * If you want to set up a threaded irq handler for your device
6d21af4f 1694 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1695 * still called in hard interrupt context and has to check
1696 * whether the interrupt originates from the device. If yes it
1697 * needs to disable the interrupt on the device and return
39a2eddb 1698 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1699 * @thread_fn. This split handler design is necessary to support
1700 * shared interrupts.
1701 *
1da177e4
LT
1702 * Dev_id must be globally unique. Normally the address of the
1703 * device data structure is used as the cookie. Since the handler
1704 * receives this value it makes sense to use it.
1705 *
1706 * If your interrupt is shared you must pass a non NULL dev_id
1707 * as this is required when freeing the interrupt.
1708 *
1709 * Flags:
1710 *
3cca53b0 1711 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1712 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1713 *
1714 */
3aa551c9
TG
1715int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1716 irq_handler_t thread_fn, unsigned long irqflags,
1717 const char *devname, void *dev_id)
1da177e4 1718{
06fcb0c6 1719 struct irqaction *action;
08678b08 1720 struct irq_desc *desc;
d3c60047 1721 int retval;
1da177e4 1722
e237a551
CF
1723 if (irq == IRQ_NOTCONNECTED)
1724 return -ENOTCONN;
1725
1da177e4
LT
1726 /*
1727 * Sanity-check: shared interrupts must pass in a real dev-ID,
1728 * otherwise we'll have trouble later trying to figure out
1729 * which interrupt is which (messes up the interrupt freeing
1730 * logic etc).
17f48034
RW
1731 *
1732 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1733 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1734 */
17f48034
RW
1735 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1736 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1737 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1738 return -EINVAL;
7d94f7ca 1739
cb5bc832 1740 desc = irq_to_desc(irq);
7d94f7ca 1741 if (!desc)
1da177e4 1742 return -EINVAL;
7d94f7ca 1743
31d9d9b6
MZ
1744 if (!irq_settings_can_request(desc) ||
1745 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1746 return -EINVAL;
b25c340c
TG
1747
1748 if (!handler) {
1749 if (!thread_fn)
1750 return -EINVAL;
1751 handler = irq_default_primary_handler;
1752 }
1da177e4 1753
45535732 1754 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1755 if (!action)
1756 return -ENOMEM;
1757
1758 action->handler = handler;
3aa551c9 1759 action->thread_fn = thread_fn;
1da177e4 1760 action->flags = irqflags;
1da177e4 1761 action->name = devname;
1da177e4
LT
1762 action->dev_id = dev_id;
1763
be45beb2 1764 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1765 if (retval < 0) {
1766 kfree(action);
be45beb2 1767 return retval;
4396f46c 1768 }
be45beb2 1769
d3c60047 1770 retval = __setup_irq(irq, desc, action);
70aedd24 1771
2a1d3ab8 1772 if (retval) {
be45beb2 1773 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1774 kfree(action->secondary);
377bf1e4 1775 kfree(action);
2a1d3ab8 1776 }
377bf1e4 1777
6d83f94d 1778#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1779 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1780 /*
1781 * It's a shared IRQ -- the driver ought to be prepared for it
1782 * to happen immediately, so let's make sure....
377bf1e4
AV
1783 * We disable the irq to make sure that a 'real' IRQ doesn't
1784 * run in parallel with our fake.
a304e1b8 1785 */
59845b1f 1786 unsigned long flags;
a304e1b8 1787
377bf1e4 1788 disable_irq(irq);
59845b1f 1789 local_irq_save(flags);
377bf1e4 1790
59845b1f 1791 handler(irq, dev_id);
377bf1e4 1792
59845b1f 1793 local_irq_restore(flags);
377bf1e4 1794 enable_irq(irq);
a304e1b8
DW
1795 }
1796#endif
1da177e4
LT
1797 return retval;
1798}
3aa551c9 1799EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1800
1801/**
1802 * request_any_context_irq - allocate an interrupt line
1803 * @irq: Interrupt line to allocate
1804 * @handler: Function to be called when the IRQ occurs.
1805 * Threaded handler for threaded interrupts.
1806 * @flags: Interrupt type flags
1807 * @name: An ascii name for the claiming device
1808 * @dev_id: A cookie passed back to the handler function
1809 *
1810 * This call allocates interrupt resources and enables the
1811 * interrupt line and IRQ handling. It selects either a
1812 * hardirq or threaded handling method depending on the
1813 * context.
1814 *
1815 * On failure, it returns a negative value. On success,
1816 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1817 */
1818int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1819 unsigned long flags, const char *name, void *dev_id)
1820{
e237a551 1821 struct irq_desc *desc;
ae731f8d
MZ
1822 int ret;
1823
e237a551
CF
1824 if (irq == IRQ_NOTCONNECTED)
1825 return -ENOTCONN;
1826
1827 desc = irq_to_desc(irq);
ae731f8d
MZ
1828 if (!desc)
1829 return -EINVAL;
1830
1ccb4e61 1831 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1832 ret = request_threaded_irq(irq, NULL, handler,
1833 flags, name, dev_id);
1834 return !ret ? IRQC_IS_NESTED : ret;
1835 }
1836
1837 ret = request_irq(irq, handler, flags, name, dev_id);
1838 return !ret ? IRQC_IS_HARDIRQ : ret;
1839}
1840EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1841
1e7c5fd2 1842void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1843{
1844 unsigned int cpu = smp_processor_id();
1845 unsigned long flags;
1846 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1847
1848 if (!desc)
1849 return;
1850
f35ad083
MZ
1851 /*
1852 * If the trigger type is not specified by the caller, then
1853 * use the default for this interrupt.
1854 */
1e7c5fd2 1855 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1856 if (type == IRQ_TYPE_NONE)
1857 type = irqd_get_trigger_type(&desc->irq_data);
1858
1e7c5fd2
MZ
1859 if (type != IRQ_TYPE_NONE) {
1860 int ret;
1861
a1ff541a 1862 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1863
1864 if (ret) {
32cffdde 1865 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1866 goto out;
1867 }
1868 }
1869
31d9d9b6 1870 irq_percpu_enable(desc, cpu);
1e7c5fd2 1871out:
31d9d9b6
MZ
1872 irq_put_desc_unlock(desc, flags);
1873}
36a5df85 1874EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1875
f0cb3220
TP
1876/**
1877 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1878 * @irq: Linux irq number to check for
1879 *
1880 * Must be called from a non migratable context. Returns the enable
1881 * state of a per cpu interrupt on the current cpu.
1882 */
1883bool irq_percpu_is_enabled(unsigned int irq)
1884{
1885 unsigned int cpu = smp_processor_id();
1886 struct irq_desc *desc;
1887 unsigned long flags;
1888 bool is_enabled;
1889
1890 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1891 if (!desc)
1892 return false;
1893
1894 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1895 irq_put_desc_unlock(desc, flags);
1896
1897 return is_enabled;
1898}
1899EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1900
31d9d9b6
MZ
1901void disable_percpu_irq(unsigned int irq)
1902{
1903 unsigned int cpu = smp_processor_id();
1904 unsigned long flags;
1905 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1906
1907 if (!desc)
1908 return;
1909
1910 irq_percpu_disable(desc, cpu);
1911 irq_put_desc_unlock(desc, flags);
1912}
36a5df85 1913EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1914
1915/*
1916 * Internal function to unregister a percpu irqaction.
1917 */
1918static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1919{
1920 struct irq_desc *desc = irq_to_desc(irq);
1921 struct irqaction *action;
1922 unsigned long flags;
1923
1924 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1925
1926 if (!desc)
1927 return NULL;
1928
1929 raw_spin_lock_irqsave(&desc->lock, flags);
1930
1931 action = desc->action;
1932 if (!action || action->percpu_dev_id != dev_id) {
1933 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1934 goto bad;
1935 }
1936
1937 if (!cpumask_empty(desc->percpu_enabled)) {
1938 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1939 irq, cpumask_first(desc->percpu_enabled));
1940 goto bad;
1941 }
1942
1943 /* Found it - now remove it from the list of entries: */
1944 desc->action = NULL;
1945
1946 raw_spin_unlock_irqrestore(&desc->lock, flags);
1947
1948 unregister_handler_proc(irq, action);
1949
be45beb2 1950 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1951 module_put(desc->owner);
1952 return action;
1953
1954bad:
1955 raw_spin_unlock_irqrestore(&desc->lock, flags);
1956 return NULL;
1957}
1958
1959/**
1960 * remove_percpu_irq - free a per-cpu interrupt
1961 * @irq: Interrupt line to free
1962 * @act: irqaction for the interrupt
1963 *
1964 * Used to remove interrupts statically setup by the early boot process.
1965 */
1966void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1967{
1968 struct irq_desc *desc = irq_to_desc(irq);
1969
1970 if (desc && irq_settings_is_per_cpu_devid(desc))
1971 __free_percpu_irq(irq, act->percpu_dev_id);
1972}
1973
1974/**
1975 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1976 * @irq: Interrupt line to free
1977 * @dev_id: Device identity to free
1978 *
1979 * Remove a percpu interrupt handler. The handler is removed, but
1980 * the interrupt line is not disabled. This must be done on each
1981 * CPU before calling this function. The function does not return
1982 * until any executing interrupts for this IRQ have completed.
1983 *
1984 * This function must not be called from interrupt context.
1985 */
1986void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1987{
1988 struct irq_desc *desc = irq_to_desc(irq);
1989
1990 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1991 return;
1992
1993 chip_bus_lock(desc);
1994 kfree(__free_percpu_irq(irq, dev_id));
1995 chip_bus_sync_unlock(desc);
1996}
aec2e2ad 1997EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1998
1999/**
2000 * setup_percpu_irq - setup a per-cpu interrupt
2001 * @irq: Interrupt line to setup
2002 * @act: irqaction for the interrupt
2003 *
2004 * Used to statically setup per-cpu interrupts in the early boot process.
2005 */
2006int setup_percpu_irq(unsigned int irq, struct irqaction *act)
2007{
2008 struct irq_desc *desc = irq_to_desc(irq);
2009 int retval;
2010
2011 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2012 return -EINVAL;
be45beb2
JH
2013
2014 retval = irq_chip_pm_get(&desc->irq_data);
2015 if (retval < 0)
2016 return retval;
2017
31d9d9b6 2018 retval = __setup_irq(irq, desc, act);
31d9d9b6 2019
be45beb2
JH
2020 if (retval)
2021 irq_chip_pm_put(&desc->irq_data);
2022
31d9d9b6
MZ
2023 return retval;
2024}
2025
2026/**
c80081b9 2027 * __request_percpu_irq - allocate a percpu interrupt line
31d9d9b6
MZ
2028 * @irq: Interrupt line to allocate
2029 * @handler: Function to be called when the IRQ occurs.
c80081b9 2030 * @flags: Interrupt type flags (IRQF_TIMER only)
31d9d9b6
MZ
2031 * @devname: An ascii name for the claiming device
2032 * @dev_id: A percpu cookie passed back to the handler function
2033 *
a1b7febd
MR
2034 * This call allocates interrupt resources and enables the
2035 * interrupt on the local CPU. If the interrupt is supposed to be
2036 * enabled on other CPUs, it has to be done on each CPU using
2037 * enable_percpu_irq().
31d9d9b6
MZ
2038 *
2039 * Dev_id must be globally unique. It is a per-cpu variable, and
2040 * the handler gets called with the interrupted CPU's instance of
2041 * that variable.
2042 */
c80081b9
DL
2043int __request_percpu_irq(unsigned int irq, irq_handler_t handler,
2044 unsigned long flags, const char *devname,
2045 void __percpu *dev_id)
31d9d9b6
MZ
2046{
2047 struct irqaction *action;
2048 struct irq_desc *desc;
2049 int retval;
2050
2051 if (!dev_id)
2052 return -EINVAL;
2053
2054 desc = irq_to_desc(irq);
2055 if (!desc || !irq_settings_can_request(desc) ||
2056 !irq_settings_is_per_cpu_devid(desc))
2057 return -EINVAL;
2058
c80081b9
DL
2059 if (flags && flags != IRQF_TIMER)
2060 return -EINVAL;
2061
31d9d9b6
MZ
2062 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2063 if (!action)
2064 return -ENOMEM;
2065
2066 action->handler = handler;
c80081b9 2067 action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
2068 action->name = devname;
2069 action->percpu_dev_id = dev_id;
2070
be45beb2 2071 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2072 if (retval < 0) {
2073 kfree(action);
be45beb2 2074 return retval;
4396f46c 2075 }
be45beb2 2076
31d9d9b6 2077 retval = __setup_irq(irq, desc, action);
31d9d9b6 2078
be45beb2
JH
2079 if (retval) {
2080 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2081 kfree(action);
be45beb2 2082 }
31d9d9b6
MZ
2083
2084 return retval;
2085}
c80081b9 2086EXPORT_SYMBOL_GPL(__request_percpu_irq);
1b7047ed
MZ
2087
2088/**
2089 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2090 * @irq: Interrupt line that is forwarded to a VM
2091 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2092 * @state: a pointer to a boolean where the state is to be storeed
2093 *
2094 * This call snapshots the internal irqchip state of an
2095 * interrupt, returning into @state the bit corresponding to
2096 * stage @which
2097 *
2098 * This function should be called with preemption disabled if the
2099 * interrupt controller has per-cpu registers.
2100 */
2101int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2102 bool *state)
2103{
2104 struct irq_desc *desc;
2105 struct irq_data *data;
2106 struct irq_chip *chip;
2107 unsigned long flags;
2108 int err = -EINVAL;
2109
2110 desc = irq_get_desc_buslock(irq, &flags, 0);
2111 if (!desc)
2112 return err;
2113
2114 data = irq_desc_get_irq_data(desc);
2115
2116 do {
2117 chip = irq_data_get_irq_chip(data);
2118 if (chip->irq_get_irqchip_state)
2119 break;
2120#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2121 data = data->parent_data;
2122#else
2123 data = NULL;
2124#endif
2125 } while (data);
2126
2127 if (data)
2128 err = chip->irq_get_irqchip_state(data, which, state);
2129
2130 irq_put_desc_busunlock(desc, flags);
2131 return err;
2132}
1ee4fb3e 2133EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2134
2135/**
2136 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2137 * @irq: Interrupt line that is forwarded to a VM
2138 * @which: State to be restored (one of IRQCHIP_STATE_*)
2139 * @val: Value corresponding to @which
2140 *
2141 * This call sets the internal irqchip state of an interrupt,
2142 * depending on the value of @which.
2143 *
2144 * This function should be called with preemption disabled if the
2145 * interrupt controller has per-cpu registers.
2146 */
2147int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2148 bool val)
2149{
2150 struct irq_desc *desc;
2151 struct irq_data *data;
2152 struct irq_chip *chip;
2153 unsigned long flags;
2154 int err = -EINVAL;
2155
2156 desc = irq_get_desc_buslock(irq, &flags, 0);
2157 if (!desc)
2158 return err;
2159
2160 data = irq_desc_get_irq_data(desc);
2161
2162 do {
2163 chip = irq_data_get_irq_chip(data);
2164 if (chip->irq_set_irqchip_state)
2165 break;
2166#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2167 data = data->parent_data;
2168#else
2169 data = NULL;
2170#endif
2171 } while (data);
2172
2173 if (data)
2174 err = chip->irq_set_irqchip_state(data, which, val);
2175
2176 irq_put_desc_busunlock(desc, flags);
2177 return err;
2178}
1ee4fb3e 2179EXPORT_SYMBOL_GPL(irq_set_irqchip_state);