Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/random.h> | |
13 | #include <linux/interrupt.h> | |
1aeb272c | 14 | #include <linux/slab.h> |
1da177e4 LT |
15 | |
16 | #include "internals.h" | |
17 | ||
18 | #ifdef CONFIG_SMP | |
19 | ||
18404756 MK |
20 | cpumask_t irq_default_affinity = CPU_MASK_ALL; |
21 | ||
1da177e4 LT |
22 | /** |
23 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 24 | * @irq: interrupt number to wait for |
1da177e4 LT |
25 | * |
26 | * This function waits for any pending IRQ handlers for this interrupt | |
27 | * to complete before returning. If you use this function while | |
28 | * holding a resource the IRQ handler may need you will deadlock. | |
29 | * | |
30 | * This function may be called - with care - from IRQ context. | |
31 | */ | |
32 | void synchronize_irq(unsigned int irq) | |
33 | { | |
cb5bc832 | 34 | struct irq_desc *desc = irq_to_desc(irq); |
a98ce5c6 | 35 | unsigned int status; |
1da177e4 | 36 | |
7d94f7ca | 37 | if (!desc) |
c2b5a251 MW |
38 | return; |
39 | ||
a98ce5c6 HX |
40 | do { |
41 | unsigned long flags; | |
42 | ||
43 | /* | |
44 | * Wait until we're out of the critical section. This might | |
45 | * give the wrong answer due to the lack of memory barriers. | |
46 | */ | |
47 | while (desc->status & IRQ_INPROGRESS) | |
48 | cpu_relax(); | |
49 | ||
50 | /* Ok, that indicated we're done: double-check carefully. */ | |
51 | spin_lock_irqsave(&desc->lock, flags); | |
52 | status = desc->status; | |
53 | spin_unlock_irqrestore(&desc->lock, flags); | |
54 | ||
55 | /* Oops, that failed? */ | |
56 | } while (status & IRQ_INPROGRESS); | |
1da177e4 | 57 | } |
1da177e4 LT |
58 | EXPORT_SYMBOL(synchronize_irq); |
59 | ||
771ee3b0 TG |
60 | /** |
61 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
62 | * @irq: Interrupt to check | |
63 | * | |
64 | */ | |
65 | int irq_can_set_affinity(unsigned int irq) | |
66 | { | |
08678b08 | 67 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
68 | |
69 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip || | |
70 | !desc->chip->set_affinity) | |
71 | return 0; | |
72 | ||
73 | return 1; | |
74 | } | |
75 | ||
76 | /** | |
77 | * irq_set_affinity - Set the irq affinity of a given irq | |
78 | * @irq: Interrupt to set affinity | |
79 | * @cpumask: cpumask | |
80 | * | |
81 | */ | |
82 | int irq_set_affinity(unsigned int irq, cpumask_t cpumask) | |
83 | { | |
08678b08 | 84 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
85 | |
86 | if (!desc->chip->set_affinity) | |
87 | return -EINVAL; | |
88 | ||
771ee3b0 | 89 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
932775a4 | 90 | if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) { |
72b1e22d SS |
91 | unsigned long flags; |
92 | ||
93 | spin_lock_irqsave(&desc->lock, flags); | |
932775a4 | 94 | desc->affinity = cpumask; |
72b1e22d SS |
95 | desc->chip->set_affinity(irq, cpumask); |
96 | spin_unlock_irqrestore(&desc->lock, flags); | |
97 | } else | |
98 | set_pending_irq(irq, cpumask); | |
771ee3b0 TG |
99 | #else |
100 | desc->affinity = cpumask; | |
101 | desc->chip->set_affinity(irq, cpumask); | |
102 | #endif | |
103 | return 0; | |
104 | } | |
105 | ||
18404756 MK |
106 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
107 | /* | |
108 | * Generic version of the affinity autoselector. | |
109 | */ | |
110 | int irq_select_affinity(unsigned int irq) | |
111 | { | |
112 | cpumask_t mask; | |
08678b08 | 113 | struct irq_desc *desc; |
18404756 MK |
114 | |
115 | if (!irq_can_set_affinity(irq)) | |
116 | return 0; | |
117 | ||
118 | cpus_and(mask, cpu_online_map, irq_default_affinity); | |
119 | ||
08678b08 YL |
120 | desc = irq_to_desc(irq); |
121 | desc->affinity = mask; | |
122 | desc->chip->set_affinity(irq, mask); | |
18404756 | 123 | |
18404756 MK |
124 | return 0; |
125 | } | |
126 | #endif | |
127 | ||
1da177e4 LT |
128 | #endif |
129 | ||
130 | /** | |
131 | * disable_irq_nosync - disable an irq without waiting | |
132 | * @irq: Interrupt to disable | |
133 | * | |
134 | * Disable the selected interrupt line. Disables and Enables are | |
135 | * nested. | |
136 | * Unlike disable_irq(), this function does not ensure existing | |
137 | * instances of the IRQ handler have completed before returning. | |
138 | * | |
139 | * This function may be called from IRQ context. | |
140 | */ | |
141 | void disable_irq_nosync(unsigned int irq) | |
142 | { | |
d3c60047 | 143 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
144 | unsigned long flags; |
145 | ||
7d94f7ca | 146 | if (!desc) |
c2b5a251 MW |
147 | return; |
148 | ||
1da177e4 LT |
149 | spin_lock_irqsave(&desc->lock, flags); |
150 | if (!desc->depth++) { | |
151 | desc->status |= IRQ_DISABLED; | |
d1bef4ed | 152 | desc->chip->disable(irq); |
1da177e4 LT |
153 | } |
154 | spin_unlock_irqrestore(&desc->lock, flags); | |
155 | } | |
1da177e4 LT |
156 | EXPORT_SYMBOL(disable_irq_nosync); |
157 | ||
158 | /** | |
159 | * disable_irq - disable an irq and wait for completion | |
160 | * @irq: Interrupt to disable | |
161 | * | |
162 | * Disable the selected interrupt line. Enables and Disables are | |
163 | * nested. | |
164 | * This function waits for any pending IRQ handlers for this interrupt | |
165 | * to complete before returning. If you use this function while | |
166 | * holding a resource the IRQ handler may need you will deadlock. | |
167 | * | |
168 | * This function may be called - with care - from IRQ context. | |
169 | */ | |
170 | void disable_irq(unsigned int irq) | |
171 | { | |
d3c60047 | 172 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 173 | |
7d94f7ca | 174 | if (!desc) |
c2b5a251 MW |
175 | return; |
176 | ||
1da177e4 LT |
177 | disable_irq_nosync(irq); |
178 | if (desc->action) | |
179 | synchronize_irq(irq); | |
180 | } | |
1da177e4 LT |
181 | EXPORT_SYMBOL(disable_irq); |
182 | ||
1adb0850 TG |
183 | static void __enable_irq(struct irq_desc *desc, unsigned int irq) |
184 | { | |
185 | switch (desc->depth) { | |
186 | case 0: | |
b8c512f6 | 187 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
188 | break; |
189 | case 1: { | |
190 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
191 | ||
192 | /* Prevent probing on this irq: */ | |
193 | desc->status = status | IRQ_NOPROBE; | |
194 | check_irq_resend(desc, irq); | |
195 | /* fall-through */ | |
196 | } | |
197 | default: | |
198 | desc->depth--; | |
199 | } | |
200 | } | |
201 | ||
1da177e4 LT |
202 | /** |
203 | * enable_irq - enable handling of an irq | |
204 | * @irq: Interrupt to enable | |
205 | * | |
206 | * Undoes the effect of one call to disable_irq(). If this | |
207 | * matches the last disable, processing of interrupts on this | |
208 | * IRQ line is re-enabled. | |
209 | * | |
210 | * This function may be called from IRQ context. | |
211 | */ | |
212 | void enable_irq(unsigned int irq) | |
213 | { | |
d3c60047 | 214 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
215 | unsigned long flags; |
216 | ||
7d94f7ca | 217 | if (!desc) |
c2b5a251 MW |
218 | return; |
219 | ||
1da177e4 | 220 | spin_lock_irqsave(&desc->lock, flags); |
1adb0850 | 221 | __enable_irq(desc, irq); |
1da177e4 LT |
222 | spin_unlock_irqrestore(&desc->lock, flags); |
223 | } | |
1da177e4 LT |
224 | EXPORT_SYMBOL(enable_irq); |
225 | ||
0c5d1eb7 | 226 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 227 | { |
08678b08 | 228 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
229 | int ret = -ENXIO; |
230 | ||
231 | if (desc->chip->set_wake) | |
232 | ret = desc->chip->set_wake(irq, on); | |
233 | ||
234 | return ret; | |
235 | } | |
236 | ||
ba9a2331 TG |
237 | /** |
238 | * set_irq_wake - control irq power management wakeup | |
239 | * @irq: interrupt to control | |
240 | * @on: enable/disable power management wakeup | |
241 | * | |
15a647eb DB |
242 | * Enable/disable power management wakeup mode, which is |
243 | * disabled by default. Enables and disables must match, | |
244 | * just as they match for non-wakeup mode support. | |
245 | * | |
246 | * Wakeup mode lets this IRQ wake the system from sleep | |
247 | * states like "suspend to RAM". | |
ba9a2331 TG |
248 | */ |
249 | int set_irq_wake(unsigned int irq, unsigned int on) | |
250 | { | |
08678b08 | 251 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 252 | unsigned long flags; |
2db87321 | 253 | int ret = 0; |
ba9a2331 | 254 | |
15a647eb DB |
255 | /* wakeup-capable irqs can be shared between drivers that |
256 | * don't need to have the same sleep mode behaviors. | |
257 | */ | |
ba9a2331 | 258 | spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 259 | if (on) { |
2db87321 UKK |
260 | if (desc->wake_depth++ == 0) { |
261 | ret = set_irq_wake_real(irq, on); | |
262 | if (ret) | |
263 | desc->wake_depth = 0; | |
264 | else | |
265 | desc->status |= IRQ_WAKEUP; | |
266 | } | |
15a647eb DB |
267 | } else { |
268 | if (desc->wake_depth == 0) { | |
7a2c4770 | 269 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
270 | } else if (--desc->wake_depth == 0) { |
271 | ret = set_irq_wake_real(irq, on); | |
272 | if (ret) | |
273 | desc->wake_depth = 1; | |
274 | else | |
275 | desc->status &= ~IRQ_WAKEUP; | |
276 | } | |
15a647eb | 277 | } |
2db87321 | 278 | |
ba9a2331 TG |
279 | spin_unlock_irqrestore(&desc->lock, flags); |
280 | return ret; | |
281 | } | |
282 | EXPORT_SYMBOL(set_irq_wake); | |
283 | ||
1da177e4 LT |
284 | /* |
285 | * Internal function that tells the architecture code whether a | |
286 | * particular irq has been exclusively allocated or is available | |
287 | * for driver use. | |
288 | */ | |
289 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
290 | { | |
d3c60047 | 291 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
292 | struct irqaction *action; |
293 | ||
7d94f7ca YL |
294 | if (!desc) |
295 | return 0; | |
296 | ||
297 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
298 | return 0; |
299 | ||
08678b08 | 300 | action = desc->action; |
1da177e4 | 301 | if (action) |
3cca53b0 | 302 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
303 | action = NULL; |
304 | ||
305 | return !action; | |
306 | } | |
307 | ||
6a6de9ef TG |
308 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
309 | { | |
310 | /* | |
311 | * If the architecture still has not overriden | |
312 | * the flow handler then zap the default. This | |
313 | * should catch incorrect flow-type setting. | |
314 | */ | |
315 | if (desc->handle_irq == &handle_bad_irq) | |
316 | desc->handle_irq = NULL; | |
317 | } | |
318 | ||
0c5d1eb7 | 319 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
82736f4d UKK |
320 | unsigned long flags) |
321 | { | |
322 | int ret; | |
0c5d1eb7 | 323 | struct irq_chip *chip = desc->chip; |
82736f4d UKK |
324 | |
325 | if (!chip || !chip->set_type) { | |
326 | /* | |
327 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
328 | * flow-types? | |
329 | */ | |
330 | pr_warning("No set_type function for IRQ %d (%s)\n", irq, | |
331 | chip ? (chip->name ? : "unknown") : "unknown"); | |
332 | return 0; | |
333 | } | |
334 | ||
335 | ret = chip->set_type(irq, flags & IRQF_TRIGGER_MASK); | |
336 | ||
337 | if (ret) | |
c69ad71b DB |
338 | pr_err("setting trigger mode %d for irq %u failed (%pF)\n", |
339 | (int)(flags & IRQF_TRIGGER_MASK), | |
82736f4d | 340 | irq, chip->set_type); |
0c5d1eb7 DB |
341 | else { |
342 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ | |
343 | desc->status &= ~IRQ_TYPE_SENSE_MASK; | |
344 | desc->status |= flags & IRQ_TYPE_SENSE_MASK; | |
345 | } | |
82736f4d UKK |
346 | |
347 | return ret; | |
348 | } | |
349 | ||
1da177e4 LT |
350 | /* |
351 | * Internal function to register an irqaction - typically used to | |
352 | * allocate special interrupts that are part of the architecture. | |
353 | */ | |
d3c60047 TG |
354 | static int |
355 | __setup_irq(unsigned int irq, struct irq_desc * desc, struct irqaction *new) | |
1da177e4 | 356 | { |
1da177e4 | 357 | struct irqaction *old, **p; |
8b126b77 | 358 | const char *old_name = NULL; |
1da177e4 LT |
359 | unsigned long flags; |
360 | int shared = 0; | |
82736f4d | 361 | int ret; |
1da177e4 | 362 | |
7d94f7ca | 363 | if (!desc) |
c2b5a251 MW |
364 | return -EINVAL; |
365 | ||
f1c2662c | 366 | if (desc->chip == &no_irq_chip) |
1da177e4 LT |
367 | return -ENOSYS; |
368 | /* | |
369 | * Some drivers like serial.c use request_irq() heavily, | |
370 | * so we have to be careful not to interfere with a | |
371 | * running system. | |
372 | */ | |
3cca53b0 | 373 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
374 | /* |
375 | * This function might sleep, we want to call it first, | |
376 | * outside of the atomic block. | |
377 | * Yes, this might clear the entropy pool if the wrong | |
378 | * driver is attempted to be loaded, without actually | |
379 | * installing a new handler, but is this really a problem, | |
380 | * only the sysadmin is able to do this. | |
381 | */ | |
382 | rand_initialize_irq(irq); | |
383 | } | |
384 | ||
385 | /* | |
386 | * The following block of code has to be executed atomically | |
387 | */ | |
06fcb0c6 | 388 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 | 389 | p = &desc->action; |
06fcb0c6 IM |
390 | old = *p; |
391 | if (old) { | |
e76de9f8 TG |
392 | /* |
393 | * Can't share interrupts unless both agree to and are | |
394 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 395 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
396 | * set the trigger type must match. |
397 | */ | |
3cca53b0 | 398 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
399 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
400 | old_name = old->name; | |
f5163427 | 401 | goto mismatch; |
8b126b77 | 402 | } |
f5163427 | 403 | |
284c6680 | 404 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 405 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
406 | if ((old->flags & IRQF_PERCPU) != |
407 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
408 | goto mismatch; |
409 | #endif | |
1da177e4 LT |
410 | |
411 | /* add new interrupt at end of irq queue */ | |
412 | do { | |
413 | p = &old->next; | |
414 | old = *p; | |
415 | } while (old); | |
416 | shared = 1; | |
417 | } | |
418 | ||
1da177e4 | 419 | if (!shared) { |
6a6de9ef | 420 | irq_chip_set_defaults(desc->chip); |
e76de9f8 TG |
421 | |
422 | /* Setup the type (level, edge polarity) if configured: */ | |
3cca53b0 | 423 | if (new->flags & IRQF_TRIGGER_MASK) { |
0c5d1eb7 | 424 | ret = __irq_set_trigger(desc, irq, new->flags); |
82736f4d UKK |
425 | |
426 | if (ret) { | |
427 | spin_unlock_irqrestore(&desc->lock, flags); | |
428 | return ret; | |
429 | } | |
e76de9f8 TG |
430 | } else |
431 | compat_irq_chip_set_default_handler(desc); | |
82736f4d UKK |
432 | #if defined(CONFIG_IRQ_PER_CPU) |
433 | if (new->flags & IRQF_PERCPU) | |
434 | desc->status |= IRQ_PER_CPU; | |
435 | #endif | |
6a6de9ef | 436 | |
94d39e1f | 437 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | |
1adb0850 | 438 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f TG |
439 | |
440 | if (!(desc->status & IRQ_NOAUTOEN)) { | |
441 | desc->depth = 0; | |
442 | desc->status &= ~IRQ_DISABLED; | |
7e6e178a | 443 | desc->chip->startup(irq); |
e76de9f8 TG |
444 | } else |
445 | /* Undo nested disables: */ | |
446 | desc->depth = 1; | |
18404756 MK |
447 | |
448 | /* Set default affinity mask once everything is setup */ | |
449 | irq_select_affinity(irq); | |
0c5d1eb7 DB |
450 | |
451 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
452 | && (new->flags & IRQF_TRIGGER_MASK) | |
453 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
454 | /* hope the handler works with the actual trigger mode... */ | |
455 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
456 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
457 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 458 | } |
82736f4d UKK |
459 | |
460 | *p = new; | |
461 | ||
462 | /* Exclude IRQ from balancing */ | |
463 | if (new->flags & IRQF_NOBALANCING) | |
464 | desc->status |= IRQ_NO_BALANCING; | |
465 | ||
8528b0f1 LT |
466 | /* Reset broken irq detection when installing new handler */ |
467 | desc->irq_count = 0; | |
468 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
469 | |
470 | /* | |
471 | * Check whether we disabled the irq via the spurious handler | |
472 | * before. Reenable it and give it another chance. | |
473 | */ | |
474 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
475 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
476 | __enable_irq(desc, irq); | |
477 | } | |
478 | ||
06fcb0c6 | 479 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
480 | |
481 | new->irq = irq; | |
2c6927a3 | 482 | register_irq_proc(irq, desc); |
1da177e4 LT |
483 | new->dir = NULL; |
484 | register_handler_proc(irq, new); | |
485 | ||
486 | return 0; | |
f5163427 DS |
487 | |
488 | mismatch: | |
3f050447 | 489 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 490 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 491 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
492 | if (old_name) |
493 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
494 | dump_stack(); |
495 | } | |
3f050447 | 496 | #endif |
8b126b77 | 497 | spin_unlock_irqrestore(&desc->lock, flags); |
f5163427 | 498 | return -EBUSY; |
1da177e4 LT |
499 | } |
500 | ||
d3c60047 TG |
501 | /** |
502 | * setup_irq - setup an interrupt | |
503 | * @irq: Interrupt line to setup | |
504 | * @act: irqaction for the interrupt | |
505 | * | |
506 | * Used to statically setup interrupts in the early boot process. | |
507 | */ | |
508 | int setup_irq(unsigned int irq, struct irqaction *act) | |
509 | { | |
510 | struct irq_desc *desc = irq_to_desc(irq); | |
511 | ||
512 | return __setup_irq(irq, desc, act); | |
513 | } | |
514 | ||
1da177e4 LT |
515 | /** |
516 | * free_irq - free an interrupt | |
517 | * @irq: Interrupt line to free | |
518 | * @dev_id: Device identity to free | |
519 | * | |
520 | * Remove an interrupt handler. The handler is removed and if the | |
521 | * interrupt line is no longer in use by any driver it is disabled. | |
522 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
523 | * on the card it drives before calling this function. The function | |
524 | * does not return until any executing interrupts for this IRQ | |
525 | * have completed. | |
526 | * | |
527 | * This function must not be called from interrupt context. | |
528 | */ | |
529 | void free_irq(unsigned int irq, void *dev_id) | |
530 | { | |
d3c60047 | 531 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
532 | struct irqaction **p; |
533 | unsigned long flags; | |
534 | ||
cd7b24bb | 535 | WARN_ON(in_interrupt()); |
7d94f7ca | 536 | |
7d94f7ca | 537 | if (!desc) |
1da177e4 LT |
538 | return; |
539 | ||
06fcb0c6 | 540 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 LT |
541 | p = &desc->action; |
542 | for (;;) { | |
06fcb0c6 | 543 | struct irqaction *action = *p; |
1da177e4 LT |
544 | |
545 | if (action) { | |
546 | struct irqaction **pp = p; | |
547 | ||
548 | p = &action->next; | |
549 | if (action->dev_id != dev_id) | |
550 | continue; | |
551 | ||
552 | /* Found it - now remove it from the list of entries */ | |
553 | *pp = action->next; | |
dbce706e | 554 | |
b77d6adc PBG |
555 | /* Currently used only by UML, might disappear one day.*/ |
556 | #ifdef CONFIG_IRQ_RELEASE_METHOD | |
d1bef4ed IM |
557 | if (desc->chip->release) |
558 | desc->chip->release(irq, dev_id); | |
b77d6adc | 559 | #endif |
dbce706e | 560 | |
1da177e4 LT |
561 | if (!desc->action) { |
562 | desc->status |= IRQ_DISABLED; | |
d1bef4ed IM |
563 | if (desc->chip->shutdown) |
564 | desc->chip->shutdown(irq); | |
1da177e4 | 565 | else |
d1bef4ed | 566 | desc->chip->disable(irq); |
1da177e4 | 567 | } |
06fcb0c6 | 568 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
569 | unregister_handler_proc(irq, action); |
570 | ||
571 | /* Make sure it's not being used on another CPU */ | |
572 | synchronize_irq(irq); | |
1d99493b DW |
573 | #ifdef CONFIG_DEBUG_SHIRQ |
574 | /* | |
575 | * It's a shared IRQ -- the driver ought to be | |
576 | * prepared for it to happen even now it's | |
577 | * being freed, so let's make sure.... We do | |
578 | * this after actually deregistering it, to | |
579 | * make sure that a 'real' IRQ doesn't run in | |
580 | * parallel with our fake | |
581 | */ | |
582 | if (action->flags & IRQF_SHARED) { | |
583 | local_irq_save(flags); | |
584 | action->handler(irq, dev_id); | |
585 | local_irq_restore(flags); | |
586 | } | |
587 | #endif | |
1da177e4 LT |
588 | kfree(action); |
589 | return; | |
590 | } | |
e8c4b9d0 | 591 | printk(KERN_ERR "Trying to free already-free IRQ %d\n", irq); |
70edcd77 IM |
592 | #ifdef CONFIG_DEBUG_SHIRQ |
593 | dump_stack(); | |
594 | #endif | |
06fcb0c6 | 595 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
596 | return; |
597 | } | |
598 | } | |
1da177e4 LT |
599 | EXPORT_SYMBOL(free_irq); |
600 | ||
601 | /** | |
602 | * request_irq - allocate an interrupt line | |
603 | * @irq: Interrupt line to allocate | |
604 | * @handler: Function to be called when the IRQ occurs | |
605 | * @irqflags: Interrupt type flags | |
606 | * @devname: An ascii name for the claiming device | |
607 | * @dev_id: A cookie passed back to the handler function | |
608 | * | |
609 | * This call allocates interrupt resources and enables the | |
610 | * interrupt line and IRQ handling. From the point this | |
611 | * call is made your handler function may be invoked. Since | |
612 | * your handler function must clear any interrupt the board | |
613 | * raises, you must take care both to initialise your hardware | |
614 | * and to set up the interrupt handler in the right order. | |
615 | * | |
616 | * Dev_id must be globally unique. Normally the address of the | |
617 | * device data structure is used as the cookie. Since the handler | |
618 | * receives this value it makes sense to use it. | |
619 | * | |
620 | * If your interrupt is shared you must pass a non NULL dev_id | |
621 | * as this is required when freeing the interrupt. | |
622 | * | |
623 | * Flags: | |
624 | * | |
3cca53b0 TG |
625 | * IRQF_SHARED Interrupt is shared |
626 | * IRQF_DISABLED Disable local interrupts while processing | |
627 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy | |
0c5d1eb7 | 628 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
629 | * |
630 | */ | |
da482792 | 631 | int request_irq(unsigned int irq, irq_handler_t handler, |
06fcb0c6 | 632 | unsigned long irqflags, const char *devname, void *dev_id) |
1da177e4 | 633 | { |
06fcb0c6 | 634 | struct irqaction *action; |
08678b08 | 635 | struct irq_desc *desc; |
d3c60047 | 636 | int retval; |
1da177e4 | 637 | |
fbb9ce95 IM |
638 | #ifdef CONFIG_LOCKDEP |
639 | /* | |
640 | * Lockdep wants atomic interrupt handlers: | |
641 | */ | |
38515e90 | 642 | irqflags |= IRQF_DISABLED; |
fbb9ce95 | 643 | #endif |
1da177e4 LT |
644 | /* |
645 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
646 | * otherwise we'll have trouble later trying to figure out | |
647 | * which interrupt is which (messes up the interrupt freeing | |
648 | * logic etc). | |
649 | */ | |
3cca53b0 | 650 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 651 | return -EINVAL; |
7d94f7ca | 652 | |
cb5bc832 | 653 | desc = irq_to_desc(irq); |
7d94f7ca | 654 | if (!desc) |
1da177e4 | 655 | return -EINVAL; |
7d94f7ca | 656 | |
08678b08 | 657 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 658 | return -EINVAL; |
1da177e4 LT |
659 | if (!handler) |
660 | return -EINVAL; | |
661 | ||
662 | action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC); | |
663 | if (!action) | |
664 | return -ENOMEM; | |
665 | ||
666 | action->handler = handler; | |
667 | action->flags = irqflags; | |
668 | cpus_clear(action->mask); | |
669 | action->name = devname; | |
670 | action->next = NULL; | |
671 | action->dev_id = dev_id; | |
672 | ||
d3c60047 | 673 | retval = __setup_irq(irq, desc, action); |
377bf1e4 AV |
674 | if (retval) |
675 | kfree(action); | |
676 | ||
a304e1b8 DW |
677 | #ifdef CONFIG_DEBUG_SHIRQ |
678 | if (irqflags & IRQF_SHARED) { | |
679 | /* | |
680 | * It's a shared IRQ -- the driver ought to be prepared for it | |
681 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
682 | * We disable the irq to make sure that a 'real' IRQ doesn't |
683 | * run in parallel with our fake. | |
a304e1b8 | 684 | */ |
59845b1f | 685 | unsigned long flags; |
a304e1b8 | 686 | |
377bf1e4 | 687 | disable_irq(irq); |
59845b1f | 688 | local_irq_save(flags); |
377bf1e4 | 689 | |
59845b1f | 690 | handler(irq, dev_id); |
377bf1e4 | 691 | |
59845b1f | 692 | local_irq_restore(flags); |
377bf1e4 | 693 | enable_irq(irq); |
a304e1b8 DW |
694 | } |
695 | #endif | |
1da177e4 LT |
696 | return retval; |
697 | } | |
1da177e4 | 698 | EXPORT_SYMBOL(request_irq); |