genirq: Remove the irq argument from note_interrupt()
[linux-2.6-block.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
4d1d61a6 20#include <linux/task_work.h>
1da177e4
LT
21
22#include "internals.h"
23
8d32a307
TG
24#ifdef CONFIG_IRQ_FORCED_THREADING
25__read_mostly bool force_irqthreads;
26
27static int __init setup_forced_irqthreads(char *arg)
28{
29 force_irqthreads = true;
30 return 0;
31}
32early_param("threadirqs", setup_forced_irqthreads);
33#endif
34
18258f72 35static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 36{
32f4125e 37 bool inprogress;
1da177e4 38
a98ce5c6
HX
39 do {
40 unsigned long flags;
41
42 /*
43 * Wait until we're out of the critical section. This might
44 * give the wrong answer due to the lack of memory barriers.
45 */
32f4125e 46 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
47 cpu_relax();
48
49 /* Ok, that indicated we're done: double-check carefully. */
239007b8 50 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 51 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 52 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
53
54 /* Oops, that failed? */
32f4125e 55 } while (inprogress);
18258f72
TG
56}
57
58/**
59 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
60 * @irq: interrupt number to wait for
61 *
62 * This function waits for any pending hard IRQ handlers for this
63 * interrupt to complete before returning. If you use this
64 * function while holding a resource the IRQ handler may need you
65 * will deadlock. It does not take associated threaded handlers
66 * into account.
67 *
68 * Do not use this for shutdown scenarios where you must be sure
69 * that all parts (hardirq and threaded handler) have completed.
70 *
02cea395
PZ
71 * Returns: false if a threaded handler is active.
72 *
18258f72
TG
73 * This function may be called - with care - from IRQ context.
74 */
02cea395 75bool synchronize_hardirq(unsigned int irq)
18258f72
TG
76{
77 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 78
02cea395 79 if (desc) {
18258f72 80 __synchronize_hardirq(desc);
02cea395
PZ
81 return !atomic_read(&desc->threads_active);
82 }
83
84 return true;
18258f72
TG
85}
86EXPORT_SYMBOL(synchronize_hardirq);
87
88/**
89 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
90 * @irq: interrupt number to wait for
91 *
92 * This function waits for any pending IRQ handlers for this interrupt
93 * to complete before returning. If you use this function while
94 * holding a resource the IRQ handler may need you will deadlock.
95 *
96 * This function may be called - with care - from IRQ context.
97 */
98void synchronize_irq(unsigned int irq)
99{
100 struct irq_desc *desc = irq_to_desc(irq);
101
102 if (desc) {
103 __synchronize_hardirq(desc);
104 /*
105 * We made sure that no hardirq handler is
106 * running. Now verify that no threaded handlers are
107 * active.
108 */
109 wait_event(desc->wait_for_threads,
110 !atomic_read(&desc->threads_active));
111 }
1da177e4 112}
1da177e4
LT
113EXPORT_SYMBOL(synchronize_irq);
114
3aa551c9
TG
115#ifdef CONFIG_SMP
116cpumask_var_t irq_default_affinity;
117
771ee3b0
TG
118/**
119 * irq_can_set_affinity - Check if the affinity of a given irq can be set
120 * @irq: Interrupt to check
121 *
122 */
123int irq_can_set_affinity(unsigned int irq)
124{
08678b08 125 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0 126
bce43032
TG
127 if (!desc || !irqd_can_balance(&desc->irq_data) ||
128 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
771ee3b0
TG
129 return 0;
130
131 return 1;
132}
133
591d2fb0
TG
134/**
135 * irq_set_thread_affinity - Notify irq threads to adjust affinity
136 * @desc: irq descriptor which has affitnity changed
137 *
138 * We just set IRQTF_AFFINITY and delegate the affinity setting
139 * to the interrupt thread itself. We can not call
140 * set_cpus_allowed_ptr() here as we hold desc->lock and this
141 * code can be called from hard interrupt context.
142 */
143void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9
TG
144{
145 struct irqaction *action = desc->action;
146
147 while (action) {
148 if (action->thread)
591d2fb0 149 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
150 action = action->next;
151 }
152}
153
1fa46f1f 154#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 155static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 156{
0ef5ca1e 157 return irqd_can_move_in_process_context(data);
1fa46f1f 158}
0ef5ca1e 159static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 160{
0ef5ca1e 161 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
162}
163static inline void
164irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
165{
166 cpumask_copy(desc->pending_mask, mask);
167}
168static inline void
169irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
170{
171 cpumask_copy(mask, desc->pending_mask);
172}
173#else
0ef5ca1e 174static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 175static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
176static inline void
177irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
178static inline void
179irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
180#endif
181
818b0f3b
JL
182int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
183 bool force)
184{
185 struct irq_desc *desc = irq_data_to_desc(data);
186 struct irq_chip *chip = irq_data_get_irq_chip(data);
187 int ret;
188
01f8fa4f 189 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
190 switch (ret) {
191 case IRQ_SET_MASK_OK:
2cb62547 192 case IRQ_SET_MASK_OK_DONE:
818b0f3b
JL
193 cpumask_copy(data->affinity, mask);
194 case IRQ_SET_MASK_OK_NOCOPY:
195 irq_set_thread_affinity(desc);
196 ret = 0;
197 }
198
199 return ret;
200}
201
01f8fa4f
TG
202int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
203 bool force)
771ee3b0 204{
c2d0c555
DD
205 struct irq_chip *chip = irq_data_get_irq_chip(data);
206 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 207 int ret = 0;
771ee3b0 208
c2d0c555 209 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
210 return -EINVAL;
211
0ef5ca1e 212 if (irq_can_move_pcntxt(data)) {
01f8fa4f 213 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 214 } else {
c2d0c555 215 irqd_set_move_pending(data);
1fa46f1f 216 irq_copy_pending(desc, mask);
57b150cc 217 }
1fa46f1f 218
cd7eab44
BH
219 if (desc->affinity_notify) {
220 kref_get(&desc->affinity_notify->kref);
221 schedule_work(&desc->affinity_notify->work);
222 }
c2d0c555
DD
223 irqd_set(data, IRQD_AFFINITY_SET);
224
225 return ret;
226}
227
01f8fa4f 228int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
229{
230 struct irq_desc *desc = irq_to_desc(irq);
231 unsigned long flags;
232 int ret;
233
234 if (!desc)
235 return -EINVAL;
236
237 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 238 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 239 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 240 return ret;
771ee3b0
TG
241}
242
e7a297b0
PWJ
243int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
244{
e7a297b0 245 unsigned long flags;
31d9d9b6 246 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
247
248 if (!desc)
249 return -EINVAL;
e7a297b0 250 desc->affinity_hint = m;
02725e74 251 irq_put_desc_unlock(desc, flags);
e2e64a93 252 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
253 if (m)
254 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
255 return 0;
256}
257EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
258
0a4377de
JL
259/**
260 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
261 * @irq: interrupt number to set affinity
262 * @vcpu_info: vCPU specific data
263 *
264 * This function uses the vCPU specific data to set the vCPU
265 * affinity for an irq. The vCPU specific data is passed from
266 * outside, such as KVM. One example code path is as below:
267 * KVM -> IOMMU -> irq_set_vcpu_affinity().
268 */
269int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
270{
271 unsigned long flags;
272 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
273 struct irq_data *data;
274 struct irq_chip *chip;
275 int ret = -ENOSYS;
276
277 if (!desc)
278 return -EINVAL;
279
280 data = irq_desc_get_irq_data(desc);
281 chip = irq_data_get_irq_chip(data);
282 if (chip && chip->irq_set_vcpu_affinity)
283 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
284 irq_put_desc_unlock(desc, flags);
285
286 return ret;
287}
288EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
289
cd7eab44
BH
290static void irq_affinity_notify(struct work_struct *work)
291{
292 struct irq_affinity_notify *notify =
293 container_of(work, struct irq_affinity_notify, work);
294 struct irq_desc *desc = irq_to_desc(notify->irq);
295 cpumask_var_t cpumask;
296 unsigned long flags;
297
1fa46f1f 298 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
299 goto out;
300
301 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 302 if (irq_move_pending(&desc->irq_data))
1fa46f1f 303 irq_get_pending(cpumask, desc);
cd7eab44 304 else
1fb0ef31 305 cpumask_copy(cpumask, desc->irq_data.affinity);
cd7eab44
BH
306 raw_spin_unlock_irqrestore(&desc->lock, flags);
307
308 notify->notify(notify, cpumask);
309
310 free_cpumask_var(cpumask);
311out:
312 kref_put(&notify->kref, notify->release);
313}
314
315/**
316 * irq_set_affinity_notifier - control notification of IRQ affinity changes
317 * @irq: Interrupt for which to enable/disable notification
318 * @notify: Context for notification, or %NULL to disable
319 * notification. Function pointers must be initialised;
320 * the other fields will be initialised by this function.
321 *
322 * Must be called in process context. Notification may only be enabled
323 * after the IRQ is allocated and must be disabled before the IRQ is
324 * freed using free_irq().
325 */
326int
327irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
328{
329 struct irq_desc *desc = irq_to_desc(irq);
330 struct irq_affinity_notify *old_notify;
331 unsigned long flags;
332
333 /* The release function is promised process context */
334 might_sleep();
335
336 if (!desc)
337 return -EINVAL;
338
339 /* Complete initialisation of *notify */
340 if (notify) {
341 notify->irq = irq;
342 kref_init(&notify->kref);
343 INIT_WORK(&notify->work, irq_affinity_notify);
344 }
345
346 raw_spin_lock_irqsave(&desc->lock, flags);
347 old_notify = desc->affinity_notify;
348 desc->affinity_notify = notify;
349 raw_spin_unlock_irqrestore(&desc->lock, flags);
350
351 if (old_notify)
352 kref_put(&old_notify->kref, old_notify->release);
353
354 return 0;
355}
356EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
357
18404756
MK
358#ifndef CONFIG_AUTO_IRQ_AFFINITY
359/*
360 * Generic version of the affinity autoselector.
361 */
3b8249e7
TG
362static int
363setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
18404756 364{
569bda8d 365 struct cpumask *set = irq_default_affinity;
6783011b 366 int node = irq_desc_get_node(desc);
569bda8d 367
b008207c 368 /* Excludes PER_CPU and NO_BALANCE interrupts */
18404756
MK
369 if (!irq_can_set_affinity(irq))
370 return 0;
371
f6d87f4b
TG
372 /*
373 * Preserve an userspace affinity setup, but make sure that
374 * one of the targets is online.
375 */
2bdd1055 376 if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
569bda8d
TG
377 if (cpumask_intersects(desc->irq_data.affinity,
378 cpu_online_mask))
379 set = desc->irq_data.affinity;
0c6f8a8b 380 else
2bdd1055 381 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 382 }
18404756 383
3b8249e7 384 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
385 if (node != NUMA_NO_NODE) {
386 const struct cpumask *nodemask = cpumask_of_node(node);
387
388 /* make sure at least one of the cpus in nodemask is online */
389 if (cpumask_intersects(mask, nodemask))
390 cpumask_and(mask, mask, nodemask);
391 }
818b0f3b 392 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
393 return 0;
394}
f6d87f4b 395#else
3b8249e7
TG
396static inline int
397setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask)
f6d87f4b
TG
398{
399 return irq_select_affinity(irq);
400}
18404756
MK
401#endif
402
f6d87f4b
TG
403/*
404 * Called when affinity is set via /proc/irq
405 */
3b8249e7 406int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
407{
408 struct irq_desc *desc = irq_to_desc(irq);
409 unsigned long flags;
410 int ret;
411
239007b8 412 raw_spin_lock_irqsave(&desc->lock, flags);
3b8249e7 413 ret = setup_affinity(irq, desc, mask);
239007b8 414 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
415 return ret;
416}
417
418#else
3b8249e7
TG
419static inline int
420setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
421{
422 return 0;
423}
1da177e4
LT
424#endif
425
79ff1cda 426void __disable_irq(struct irq_desc *desc)
0a0c5168 427{
3aae994f 428 if (!desc->depth++)
87923470 429 irq_disable(desc);
0a0c5168
RW
430}
431
02725e74
TG
432static int __disable_irq_nosync(unsigned int irq)
433{
434 unsigned long flags;
31d9d9b6 435 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
436
437 if (!desc)
438 return -EINVAL;
79ff1cda 439 __disable_irq(desc);
02725e74
TG
440 irq_put_desc_busunlock(desc, flags);
441 return 0;
442}
443
1da177e4
LT
444/**
445 * disable_irq_nosync - disable an irq without waiting
446 * @irq: Interrupt to disable
447 *
448 * Disable the selected interrupt line. Disables and Enables are
449 * nested.
450 * Unlike disable_irq(), this function does not ensure existing
451 * instances of the IRQ handler have completed before returning.
452 *
453 * This function may be called from IRQ context.
454 */
455void disable_irq_nosync(unsigned int irq)
456{
02725e74 457 __disable_irq_nosync(irq);
1da177e4 458}
1da177e4
LT
459EXPORT_SYMBOL(disable_irq_nosync);
460
461/**
462 * disable_irq - disable an irq and wait for completion
463 * @irq: Interrupt to disable
464 *
465 * Disable the selected interrupt line. Enables and Disables are
466 * nested.
467 * This function waits for any pending IRQ handlers for this interrupt
468 * to complete before returning. If you use this function while
469 * holding a resource the IRQ handler may need you will deadlock.
470 *
471 * This function may be called - with care - from IRQ context.
472 */
473void disable_irq(unsigned int irq)
474{
02725e74 475 if (!__disable_irq_nosync(irq))
1da177e4
LT
476 synchronize_irq(irq);
477}
1da177e4
LT
478EXPORT_SYMBOL(disable_irq);
479
02cea395
PZ
480/**
481 * disable_hardirq - disables an irq and waits for hardirq completion
482 * @irq: Interrupt to disable
483 *
484 * Disable the selected interrupt line. Enables and Disables are
485 * nested.
486 * This function waits for any pending hard IRQ handlers for this
487 * interrupt to complete before returning. If you use this function while
488 * holding a resource the hard IRQ handler may need you will deadlock.
489 *
490 * When used to optimistically disable an interrupt from atomic context
491 * the return value must be checked.
492 *
493 * Returns: false if a threaded handler is active.
494 *
495 * This function may be called - with care - from IRQ context.
496 */
497bool disable_hardirq(unsigned int irq)
498{
499 if (!__disable_irq_nosync(irq))
500 return synchronize_hardirq(irq);
501
502 return false;
503}
504EXPORT_SYMBOL_GPL(disable_hardirq);
505
79ff1cda 506void __enable_irq(struct irq_desc *desc)
1adb0850
TG
507{
508 switch (desc->depth) {
509 case 0:
0a0c5168 510 err_out:
79ff1cda
JL
511 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
512 irq_desc_get_irq(desc));
1adb0850
TG
513 break;
514 case 1: {
c531e836 515 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 516 goto err_out;
1adb0850 517 /* Prevent probing on this irq: */
1ccb4e61 518 irq_settings_set_noprobe(desc);
3aae994f 519 irq_enable(desc);
0798abeb 520 check_irq_resend(desc);
1adb0850
TG
521 /* fall-through */
522 }
523 default:
524 desc->depth--;
525 }
526}
527
1da177e4
LT
528/**
529 * enable_irq - enable handling of an irq
530 * @irq: Interrupt to enable
531 *
532 * Undoes the effect of one call to disable_irq(). If this
533 * matches the last disable, processing of interrupts on this
534 * IRQ line is re-enabled.
535 *
70aedd24 536 * This function may be called from IRQ context only when
6b8ff312 537 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
538 */
539void enable_irq(unsigned int irq)
540{
1da177e4 541 unsigned long flags;
31d9d9b6 542 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 543
7d94f7ca 544 if (!desc)
c2b5a251 545 return;
50f7c032
TG
546 if (WARN(!desc->irq_data.chip,
547 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 548 goto out;
2656c366 549
79ff1cda 550 __enable_irq(desc);
02725e74
TG
551out:
552 irq_put_desc_busunlock(desc, flags);
1da177e4 553}
1da177e4
LT
554EXPORT_SYMBOL(enable_irq);
555
0c5d1eb7 556static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 557{
08678b08 558 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
559 int ret = -ENXIO;
560
60f96b41
SS
561 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
562 return 0;
563
2f7e99bb
TG
564 if (desc->irq_data.chip->irq_set_wake)
565 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
566
567 return ret;
568}
569
ba9a2331 570/**
a0cd9ca2 571 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
572 * @irq: interrupt to control
573 * @on: enable/disable power management wakeup
574 *
15a647eb
DB
575 * Enable/disable power management wakeup mode, which is
576 * disabled by default. Enables and disables must match,
577 * just as they match for non-wakeup mode support.
578 *
579 * Wakeup mode lets this IRQ wake the system from sleep
580 * states like "suspend to RAM".
ba9a2331 581 */
a0cd9ca2 582int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 583{
ba9a2331 584 unsigned long flags;
31d9d9b6 585 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 586 int ret = 0;
ba9a2331 587
13863a66
JJ
588 if (!desc)
589 return -EINVAL;
590
15a647eb
DB
591 /* wakeup-capable irqs can be shared between drivers that
592 * don't need to have the same sleep mode behaviors.
593 */
15a647eb 594 if (on) {
2db87321
UKK
595 if (desc->wake_depth++ == 0) {
596 ret = set_irq_wake_real(irq, on);
597 if (ret)
598 desc->wake_depth = 0;
599 else
7f94226f 600 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 601 }
15a647eb
DB
602 } else {
603 if (desc->wake_depth == 0) {
7a2c4770 604 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
605 } else if (--desc->wake_depth == 0) {
606 ret = set_irq_wake_real(irq, on);
607 if (ret)
608 desc->wake_depth = 1;
609 else
7f94226f 610 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 611 }
15a647eb 612 }
02725e74 613 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
614 return ret;
615}
a0cd9ca2 616EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 617
1da177e4
LT
618/*
619 * Internal function that tells the architecture code whether a
620 * particular irq has been exclusively allocated or is available
621 * for driver use.
622 */
623int can_request_irq(unsigned int irq, unsigned long irqflags)
624{
cc8c3b78 625 unsigned long flags;
31d9d9b6 626 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 627 int canrequest = 0;
1da177e4 628
7d94f7ca
YL
629 if (!desc)
630 return 0;
631
02725e74 632 if (irq_settings_can_request(desc)) {
2779db8d
BH
633 if (!desc->action ||
634 irqflags & desc->action->flags & IRQF_SHARED)
635 canrequest = 1;
02725e74
TG
636 }
637 irq_put_desc_unlock(desc, flags);
638 return canrequest;
1da177e4
LT
639}
640
a1ff541a 641int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 642{
6b8ff312 643 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 644 int ret, unmask = 0;
82736f4d 645
b2ba2c30 646 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
647 /*
648 * IRQF_TRIGGER_* but the PIC does not support multiple
649 * flow-types?
650 */
a1ff541a
JL
651 pr_debug("No set_type function for IRQ %d (%s)\n",
652 irq_desc_get_irq(desc),
f5d89470 653 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
654 return 0;
655 }
656
876dbd4c 657 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
658
659 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 660 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 661 mask_irq(desc);
32f4125e 662 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
663 unmask = 1;
664 }
665
f2b662da 666 /* caller masked out all except trigger mode flags */
b2ba2c30 667 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 668
876dbd4c
TG
669 switch (ret) {
670 case IRQ_SET_MASK_OK:
2cb62547 671 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
672 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
673 irqd_set(&desc->irq_data, flags);
674
675 case IRQ_SET_MASK_OK_NOCOPY:
676 flags = irqd_get_trigger_type(&desc->irq_data);
677 irq_settings_set_trigger_mask(desc, flags);
678 irqd_clear(&desc->irq_data, IRQD_LEVEL);
679 irq_settings_clr_level(desc);
680 if (flags & IRQ_TYPE_LEVEL_MASK) {
681 irq_settings_set_level(desc);
682 irqd_set(&desc->irq_data, IRQD_LEVEL);
683 }
46732475 684
d4d5e089 685 ret = 0;
8fff39e0 686 break;
876dbd4c 687 default:
97fd75b7 688 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 689 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 690 }
d4d5e089
TG
691 if (unmask)
692 unmask_irq(desc);
82736f4d
UKK
693 return ret;
694}
695
293a7a0a
TG
696#ifdef CONFIG_HARDIRQS_SW_RESEND
697int irq_set_parent(int irq, int parent_irq)
698{
699 unsigned long flags;
700 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
701
702 if (!desc)
703 return -EINVAL;
704
705 desc->parent_irq = parent_irq;
706
707 irq_put_desc_unlock(desc, flags);
708 return 0;
709}
710#endif
711
b25c340c
TG
712/*
713 * Default primary interrupt handler for threaded interrupts. Is
714 * assigned as primary handler when request_threaded_irq is called
715 * with handler == NULL. Useful for oneshot interrupts.
716 */
717static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
718{
719 return IRQ_WAKE_THREAD;
720}
721
399b5da2
TG
722/*
723 * Primary handler for nested threaded interrupts. Should never be
724 * called.
725 */
726static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
727{
728 WARN(1, "Primary handler called for nested irq %d\n", irq);
729 return IRQ_NONE;
730}
731
3aa551c9
TG
732static int irq_wait_for_interrupt(struct irqaction *action)
733{
550acb19
IY
734 set_current_state(TASK_INTERRUPTIBLE);
735
3aa551c9 736 while (!kthread_should_stop()) {
f48fe81e
TG
737
738 if (test_and_clear_bit(IRQTF_RUNTHREAD,
739 &action->thread_flags)) {
3aa551c9
TG
740 __set_current_state(TASK_RUNNING);
741 return 0;
f48fe81e
TG
742 }
743 schedule();
550acb19 744 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 745 }
550acb19 746 __set_current_state(TASK_RUNNING);
3aa551c9
TG
747 return -1;
748}
749
b25c340c
TG
750/*
751 * Oneshot interrupts keep the irq line masked until the threaded
752 * handler finished. unmask if the interrupt has not been disabled and
753 * is marked MASKED.
754 */
b5faba21 755static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 756 struct irqaction *action)
b25c340c 757{
b5faba21
TG
758 if (!(desc->istate & IRQS_ONESHOT))
759 return;
0b1adaa0 760again:
3876ec9e 761 chip_bus_lock(desc);
239007b8 762 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
763
764 /*
765 * Implausible though it may be we need to protect us against
766 * the following scenario:
767 *
768 * The thread is faster done than the hard interrupt handler
769 * on the other CPU. If we unmask the irq line then the
770 * interrupt can come in again and masks the line, leaves due
009b4c3b 771 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
772 *
773 * This also serializes the state of shared oneshot handlers
774 * versus "desc->threads_onehsot |= action->thread_mask;" in
775 * irq_wake_thread(). See the comment there which explains the
776 * serialization.
0b1adaa0 777 */
32f4125e 778 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 779 raw_spin_unlock_irq(&desc->lock);
3876ec9e 780 chip_bus_sync_unlock(desc);
0b1adaa0
TG
781 cpu_relax();
782 goto again;
783 }
784
b5faba21
TG
785 /*
786 * Now check again, whether the thread should run. Otherwise
787 * we would clear the threads_oneshot bit of this thread which
788 * was just set.
789 */
f3f79e38 790 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
791 goto out_unlock;
792
793 desc->threads_oneshot &= ~action->thread_mask;
794
32f4125e
TG
795 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
796 irqd_irq_masked(&desc->irq_data))
328a4978 797 unmask_threaded_irq(desc);
32f4125e 798
b5faba21 799out_unlock:
239007b8 800 raw_spin_unlock_irq(&desc->lock);
3876ec9e 801 chip_bus_sync_unlock(desc);
b25c340c
TG
802}
803
61f38261 804#ifdef CONFIG_SMP
591d2fb0 805/*
b04c644e 806 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
807 */
808static void
809irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
810{
811 cpumask_var_t mask;
04aa530e 812 bool valid = true;
591d2fb0
TG
813
814 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
815 return;
816
817 /*
818 * In case we are out of memory we set IRQTF_AFFINITY again and
819 * try again next time
820 */
821 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
822 set_bit(IRQTF_AFFINITY, &action->thread_flags);
823 return;
824 }
825
239007b8 826 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
827 /*
828 * This code is triggered unconditionally. Check the affinity
829 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
830 */
831 if (desc->irq_data.affinity)
832 cpumask_copy(mask, desc->irq_data.affinity);
833 else
834 valid = false;
239007b8 835 raw_spin_unlock_irq(&desc->lock);
591d2fb0 836
04aa530e
TG
837 if (valid)
838 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
839 free_cpumask_var(mask);
840}
61f38261
BP
841#else
842static inline void
843irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
844#endif
591d2fb0 845
8d32a307
TG
846/*
847 * Interrupts which are not explicitely requested as threaded
848 * interrupts rely on the implicit bh/preempt disable of the hard irq
849 * context. So we need to disable bh here to avoid deadlocks and other
850 * side effects.
851 */
3a43e05f 852static irqreturn_t
8d32a307
TG
853irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
854{
3a43e05f
SAS
855 irqreturn_t ret;
856
8d32a307 857 local_bh_disable();
3a43e05f 858 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 859 irq_finalize_oneshot(desc, action);
8d32a307 860 local_bh_enable();
3a43e05f 861 return ret;
8d32a307
TG
862}
863
864/*
f788e7bf 865 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
866 * preemtible - many of them need to sleep and wait for slow busses to
867 * complete.
868 */
3a43e05f
SAS
869static irqreturn_t irq_thread_fn(struct irq_desc *desc,
870 struct irqaction *action)
8d32a307 871{
3a43e05f
SAS
872 irqreturn_t ret;
873
874 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 875 irq_finalize_oneshot(desc, action);
3a43e05f 876 return ret;
8d32a307
TG
877}
878
7140ea19
IY
879static void wake_threads_waitq(struct irq_desc *desc)
880{
c685689f 881 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
882 wake_up(&desc->wait_for_threads);
883}
884
67d12145 885static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
886{
887 struct task_struct *tsk = current;
888 struct irq_desc *desc;
889 struct irqaction *action;
890
891 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
892 return;
893
894 action = kthread_data(tsk);
895
fb21affa 896 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 897 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
898
899
900 desc = irq_to_desc(action->irq);
901 /*
902 * If IRQTF_RUNTHREAD is set, we need to decrement
903 * desc->threads_active and wake possible waiters.
904 */
905 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
906 wake_threads_waitq(desc);
907
908 /* Prevent a stale desc->threads_oneshot */
909 irq_finalize_oneshot(desc, action);
910}
911
3aa551c9
TG
912/*
913 * Interrupt handler thread
914 */
915static int irq_thread(void *data)
916{
67d12145 917 struct callback_head on_exit_work;
3aa551c9
TG
918 struct irqaction *action = data;
919 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
920 irqreturn_t (*handler_fn)(struct irq_desc *desc,
921 struct irqaction *action);
3aa551c9 922
540b60e2 923 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
924 &action->thread_flags))
925 handler_fn = irq_forced_thread_fn;
926 else
927 handler_fn = irq_thread_fn;
928
41f9d29f 929 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 930 task_work_add(current, &on_exit_work, false);
3aa551c9 931
f3de44ed
SM
932 irq_thread_check_affinity(desc, action);
933
3aa551c9 934 while (!irq_wait_for_interrupt(action)) {
7140ea19 935 irqreturn_t action_ret;
3aa551c9 936
591d2fb0
TG
937 irq_thread_check_affinity(desc, action);
938
7140ea19 939 action_ret = handler_fn(desc, action);
1e77d0a1
TG
940 if (action_ret == IRQ_HANDLED)
941 atomic_inc(&desc->threads_handled);
3aa551c9 942
7140ea19 943 wake_threads_waitq(desc);
3aa551c9
TG
944 }
945
7140ea19
IY
946 /*
947 * This is the regular exit path. __free_irq() is stopping the
948 * thread via kthread_stop() after calling
949 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
950 * oneshot mask bit can be set. We cannot verify that as we
951 * cannot touch the oneshot mask at this point anymore as
952 * __setup_irq() might have given out currents thread_mask
953 * again.
3aa551c9 954 */
4d1d61a6 955 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
956 return 0;
957}
958
a92444c6
TG
959/**
960 * irq_wake_thread - wake the irq thread for the action identified by dev_id
961 * @irq: Interrupt line
962 * @dev_id: Device identity for which the thread should be woken
963 *
964 */
965void irq_wake_thread(unsigned int irq, void *dev_id)
966{
967 struct irq_desc *desc = irq_to_desc(irq);
968 struct irqaction *action;
969 unsigned long flags;
970
971 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
972 return;
973
974 raw_spin_lock_irqsave(&desc->lock, flags);
975 for (action = desc->action; action; action = action->next) {
976 if (action->dev_id == dev_id) {
977 if (action->thread)
978 __irq_wake_thread(desc, action);
979 break;
980 }
981 }
982 raw_spin_unlock_irqrestore(&desc->lock, flags);
983}
984EXPORT_SYMBOL_GPL(irq_wake_thread);
985
8d32a307
TG
986static void irq_setup_forced_threading(struct irqaction *new)
987{
988 if (!force_irqthreads)
989 return;
990 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
991 return;
992
993 new->flags |= IRQF_ONESHOT;
994
995 if (!new->thread_fn) {
996 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
997 new->thread_fn = new->handler;
998 new->handler = irq_default_primary_handler;
999 }
1000}
1001
c1bacbae
TG
1002static int irq_request_resources(struct irq_desc *desc)
1003{
1004 struct irq_data *d = &desc->irq_data;
1005 struct irq_chip *c = d->chip;
1006
1007 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1008}
1009
1010static void irq_release_resources(struct irq_desc *desc)
1011{
1012 struct irq_data *d = &desc->irq_data;
1013 struct irq_chip *c = d->chip;
1014
1015 if (c->irq_release_resources)
1016 c->irq_release_resources(d);
1017}
1018
1da177e4
LT
1019/*
1020 * Internal function to register an irqaction - typically used to
1021 * allocate special interrupts that are part of the architecture.
1022 */
d3c60047 1023static int
327ec569 1024__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1025{
f17c7545 1026 struct irqaction *old, **old_ptr;
b5faba21 1027 unsigned long flags, thread_mask = 0;
3b8249e7
TG
1028 int ret, nested, shared = 0;
1029 cpumask_var_t mask;
1da177e4 1030
7d94f7ca 1031 if (!desc)
c2b5a251
MW
1032 return -EINVAL;
1033
6b8ff312 1034 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1035 return -ENOSYS;
b6873807
SAS
1036 if (!try_module_get(desc->owner))
1037 return -ENODEV;
1da177e4 1038
3aa551c9 1039 /*
399b5da2
TG
1040 * Check whether the interrupt nests into another interrupt
1041 * thread.
1042 */
1ccb4e61 1043 nested = irq_settings_is_nested_thread(desc);
399b5da2 1044 if (nested) {
b6873807
SAS
1045 if (!new->thread_fn) {
1046 ret = -EINVAL;
1047 goto out_mput;
1048 }
399b5da2
TG
1049 /*
1050 * Replace the primary handler which was provided from
1051 * the driver for non nested interrupt handling by the
1052 * dummy function which warns when called.
1053 */
1054 new->handler = irq_nested_primary_handler;
8d32a307 1055 } else {
7f1b1244
PM
1056 if (irq_settings_can_thread(desc))
1057 irq_setup_forced_threading(new);
399b5da2
TG
1058 }
1059
3aa551c9 1060 /*
399b5da2
TG
1061 * Create a handler thread when a thread function is supplied
1062 * and the interrupt does not nest into another interrupt
1063 * thread.
3aa551c9 1064 */
399b5da2 1065 if (new->thread_fn && !nested) {
3aa551c9 1066 struct task_struct *t;
ee238713
IS
1067 static const struct sched_param param = {
1068 .sched_priority = MAX_USER_RT_PRIO/2,
1069 };
3aa551c9
TG
1070
1071 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1072 new->name);
b6873807
SAS
1073 if (IS_ERR(t)) {
1074 ret = PTR_ERR(t);
1075 goto out_mput;
1076 }
ee238713 1077
bbfe65c2 1078 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
ee238713 1079
3aa551c9
TG
1080 /*
1081 * We keep the reference to the task struct even if
1082 * the thread dies to avoid that the interrupt code
1083 * references an already freed task_struct.
1084 */
1085 get_task_struct(t);
1086 new->thread = t;
04aa530e
TG
1087 /*
1088 * Tell the thread to set its affinity. This is
1089 * important for shared interrupt handlers as we do
1090 * not invoke setup_affinity() for the secondary
1091 * handlers as everything is already set up. Even for
1092 * interrupts marked with IRQF_NO_BALANCE this is
1093 * correct as we want the thread to move to the cpu(s)
1094 * on which the requesting code placed the interrupt.
1095 */
1096 set_bit(IRQTF_AFFINITY, &new->thread_flags);
3aa551c9
TG
1097 }
1098
3b8249e7
TG
1099 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1100 ret = -ENOMEM;
1101 goto out_thread;
1102 }
1103
dc9b229a
TG
1104 /*
1105 * Drivers are often written to work w/o knowledge about the
1106 * underlying irq chip implementation, so a request for a
1107 * threaded irq without a primary hard irq context handler
1108 * requires the ONESHOT flag to be set. Some irq chips like
1109 * MSI based interrupts are per se one shot safe. Check the
1110 * chip flags, so we can avoid the unmask dance at the end of
1111 * the threaded handler for those.
1112 */
1113 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1114 new->flags &= ~IRQF_ONESHOT;
1115
1da177e4
LT
1116 /*
1117 * The following block of code has to be executed atomically
1118 */
239007b8 1119 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1120 old_ptr = &desc->action;
1121 old = *old_ptr;
06fcb0c6 1122 if (old) {
e76de9f8
TG
1123 /*
1124 * Can't share interrupts unless both agree to and are
1125 * the same type (level, edge, polarity). So both flag
3cca53b0 1126 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1127 * set the trigger type must match. Also all must
1128 * agree on ONESHOT.
e76de9f8 1129 */
3cca53b0 1130 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1131 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1132 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1133 goto mismatch;
1134
f5163427 1135 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1136 if ((old->flags & IRQF_PERCPU) !=
1137 (new->flags & IRQF_PERCPU))
f5163427 1138 goto mismatch;
1da177e4
LT
1139
1140 /* add new interrupt at end of irq queue */
1141 do {
52abb700
TG
1142 /*
1143 * Or all existing action->thread_mask bits,
1144 * so we can find the next zero bit for this
1145 * new action.
1146 */
b5faba21 1147 thread_mask |= old->thread_mask;
f17c7545
IM
1148 old_ptr = &old->next;
1149 old = *old_ptr;
1da177e4
LT
1150 } while (old);
1151 shared = 1;
1152 }
1153
b5faba21 1154 /*
52abb700
TG
1155 * Setup the thread mask for this irqaction for ONESHOT. For
1156 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1157 * conditional in irq_wake_thread().
b5faba21 1158 */
52abb700
TG
1159 if (new->flags & IRQF_ONESHOT) {
1160 /*
1161 * Unlikely to have 32 resp 64 irqs sharing one line,
1162 * but who knows.
1163 */
1164 if (thread_mask == ~0UL) {
1165 ret = -EBUSY;
1166 goto out_mask;
1167 }
1168 /*
1169 * The thread_mask for the action is or'ed to
1170 * desc->thread_active to indicate that the
1171 * IRQF_ONESHOT thread handler has been woken, but not
1172 * yet finished. The bit is cleared when a thread
1173 * completes. When all threads of a shared interrupt
1174 * line have completed desc->threads_active becomes
1175 * zero and the interrupt line is unmasked. See
1176 * handle.c:irq_wake_thread() for further information.
1177 *
1178 * If no thread is woken by primary (hard irq context)
1179 * interrupt handlers, then desc->threads_active is
1180 * also checked for zero to unmask the irq line in the
1181 * affected hard irq flow handlers
1182 * (handle_[fasteoi|level]_irq).
1183 *
1184 * The new action gets the first zero bit of
1185 * thread_mask assigned. See the loop above which or's
1186 * all existing action->thread_mask bits.
1187 */
1188 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1189
dc9b229a
TG
1190 } else if (new->handler == irq_default_primary_handler &&
1191 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1192 /*
1193 * The interrupt was requested with handler = NULL, so
1194 * we use the default primary handler for it. But it
1195 * does not have the oneshot flag set. In combination
1196 * with level interrupts this is deadly, because the
1197 * default primary handler just wakes the thread, then
1198 * the irq lines is reenabled, but the device still
1199 * has the level irq asserted. Rinse and repeat....
1200 *
1201 * While this works for edge type interrupts, we play
1202 * it safe and reject unconditionally because we can't
1203 * say for sure which type this interrupt really
1204 * has. The type flags are unreliable as the
1205 * underlying chip implementation can override them.
1206 */
97fd75b7 1207 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1208 irq);
1209 ret = -EINVAL;
1210 goto out_mask;
b5faba21 1211 }
b5faba21 1212
1da177e4 1213 if (!shared) {
c1bacbae
TG
1214 ret = irq_request_resources(desc);
1215 if (ret) {
1216 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1217 new->name, irq, desc->irq_data.chip->name);
1218 goto out_mask;
1219 }
1220
3aa551c9
TG
1221 init_waitqueue_head(&desc->wait_for_threads);
1222
e76de9f8 1223 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1224 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1225 ret = __irq_set_trigger(desc,
1226 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1227
3aa551c9 1228 if (ret)
3b8249e7 1229 goto out_mask;
091738a2 1230 }
6a6de9ef 1231
009b4c3b 1232 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1233 IRQS_ONESHOT | IRQS_WAITING);
1234 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1235
a005677b
TG
1236 if (new->flags & IRQF_PERCPU) {
1237 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1238 irq_settings_set_per_cpu(desc);
1239 }
6a58fb3b 1240
b25c340c 1241 if (new->flags & IRQF_ONESHOT)
3d67baec 1242 desc->istate |= IRQS_ONESHOT;
b25c340c 1243
1ccb4e61 1244 if (irq_settings_can_autoenable(desc))
b4bc724e 1245 irq_startup(desc, true);
46999238 1246 else
e76de9f8
TG
1247 /* Undo nested disables: */
1248 desc->depth = 1;
18404756 1249
612e3684 1250 /* Exclude IRQ from balancing if requested */
a005677b
TG
1251 if (new->flags & IRQF_NOBALANCING) {
1252 irq_settings_set_no_balancing(desc);
1253 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1254 }
612e3684 1255
18404756 1256 /* Set default affinity mask once everything is setup */
3b8249e7 1257 setup_affinity(irq, desc, mask);
0c5d1eb7 1258
876dbd4c
TG
1259 } else if (new->flags & IRQF_TRIGGER_MASK) {
1260 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1261 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1262
1263 if (nmsk != omsk)
1264 /* hope the handler works with current trigger mode */
97fd75b7 1265 pr_warning("irq %d uses trigger mode %u; requested %u\n",
876dbd4c 1266 irq, nmsk, omsk);
1da177e4 1267 }
82736f4d 1268
69ab8494 1269 new->irq = irq;
f17c7545 1270 *old_ptr = new;
82736f4d 1271
cab303be
TG
1272 irq_pm_install_action(desc, new);
1273
8528b0f1
LT
1274 /* Reset broken irq detection when installing new handler */
1275 desc->irq_count = 0;
1276 desc->irqs_unhandled = 0;
1adb0850
TG
1277
1278 /*
1279 * Check whether we disabled the irq via the spurious handler
1280 * before. Reenable it and give it another chance.
1281 */
7acdd53e
TG
1282 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1283 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1284 __enable_irq(desc);
1adb0850
TG
1285 }
1286
239007b8 1287 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1288
69ab8494
TG
1289 /*
1290 * Strictly no need to wake it up, but hung_task complains
1291 * when no hard interrupt wakes the thread up.
1292 */
1293 if (new->thread)
1294 wake_up_process(new->thread);
1295
2c6927a3 1296 register_irq_proc(irq, desc);
1da177e4
LT
1297 new->dir = NULL;
1298 register_handler_proc(irq, new);
4f5058c3 1299 free_cpumask_var(mask);
1da177e4
LT
1300
1301 return 0;
f5163427
DS
1302
1303mismatch:
3cca53b0 1304 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1305 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1306 irq, new->flags, new->name, old->flags, old->name);
1307#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1308 dump_stack();
3f050447 1309#endif
f5d89470 1310 }
3aa551c9
TG
1311 ret = -EBUSY;
1312
3b8249e7 1313out_mask:
1c389795 1314 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1315 free_cpumask_var(mask);
1316
3aa551c9 1317out_thread:
3aa551c9
TG
1318 if (new->thread) {
1319 struct task_struct *t = new->thread;
1320
1321 new->thread = NULL;
05d74efa 1322 kthread_stop(t);
3aa551c9
TG
1323 put_task_struct(t);
1324 }
b6873807
SAS
1325out_mput:
1326 module_put(desc->owner);
3aa551c9 1327 return ret;
1da177e4
LT
1328}
1329
d3c60047
TG
1330/**
1331 * setup_irq - setup an interrupt
1332 * @irq: Interrupt line to setup
1333 * @act: irqaction for the interrupt
1334 *
1335 * Used to statically setup interrupts in the early boot process.
1336 */
1337int setup_irq(unsigned int irq, struct irqaction *act)
1338{
986c011d 1339 int retval;
d3c60047
TG
1340 struct irq_desc *desc = irq_to_desc(irq);
1341
31d9d9b6
MZ
1342 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1343 return -EINVAL;
986c011d
DD
1344 chip_bus_lock(desc);
1345 retval = __setup_irq(irq, desc, act);
1346 chip_bus_sync_unlock(desc);
1347
1348 return retval;
d3c60047 1349}
eb53b4e8 1350EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1351
31d9d9b6 1352/*
cbf94f06
MD
1353 * Internal function to unregister an irqaction - used to free
1354 * regular and special interrupts that are part of the architecture.
1da177e4 1355 */
cbf94f06 1356static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1357{
d3c60047 1358 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1359 struct irqaction *action, **action_ptr;
1da177e4
LT
1360 unsigned long flags;
1361
ae88a23b 1362 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1363
7d94f7ca 1364 if (!desc)
f21cfb25 1365 return NULL;
1da177e4 1366
239007b8 1367 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1368
1369 /*
1370 * There can be multiple actions per IRQ descriptor, find the right
1371 * one based on the dev_id:
1372 */
f17c7545 1373 action_ptr = &desc->action;
1da177e4 1374 for (;;) {
f17c7545 1375 action = *action_ptr;
1da177e4 1376
ae88a23b
IM
1377 if (!action) {
1378 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1379 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1380
f21cfb25 1381 return NULL;
ae88a23b 1382 }
1da177e4 1383
8316e381
IM
1384 if (action->dev_id == dev_id)
1385 break;
f17c7545 1386 action_ptr = &action->next;
ae88a23b 1387 }
dbce706e 1388
ae88a23b 1389 /* Found it - now remove it from the list of entries: */
f17c7545 1390 *action_ptr = action->next;
ae88a23b 1391
cab303be
TG
1392 irq_pm_remove_action(desc, action);
1393
ae88a23b 1394 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1395 if (!desc->action) {
46999238 1396 irq_shutdown(desc);
c1bacbae
TG
1397 irq_release_resources(desc);
1398 }
3aa551c9 1399
e7a297b0
PWJ
1400#ifdef CONFIG_SMP
1401 /* make sure affinity_hint is cleaned up */
1402 if (WARN_ON_ONCE(desc->affinity_hint))
1403 desc->affinity_hint = NULL;
1404#endif
1405
239007b8 1406 raw_spin_unlock_irqrestore(&desc->lock, flags);
ae88a23b
IM
1407
1408 unregister_handler_proc(irq, action);
1409
1410 /* Make sure it's not being used on another CPU: */
1411 synchronize_irq(irq);
1da177e4 1412
70edcd77 1413#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1414 /*
1415 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1416 * event to happen even now it's being freed, so let's make sure that
1417 * is so by doing an extra call to the handler ....
1418 *
1419 * ( We do this after actually deregistering it, to make sure that a
1420 * 'real' IRQ doesn't run in * parallel with our fake. )
1421 */
1422 if (action->flags & IRQF_SHARED) {
1423 local_irq_save(flags);
1424 action->handler(irq, dev_id);
1425 local_irq_restore(flags);
1da177e4 1426 }
ae88a23b 1427#endif
2d860ad7
LT
1428
1429 if (action->thread) {
05d74efa 1430 kthread_stop(action->thread);
2d860ad7
LT
1431 put_task_struct(action->thread);
1432 }
1433
b6873807 1434 module_put(desc->owner);
f21cfb25
MD
1435 return action;
1436}
1437
cbf94f06
MD
1438/**
1439 * remove_irq - free an interrupt
1440 * @irq: Interrupt line to free
1441 * @act: irqaction for the interrupt
1442 *
1443 * Used to remove interrupts statically setup by the early boot process.
1444 */
1445void remove_irq(unsigned int irq, struct irqaction *act)
1446{
31d9d9b6
MZ
1447 struct irq_desc *desc = irq_to_desc(irq);
1448
1449 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1450 __free_irq(irq, act->dev_id);
cbf94f06 1451}
eb53b4e8 1452EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1453
f21cfb25
MD
1454/**
1455 * free_irq - free an interrupt allocated with request_irq
1456 * @irq: Interrupt line to free
1457 * @dev_id: Device identity to free
1458 *
1459 * Remove an interrupt handler. The handler is removed and if the
1460 * interrupt line is no longer in use by any driver it is disabled.
1461 * On a shared IRQ the caller must ensure the interrupt is disabled
1462 * on the card it drives before calling this function. The function
1463 * does not return until any executing interrupts for this IRQ
1464 * have completed.
1465 *
1466 * This function must not be called from interrupt context.
1467 */
1468void free_irq(unsigned int irq, void *dev_id)
1469{
70aedd24
TG
1470 struct irq_desc *desc = irq_to_desc(irq);
1471
31d9d9b6 1472 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1473 return;
1474
cd7eab44
BH
1475#ifdef CONFIG_SMP
1476 if (WARN_ON(desc->affinity_notify))
1477 desc->affinity_notify = NULL;
1478#endif
1479
3876ec9e 1480 chip_bus_lock(desc);
cbf94f06 1481 kfree(__free_irq(irq, dev_id));
3876ec9e 1482 chip_bus_sync_unlock(desc);
1da177e4 1483}
1da177e4
LT
1484EXPORT_SYMBOL(free_irq);
1485
1486/**
3aa551c9 1487 * request_threaded_irq - allocate an interrupt line
1da177e4 1488 * @irq: Interrupt line to allocate
3aa551c9
TG
1489 * @handler: Function to be called when the IRQ occurs.
1490 * Primary handler for threaded interrupts
b25c340c
TG
1491 * If NULL and thread_fn != NULL the default
1492 * primary handler is installed
f48fe81e
TG
1493 * @thread_fn: Function called from the irq handler thread
1494 * If NULL, no irq thread is created
1da177e4
LT
1495 * @irqflags: Interrupt type flags
1496 * @devname: An ascii name for the claiming device
1497 * @dev_id: A cookie passed back to the handler function
1498 *
1499 * This call allocates interrupt resources and enables the
1500 * interrupt line and IRQ handling. From the point this
1501 * call is made your handler function may be invoked. Since
1502 * your handler function must clear any interrupt the board
1503 * raises, you must take care both to initialise your hardware
1504 * and to set up the interrupt handler in the right order.
1505 *
3aa551c9 1506 * If you want to set up a threaded irq handler for your device
6d21af4f 1507 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1508 * still called in hard interrupt context and has to check
1509 * whether the interrupt originates from the device. If yes it
1510 * needs to disable the interrupt on the device and return
39a2eddb 1511 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1512 * @thread_fn. This split handler design is necessary to support
1513 * shared interrupts.
1514 *
1da177e4
LT
1515 * Dev_id must be globally unique. Normally the address of the
1516 * device data structure is used as the cookie. Since the handler
1517 * receives this value it makes sense to use it.
1518 *
1519 * If your interrupt is shared you must pass a non NULL dev_id
1520 * as this is required when freeing the interrupt.
1521 *
1522 * Flags:
1523 *
3cca53b0 1524 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1525 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1526 *
1527 */
3aa551c9
TG
1528int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1529 irq_handler_t thread_fn, unsigned long irqflags,
1530 const char *devname, void *dev_id)
1da177e4 1531{
06fcb0c6 1532 struct irqaction *action;
08678b08 1533 struct irq_desc *desc;
d3c60047 1534 int retval;
1da177e4
LT
1535
1536 /*
1537 * Sanity-check: shared interrupts must pass in a real dev-ID,
1538 * otherwise we'll have trouble later trying to figure out
1539 * which interrupt is which (messes up the interrupt freeing
1540 * logic etc).
17f48034
RW
1541 *
1542 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1543 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1544 */
17f48034
RW
1545 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1546 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1547 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1548 return -EINVAL;
7d94f7ca 1549
cb5bc832 1550 desc = irq_to_desc(irq);
7d94f7ca 1551 if (!desc)
1da177e4 1552 return -EINVAL;
7d94f7ca 1553
31d9d9b6
MZ
1554 if (!irq_settings_can_request(desc) ||
1555 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1556 return -EINVAL;
b25c340c
TG
1557
1558 if (!handler) {
1559 if (!thread_fn)
1560 return -EINVAL;
1561 handler = irq_default_primary_handler;
1562 }
1da177e4 1563
45535732 1564 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1565 if (!action)
1566 return -ENOMEM;
1567
1568 action->handler = handler;
3aa551c9 1569 action->thread_fn = thread_fn;
1da177e4 1570 action->flags = irqflags;
1da177e4 1571 action->name = devname;
1da177e4
LT
1572 action->dev_id = dev_id;
1573
3876ec9e 1574 chip_bus_lock(desc);
d3c60047 1575 retval = __setup_irq(irq, desc, action);
3876ec9e 1576 chip_bus_sync_unlock(desc);
70aedd24 1577
377bf1e4
AV
1578 if (retval)
1579 kfree(action);
1580
6d83f94d 1581#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1582 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1583 /*
1584 * It's a shared IRQ -- the driver ought to be prepared for it
1585 * to happen immediately, so let's make sure....
377bf1e4
AV
1586 * We disable the irq to make sure that a 'real' IRQ doesn't
1587 * run in parallel with our fake.
a304e1b8 1588 */
59845b1f 1589 unsigned long flags;
a304e1b8 1590
377bf1e4 1591 disable_irq(irq);
59845b1f 1592 local_irq_save(flags);
377bf1e4 1593
59845b1f 1594 handler(irq, dev_id);
377bf1e4 1595
59845b1f 1596 local_irq_restore(flags);
377bf1e4 1597 enable_irq(irq);
a304e1b8
DW
1598 }
1599#endif
1da177e4
LT
1600 return retval;
1601}
3aa551c9 1602EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1603
1604/**
1605 * request_any_context_irq - allocate an interrupt line
1606 * @irq: Interrupt line to allocate
1607 * @handler: Function to be called when the IRQ occurs.
1608 * Threaded handler for threaded interrupts.
1609 * @flags: Interrupt type flags
1610 * @name: An ascii name for the claiming device
1611 * @dev_id: A cookie passed back to the handler function
1612 *
1613 * This call allocates interrupt resources and enables the
1614 * interrupt line and IRQ handling. It selects either a
1615 * hardirq or threaded handling method depending on the
1616 * context.
1617 *
1618 * On failure, it returns a negative value. On success,
1619 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1620 */
1621int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1622 unsigned long flags, const char *name, void *dev_id)
1623{
1624 struct irq_desc *desc = irq_to_desc(irq);
1625 int ret;
1626
1627 if (!desc)
1628 return -EINVAL;
1629
1ccb4e61 1630 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1631 ret = request_threaded_irq(irq, NULL, handler,
1632 flags, name, dev_id);
1633 return !ret ? IRQC_IS_NESTED : ret;
1634 }
1635
1636 ret = request_irq(irq, handler, flags, name, dev_id);
1637 return !ret ? IRQC_IS_HARDIRQ : ret;
1638}
1639EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1640
1e7c5fd2 1641void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1642{
1643 unsigned int cpu = smp_processor_id();
1644 unsigned long flags;
1645 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1646
1647 if (!desc)
1648 return;
1649
1e7c5fd2
MZ
1650 type &= IRQ_TYPE_SENSE_MASK;
1651 if (type != IRQ_TYPE_NONE) {
1652 int ret;
1653
a1ff541a 1654 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1655
1656 if (ret) {
32cffdde 1657 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1658 goto out;
1659 }
1660 }
1661
31d9d9b6 1662 irq_percpu_enable(desc, cpu);
1e7c5fd2 1663out:
31d9d9b6
MZ
1664 irq_put_desc_unlock(desc, flags);
1665}
36a5df85 1666EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6
MZ
1667
1668void disable_percpu_irq(unsigned int irq)
1669{
1670 unsigned int cpu = smp_processor_id();
1671 unsigned long flags;
1672 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1673
1674 if (!desc)
1675 return;
1676
1677 irq_percpu_disable(desc, cpu);
1678 irq_put_desc_unlock(desc, flags);
1679}
36a5df85 1680EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1681
1682/*
1683 * Internal function to unregister a percpu irqaction.
1684 */
1685static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1686{
1687 struct irq_desc *desc = irq_to_desc(irq);
1688 struct irqaction *action;
1689 unsigned long flags;
1690
1691 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1692
1693 if (!desc)
1694 return NULL;
1695
1696 raw_spin_lock_irqsave(&desc->lock, flags);
1697
1698 action = desc->action;
1699 if (!action || action->percpu_dev_id != dev_id) {
1700 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1701 goto bad;
1702 }
1703
1704 if (!cpumask_empty(desc->percpu_enabled)) {
1705 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1706 irq, cpumask_first(desc->percpu_enabled));
1707 goto bad;
1708 }
1709
1710 /* Found it - now remove it from the list of entries: */
1711 desc->action = NULL;
1712
1713 raw_spin_unlock_irqrestore(&desc->lock, flags);
1714
1715 unregister_handler_proc(irq, action);
1716
1717 module_put(desc->owner);
1718 return action;
1719
1720bad:
1721 raw_spin_unlock_irqrestore(&desc->lock, flags);
1722 return NULL;
1723}
1724
1725/**
1726 * remove_percpu_irq - free a per-cpu interrupt
1727 * @irq: Interrupt line to free
1728 * @act: irqaction for the interrupt
1729 *
1730 * Used to remove interrupts statically setup by the early boot process.
1731 */
1732void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1733{
1734 struct irq_desc *desc = irq_to_desc(irq);
1735
1736 if (desc && irq_settings_is_per_cpu_devid(desc))
1737 __free_percpu_irq(irq, act->percpu_dev_id);
1738}
1739
1740/**
1741 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1742 * @irq: Interrupt line to free
1743 * @dev_id: Device identity to free
1744 *
1745 * Remove a percpu interrupt handler. The handler is removed, but
1746 * the interrupt line is not disabled. This must be done on each
1747 * CPU before calling this function. The function does not return
1748 * until any executing interrupts for this IRQ have completed.
1749 *
1750 * This function must not be called from interrupt context.
1751 */
1752void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1753{
1754 struct irq_desc *desc = irq_to_desc(irq);
1755
1756 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1757 return;
1758
1759 chip_bus_lock(desc);
1760 kfree(__free_percpu_irq(irq, dev_id));
1761 chip_bus_sync_unlock(desc);
1762}
1763
1764/**
1765 * setup_percpu_irq - setup a per-cpu interrupt
1766 * @irq: Interrupt line to setup
1767 * @act: irqaction for the interrupt
1768 *
1769 * Used to statically setup per-cpu interrupts in the early boot process.
1770 */
1771int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1772{
1773 struct irq_desc *desc = irq_to_desc(irq);
1774 int retval;
1775
1776 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1777 return -EINVAL;
1778 chip_bus_lock(desc);
1779 retval = __setup_irq(irq, desc, act);
1780 chip_bus_sync_unlock(desc);
1781
1782 return retval;
1783}
1784
1785/**
1786 * request_percpu_irq - allocate a percpu interrupt line
1787 * @irq: Interrupt line to allocate
1788 * @handler: Function to be called when the IRQ occurs.
1789 * @devname: An ascii name for the claiming device
1790 * @dev_id: A percpu cookie passed back to the handler function
1791 *
1792 * This call allocates interrupt resources, but doesn't
1793 * automatically enable the interrupt. It has to be done on each
1794 * CPU using enable_percpu_irq().
1795 *
1796 * Dev_id must be globally unique. It is a per-cpu variable, and
1797 * the handler gets called with the interrupted CPU's instance of
1798 * that variable.
1799 */
1800int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1801 const char *devname, void __percpu *dev_id)
1802{
1803 struct irqaction *action;
1804 struct irq_desc *desc;
1805 int retval;
1806
1807 if (!dev_id)
1808 return -EINVAL;
1809
1810 desc = irq_to_desc(irq);
1811 if (!desc || !irq_settings_can_request(desc) ||
1812 !irq_settings_is_per_cpu_devid(desc))
1813 return -EINVAL;
1814
1815 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1816 if (!action)
1817 return -ENOMEM;
1818
1819 action->handler = handler;
2ed0e645 1820 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1821 action->name = devname;
1822 action->percpu_dev_id = dev_id;
1823
1824 chip_bus_lock(desc);
1825 retval = __setup_irq(irq, desc, action);
1826 chip_bus_sync_unlock(desc);
1827
1828 if (retval)
1829 kfree(action);
1830
1831 return retval;
1832}
1b7047ed
MZ
1833
1834/**
1835 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
1836 * @irq: Interrupt line that is forwarded to a VM
1837 * @which: One of IRQCHIP_STATE_* the caller wants to know about
1838 * @state: a pointer to a boolean where the state is to be storeed
1839 *
1840 * This call snapshots the internal irqchip state of an
1841 * interrupt, returning into @state the bit corresponding to
1842 * stage @which
1843 *
1844 * This function should be called with preemption disabled if the
1845 * interrupt controller has per-cpu registers.
1846 */
1847int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1848 bool *state)
1849{
1850 struct irq_desc *desc;
1851 struct irq_data *data;
1852 struct irq_chip *chip;
1853 unsigned long flags;
1854 int err = -EINVAL;
1855
1856 desc = irq_get_desc_buslock(irq, &flags, 0);
1857 if (!desc)
1858 return err;
1859
1860 data = irq_desc_get_irq_data(desc);
1861
1862 do {
1863 chip = irq_data_get_irq_chip(data);
1864 if (chip->irq_get_irqchip_state)
1865 break;
1866#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1867 data = data->parent_data;
1868#else
1869 data = NULL;
1870#endif
1871 } while (data);
1872
1873 if (data)
1874 err = chip->irq_get_irqchip_state(data, which, state);
1875
1876 irq_put_desc_busunlock(desc, flags);
1877 return err;
1878}
1879
1880/**
1881 * irq_set_irqchip_state - set the state of a forwarded interrupt.
1882 * @irq: Interrupt line that is forwarded to a VM
1883 * @which: State to be restored (one of IRQCHIP_STATE_*)
1884 * @val: Value corresponding to @which
1885 *
1886 * This call sets the internal irqchip state of an interrupt,
1887 * depending on the value of @which.
1888 *
1889 * This function should be called with preemption disabled if the
1890 * interrupt controller has per-cpu registers.
1891 */
1892int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
1893 bool val)
1894{
1895 struct irq_desc *desc;
1896 struct irq_data *data;
1897 struct irq_chip *chip;
1898 unsigned long flags;
1899 int err = -EINVAL;
1900
1901 desc = irq_get_desc_buslock(irq, &flags, 0);
1902 if (!desc)
1903 return err;
1904
1905 data = irq_desc_get_irq_data(desc);
1906
1907 do {
1908 chip = irq_data_get_irq_chip(data);
1909 if (chip->irq_set_irqchip_state)
1910 break;
1911#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1912 data = data->parent_data;
1913#else
1914 data = NULL;
1915#endif
1916 } while (data);
1917
1918 if (data)
1919 err = chip->irq_set_irqchip_state(data, which, val);
1920
1921 irq_put_desc_busunlock(desc, flags);
1922 return err;
1923}