pinctrl: at91-pio4: add missing of_node_put
[linux-2.6-block.git] / kernel / irq / manage.c
CommitLineData
52a65ff5 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
a34db9b2
IM
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
5 *
6 * This file contains driver APIs to the irq subsystem.
7 */
8
97fd75b7
AM
9#define pr_fmt(fmt) "genirq: " fmt
10
1da177e4 11#include <linux/irq.h>
3aa551c9 12#include <linux/kthread.h>
1da177e4
LT
13#include <linux/module.h>
14#include <linux/random.h>
15#include <linux/interrupt.h>
1aeb272c 16#include <linux/slab.h>
3aa551c9 17#include <linux/sched.h>
8bd75c77 18#include <linux/sched/rt.h>
0881e7bd 19#include <linux/sched/task.h>
ae7e81c0 20#include <uapi/linux/sched/types.h>
4d1d61a6 21#include <linux/task_work.h>
1da177e4
LT
22
23#include "internals.h"
24
8d32a307
TG
25#ifdef CONFIG_IRQ_FORCED_THREADING
26__read_mostly bool force_irqthreads;
27
28static int __init setup_forced_irqthreads(char *arg)
29{
30 force_irqthreads = true;
31 return 0;
32}
33early_param("threadirqs", setup_forced_irqthreads);
34#endif
35
18258f72 36static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 37{
32f4125e 38 bool inprogress;
1da177e4 39
a98ce5c6
HX
40 do {
41 unsigned long flags;
42
43 /*
44 * Wait until we're out of the critical section. This might
45 * give the wrong answer due to the lack of memory barriers.
46 */
32f4125e 47 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
48 cpu_relax();
49
50 /* Ok, that indicated we're done: double-check carefully. */
239007b8 51 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 52 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 53 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
54
55 /* Oops, that failed? */
32f4125e 56 } while (inprogress);
18258f72
TG
57}
58
59/**
60 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
61 * @irq: interrupt number to wait for
62 *
63 * This function waits for any pending hard IRQ handlers for this
64 * interrupt to complete before returning. If you use this
65 * function while holding a resource the IRQ handler may need you
66 * will deadlock. It does not take associated threaded handlers
67 * into account.
68 *
69 * Do not use this for shutdown scenarios where you must be sure
70 * that all parts (hardirq and threaded handler) have completed.
71 *
02cea395
PZ
72 * Returns: false if a threaded handler is active.
73 *
18258f72
TG
74 * This function may be called - with care - from IRQ context.
75 */
02cea395 76bool synchronize_hardirq(unsigned int irq)
18258f72
TG
77{
78 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 79
02cea395 80 if (desc) {
18258f72 81 __synchronize_hardirq(desc);
02cea395
PZ
82 return !atomic_read(&desc->threads_active);
83 }
84
85 return true;
18258f72
TG
86}
87EXPORT_SYMBOL(synchronize_hardirq);
88
89/**
90 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
91 * @irq: interrupt number to wait for
92 *
93 * This function waits for any pending IRQ handlers for this interrupt
94 * to complete before returning. If you use this function while
95 * holding a resource the IRQ handler may need you will deadlock.
96 *
97 * This function may be called - with care - from IRQ context.
98 */
99void synchronize_irq(unsigned int irq)
100{
101 struct irq_desc *desc = irq_to_desc(irq);
102
103 if (desc) {
104 __synchronize_hardirq(desc);
105 /*
106 * We made sure that no hardirq handler is
107 * running. Now verify that no threaded handlers are
108 * active.
109 */
110 wait_event(desc->wait_for_threads,
111 !atomic_read(&desc->threads_active));
112 }
1da177e4 113}
1da177e4
LT
114EXPORT_SYMBOL(synchronize_irq);
115
3aa551c9
TG
116#ifdef CONFIG_SMP
117cpumask_var_t irq_default_affinity;
118
9c255583 119static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
120{
121 if (!desc || !irqd_can_balance(&desc->irq_data) ||
122 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
123 return false;
124 return true;
e019c249
JL
125}
126
771ee3b0
TG
127/**
128 * irq_can_set_affinity - Check if the affinity of a given irq can be set
129 * @irq: Interrupt to check
130 *
131 */
132int irq_can_set_affinity(unsigned int irq)
133{
e019c249 134 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
135}
136
9c255583
TG
137/**
138 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
139 * @irq: Interrupt to check
140 *
141 * Like irq_can_set_affinity() above, but additionally checks for the
142 * AFFINITY_MANAGED flag.
143 */
144bool irq_can_set_affinity_usr(unsigned int irq)
145{
146 struct irq_desc *desc = irq_to_desc(irq);
147
148 return __irq_can_set_affinity(desc) &&
149 !irqd_affinity_is_managed(&desc->irq_data);
150}
151
591d2fb0
TG
152/**
153 * irq_set_thread_affinity - Notify irq threads to adjust affinity
154 * @desc: irq descriptor which has affitnity changed
155 *
156 * We just set IRQTF_AFFINITY and delegate the affinity setting
157 * to the interrupt thread itself. We can not call
158 * set_cpus_allowed_ptr() here as we hold desc->lock and this
159 * code can be called from hard interrupt context.
160 */
161void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 162{
f944b5a7 163 struct irqaction *action;
3aa551c9 164
f944b5a7 165 for_each_action_of_desc(desc, action)
3aa551c9 166 if (action->thread)
591d2fb0 167 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
168}
169
19e1d4e9
TG
170static void irq_validate_effective_affinity(struct irq_data *data)
171{
172#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
173 const struct cpumask *m = irq_data_get_effective_affinity_mask(data);
174 struct irq_chip *chip = irq_data_get_irq_chip(data);
175
176 if (!cpumask_empty(m))
177 return;
178 pr_warn_once("irq_chip %s did not update eff. affinity mask of irq %u\n",
179 chip->name, data->irq);
180#endif
181}
182
818b0f3b
JL
183int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
184 bool force)
185{
186 struct irq_desc *desc = irq_data_to_desc(data);
187 struct irq_chip *chip = irq_data_get_irq_chip(data);
188 int ret;
189
e43b3b58
TG
190 if (!chip || !chip->irq_set_affinity)
191 return -EINVAL;
192
01f8fa4f 193 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
194 switch (ret) {
195 case IRQ_SET_MASK_OK:
2cb62547 196 case IRQ_SET_MASK_OK_DONE:
9df872fa 197 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b 198 case IRQ_SET_MASK_OK_NOCOPY:
19e1d4e9 199 irq_validate_effective_affinity(data);
818b0f3b
JL
200 irq_set_thread_affinity(desc);
201 ret = 0;
202 }
203
204 return ret;
205}
206
01f8fa4f
TG
207int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
208 bool force)
771ee3b0 209{
c2d0c555
DD
210 struct irq_chip *chip = irq_data_get_irq_chip(data);
211 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 212 int ret = 0;
771ee3b0 213
c2d0c555 214 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
215 return -EINVAL;
216
0ef5ca1e 217 if (irq_can_move_pcntxt(data)) {
01f8fa4f 218 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 219 } else {
c2d0c555 220 irqd_set_move_pending(data);
1fa46f1f 221 irq_copy_pending(desc, mask);
57b150cc 222 }
1fa46f1f 223
cd7eab44
BH
224 if (desc->affinity_notify) {
225 kref_get(&desc->affinity_notify->kref);
226 schedule_work(&desc->affinity_notify->work);
227 }
c2d0c555
DD
228 irqd_set(data, IRQD_AFFINITY_SET);
229
230 return ret;
231}
232
01f8fa4f 233int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
234{
235 struct irq_desc *desc = irq_to_desc(irq);
236 unsigned long flags;
237 int ret;
238
239 if (!desc)
240 return -EINVAL;
241
242 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 243 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 244 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 245 return ret;
771ee3b0
TG
246}
247
e7a297b0
PWJ
248int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
249{
e7a297b0 250 unsigned long flags;
31d9d9b6 251 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
252
253 if (!desc)
254 return -EINVAL;
e7a297b0 255 desc->affinity_hint = m;
02725e74 256 irq_put_desc_unlock(desc, flags);
e2e64a93 257 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
258 if (m)
259 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
260 return 0;
261}
262EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
263
cd7eab44
BH
264static void irq_affinity_notify(struct work_struct *work)
265{
266 struct irq_affinity_notify *notify =
267 container_of(work, struct irq_affinity_notify, work);
268 struct irq_desc *desc = irq_to_desc(notify->irq);
269 cpumask_var_t cpumask;
270 unsigned long flags;
271
1fa46f1f 272 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
273 goto out;
274
275 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 276 if (irq_move_pending(&desc->irq_data))
1fa46f1f 277 irq_get_pending(cpumask, desc);
cd7eab44 278 else
9df872fa 279 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
280 raw_spin_unlock_irqrestore(&desc->lock, flags);
281
282 notify->notify(notify, cpumask);
283
284 free_cpumask_var(cpumask);
285out:
286 kref_put(&notify->kref, notify->release);
287}
288
289/**
290 * irq_set_affinity_notifier - control notification of IRQ affinity changes
291 * @irq: Interrupt for which to enable/disable notification
292 * @notify: Context for notification, or %NULL to disable
293 * notification. Function pointers must be initialised;
294 * the other fields will be initialised by this function.
295 *
296 * Must be called in process context. Notification may only be enabled
297 * after the IRQ is allocated and must be disabled before the IRQ is
298 * freed using free_irq().
299 */
300int
301irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
302{
303 struct irq_desc *desc = irq_to_desc(irq);
304 struct irq_affinity_notify *old_notify;
305 unsigned long flags;
306
307 /* The release function is promised process context */
308 might_sleep();
309
310 if (!desc)
311 return -EINVAL;
312
313 /* Complete initialisation of *notify */
314 if (notify) {
315 notify->irq = irq;
316 kref_init(&notify->kref);
317 INIT_WORK(&notify->work, irq_affinity_notify);
318 }
319
320 raw_spin_lock_irqsave(&desc->lock, flags);
321 old_notify = desc->affinity_notify;
322 desc->affinity_notify = notify;
323 raw_spin_unlock_irqrestore(&desc->lock, flags);
324
325 if (old_notify)
326 kref_put(&old_notify->kref, old_notify->release);
327
328 return 0;
329}
330EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
331
18404756
MK
332#ifndef CONFIG_AUTO_IRQ_AFFINITY
333/*
334 * Generic version of the affinity autoselector.
335 */
43564bd9 336int irq_setup_affinity(struct irq_desc *desc)
18404756 337{
569bda8d 338 struct cpumask *set = irq_default_affinity;
cba4235e
TG
339 int ret, node = irq_desc_get_node(desc);
340 static DEFINE_RAW_SPINLOCK(mask_lock);
341 static struct cpumask mask;
569bda8d 342
b008207c 343 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 344 if (!__irq_can_set_affinity(desc))
18404756
MK
345 return 0;
346
cba4235e 347 raw_spin_lock(&mask_lock);
f6d87f4b 348 /*
9332ef9d 349 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 350 * setup, but make sure that one of the targets is online.
f6d87f4b 351 */
06ee6d57
TG
352 if (irqd_affinity_is_managed(&desc->irq_data) ||
353 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 354 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 355 cpu_online_mask))
9df872fa 356 set = desc->irq_common_data.affinity;
0c6f8a8b 357 else
2bdd1055 358 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 359 }
18404756 360
cba4235e 361 cpumask_and(&mask, cpu_online_mask, set);
241fc640
PB
362 if (node != NUMA_NO_NODE) {
363 const struct cpumask *nodemask = cpumask_of_node(node);
364
365 /* make sure at least one of the cpus in nodemask is online */
cba4235e
TG
366 if (cpumask_intersects(&mask, nodemask))
367 cpumask_and(&mask, &mask, nodemask);
241fc640 368 }
cba4235e
TG
369 ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
370 raw_spin_unlock(&mask_lock);
371 return ret;
18404756 372}
f6d87f4b 373#else
a8a98eac 374/* Wrapper for ALPHA specific affinity selector magic */
cba4235e 375int irq_setup_affinity(struct irq_desc *desc)
f6d87f4b 376{
cba4235e 377 return irq_select_affinity(irq_desc_get_irq(desc));
f6d87f4b 378}
18404756
MK
379#endif
380
f6d87f4b 381/*
cba4235e 382 * Called when a bogus affinity is set via /proc/irq
f6d87f4b 383 */
cba4235e 384int irq_select_affinity_usr(unsigned int irq)
f6d87f4b
TG
385{
386 struct irq_desc *desc = irq_to_desc(irq);
387 unsigned long flags;
388 int ret;
389
239007b8 390 raw_spin_lock_irqsave(&desc->lock, flags);
cba4235e 391 ret = irq_setup_affinity(desc);
239007b8 392 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
393 return ret;
394}
1da177e4
LT
395#endif
396
fcf1ae2f
FW
397/**
398 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
399 * @irq: interrupt number to set affinity
250a53d6
CD
400 * @vcpu_info: vCPU specific data or pointer to a percpu array of vCPU
401 * specific data for percpu_devid interrupts
fcf1ae2f
FW
402 *
403 * This function uses the vCPU specific data to set the vCPU
404 * affinity for an irq. The vCPU specific data is passed from
405 * outside, such as KVM. One example code path is as below:
406 * KVM -> IOMMU -> irq_set_vcpu_affinity().
407 */
408int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
409{
410 unsigned long flags;
411 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
412 struct irq_data *data;
413 struct irq_chip *chip;
414 int ret = -ENOSYS;
415
416 if (!desc)
417 return -EINVAL;
418
419 data = irq_desc_get_irq_data(desc);
0abce64a
MZ
420 do {
421 chip = irq_data_get_irq_chip(data);
422 if (chip && chip->irq_set_vcpu_affinity)
423 break;
424#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
425 data = data->parent_data;
426#else
427 data = NULL;
428#endif
429 } while (data);
430
431 if (data)
fcf1ae2f
FW
432 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
433 irq_put_desc_unlock(desc, flags);
434
435 return ret;
436}
437EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
438
79ff1cda 439void __disable_irq(struct irq_desc *desc)
0a0c5168 440{
3aae994f 441 if (!desc->depth++)
87923470 442 irq_disable(desc);
0a0c5168
RW
443}
444
02725e74
TG
445static int __disable_irq_nosync(unsigned int irq)
446{
447 unsigned long flags;
31d9d9b6 448 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
449
450 if (!desc)
451 return -EINVAL;
79ff1cda 452 __disable_irq(desc);
02725e74
TG
453 irq_put_desc_busunlock(desc, flags);
454 return 0;
455}
456
1da177e4
LT
457/**
458 * disable_irq_nosync - disable an irq without waiting
459 * @irq: Interrupt to disable
460 *
461 * Disable the selected interrupt line. Disables and Enables are
462 * nested.
463 * Unlike disable_irq(), this function does not ensure existing
464 * instances of the IRQ handler have completed before returning.
465 *
466 * This function may be called from IRQ context.
467 */
468void disable_irq_nosync(unsigned int irq)
469{
02725e74 470 __disable_irq_nosync(irq);
1da177e4 471}
1da177e4
LT
472EXPORT_SYMBOL(disable_irq_nosync);
473
474/**
475 * disable_irq - disable an irq and wait for completion
476 * @irq: Interrupt to disable
477 *
478 * Disable the selected interrupt line. Enables and Disables are
479 * nested.
480 * This function waits for any pending IRQ handlers for this interrupt
481 * to complete before returning. If you use this function while
482 * holding a resource the IRQ handler may need you will deadlock.
483 *
484 * This function may be called - with care - from IRQ context.
485 */
486void disable_irq(unsigned int irq)
487{
02725e74 488 if (!__disable_irq_nosync(irq))
1da177e4
LT
489 synchronize_irq(irq);
490}
1da177e4
LT
491EXPORT_SYMBOL(disable_irq);
492
02cea395
PZ
493/**
494 * disable_hardirq - disables an irq and waits for hardirq completion
495 * @irq: Interrupt to disable
496 *
497 * Disable the selected interrupt line. Enables and Disables are
498 * nested.
499 * This function waits for any pending hard IRQ handlers for this
500 * interrupt to complete before returning. If you use this function while
501 * holding a resource the hard IRQ handler may need you will deadlock.
502 *
503 * When used to optimistically disable an interrupt from atomic context
504 * the return value must be checked.
505 *
506 * Returns: false if a threaded handler is active.
507 *
508 * This function may be called - with care - from IRQ context.
509 */
510bool disable_hardirq(unsigned int irq)
511{
512 if (!__disable_irq_nosync(irq))
513 return synchronize_hardirq(irq);
514
515 return false;
516}
517EXPORT_SYMBOL_GPL(disable_hardirq);
518
79ff1cda 519void __enable_irq(struct irq_desc *desc)
1adb0850
TG
520{
521 switch (desc->depth) {
522 case 0:
0a0c5168 523 err_out:
79ff1cda
JL
524 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
525 irq_desc_get_irq(desc));
1adb0850
TG
526 break;
527 case 1: {
c531e836 528 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 529 goto err_out;
1adb0850 530 /* Prevent probing on this irq: */
1ccb4e61 531 irq_settings_set_noprobe(desc);
201d7f47
TG
532 /*
533 * Call irq_startup() not irq_enable() here because the
534 * interrupt might be marked NOAUTOEN. So irq_startup()
535 * needs to be invoked when it gets enabled the first
536 * time. If it was already started up, then irq_startup()
537 * will invoke irq_enable() under the hood.
538 */
c942cee4 539 irq_startup(desc, IRQ_RESEND, IRQ_START_FORCE);
201d7f47 540 break;
1adb0850
TG
541 }
542 default:
543 desc->depth--;
544 }
545}
546
1da177e4
LT
547/**
548 * enable_irq - enable handling of an irq
549 * @irq: Interrupt to enable
550 *
551 * Undoes the effect of one call to disable_irq(). If this
552 * matches the last disable, processing of interrupts on this
553 * IRQ line is re-enabled.
554 *
70aedd24 555 * This function may be called from IRQ context only when
6b8ff312 556 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
557 */
558void enable_irq(unsigned int irq)
559{
1da177e4 560 unsigned long flags;
31d9d9b6 561 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 562
7d94f7ca 563 if (!desc)
c2b5a251 564 return;
50f7c032
TG
565 if (WARN(!desc->irq_data.chip,
566 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 567 goto out;
2656c366 568
79ff1cda 569 __enable_irq(desc);
02725e74
TG
570out:
571 irq_put_desc_busunlock(desc, flags);
1da177e4 572}
1da177e4
LT
573EXPORT_SYMBOL(enable_irq);
574
0c5d1eb7 575static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 576{
08678b08 577 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
578 int ret = -ENXIO;
579
60f96b41
SS
580 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
581 return 0;
582
2f7e99bb
TG
583 if (desc->irq_data.chip->irq_set_wake)
584 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
585
586 return ret;
587}
588
ba9a2331 589/**
a0cd9ca2 590 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
591 * @irq: interrupt to control
592 * @on: enable/disable power management wakeup
593 *
15a647eb
DB
594 * Enable/disable power management wakeup mode, which is
595 * disabled by default. Enables and disables must match,
596 * just as they match for non-wakeup mode support.
597 *
598 * Wakeup mode lets this IRQ wake the system from sleep
599 * states like "suspend to RAM".
ba9a2331 600 */
a0cd9ca2 601int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 602{
ba9a2331 603 unsigned long flags;
31d9d9b6 604 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 605 int ret = 0;
ba9a2331 606
13863a66
JJ
607 if (!desc)
608 return -EINVAL;
609
15a647eb
DB
610 /* wakeup-capable irqs can be shared between drivers that
611 * don't need to have the same sleep mode behaviors.
612 */
15a647eb 613 if (on) {
2db87321
UKK
614 if (desc->wake_depth++ == 0) {
615 ret = set_irq_wake_real(irq, on);
616 if (ret)
617 desc->wake_depth = 0;
618 else
7f94226f 619 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 620 }
15a647eb
DB
621 } else {
622 if (desc->wake_depth == 0) {
7a2c4770 623 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
624 } else if (--desc->wake_depth == 0) {
625 ret = set_irq_wake_real(irq, on);
626 if (ret)
627 desc->wake_depth = 1;
628 else
7f94226f 629 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 630 }
15a647eb 631 }
02725e74 632 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
633 return ret;
634}
a0cd9ca2 635EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 636
1da177e4
LT
637/*
638 * Internal function that tells the architecture code whether a
639 * particular irq has been exclusively allocated or is available
640 * for driver use.
641 */
642int can_request_irq(unsigned int irq, unsigned long irqflags)
643{
cc8c3b78 644 unsigned long flags;
31d9d9b6 645 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 646 int canrequest = 0;
1da177e4 647
7d94f7ca
YL
648 if (!desc)
649 return 0;
650
02725e74 651 if (irq_settings_can_request(desc)) {
2779db8d
BH
652 if (!desc->action ||
653 irqflags & desc->action->flags & IRQF_SHARED)
654 canrequest = 1;
02725e74
TG
655 }
656 irq_put_desc_unlock(desc, flags);
657 return canrequest;
1da177e4
LT
658}
659
a1ff541a 660int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 661{
6b8ff312 662 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 663 int ret, unmask = 0;
82736f4d 664
b2ba2c30 665 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
666 /*
667 * IRQF_TRIGGER_* but the PIC does not support multiple
668 * flow-types?
669 */
a1ff541a
JL
670 pr_debug("No set_type function for IRQ %d (%s)\n",
671 irq_desc_get_irq(desc),
f5d89470 672 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
673 return 0;
674 }
675
d4d5e089 676 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 677 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 678 mask_irq(desc);
32f4125e 679 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
680 unmask = 1;
681 }
682
00b992de
AK
683 /* Mask all flags except trigger mode */
684 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 685 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 686
876dbd4c
TG
687 switch (ret) {
688 case IRQ_SET_MASK_OK:
2cb62547 689 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
690 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
691 irqd_set(&desc->irq_data, flags);
692
693 case IRQ_SET_MASK_OK_NOCOPY:
694 flags = irqd_get_trigger_type(&desc->irq_data);
695 irq_settings_set_trigger_mask(desc, flags);
696 irqd_clear(&desc->irq_data, IRQD_LEVEL);
697 irq_settings_clr_level(desc);
698 if (flags & IRQ_TYPE_LEVEL_MASK) {
699 irq_settings_set_level(desc);
700 irqd_set(&desc->irq_data, IRQD_LEVEL);
701 }
46732475 702
d4d5e089 703 ret = 0;
8fff39e0 704 break;
876dbd4c 705 default:
97fd75b7 706 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 707 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 708 }
d4d5e089
TG
709 if (unmask)
710 unmask_irq(desc);
82736f4d
UKK
711 return ret;
712}
713
293a7a0a
TG
714#ifdef CONFIG_HARDIRQS_SW_RESEND
715int irq_set_parent(int irq, int parent_irq)
716{
717 unsigned long flags;
718 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
719
720 if (!desc)
721 return -EINVAL;
722
723 desc->parent_irq = parent_irq;
724
725 irq_put_desc_unlock(desc, flags);
726 return 0;
727}
3118dac5 728EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
729#endif
730
b25c340c
TG
731/*
732 * Default primary interrupt handler for threaded interrupts. Is
733 * assigned as primary handler when request_threaded_irq is called
734 * with handler == NULL. Useful for oneshot interrupts.
735 */
736static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
737{
738 return IRQ_WAKE_THREAD;
739}
740
399b5da2
TG
741/*
742 * Primary handler for nested threaded interrupts. Should never be
743 * called.
744 */
745static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
746{
747 WARN(1, "Primary handler called for nested irq %d\n", irq);
748 return IRQ_NONE;
749}
750
2a1d3ab8
TG
751static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
752{
753 WARN(1, "Secondary action handler called for irq %d\n", irq);
754 return IRQ_NONE;
755}
756
3aa551c9
TG
757static int irq_wait_for_interrupt(struct irqaction *action)
758{
550acb19
IY
759 set_current_state(TASK_INTERRUPTIBLE);
760
3aa551c9 761 while (!kthread_should_stop()) {
f48fe81e
TG
762
763 if (test_and_clear_bit(IRQTF_RUNTHREAD,
764 &action->thread_flags)) {
3aa551c9
TG
765 __set_current_state(TASK_RUNNING);
766 return 0;
f48fe81e
TG
767 }
768 schedule();
550acb19 769 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 770 }
550acb19 771 __set_current_state(TASK_RUNNING);
3aa551c9
TG
772 return -1;
773}
774
b25c340c
TG
775/*
776 * Oneshot interrupts keep the irq line masked until the threaded
777 * handler finished. unmask if the interrupt has not been disabled and
778 * is marked MASKED.
779 */
b5faba21 780static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 781 struct irqaction *action)
b25c340c 782{
2a1d3ab8
TG
783 if (!(desc->istate & IRQS_ONESHOT) ||
784 action->handler == irq_forced_secondary_handler)
b5faba21 785 return;
0b1adaa0 786again:
3876ec9e 787 chip_bus_lock(desc);
239007b8 788 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
789
790 /*
791 * Implausible though it may be we need to protect us against
792 * the following scenario:
793 *
794 * The thread is faster done than the hard interrupt handler
795 * on the other CPU. If we unmask the irq line then the
796 * interrupt can come in again and masks the line, leaves due
009b4c3b 797 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
798 *
799 * This also serializes the state of shared oneshot handlers
800 * versus "desc->threads_onehsot |= action->thread_mask;" in
801 * irq_wake_thread(). See the comment there which explains the
802 * serialization.
0b1adaa0 803 */
32f4125e 804 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 805 raw_spin_unlock_irq(&desc->lock);
3876ec9e 806 chip_bus_sync_unlock(desc);
0b1adaa0
TG
807 cpu_relax();
808 goto again;
809 }
810
b5faba21
TG
811 /*
812 * Now check again, whether the thread should run. Otherwise
813 * we would clear the threads_oneshot bit of this thread which
814 * was just set.
815 */
f3f79e38 816 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
817 goto out_unlock;
818
819 desc->threads_oneshot &= ~action->thread_mask;
820
32f4125e
TG
821 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
822 irqd_irq_masked(&desc->irq_data))
328a4978 823 unmask_threaded_irq(desc);
32f4125e 824
b5faba21 825out_unlock:
239007b8 826 raw_spin_unlock_irq(&desc->lock);
3876ec9e 827 chip_bus_sync_unlock(desc);
b25c340c
TG
828}
829
61f38261 830#ifdef CONFIG_SMP
591d2fb0 831/*
b04c644e 832 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
833 */
834static void
835irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
836{
837 cpumask_var_t mask;
04aa530e 838 bool valid = true;
591d2fb0
TG
839
840 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
841 return;
842
843 /*
844 * In case we are out of memory we set IRQTF_AFFINITY again and
845 * try again next time
846 */
847 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
848 set_bit(IRQTF_AFFINITY, &action->thread_flags);
849 return;
850 }
851
239007b8 852 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
853 /*
854 * This code is triggered unconditionally. Check the affinity
855 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
856 */
cbf86999
TG
857 if (cpumask_available(desc->irq_common_data.affinity)) {
858 const struct cpumask *m;
859
860 m = irq_data_get_effective_affinity_mask(&desc->irq_data);
861 cpumask_copy(mask, m);
862 } else {
04aa530e 863 valid = false;
cbf86999 864 }
239007b8 865 raw_spin_unlock_irq(&desc->lock);
591d2fb0 866
04aa530e
TG
867 if (valid)
868 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
869 free_cpumask_var(mask);
870}
61f38261
BP
871#else
872static inline void
873irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
874#endif
591d2fb0 875
8d32a307
TG
876/*
877 * Interrupts which are not explicitely requested as threaded
878 * interrupts rely on the implicit bh/preempt disable of the hard irq
879 * context. So we need to disable bh here to avoid deadlocks and other
880 * side effects.
881 */
3a43e05f 882static irqreturn_t
8d32a307
TG
883irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
884{
3a43e05f
SAS
885 irqreturn_t ret;
886
8d32a307 887 local_bh_disable();
3a43e05f 888 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 889 irq_finalize_oneshot(desc, action);
8d32a307 890 local_bh_enable();
3a43e05f 891 return ret;
8d32a307
TG
892}
893
894/*
f788e7bf 895 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
896 * preemtible - many of them need to sleep and wait for slow busses to
897 * complete.
898 */
3a43e05f
SAS
899static irqreturn_t irq_thread_fn(struct irq_desc *desc,
900 struct irqaction *action)
8d32a307 901{
3a43e05f
SAS
902 irqreturn_t ret;
903
904 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 905 irq_finalize_oneshot(desc, action);
3a43e05f 906 return ret;
8d32a307
TG
907}
908
7140ea19
IY
909static void wake_threads_waitq(struct irq_desc *desc)
910{
c685689f 911 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
912 wake_up(&desc->wait_for_threads);
913}
914
67d12145 915static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
916{
917 struct task_struct *tsk = current;
918 struct irq_desc *desc;
919 struct irqaction *action;
920
921 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
922 return;
923
924 action = kthread_data(tsk);
925
fb21affa 926 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 927 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
928
929
930 desc = irq_to_desc(action->irq);
931 /*
932 * If IRQTF_RUNTHREAD is set, we need to decrement
933 * desc->threads_active and wake possible waiters.
934 */
935 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
936 wake_threads_waitq(desc);
937
938 /* Prevent a stale desc->threads_oneshot */
939 irq_finalize_oneshot(desc, action);
940}
941
2a1d3ab8
TG
942static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
943{
944 struct irqaction *secondary = action->secondary;
945
946 if (WARN_ON_ONCE(!secondary))
947 return;
948
949 raw_spin_lock_irq(&desc->lock);
950 __irq_wake_thread(desc, secondary);
951 raw_spin_unlock_irq(&desc->lock);
952}
953
3aa551c9
TG
954/*
955 * Interrupt handler thread
956 */
957static int irq_thread(void *data)
958{
67d12145 959 struct callback_head on_exit_work;
3aa551c9
TG
960 struct irqaction *action = data;
961 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
962 irqreturn_t (*handler_fn)(struct irq_desc *desc,
963 struct irqaction *action);
3aa551c9 964
540b60e2 965 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
966 &action->thread_flags))
967 handler_fn = irq_forced_thread_fn;
968 else
969 handler_fn = irq_thread_fn;
970
41f9d29f 971 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 972 task_work_add(current, &on_exit_work, false);
3aa551c9 973
f3de44ed
SM
974 irq_thread_check_affinity(desc, action);
975
3aa551c9 976 while (!irq_wait_for_interrupt(action)) {
7140ea19 977 irqreturn_t action_ret;
3aa551c9 978
591d2fb0
TG
979 irq_thread_check_affinity(desc, action);
980
7140ea19 981 action_ret = handler_fn(desc, action);
1e77d0a1
TG
982 if (action_ret == IRQ_HANDLED)
983 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
984 if (action_ret == IRQ_WAKE_THREAD)
985 irq_wake_secondary(desc, action);
3aa551c9 986
7140ea19 987 wake_threads_waitq(desc);
3aa551c9
TG
988 }
989
7140ea19
IY
990 /*
991 * This is the regular exit path. __free_irq() is stopping the
992 * thread via kthread_stop() after calling
993 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
994 * oneshot mask bit can be set. We cannot verify that as we
995 * cannot touch the oneshot mask at this point anymore as
996 * __setup_irq() might have given out currents thread_mask
997 * again.
3aa551c9 998 */
4d1d61a6 999 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
1000 return 0;
1001}
1002
a92444c6
TG
1003/**
1004 * irq_wake_thread - wake the irq thread for the action identified by dev_id
1005 * @irq: Interrupt line
1006 * @dev_id: Device identity for which the thread should be woken
1007 *
1008 */
1009void irq_wake_thread(unsigned int irq, void *dev_id)
1010{
1011 struct irq_desc *desc = irq_to_desc(irq);
1012 struct irqaction *action;
1013 unsigned long flags;
1014
1015 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1016 return;
1017
1018 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 1019 for_each_action_of_desc(desc, action) {
a92444c6
TG
1020 if (action->dev_id == dev_id) {
1021 if (action->thread)
1022 __irq_wake_thread(desc, action);
1023 break;
1024 }
1025 }
1026 raw_spin_unlock_irqrestore(&desc->lock, flags);
1027}
1028EXPORT_SYMBOL_GPL(irq_wake_thread);
1029
2a1d3ab8 1030static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1031{
1032 if (!force_irqthreads)
2a1d3ab8 1033 return 0;
8d32a307 1034 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1035 return 0;
8d32a307
TG
1036
1037 new->flags |= IRQF_ONESHOT;
1038
2a1d3ab8
TG
1039 /*
1040 * Handle the case where we have a real primary handler and a
1041 * thread handler. We force thread them as well by creating a
1042 * secondary action.
1043 */
1044 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1045 /* Allocate the secondary action */
1046 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1047 if (!new->secondary)
1048 return -ENOMEM;
1049 new->secondary->handler = irq_forced_secondary_handler;
1050 new->secondary->thread_fn = new->thread_fn;
1051 new->secondary->dev_id = new->dev_id;
1052 new->secondary->irq = new->irq;
1053 new->secondary->name = new->name;
8d32a307 1054 }
2a1d3ab8
TG
1055 /* Deal with the primary handler */
1056 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1057 new->thread_fn = new->handler;
1058 new->handler = irq_default_primary_handler;
1059 return 0;
8d32a307
TG
1060}
1061
c1bacbae
TG
1062static int irq_request_resources(struct irq_desc *desc)
1063{
1064 struct irq_data *d = &desc->irq_data;
1065 struct irq_chip *c = d->chip;
1066
1067 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1068}
1069
1070static void irq_release_resources(struct irq_desc *desc)
1071{
1072 struct irq_data *d = &desc->irq_data;
1073 struct irq_chip *c = d->chip;
1074
1075 if (c->irq_release_resources)
1076 c->irq_release_resources(d);
1077}
1078
2a1d3ab8
TG
1079static int
1080setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1081{
1082 struct task_struct *t;
1083 struct sched_param param = {
1084 .sched_priority = MAX_USER_RT_PRIO/2,
1085 };
1086
1087 if (!secondary) {
1088 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1089 new->name);
1090 } else {
1091 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1092 new->name);
1093 param.sched_priority -= 1;
1094 }
1095
1096 if (IS_ERR(t))
1097 return PTR_ERR(t);
1098
1099 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1100
1101 /*
1102 * We keep the reference to the task struct even if
1103 * the thread dies to avoid that the interrupt code
1104 * references an already freed task_struct.
1105 */
1106 get_task_struct(t);
1107 new->thread = t;
1108 /*
1109 * Tell the thread to set its affinity. This is
1110 * important for shared interrupt handlers as we do
1111 * not invoke setup_affinity() for the secondary
1112 * handlers as everything is already set up. Even for
1113 * interrupts marked with IRQF_NO_BALANCE this is
1114 * correct as we want the thread to move to the cpu(s)
1115 * on which the requesting code placed the interrupt.
1116 */
1117 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1118 return 0;
1119}
1120
1da177e4
LT
1121/*
1122 * Internal function to register an irqaction - typically used to
1123 * allocate special interrupts that are part of the architecture.
19d39a38
TG
1124 *
1125 * Locking rules:
1126 *
1127 * desc->request_mutex Provides serialization against a concurrent free_irq()
1128 * chip_bus_lock Provides serialization for slow bus operations
1129 * desc->lock Provides serialization against hard interrupts
1130 *
1131 * chip_bus_lock and desc->lock are sufficient for all other management and
1132 * interrupt related functions. desc->request_mutex solely serializes
1133 * request/free_irq().
1da177e4 1134 */
d3c60047 1135static int
327ec569 1136__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1137{
f17c7545 1138 struct irqaction *old, **old_ptr;
b5faba21 1139 unsigned long flags, thread_mask = 0;
3b8249e7 1140 int ret, nested, shared = 0;
1da177e4 1141
7d94f7ca 1142 if (!desc)
c2b5a251
MW
1143 return -EINVAL;
1144
6b8ff312 1145 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1146 return -ENOSYS;
b6873807
SAS
1147 if (!try_module_get(desc->owner))
1148 return -ENODEV;
1da177e4 1149
2a1d3ab8
TG
1150 new->irq = irq;
1151
4b357dae
JH
1152 /*
1153 * If the trigger type is not specified by the caller,
1154 * then use the default for this interrupt.
1155 */
1156 if (!(new->flags & IRQF_TRIGGER_MASK))
1157 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1158
3aa551c9 1159 /*
399b5da2
TG
1160 * Check whether the interrupt nests into another interrupt
1161 * thread.
1162 */
1ccb4e61 1163 nested = irq_settings_is_nested_thread(desc);
399b5da2 1164 if (nested) {
b6873807
SAS
1165 if (!new->thread_fn) {
1166 ret = -EINVAL;
1167 goto out_mput;
1168 }
399b5da2
TG
1169 /*
1170 * Replace the primary handler which was provided from
1171 * the driver for non nested interrupt handling by the
1172 * dummy function which warns when called.
1173 */
1174 new->handler = irq_nested_primary_handler;
8d32a307 1175 } else {
2a1d3ab8
TG
1176 if (irq_settings_can_thread(desc)) {
1177 ret = irq_setup_forced_threading(new);
1178 if (ret)
1179 goto out_mput;
1180 }
399b5da2
TG
1181 }
1182
3aa551c9 1183 /*
399b5da2
TG
1184 * Create a handler thread when a thread function is supplied
1185 * and the interrupt does not nest into another interrupt
1186 * thread.
3aa551c9 1187 */
399b5da2 1188 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1189 ret = setup_irq_thread(new, irq, false);
1190 if (ret)
b6873807 1191 goto out_mput;
2a1d3ab8
TG
1192 if (new->secondary) {
1193 ret = setup_irq_thread(new->secondary, irq, true);
1194 if (ret)
1195 goto out_thread;
b6873807 1196 }
3aa551c9
TG
1197 }
1198
dc9b229a
TG
1199 /*
1200 * Drivers are often written to work w/o knowledge about the
1201 * underlying irq chip implementation, so a request for a
1202 * threaded irq without a primary hard irq context handler
1203 * requires the ONESHOT flag to be set. Some irq chips like
1204 * MSI based interrupts are per se one shot safe. Check the
1205 * chip flags, so we can avoid the unmask dance at the end of
1206 * the threaded handler for those.
1207 */
1208 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1209 new->flags &= ~IRQF_ONESHOT;
1210
19d39a38
TG
1211 /*
1212 * Protects against a concurrent __free_irq() call which might wait
1213 * for synchronize_irq() to complete without holding the optional
1214 * chip bus lock and desc->lock.
1215 */
9114014c 1216 mutex_lock(&desc->request_mutex);
19d39a38
TG
1217
1218 /*
1219 * Acquire bus lock as the irq_request_resources() callback below
1220 * might rely on the serialization or the magic power management
1221 * functions which are abusing the irq_bus_lock() callback,
1222 */
1223 chip_bus_lock(desc);
1224
1225 /* First installed action requests resources. */
46e48e25
TG
1226 if (!desc->action) {
1227 ret = irq_request_resources(desc);
1228 if (ret) {
1229 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1230 new->name, irq, desc->irq_data.chip->name);
19d39a38 1231 goto out_bus_unlock;
46e48e25
TG
1232 }
1233 }
9114014c 1234
1da177e4
LT
1235 /*
1236 * The following block of code has to be executed atomically
19d39a38
TG
1237 * protected against a concurrent interrupt and any of the other
1238 * management calls which are not serialized via
1239 * desc->request_mutex or the optional bus lock.
1da177e4 1240 */
239007b8 1241 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1242 old_ptr = &desc->action;
1243 old = *old_ptr;
06fcb0c6 1244 if (old) {
e76de9f8
TG
1245 /*
1246 * Can't share interrupts unless both agree to and are
1247 * the same type (level, edge, polarity). So both flag
3cca53b0 1248 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1249 * set the trigger type must match. Also all must
1250 * agree on ONESHOT.
e76de9f8 1251 */
4f8413a3
MZ
1252 unsigned int oldtype;
1253
1254 /*
1255 * If nobody did set the configuration before, inherit
1256 * the one provided by the requester.
1257 */
1258 if (irqd_trigger_type_was_set(&desc->irq_data)) {
1259 oldtype = irqd_get_trigger_type(&desc->irq_data);
1260 } else {
1261 oldtype = new->flags & IRQF_TRIGGER_MASK;
1262 irqd_set_trigger_type(&desc->irq_data, oldtype);
1263 }
382bd4de 1264
3cca53b0 1265 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1266 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1267 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1268 goto mismatch;
1269
f5163427 1270 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1271 if ((old->flags & IRQF_PERCPU) !=
1272 (new->flags & IRQF_PERCPU))
f5163427 1273 goto mismatch;
1da177e4
LT
1274
1275 /* add new interrupt at end of irq queue */
1276 do {
52abb700
TG
1277 /*
1278 * Or all existing action->thread_mask bits,
1279 * so we can find the next zero bit for this
1280 * new action.
1281 */
b5faba21 1282 thread_mask |= old->thread_mask;
f17c7545
IM
1283 old_ptr = &old->next;
1284 old = *old_ptr;
1da177e4
LT
1285 } while (old);
1286 shared = 1;
1287 }
1288
b5faba21 1289 /*
52abb700
TG
1290 * Setup the thread mask for this irqaction for ONESHOT. For
1291 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1292 * conditional in irq_wake_thread().
b5faba21 1293 */
52abb700
TG
1294 if (new->flags & IRQF_ONESHOT) {
1295 /*
1296 * Unlikely to have 32 resp 64 irqs sharing one line,
1297 * but who knows.
1298 */
1299 if (thread_mask == ~0UL) {
1300 ret = -EBUSY;
cba4235e 1301 goto out_unlock;
52abb700
TG
1302 }
1303 /*
1304 * The thread_mask for the action is or'ed to
1305 * desc->thread_active to indicate that the
1306 * IRQF_ONESHOT thread handler has been woken, but not
1307 * yet finished. The bit is cleared when a thread
1308 * completes. When all threads of a shared interrupt
1309 * line have completed desc->threads_active becomes
1310 * zero and the interrupt line is unmasked. See
1311 * handle.c:irq_wake_thread() for further information.
1312 *
1313 * If no thread is woken by primary (hard irq context)
1314 * interrupt handlers, then desc->threads_active is
1315 * also checked for zero to unmask the irq line in the
1316 * affected hard irq flow handlers
1317 * (handle_[fasteoi|level]_irq).
1318 *
1319 * The new action gets the first zero bit of
1320 * thread_mask assigned. See the loop above which or's
1321 * all existing action->thread_mask bits.
1322 */
ffc661c9 1323 new->thread_mask = 1UL << ffz(thread_mask);
1c6c6952 1324
dc9b229a
TG
1325 } else if (new->handler == irq_default_primary_handler &&
1326 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1327 /*
1328 * The interrupt was requested with handler = NULL, so
1329 * we use the default primary handler for it. But it
1330 * does not have the oneshot flag set. In combination
1331 * with level interrupts this is deadly, because the
1332 * default primary handler just wakes the thread, then
1333 * the irq lines is reenabled, but the device still
1334 * has the level irq asserted. Rinse and repeat....
1335 *
1336 * While this works for edge type interrupts, we play
1337 * it safe and reject unconditionally because we can't
1338 * say for sure which type this interrupt really
1339 * has. The type flags are unreliable as the
1340 * underlying chip implementation can override them.
1341 */
97fd75b7 1342 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1343 irq);
1344 ret = -EINVAL;
cba4235e 1345 goto out_unlock;
b5faba21 1346 }
b5faba21 1347
1da177e4 1348 if (!shared) {
3aa551c9
TG
1349 init_waitqueue_head(&desc->wait_for_threads);
1350
e76de9f8 1351 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1352 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1353 ret = __irq_set_trigger(desc,
1354 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1355
19d39a38 1356 if (ret)
cba4235e 1357 goto out_unlock;
091738a2 1358 }
6a6de9ef 1359
c942cee4
TG
1360 /*
1361 * Activate the interrupt. That activation must happen
1362 * independently of IRQ_NOAUTOEN. request_irq() can fail
1363 * and the callers are supposed to handle
1364 * that. enable_irq() of an interrupt requested with
1365 * IRQ_NOAUTOEN is not supposed to fail. The activation
1366 * keeps it in shutdown mode, it merily associates
1367 * resources if necessary and if that's not possible it
1368 * fails. Interrupts which are in managed shutdown mode
1369 * will simply ignore that activation request.
1370 */
1371 ret = irq_activate(desc);
1372 if (ret)
1373 goto out_unlock;
1374
009b4c3b 1375 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1376 IRQS_ONESHOT | IRQS_WAITING);
1377 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1378
a005677b
TG
1379 if (new->flags & IRQF_PERCPU) {
1380 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1381 irq_settings_set_per_cpu(desc);
1382 }
6a58fb3b 1383
b25c340c 1384 if (new->flags & IRQF_ONESHOT)
3d67baec 1385 desc->istate |= IRQS_ONESHOT;
b25c340c 1386
2e051552
TG
1387 /* Exclude IRQ from balancing if requested */
1388 if (new->flags & IRQF_NOBALANCING) {
1389 irq_settings_set_no_balancing(desc);
1390 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1391 }
1392
04c848d3 1393 if (irq_settings_can_autoenable(desc)) {
4cde9c6b 1394 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
04c848d3
TG
1395 } else {
1396 /*
1397 * Shared interrupts do not go well with disabling
1398 * auto enable. The sharing interrupt might request
1399 * it while it's still disabled and then wait for
1400 * interrupts forever.
1401 */
1402 WARN_ON_ONCE(new->flags & IRQF_SHARED);
e76de9f8
TG
1403 /* Undo nested disables: */
1404 desc->depth = 1;
04c848d3 1405 }
18404756 1406
876dbd4c
TG
1407 } else if (new->flags & IRQF_TRIGGER_MASK) {
1408 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1409 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1410
1411 if (nmsk != omsk)
1412 /* hope the handler works with current trigger mode */
a395d6a7 1413 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1414 irq, omsk, nmsk);
1da177e4 1415 }
82736f4d 1416
f17c7545 1417 *old_ptr = new;
82736f4d 1418
cab303be
TG
1419 irq_pm_install_action(desc, new);
1420
8528b0f1
LT
1421 /* Reset broken irq detection when installing new handler */
1422 desc->irq_count = 0;
1423 desc->irqs_unhandled = 0;
1adb0850
TG
1424
1425 /*
1426 * Check whether we disabled the irq via the spurious handler
1427 * before. Reenable it and give it another chance.
1428 */
7acdd53e
TG
1429 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1430 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1431 __enable_irq(desc);
1adb0850
TG
1432 }
1433
239007b8 1434 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a90795e 1435 chip_bus_sync_unlock(desc);
9114014c 1436 mutex_unlock(&desc->request_mutex);
1da177e4 1437
b2d3d61a
DL
1438 irq_setup_timings(desc, new);
1439
69ab8494
TG
1440 /*
1441 * Strictly no need to wake it up, but hung_task complains
1442 * when no hard interrupt wakes the thread up.
1443 */
1444 if (new->thread)
1445 wake_up_process(new->thread);
2a1d3ab8
TG
1446 if (new->secondary)
1447 wake_up_process(new->secondary->thread);
69ab8494 1448
2c6927a3 1449 register_irq_proc(irq, desc);
1da177e4
LT
1450 new->dir = NULL;
1451 register_handler_proc(irq, new);
1da177e4 1452 return 0;
f5163427
DS
1453
1454mismatch:
3cca53b0 1455 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1456 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1457 irq, new->flags, new->name, old->flags, old->name);
1458#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1459 dump_stack();
3f050447 1460#endif
f5d89470 1461 }
3aa551c9
TG
1462 ret = -EBUSY;
1463
cba4235e 1464out_unlock:
1c389795 1465 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7 1466
46e48e25
TG
1467 if (!desc->action)
1468 irq_release_resources(desc);
19d39a38
TG
1469out_bus_unlock:
1470 chip_bus_sync_unlock(desc);
9114014c
TG
1471 mutex_unlock(&desc->request_mutex);
1472
3aa551c9 1473out_thread:
3aa551c9
TG
1474 if (new->thread) {
1475 struct task_struct *t = new->thread;
1476
1477 new->thread = NULL;
05d74efa 1478 kthread_stop(t);
3aa551c9
TG
1479 put_task_struct(t);
1480 }
2a1d3ab8
TG
1481 if (new->secondary && new->secondary->thread) {
1482 struct task_struct *t = new->secondary->thread;
1483
1484 new->secondary->thread = NULL;
1485 kthread_stop(t);
1486 put_task_struct(t);
1487 }
b6873807
SAS
1488out_mput:
1489 module_put(desc->owner);
3aa551c9 1490 return ret;
1da177e4
LT
1491}
1492
d3c60047
TG
1493/**
1494 * setup_irq - setup an interrupt
1495 * @irq: Interrupt line to setup
1496 * @act: irqaction for the interrupt
1497 *
1498 * Used to statically setup interrupts in the early boot process.
1499 */
1500int setup_irq(unsigned int irq, struct irqaction *act)
1501{
986c011d 1502 int retval;
d3c60047
TG
1503 struct irq_desc *desc = irq_to_desc(irq);
1504
9b5d585d 1505 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1506 return -EINVAL;
be45beb2
JH
1507
1508 retval = irq_chip_pm_get(&desc->irq_data);
1509 if (retval < 0)
1510 return retval;
1511
986c011d 1512 retval = __setup_irq(irq, desc, act);
986c011d 1513
be45beb2
JH
1514 if (retval)
1515 irq_chip_pm_put(&desc->irq_data);
1516
986c011d 1517 return retval;
d3c60047 1518}
eb53b4e8 1519EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1520
31d9d9b6 1521/*
cbf94f06
MD
1522 * Internal function to unregister an irqaction - used to free
1523 * regular and special interrupts that are part of the architecture.
1da177e4 1524 */
83ac4ca9 1525static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id)
1da177e4 1526{
83ac4ca9 1527 unsigned irq = desc->irq_data.irq;
f17c7545 1528 struct irqaction *action, **action_ptr;
1da177e4
LT
1529 unsigned long flags;
1530
ae88a23b 1531 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1532
7d94f7ca 1533 if (!desc)
f21cfb25 1534 return NULL;
1da177e4 1535
9114014c 1536 mutex_lock(&desc->request_mutex);
abc7e40c 1537 chip_bus_lock(desc);
239007b8 1538 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1539
1540 /*
1541 * There can be multiple actions per IRQ descriptor, find the right
1542 * one based on the dev_id:
1543 */
f17c7545 1544 action_ptr = &desc->action;
1da177e4 1545 for (;;) {
f17c7545 1546 action = *action_ptr;
1da177e4 1547
ae88a23b
IM
1548 if (!action) {
1549 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1550 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1551 chip_bus_sync_unlock(desc);
19d39a38 1552 mutex_unlock(&desc->request_mutex);
f21cfb25 1553 return NULL;
ae88a23b 1554 }
1da177e4 1555
8316e381
IM
1556 if (action->dev_id == dev_id)
1557 break;
f17c7545 1558 action_ptr = &action->next;
ae88a23b 1559 }
dbce706e 1560
ae88a23b 1561 /* Found it - now remove it from the list of entries: */
f17c7545 1562 *action_ptr = action->next;
ae88a23b 1563
cab303be
TG
1564 irq_pm_remove_action(desc, action);
1565
ae88a23b 1566 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1567 if (!desc->action) {
e9849777 1568 irq_settings_clr_disable_unlazy(desc);
46999238 1569 irq_shutdown(desc);
c1bacbae 1570 }
3aa551c9 1571
e7a297b0
PWJ
1572#ifdef CONFIG_SMP
1573 /* make sure affinity_hint is cleaned up */
1574 if (WARN_ON_ONCE(desc->affinity_hint))
1575 desc->affinity_hint = NULL;
1576#endif
1577
239007b8 1578 raw_spin_unlock_irqrestore(&desc->lock, flags);
19d39a38
TG
1579 /*
1580 * Drop bus_lock here so the changes which were done in the chip
1581 * callbacks above are synced out to the irq chips which hang
1582 * behind a slow bus (I2C, SPI) before calling synchronize_irq().
1583 *
1584 * Aside of that the bus_lock can also be taken from the threaded
1585 * handler in irq_finalize_oneshot() which results in a deadlock
1586 * because synchronize_irq() would wait forever for the thread to
1587 * complete, which is blocked on the bus lock.
1588 *
1589 * The still held desc->request_mutex() protects against a
1590 * concurrent request_irq() of this irq so the release of resources
1591 * and timing data is properly serialized.
1592 */
abc7e40c 1593 chip_bus_sync_unlock(desc);
ae88a23b
IM
1594
1595 unregister_handler_proc(irq, action);
1596
1597 /* Make sure it's not being used on another CPU: */
1598 synchronize_irq(irq);
1da177e4 1599
70edcd77 1600#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1601 /*
1602 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1603 * event to happen even now it's being freed, so let's make sure that
1604 * is so by doing an extra call to the handler ....
1605 *
1606 * ( We do this after actually deregistering it, to make sure that a
1607 * 'real' IRQ doesn't run in * parallel with our fake. )
1608 */
1609 if (action->flags & IRQF_SHARED) {
1610 local_irq_save(flags);
1611 action->handler(irq, dev_id);
1612 local_irq_restore(flags);
1da177e4 1613 }
ae88a23b 1614#endif
2d860ad7
LT
1615
1616 if (action->thread) {
05d74efa 1617 kthread_stop(action->thread);
2d860ad7 1618 put_task_struct(action->thread);
2a1d3ab8
TG
1619 if (action->secondary && action->secondary->thread) {
1620 kthread_stop(action->secondary->thread);
1621 put_task_struct(action->secondary->thread);
1622 }
2d860ad7
LT
1623 }
1624
19d39a38 1625 /* Last action releases resources */
2343877f 1626 if (!desc->action) {
19d39a38
TG
1627 /*
1628 * Reaquire bus lock as irq_release_resources() might
1629 * require it to deallocate resources over the slow bus.
1630 */
1631 chip_bus_lock(desc);
46e48e25 1632 irq_release_resources(desc);
19d39a38 1633 chip_bus_sync_unlock(desc);
2343877f
TG
1634 irq_remove_timings(desc);
1635 }
46e48e25 1636
9114014c
TG
1637 mutex_unlock(&desc->request_mutex);
1638
be45beb2 1639 irq_chip_pm_put(&desc->irq_data);
b6873807 1640 module_put(desc->owner);
2a1d3ab8 1641 kfree(action->secondary);
f21cfb25
MD
1642 return action;
1643}
1644
cbf94f06
MD
1645/**
1646 * remove_irq - free an interrupt
1647 * @irq: Interrupt line to free
1648 * @act: irqaction for the interrupt
1649 *
1650 * Used to remove interrupts statically setup by the early boot process.
1651 */
1652void remove_irq(unsigned int irq, struct irqaction *act)
1653{
31d9d9b6
MZ
1654 struct irq_desc *desc = irq_to_desc(irq);
1655
1656 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
83ac4ca9 1657 __free_irq(desc, act->dev_id);
cbf94f06 1658}
eb53b4e8 1659EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1660
f21cfb25
MD
1661/**
1662 * free_irq - free an interrupt allocated with request_irq
1663 * @irq: Interrupt line to free
1664 * @dev_id: Device identity to free
1665 *
1666 * Remove an interrupt handler. The handler is removed and if the
1667 * interrupt line is no longer in use by any driver it is disabled.
1668 * On a shared IRQ the caller must ensure the interrupt is disabled
1669 * on the card it drives before calling this function. The function
1670 * does not return until any executing interrupts for this IRQ
1671 * have completed.
1672 *
1673 * This function must not be called from interrupt context.
25ce4be7
CH
1674 *
1675 * Returns the devname argument passed to request_irq.
f21cfb25 1676 */
25ce4be7 1677const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1678{
70aedd24 1679 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1680 struct irqaction *action;
1681 const char *devname;
70aedd24 1682
31d9d9b6 1683 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1684 return NULL;
70aedd24 1685
cd7eab44
BH
1686#ifdef CONFIG_SMP
1687 if (WARN_ON(desc->affinity_notify))
1688 desc->affinity_notify = NULL;
1689#endif
1690
83ac4ca9 1691 action = __free_irq(desc, dev_id);
2827a418
AM
1692
1693 if (!action)
1694 return NULL;
1695
25ce4be7
CH
1696 devname = action->name;
1697 kfree(action);
1698 return devname;
1da177e4 1699}
1da177e4
LT
1700EXPORT_SYMBOL(free_irq);
1701
1702/**
3aa551c9 1703 * request_threaded_irq - allocate an interrupt line
1da177e4 1704 * @irq: Interrupt line to allocate
3aa551c9
TG
1705 * @handler: Function to be called when the IRQ occurs.
1706 * Primary handler for threaded interrupts
b25c340c
TG
1707 * If NULL and thread_fn != NULL the default
1708 * primary handler is installed
f48fe81e
TG
1709 * @thread_fn: Function called from the irq handler thread
1710 * If NULL, no irq thread is created
1da177e4
LT
1711 * @irqflags: Interrupt type flags
1712 * @devname: An ascii name for the claiming device
1713 * @dev_id: A cookie passed back to the handler function
1714 *
1715 * This call allocates interrupt resources and enables the
1716 * interrupt line and IRQ handling. From the point this
1717 * call is made your handler function may be invoked. Since
1718 * your handler function must clear any interrupt the board
1719 * raises, you must take care both to initialise your hardware
1720 * and to set up the interrupt handler in the right order.
1721 *
3aa551c9 1722 * If you want to set up a threaded irq handler for your device
6d21af4f 1723 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1724 * still called in hard interrupt context and has to check
1725 * whether the interrupt originates from the device. If yes it
1726 * needs to disable the interrupt on the device and return
39a2eddb 1727 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1728 * @thread_fn. This split handler design is necessary to support
1729 * shared interrupts.
1730 *
1da177e4
LT
1731 * Dev_id must be globally unique. Normally the address of the
1732 * device data structure is used as the cookie. Since the handler
1733 * receives this value it makes sense to use it.
1734 *
1735 * If your interrupt is shared you must pass a non NULL dev_id
1736 * as this is required when freeing the interrupt.
1737 *
1738 * Flags:
1739 *
3cca53b0 1740 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1741 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1742 *
1743 */
3aa551c9
TG
1744int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1745 irq_handler_t thread_fn, unsigned long irqflags,
1746 const char *devname, void *dev_id)
1da177e4 1747{
06fcb0c6 1748 struct irqaction *action;
08678b08 1749 struct irq_desc *desc;
d3c60047 1750 int retval;
1da177e4 1751
e237a551
CF
1752 if (irq == IRQ_NOTCONNECTED)
1753 return -ENOTCONN;
1754
1da177e4
LT
1755 /*
1756 * Sanity-check: shared interrupts must pass in a real dev-ID,
1757 * otherwise we'll have trouble later trying to figure out
1758 * which interrupt is which (messes up the interrupt freeing
1759 * logic etc).
17f48034
RW
1760 *
1761 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1762 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1763 */
17f48034
RW
1764 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1765 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1766 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1767 return -EINVAL;
7d94f7ca 1768
cb5bc832 1769 desc = irq_to_desc(irq);
7d94f7ca 1770 if (!desc)
1da177e4 1771 return -EINVAL;
7d94f7ca 1772
31d9d9b6
MZ
1773 if (!irq_settings_can_request(desc) ||
1774 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1775 return -EINVAL;
b25c340c
TG
1776
1777 if (!handler) {
1778 if (!thread_fn)
1779 return -EINVAL;
1780 handler = irq_default_primary_handler;
1781 }
1da177e4 1782
45535732 1783 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1784 if (!action)
1785 return -ENOMEM;
1786
1787 action->handler = handler;
3aa551c9 1788 action->thread_fn = thread_fn;
1da177e4 1789 action->flags = irqflags;
1da177e4 1790 action->name = devname;
1da177e4
LT
1791 action->dev_id = dev_id;
1792
be45beb2 1793 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1794 if (retval < 0) {
1795 kfree(action);
be45beb2 1796 return retval;
4396f46c 1797 }
be45beb2 1798
d3c60047 1799 retval = __setup_irq(irq, desc, action);
70aedd24 1800
2a1d3ab8 1801 if (retval) {
be45beb2 1802 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1803 kfree(action->secondary);
377bf1e4 1804 kfree(action);
2a1d3ab8 1805 }
377bf1e4 1806
6d83f94d 1807#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1808 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1809 /*
1810 * It's a shared IRQ -- the driver ought to be prepared for it
1811 * to happen immediately, so let's make sure....
377bf1e4
AV
1812 * We disable the irq to make sure that a 'real' IRQ doesn't
1813 * run in parallel with our fake.
a304e1b8 1814 */
59845b1f 1815 unsigned long flags;
a304e1b8 1816
377bf1e4 1817 disable_irq(irq);
59845b1f 1818 local_irq_save(flags);
377bf1e4 1819
59845b1f 1820 handler(irq, dev_id);
377bf1e4 1821
59845b1f 1822 local_irq_restore(flags);
377bf1e4 1823 enable_irq(irq);
a304e1b8
DW
1824 }
1825#endif
1da177e4
LT
1826 return retval;
1827}
3aa551c9 1828EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1829
1830/**
1831 * request_any_context_irq - allocate an interrupt line
1832 * @irq: Interrupt line to allocate
1833 * @handler: Function to be called when the IRQ occurs.
1834 * Threaded handler for threaded interrupts.
1835 * @flags: Interrupt type flags
1836 * @name: An ascii name for the claiming device
1837 * @dev_id: A cookie passed back to the handler function
1838 *
1839 * This call allocates interrupt resources and enables the
1840 * interrupt line and IRQ handling. It selects either a
1841 * hardirq or threaded handling method depending on the
1842 * context.
1843 *
1844 * On failure, it returns a negative value. On success,
1845 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1846 */
1847int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1848 unsigned long flags, const char *name, void *dev_id)
1849{
e237a551 1850 struct irq_desc *desc;
ae731f8d
MZ
1851 int ret;
1852
e237a551
CF
1853 if (irq == IRQ_NOTCONNECTED)
1854 return -ENOTCONN;
1855
1856 desc = irq_to_desc(irq);
ae731f8d
MZ
1857 if (!desc)
1858 return -EINVAL;
1859
1ccb4e61 1860 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1861 ret = request_threaded_irq(irq, NULL, handler,
1862 flags, name, dev_id);
1863 return !ret ? IRQC_IS_NESTED : ret;
1864 }
1865
1866 ret = request_irq(irq, handler, flags, name, dev_id);
1867 return !ret ? IRQC_IS_HARDIRQ : ret;
1868}
1869EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1870
1e7c5fd2 1871void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1872{
1873 unsigned int cpu = smp_processor_id();
1874 unsigned long flags;
1875 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1876
1877 if (!desc)
1878 return;
1879
f35ad083
MZ
1880 /*
1881 * If the trigger type is not specified by the caller, then
1882 * use the default for this interrupt.
1883 */
1e7c5fd2 1884 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1885 if (type == IRQ_TYPE_NONE)
1886 type = irqd_get_trigger_type(&desc->irq_data);
1887
1e7c5fd2
MZ
1888 if (type != IRQ_TYPE_NONE) {
1889 int ret;
1890
a1ff541a 1891 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1892
1893 if (ret) {
32cffdde 1894 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1895 goto out;
1896 }
1897 }
1898
31d9d9b6 1899 irq_percpu_enable(desc, cpu);
1e7c5fd2 1900out:
31d9d9b6
MZ
1901 irq_put_desc_unlock(desc, flags);
1902}
36a5df85 1903EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1904
f0cb3220
TP
1905/**
1906 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1907 * @irq: Linux irq number to check for
1908 *
1909 * Must be called from a non migratable context. Returns the enable
1910 * state of a per cpu interrupt on the current cpu.
1911 */
1912bool irq_percpu_is_enabled(unsigned int irq)
1913{
1914 unsigned int cpu = smp_processor_id();
1915 struct irq_desc *desc;
1916 unsigned long flags;
1917 bool is_enabled;
1918
1919 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1920 if (!desc)
1921 return false;
1922
1923 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1924 irq_put_desc_unlock(desc, flags);
1925
1926 return is_enabled;
1927}
1928EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1929
31d9d9b6
MZ
1930void disable_percpu_irq(unsigned int irq)
1931{
1932 unsigned int cpu = smp_processor_id();
1933 unsigned long flags;
1934 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1935
1936 if (!desc)
1937 return;
1938
1939 irq_percpu_disable(desc, cpu);
1940 irq_put_desc_unlock(desc, flags);
1941}
36a5df85 1942EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1943
1944/*
1945 * Internal function to unregister a percpu irqaction.
1946 */
1947static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1948{
1949 struct irq_desc *desc = irq_to_desc(irq);
1950 struct irqaction *action;
1951 unsigned long flags;
1952
1953 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1954
1955 if (!desc)
1956 return NULL;
1957
1958 raw_spin_lock_irqsave(&desc->lock, flags);
1959
1960 action = desc->action;
1961 if (!action || action->percpu_dev_id != dev_id) {
1962 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1963 goto bad;
1964 }
1965
1966 if (!cpumask_empty(desc->percpu_enabled)) {
1967 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1968 irq, cpumask_first(desc->percpu_enabled));
1969 goto bad;
1970 }
1971
1972 /* Found it - now remove it from the list of entries: */
1973 desc->action = NULL;
1974
1975 raw_spin_unlock_irqrestore(&desc->lock, flags);
1976
1977 unregister_handler_proc(irq, action);
1978
be45beb2 1979 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1980 module_put(desc->owner);
1981 return action;
1982
1983bad:
1984 raw_spin_unlock_irqrestore(&desc->lock, flags);
1985 return NULL;
1986}
1987
1988/**
1989 * remove_percpu_irq - free a per-cpu interrupt
1990 * @irq: Interrupt line to free
1991 * @act: irqaction for the interrupt
1992 *
1993 * Used to remove interrupts statically setup by the early boot process.
1994 */
1995void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1996{
1997 struct irq_desc *desc = irq_to_desc(irq);
1998
1999 if (desc && irq_settings_is_per_cpu_devid(desc))
2000 __free_percpu_irq(irq, act->percpu_dev_id);
2001}
2002
2003/**
2004 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
2005 * @irq: Interrupt line to free
2006 * @dev_id: Device identity to free
2007 *
2008 * Remove a percpu interrupt handler. The handler is removed, but
2009 * the interrupt line is not disabled. This must be done on each
2010 * CPU before calling this function. The function does not return
2011 * until any executing interrupts for this IRQ have completed.
2012 *
2013 * This function must not be called from interrupt context.
2014 */
2015void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
2016{
2017 struct irq_desc *desc = irq_to_desc(irq);
2018
2019 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2020 return;
2021
2022 chip_bus_lock(desc);
2023 kfree(__free_percpu_irq(irq, dev_id));
2024 chip_bus_sync_unlock(desc);
2025}
aec2e2ad 2026EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
2027
2028/**
2029 * setup_percpu_irq - setup a per-cpu interrupt
2030 * @irq: Interrupt line to setup
2031 * @act: irqaction for the interrupt
2032 *
2033 * Used to statically setup per-cpu interrupts in the early boot process.
2034 */
2035int setup_percpu_irq(unsigned int irq, struct irqaction *act)
2036{
2037 struct irq_desc *desc = irq_to_desc(irq);
2038 int retval;
2039
2040 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2041 return -EINVAL;
be45beb2
JH
2042
2043 retval = irq_chip_pm_get(&desc->irq_data);
2044 if (retval < 0)
2045 return retval;
2046
31d9d9b6 2047 retval = __setup_irq(irq, desc, act);
31d9d9b6 2048
be45beb2
JH
2049 if (retval)
2050 irq_chip_pm_put(&desc->irq_data);
2051
31d9d9b6
MZ
2052 return retval;
2053}
2054
2055/**
c80081b9 2056 * __request_percpu_irq - allocate a percpu interrupt line
31d9d9b6
MZ
2057 * @irq: Interrupt line to allocate
2058 * @handler: Function to be called when the IRQ occurs.
c80081b9 2059 * @flags: Interrupt type flags (IRQF_TIMER only)
31d9d9b6
MZ
2060 * @devname: An ascii name for the claiming device
2061 * @dev_id: A percpu cookie passed back to the handler function
2062 *
a1b7febd
MR
2063 * This call allocates interrupt resources and enables the
2064 * interrupt on the local CPU. If the interrupt is supposed to be
2065 * enabled on other CPUs, it has to be done on each CPU using
2066 * enable_percpu_irq().
31d9d9b6
MZ
2067 *
2068 * Dev_id must be globally unique. It is a per-cpu variable, and
2069 * the handler gets called with the interrupted CPU's instance of
2070 * that variable.
2071 */
c80081b9
DL
2072int __request_percpu_irq(unsigned int irq, irq_handler_t handler,
2073 unsigned long flags, const char *devname,
2074 void __percpu *dev_id)
31d9d9b6
MZ
2075{
2076 struct irqaction *action;
2077 struct irq_desc *desc;
2078 int retval;
2079
2080 if (!dev_id)
2081 return -EINVAL;
2082
2083 desc = irq_to_desc(irq);
2084 if (!desc || !irq_settings_can_request(desc) ||
2085 !irq_settings_is_per_cpu_devid(desc))
2086 return -EINVAL;
2087
c80081b9
DL
2088 if (flags && flags != IRQF_TIMER)
2089 return -EINVAL;
2090
31d9d9b6
MZ
2091 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2092 if (!action)
2093 return -ENOMEM;
2094
2095 action->handler = handler;
c80081b9 2096 action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
2097 action->name = devname;
2098 action->percpu_dev_id = dev_id;
2099
be45beb2 2100 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2101 if (retval < 0) {
2102 kfree(action);
be45beb2 2103 return retval;
4396f46c 2104 }
be45beb2 2105
31d9d9b6 2106 retval = __setup_irq(irq, desc, action);
31d9d9b6 2107
be45beb2
JH
2108 if (retval) {
2109 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2110 kfree(action);
be45beb2 2111 }
31d9d9b6
MZ
2112
2113 return retval;
2114}
c80081b9 2115EXPORT_SYMBOL_GPL(__request_percpu_irq);
1b7047ed
MZ
2116
2117/**
2118 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2119 * @irq: Interrupt line that is forwarded to a VM
2120 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2121 * @state: a pointer to a boolean where the state is to be storeed
2122 *
2123 * This call snapshots the internal irqchip state of an
2124 * interrupt, returning into @state the bit corresponding to
2125 * stage @which
2126 *
2127 * This function should be called with preemption disabled if the
2128 * interrupt controller has per-cpu registers.
2129 */
2130int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2131 bool *state)
2132{
2133 struct irq_desc *desc;
2134 struct irq_data *data;
2135 struct irq_chip *chip;
2136 unsigned long flags;
2137 int err = -EINVAL;
2138
2139 desc = irq_get_desc_buslock(irq, &flags, 0);
2140 if (!desc)
2141 return err;
2142
2143 data = irq_desc_get_irq_data(desc);
2144
2145 do {
2146 chip = irq_data_get_irq_chip(data);
2147 if (chip->irq_get_irqchip_state)
2148 break;
2149#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2150 data = data->parent_data;
2151#else
2152 data = NULL;
2153#endif
2154 } while (data);
2155
2156 if (data)
2157 err = chip->irq_get_irqchip_state(data, which, state);
2158
2159 irq_put_desc_busunlock(desc, flags);
2160 return err;
2161}
1ee4fb3e 2162EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2163
2164/**
2165 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2166 * @irq: Interrupt line that is forwarded to a VM
2167 * @which: State to be restored (one of IRQCHIP_STATE_*)
2168 * @val: Value corresponding to @which
2169 *
2170 * This call sets the internal irqchip state of an interrupt,
2171 * depending on the value of @which.
2172 *
2173 * This function should be called with preemption disabled if the
2174 * interrupt controller has per-cpu registers.
2175 */
2176int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2177 bool val)
2178{
2179 struct irq_desc *desc;
2180 struct irq_data *data;
2181 struct irq_chip *chip;
2182 unsigned long flags;
2183 int err = -EINVAL;
2184
2185 desc = irq_get_desc_buslock(irq, &flags, 0);
2186 if (!desc)
2187 return err;
2188
2189 data = irq_desc_get_irq_data(desc);
2190
2191 do {
2192 chip = irq_data_get_irq_chip(data);
2193 if (chip->irq_set_irqchip_state)
2194 break;
2195#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2196 data = data->parent_data;
2197#else
2198 data = NULL;
2199#endif
2200 } while (data);
2201
2202 if (data)
2203 err = chip->irq_set_irqchip_state(data, which, val);
2204
2205 irq_put_desc_busunlock(desc, flags);
2206 return err;
2207}
1ee4fb3e 2208EXPORT_SYMBOL_GPL(irq_set_irqchip_state);