Commit | Line | Data |
---|---|---|
52a65ff5 TG |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | ||
54a90588 PM |
3 | #define pr_fmt(fmt) "irq: " fmt |
4 | ||
c5c601c4 | 5 | #include <linux/acpi.h> |
cc79ca69 GL |
6 | #include <linux/debugfs.h> |
7 | #include <linux/hardirq.h> | |
8 | #include <linux/interrupt.h> | |
08a543ad | 9 | #include <linux/irq.h> |
cc79ca69 | 10 | #include <linux/irqdesc.h> |
08a543ad GL |
11 | #include <linux/irqdomain.h> |
12 | #include <linux/module.h> | |
13 | #include <linux/mutex.h> | |
14 | #include <linux/of.h> | |
7e713301 | 15 | #include <linux/of_address.h> |
64be38ab | 16 | #include <linux/of_irq.h> |
5ca4db61 | 17 | #include <linux/topology.h> |
cc79ca69 | 18 | #include <linux/seq_file.h> |
7e713301 | 19 | #include <linux/slab.h> |
cc79ca69 GL |
20 | #include <linux/smp.h> |
21 | #include <linux/fs.h> | |
08a543ad GL |
22 | |
23 | static LIST_HEAD(irq_domain_list); | |
24 | static DEFINE_MUTEX(irq_domain_mutex); | |
25 | ||
68700650 | 26 | static struct irq_domain *irq_default_domain; |
cc79ca69 | 27 | |
601363cc JH |
28 | static int irq_domain_alloc_irqs_locked(struct irq_domain *domain, int irq_base, |
29 | unsigned int nr_irqs, int node, void *arg, | |
30 | bool realloc, const struct irq_affinity_desc *affinity); | |
f8264e34 | 31 | static void irq_domain_check_hierarchy(struct irq_domain *domain); |
e49312fe | 32 | static void irq_domain_free_one_irq(struct irq_domain *domain, unsigned int virq); |
f8264e34 | 33 | |
b145dcc4 | 34 | struct irqchip_fwid { |
d59f6617 TG |
35 | struct fwnode_handle fwnode; |
36 | unsigned int type; | |
37 | char *name; | |
b977fcf4 | 38 | phys_addr_t *pa; |
b145dcc4 MZ |
39 | }; |
40 | ||
087cdfb6 TG |
41 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
42 | static void debugfs_add_domain_dir(struct irq_domain *d); | |
43 | static void debugfs_remove_domain_dir(struct irq_domain *d); | |
44 | #else | |
45 | static inline void debugfs_add_domain_dir(struct irq_domain *d) { } | |
46 | static inline void debugfs_remove_domain_dir(struct irq_domain *d) { } | |
47 | #endif | |
48 | ||
2cbd5a45 DW |
49 | static const char *irqchip_fwnode_get_name(const struct fwnode_handle *fwnode) |
50 | { | |
51 | struct irqchip_fwid *fwid = container_of(fwnode, struct irqchip_fwid, fwnode); | |
52 | ||
53 | return fwid->name; | |
54 | } | |
55 | ||
56 | const struct fwnode_operations irqchip_fwnode_ops = { | |
57 | .get_name = irqchip_fwnode_get_name, | |
58 | }; | |
b6eb66fd | 59 | EXPORT_SYMBOL_GPL(irqchip_fwnode_ops); |
db3e50f3 | 60 | |
b145dcc4 | 61 | /** |
b513df67 | 62 | * __irq_domain_alloc_fwnode - Allocate a fwnode_handle suitable for |
b145dcc4 | 63 | * identifying an irq domain |
d59f6617 | 64 | * @type: Type of irqchip_fwnode. See linux/irqdomain.h |
d59f6617 | 65 | * @id: Optional user provided id if name != NULL |
b513df67 | 66 | * @name: Optional user provided domain name |
0ed9ca25 | 67 | * @pa: Optional user-provided physical address |
b145dcc4 | 68 | * |
a359f757 | 69 | * Allocate a struct irqchip_fwid, and return a pointer to the embedded |
b145dcc4 | 70 | * fwnode_handle (or NULL on failure). |
d59f6617 TG |
71 | * |
72 | * Note: The types IRQCHIP_FWNODE_NAMED and IRQCHIP_FWNODE_NAMED_ID are | |
73 | * solely to transport name information to irqdomain creation code. The | |
74 | * node is not stored. For other types the pointer is kept in the irq | |
75 | * domain struct. | |
b145dcc4 | 76 | */ |
d59f6617 | 77 | struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, |
b977fcf4 MZ |
78 | const char *name, |
79 | phys_addr_t *pa) | |
b145dcc4 MZ |
80 | { |
81 | struct irqchip_fwid *fwid; | |
d59f6617 | 82 | char *n; |
b145dcc4 MZ |
83 | |
84 | fwid = kzalloc(sizeof(*fwid), GFP_KERNEL); | |
b145dcc4 | 85 | |
d59f6617 TG |
86 | switch (type) { |
87 | case IRQCHIP_FWNODE_NAMED: | |
88 | n = kasprintf(GFP_KERNEL, "%s", name); | |
89 | break; | |
90 | case IRQCHIP_FWNODE_NAMED_ID: | |
91 | n = kasprintf(GFP_KERNEL, "%s-%d", name, id); | |
92 | break; | |
93 | default: | |
b977fcf4 | 94 | n = kasprintf(GFP_KERNEL, "irqchip@%pa", pa); |
d59f6617 TG |
95 | break; |
96 | } | |
97 | ||
98 | if (!fwid || !n) { | |
b145dcc4 | 99 | kfree(fwid); |
d59f6617 | 100 | kfree(n); |
b145dcc4 MZ |
101 | return NULL; |
102 | } | |
103 | ||
d59f6617 TG |
104 | fwid->type = type; |
105 | fwid->name = n; | |
b977fcf4 | 106 | fwid->pa = pa; |
01bb86b3 | 107 | fwnode_init(&fwid->fwnode, &irqchip_fwnode_ops); |
b145dcc4 MZ |
108 | return &fwid->fwnode; |
109 | } | |
d59f6617 | 110 | EXPORT_SYMBOL_GPL(__irq_domain_alloc_fwnode); |
b145dcc4 MZ |
111 | |
112 | /** | |
113 | * irq_domain_free_fwnode - Free a non-OF-backed fwnode_handle | |
b4dc049e | 114 | * @fwnode: fwnode_handle to free |
b145dcc4 MZ |
115 | * |
116 | * Free a fwnode_handle allocated with irq_domain_alloc_fwnode. | |
117 | */ | |
118 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode) | |
119 | { | |
120 | struct irqchip_fwid *fwid; | |
121 | ||
ac8f29ae | 122 | if (!fwnode || WARN_ON(!is_fwnode_irqchip(fwnode))) |
b145dcc4 MZ |
123 | return; |
124 | ||
125 | fwid = container_of(fwnode, struct irqchip_fwid, fwnode); | |
126 | kfree(fwid->name); | |
127 | kfree(fwid); | |
128 | } | |
a4289dc2 | 129 | EXPORT_SYMBOL_GPL(irq_domain_free_fwnode); |
b145dcc4 | 130 | |
1bf2c928 TG |
131 | static int alloc_name(struct irq_domain *domain, char *base, enum irq_domain_bus_token bus_token) |
132 | { | |
c0ece644 AS |
133 | if (bus_token == DOMAIN_BUS_ANY) |
134 | domain->name = kasprintf(GFP_KERNEL, "%s", base); | |
135 | else | |
136 | domain->name = kasprintf(GFP_KERNEL, "%s-%d", base, bus_token); | |
1bf2c928 TG |
137 | if (!domain->name) |
138 | return -ENOMEM; | |
139 | ||
140 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static int alloc_fwnode_name(struct irq_domain *domain, const struct fwnode_handle *fwnode, | |
1e7c0529 | 145 | enum irq_domain_bus_token bus_token, const char *suffix) |
1bf2c928 | 146 | { |
1e7c0529 MV |
147 | const char *sep = suffix ? "-" : ""; |
148 | const char *suf = suffix ? : ""; | |
149 | char *name; | |
1bf2c928 | 150 | |
c0ece644 | 151 | if (bus_token == DOMAIN_BUS_ANY) |
7b9414cb | 152 | name = kasprintf(GFP_KERNEL, "%pfw%s%s", fwnode, sep, suf); |
c0ece644 | 153 | else |
7b9414cb | 154 | name = kasprintf(GFP_KERNEL, "%pfw%s%s-%d", fwnode, sep, suf, bus_token); |
1bf2c928 TG |
155 | if (!name) |
156 | return -ENOMEM; | |
157 | ||
158 | /* | |
159 | * fwnode paths contain '/', which debugfs is legitimately unhappy | |
160 | * about. Replace them with ':', which does the trick and is not as | |
161 | * offensive as '\'... | |
162 | */ | |
163 | domain->name = strreplace(name, '/', ':'); | |
164 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
165 | return 0; | |
166 | } | |
167 | ||
168 | static int alloc_unknown_name(struct irq_domain *domain, enum irq_domain_bus_token bus_token) | |
cc79ca69 | 169 | { |
d59f6617 | 170 | static atomic_t unknown_domains; |
1bf2c928 TG |
171 | int id = atomic_inc_return(&unknown_domains); |
172 | ||
c0ece644 AS |
173 | if (bus_token == DOMAIN_BUS_ANY) |
174 | domain->name = kasprintf(GFP_KERNEL, "unknown-%d", id); | |
175 | else | |
176 | domain->name = kasprintf(GFP_KERNEL, "unknown-%d-%d", id, bus_token); | |
1bf2c928 TG |
177 | if (!domain->name) |
178 | return -ENOMEM; | |
c0ece644 | 179 | |
1bf2c928 TG |
180 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; |
181 | return 0; | |
182 | } | |
cc79ca69 | 183 | |
1e7c0529 | 184 | static int irq_domain_set_name(struct irq_domain *domain, const struct irq_domain_info *info) |
1bf2c928 | 185 | { |
1e7c0529 MV |
186 | enum irq_domain_bus_token bus_token = info->bus_token; |
187 | const struct fwnode_handle *fwnode = info->fwnode; | |
188 | ||
45e9504f | 189 | if (is_fwnode_irqchip(fwnode)) { |
1bf2c928 | 190 | struct irqchip_fwid *fwid = container_of(fwnode, struct irqchip_fwid, fwnode); |
d59f6617 | 191 | |
1e7c0529 MV |
192 | /* |
193 | * The name_suffix is only intended to be used to avoid a name | |
194 | * collision when multiple domains are created for a single | |
195 | * device and the name is picked using a real device node. | |
196 | * (Typical use-case is regmap-IRQ controllers for devices | |
197 | * providing more than one physical IRQ.) There should be no | |
198 | * need to use name_suffix with irqchip-fwnode. | |
199 | */ | |
200 | if (info->name_suffix) | |
201 | return -EINVAL; | |
202 | ||
d59f6617 TG |
203 | switch (fwid->type) { |
204 | case IRQCHIP_FWNODE_NAMED: | |
205 | case IRQCHIP_FWNODE_NAMED_ID: | |
1bf2c928 | 206 | return alloc_name(domain, fwid->name, bus_token); |
d59f6617 | 207 | default: |
d59f6617 | 208 | domain->name = fwid->name; |
c0ece644 | 209 | if (bus_token != DOMAIN_BUS_ANY) |
1bf2c928 | 210 | return alloc_name(domain, fwid->name, bus_token); |
d59f6617 | 211 | } |
d59f6617 | 212 | |
1bf2c928 | 213 | } else if (is_of_node(fwnode) || is_acpi_device_node(fwnode) || is_software_node(fwnode)) { |
1e7c0529 | 214 | return alloc_fwnode_name(domain, fwnode, bus_token, info->name_suffix); |
d59f6617 TG |
215 | } |
216 | ||
1bf2c928 TG |
217 | if (domain->name) |
218 | return 0; | |
219 | ||
220 | if (fwnode) | |
221 | pr_err("Invalid fwnode type for irqdomain\n"); | |
222 | return alloc_unknown_name(domain, bus_token); | |
dbd56abf HC |
223 | } |
224 | ||
24a4f4e4 | 225 | static struct irq_domain *__irq_domain_create(const struct irq_domain_info *info) |
dbd56abf HC |
226 | { |
227 | struct irq_domain *domain; | |
228 | int err; | |
229 | ||
24a4f4e4 HC |
230 | if (WARN_ON((info->size && info->direct_max) || |
231 | (!IS_ENABLED(CONFIG_IRQ_DOMAIN_NOMAP) && info->direct_max) || | |
232 | (info->direct_max && info->direct_max != info->hwirq_max))) | |
80f6abe0 | 233 | return ERR_PTR(-EINVAL); |
dbd56abf | 234 | |
24a4f4e4 HC |
235 | domain = kzalloc_node(struct_size(domain, revmap, info->size), |
236 | GFP_KERNEL, of_node_to_nid(to_of_node(info->fwnode))); | |
dbd56abf | 237 | if (!domain) |
80f6abe0 | 238 | return ERR_PTR(-ENOMEM); |
dbd56abf | 239 | |
1e7c0529 | 240 | err = irq_domain_set_name(domain, info); |
dbd56abf HC |
241 | if (err) { |
242 | kfree(domain); | |
80f6abe0 | 243 | return ERR_PTR(err); |
dbd56abf HC |
244 | } |
245 | ||
24a4f4e4 | 246 | domain->fwnode = fwnode_handle_get(info->fwnode); |
6ce3e981 | 247 | fwnode_dev_initialized(domain->fwnode, true); |
f110711a | 248 | |
cc79ca69 | 249 | /* Fill structure */ |
1aa0dd94 | 250 | INIT_RADIX_TREE(&domain->revmap_tree, GFP_KERNEL); |
24a4f4e4 HC |
251 | domain->ops = info->ops; |
252 | domain->host_data = info->host_data; | |
0b21add7 | 253 | domain->bus_token = info->bus_token; |
24a4f4e4 | 254 | domain->hwirq_max = info->hwirq_max; |
4f86a06e | 255 | |
24a4f4e4 | 256 | if (info->direct_max) |
4f86a06e | 257 | domain->flags |= IRQ_DOMAIN_FLAG_NO_MAP; |
4f86a06e | 258 | |
24a4f4e4 | 259 | domain->revmap_size = info->size; |
4f86a06e | 260 | |
9dbb8e34 JH |
261 | /* |
262 | * Hierarchical domains use the domain lock of the root domain | |
263 | * (innermost domain). | |
264 | * | |
265 | * For non-hierarchical domains (as for root domains), the root | |
266 | * pointer is set to the domain itself so that &domain->root->mutex | |
267 | * always points to the right lock. | |
268 | */ | |
269 | mutex_init(&domain->mutex); | |
270 | domain->root = domain; | |
271 | ||
f8264e34 | 272 | irq_domain_check_hierarchy(domain); |
cc79ca69 | 273 | |
8932c32c MZ |
274 | return domain; |
275 | } | |
276 | ||
277 | static void __irq_domain_publish(struct irq_domain *domain) | |
278 | { | |
a8db8cf0 | 279 | mutex_lock(&irq_domain_mutex); |
087cdfb6 | 280 | debugfs_add_domain_dir(domain); |
a8db8cf0 GL |
281 | list_add(&domain->link, &irq_domain_list); |
282 | mutex_unlock(&irq_domain_mutex); | |
fa40f377 | 283 | |
1aa0dd94 | 284 | pr_debug("Added domain %s\n", domain->name); |
8932c32c MZ |
285 | } |
286 | ||
89b37541 HC |
287 | static void irq_domain_free(struct irq_domain *domain) |
288 | { | |
289 | fwnode_dev_initialized(domain->fwnode, false); | |
290 | fwnode_handle_put(domain->fwnode); | |
291 | if (domain->flags & IRQ_DOMAIN_NAME_ALLOCATED) | |
292 | kfree(domain->name); | |
293 | kfree(domain); | |
294 | } | |
295 | ||
70114e7f MV |
296 | static void irq_domain_instantiate_descs(const struct irq_domain_info *info) |
297 | { | |
298 | if (!IS_ENABLED(CONFIG_SPARSE_IRQ)) | |
299 | return; | |
300 | ||
301 | if (irq_alloc_descs(info->virq_base, info->virq_base, info->size, | |
302 | of_node_to_nid(to_of_node(info->fwnode))) < 0) { | |
303 | pr_info("Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", | |
304 | info->virq_base); | |
305 | } | |
306 | } | |
307 | ||
308 | static struct irq_domain *__irq_domain_instantiate(const struct irq_domain_info *info, | |
24d02c4e | 309 | bool cond_alloc_descs, bool force_associate) |
299d623f HC |
310 | { |
311 | struct irq_domain *domain; | |
44b68de9 | 312 | int err; |
299d623f | 313 | |
24a4f4e4 | 314 | domain = __irq_domain_create(info); |
80f6abe0 HC |
315 | if (IS_ERR(domain)) |
316 | return domain; | |
299d623f | 317 | |
75739854 | 318 | domain->flags |= info->domain_flags; |
44b68de9 | 319 | domain->exit = info->exit; |
75739854 | 320 | |
419e3778 HC |
321 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
322 | if (info->parent) { | |
323 | domain->root = info->parent->root; | |
324 | domain->parent = info->parent; | |
325 | } | |
326 | #endif | |
327 | ||
e6f67ce3 HC |
328 | if (info->dgc_info) { |
329 | err = irq_domain_alloc_generic_chips(domain, info->dgc_info); | |
330 | if (err) | |
331 | goto err_domain_free; | |
332 | } | |
333 | ||
44b68de9 HC |
334 | if (info->init) { |
335 | err = info->init(domain); | |
336 | if (err) | |
e6f67ce3 | 337 | goto err_domain_gc_remove; |
44b68de9 HC |
338 | } |
339 | ||
299d623f HC |
340 | __irq_domain_publish(domain); |
341 | ||
70114e7f MV |
342 | if (cond_alloc_descs && info->virq_base > 0) |
343 | irq_domain_instantiate_descs(info); | |
344 | ||
24d02c4e MV |
345 | /* |
346 | * Legacy interrupt domains have a fixed Linux interrupt number | |
347 | * associated. Other interrupt domains can request association by | |
348 | * providing a Linux interrupt number > 0. | |
349 | */ | |
350 | if (force_associate || info->virq_base > 0) { | |
70114e7f MV |
351 | irq_domain_associate_many(domain, info->virq_base, info->hwirq_base, |
352 | info->size - info->hwirq_base); | |
353 | } | |
354 | ||
299d623f | 355 | return domain; |
44b68de9 | 356 | |
e6f67ce3 HC |
357 | err_domain_gc_remove: |
358 | if (info->dgc_info) | |
359 | irq_domain_remove_generic_chips(domain); | |
44b68de9 HC |
360 | err_domain_free: |
361 | irq_domain_free(domain); | |
362 | return ERR_PTR(err); | |
299d623f | 363 | } |
70114e7f MV |
364 | |
365 | /** | |
366 | * irq_domain_instantiate() - Instantiate a new irq domain data structure | |
367 | * @info: Domain information pointer pointing to the information for this domain | |
368 | * | |
369 | * Return: A pointer to the instantiated irq domain or an ERR_PTR value. | |
370 | */ | |
371 | struct irq_domain *irq_domain_instantiate(const struct irq_domain_info *info) | |
372 | { | |
24d02c4e | 373 | return __irq_domain_instantiate(info, false, false); |
70114e7f | 374 | } |
299d623f HC |
375 | EXPORT_SYMBOL_GPL(irq_domain_instantiate); |
376 | ||
58ee99ad PM |
377 | /** |
378 | * irq_domain_remove() - Remove an irq domain. | |
379 | * @domain: domain to remove | |
380 | * | |
381 | * This routine is used to remove an irq domain. The caller must ensure | |
382 | * that all mappings within the domain have been disposed of prior to | |
383 | * use, depending on the revmap type. | |
384 | */ | |
385 | void irq_domain_remove(struct irq_domain *domain) | |
386 | { | |
44b68de9 HC |
387 | if (domain->exit) |
388 | domain->exit(domain); | |
389 | ||
58ee99ad | 390 | mutex_lock(&irq_domain_mutex); |
087cdfb6 | 391 | debugfs_remove_domain_dir(domain); |
58ee99ad | 392 | |
e9256efc | 393 | WARN_ON(!radix_tree_empty(&domain->revmap_tree)); |
58ee99ad PM |
394 | |
395 | list_del(&domain->link); | |
396 | ||
397 | /* | |
398 | * If the going away domain is the default one, reset it. | |
399 | */ | |
400 | if (unlikely(irq_default_domain == domain)) | |
825dfab2 | 401 | irq_set_default_domain(NULL); |
58ee99ad PM |
402 | |
403 | mutex_unlock(&irq_domain_mutex); | |
404 | ||
e6f67ce3 HC |
405 | if (domain->flags & IRQ_DOMAIN_FLAG_DESTROY_GC) |
406 | irq_domain_remove_generic_chips(domain); | |
407 | ||
1aa0dd94 | 408 | pr_debug("Removed domain %s\n", domain->name); |
89b37541 | 409 | irq_domain_free(domain); |
58ee99ad | 410 | } |
ecd84eb2 | 411 | EXPORT_SYMBOL_GPL(irq_domain_remove); |
58ee99ad | 412 | |
61d0a000 MZ |
413 | void irq_domain_update_bus_token(struct irq_domain *domain, |
414 | enum irq_domain_bus_token bus_token) | |
415 | { | |
416 | char *name; | |
417 | ||
418 | if (domain->bus_token == bus_token) | |
419 | return; | |
420 | ||
421 | mutex_lock(&irq_domain_mutex); | |
422 | ||
423 | domain->bus_token = bus_token; | |
424 | ||
425 | name = kasprintf(GFP_KERNEL, "%s-%d", domain->name, bus_token); | |
426 | if (!name) { | |
427 | mutex_unlock(&irq_domain_mutex); | |
428 | return; | |
429 | } | |
430 | ||
431 | debugfs_remove_domain_dir(domain); | |
432 | ||
433 | if (domain->flags & IRQ_DOMAIN_NAME_ALLOCATED) | |
434 | kfree(domain->name); | |
435 | else | |
436 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
437 | ||
438 | domain->name = name; | |
439 | debugfs_add_domain_dir(domain); | |
440 | ||
441 | mutex_unlock(&irq_domain_mutex); | |
442 | } | |
8a667928 | 443 | EXPORT_SYMBOL_GPL(irq_domain_update_bus_token); |
61d0a000 | 444 | |
781d0f46 | 445 | /** |
67196fea AS |
446 | * irq_domain_create_simple() - Register an irq_domain and optionally map a range of irqs |
447 | * @fwnode: firmware node for the interrupt controller | |
781d0f46 | 448 | * @size: total number of irqs in mapping |
94a63da0 | 449 | * @first_irq: first number of irq block assigned to the domain, |
fa40f377 GL |
450 | * pass zero to assign irqs on-the-fly. If first_irq is non-zero, then |
451 | * pre-map all of the irqs in the domain to virqs starting at first_irq. | |
f8264e34 | 452 | * @ops: domain callbacks |
781d0f46 MB |
453 | * @host_data: Controller private data pointer |
454 | * | |
fa40f377 GL |
455 | * Allocates an irq_domain, and optionally if first_irq is positive then also |
456 | * allocate irq_descs and map all of the hwirqs to virqs starting at first_irq. | |
781d0f46 MB |
457 | * |
458 | * This is intended to implement the expected behaviour for most | |
fa40f377 GL |
459 | * interrupt controllers. If device tree is used, then first_irq will be 0 and |
460 | * irqs get mapped dynamically on the fly. However, if the controller requires | |
461 | * static virq assignments (non-DT boot) then it will set that up correctly. | |
781d0f46 | 462 | */ |
67196fea AS |
463 | struct irq_domain *irq_domain_create_simple(struct fwnode_handle *fwnode, |
464 | unsigned int size, | |
465 | unsigned int first_irq, | |
466 | const struct irq_domain_ops *ops, | |
467 | void *host_data) | |
781d0f46 | 468 | { |
2ada5ed6 HC |
469 | struct irq_domain_info info = { |
470 | .fwnode = fwnode, | |
471 | .size = size, | |
472 | .hwirq_max = size, | |
70114e7f | 473 | .virq_base = first_irq, |
2ada5ed6 HC |
474 | .ops = ops, |
475 | .host_data = host_data, | |
476 | }; | |
24d02c4e | 477 | struct irq_domain *domain = __irq_domain_instantiate(&info, true, false); |
2854d167 | 478 | |
70114e7f | 479 | return IS_ERR(domain) ? NULL : domain; |
781d0f46 | 480 | } |
67196fea | 481 | EXPORT_SYMBOL_GPL(irq_domain_create_simple); |
781d0f46 | 482 | |
b6e95788 AS |
483 | struct irq_domain *irq_domain_create_legacy(struct fwnode_handle *fwnode, |
484 | unsigned int size, | |
485 | unsigned int first_irq, | |
486 | irq_hw_number_t first_hwirq, | |
487 | const struct irq_domain_ops *ops, | |
488 | void *host_data) | |
a8db8cf0 | 489 | { |
2ada5ed6 HC |
490 | struct irq_domain_info info = { |
491 | .fwnode = fwnode, | |
492 | .size = first_hwirq + size, | |
493 | .hwirq_max = first_hwirq + size, | |
70114e7f MV |
494 | .hwirq_base = first_hwirq, |
495 | .virq_base = first_irq, | |
2ada5ed6 HC |
496 | .ops = ops, |
497 | .host_data = host_data, | |
498 | }; | |
24d02c4e | 499 | struct irq_domain *domain = __irq_domain_instantiate(&info, false, true); |
a8db8cf0 | 500 | |
70114e7f | 501 | return IS_ERR(domain) ? NULL : domain; |
a8db8cf0 | 502 | } |
b6e95788 | 503 | EXPORT_SYMBOL_GPL(irq_domain_create_legacy); |
a8db8cf0 | 504 | |
cc79ca69 | 505 | /** |
651e8b54 MZ |
506 | * irq_find_matching_fwspec() - Locates a domain for a given fwspec |
507 | * @fwspec: FW specifier for an interrupt | |
ad3aedfb | 508 | * @bus_token: domain-specific data |
cc79ca69 | 509 | */ |
651e8b54 | 510 | struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, |
130b8c6c | 511 | enum irq_domain_bus_token bus_token) |
cc79ca69 GL |
512 | { |
513 | struct irq_domain *h, *found = NULL; | |
651e8b54 | 514 | struct fwnode_handle *fwnode = fwspec->fwnode; |
a18dc81b | 515 | int rc; |
cc79ca69 | 516 | |
6dca724d AMB |
517 | /* |
518 | * We might want to match the legacy controller last since | |
cc79ca69 GL |
519 | * it might potentially be set to match all interrupts in |
520 | * the absence of a device node. This isn't a problem so far | |
521 | * yet though... | |
ad3aedfb MZ |
522 | * |
523 | * bus_token == DOMAIN_BUS_ANY matches any domain, any other | |
524 | * values must generate an exact match for the domain to be | |
525 | * selected. | |
cc79ca69 GL |
526 | */ |
527 | mutex_lock(&irq_domain_mutex); | |
a18dc81b | 528 | list_for_each_entry(h, &irq_domain_list, link) { |
5aa3c0cf | 529 | if (h->ops->select && bus_token != DOMAIN_BUS_ANY) |
651e8b54 MZ |
530 | rc = h->ops->select(h, fwspec, bus_token); |
531 | else if (h->ops->match) | |
130b8c6c | 532 | rc = h->ops->match(h, to_of_node(fwnode), bus_token); |
a18dc81b | 533 | else |
130b8c6c | 534 | rc = ((fwnode != NULL) && (h->fwnode == fwnode) && |
ad3aedfb MZ |
535 | ((bus_token == DOMAIN_BUS_ANY) || |
536 | (h->bus_token == bus_token))); | |
a18dc81b GL |
537 | |
538 | if (rc) { | |
cc79ca69 GL |
539 | found = h; |
540 | break; | |
541 | } | |
a18dc81b | 542 | } |
cc79ca69 GL |
543 | mutex_unlock(&irq_domain_mutex); |
544 | return found; | |
545 | } | |
651e8b54 | 546 | EXPORT_SYMBOL_GPL(irq_find_matching_fwspec); |
cc79ca69 GL |
547 | |
548 | /** | |
825dfab2 | 549 | * irq_set_default_domain() - Set a "default" irq domain |
68700650 | 550 | * @domain: default domain pointer |
cc79ca69 GL |
551 | * |
552 | * For convenience, it's possible to set a "default" domain that will be used | |
553 | * whenever NULL is passed to irq_create_mapping(). It makes life easier for | |
554 | * platforms that want to manipulate a few hard coded interrupt numbers that | |
555 | * aren't properly represented in the device-tree. | |
556 | */ | |
825dfab2 | 557 | void irq_set_default_domain(struct irq_domain *domain) |
cc79ca69 | 558 | { |
54a90588 | 559 | pr_debug("Default domain set to @0x%p\n", domain); |
cc79ca69 | 560 | |
68700650 | 561 | irq_default_domain = domain; |
cc79ca69 | 562 | } |
825dfab2 | 563 | EXPORT_SYMBOL_GPL(irq_set_default_domain); |
cc79ca69 | 564 | |
9f199dd3 | 565 | /** |
0a27ea38 | 566 | * irq_get_default_domain() - Retrieve the "default" irq domain |
9f199dd3 MZ |
567 | * |
568 | * Returns: the default domain, if any. | |
569 | * | |
570 | * Modern code should never use this. This should only be used on | |
571 | * systems that cannot implement a firmware->fwnode mapping (which | |
572 | * both DT and ACPI provide). | |
573 | */ | |
0a27ea38 | 574 | struct irq_domain *irq_get_default_domain(void) |
9f199dd3 MZ |
575 | { |
576 | return irq_default_domain; | |
577 | } | |
0a27ea38 | 578 | EXPORT_SYMBOL_GPL(irq_get_default_domain); |
9f199dd3 | 579 | |
4f86a06e MZ |
580 | static bool irq_domain_is_nomap(struct irq_domain *domain) |
581 | { | |
582 | return IS_ENABLED(CONFIG_IRQ_DOMAIN_NOMAP) && | |
583 | (domain->flags & IRQ_DOMAIN_FLAG_NO_MAP); | |
584 | } | |
585 | ||
b526adfe DD |
586 | static void irq_domain_clear_mapping(struct irq_domain *domain, |
587 | irq_hw_number_t hwirq) | |
588 | { | |
9dbb8e34 | 589 | lockdep_assert_held(&domain->root->mutex); |
47d1932f | 590 | |
4f86a06e MZ |
591 | if (irq_domain_is_nomap(domain)) |
592 | return; | |
593 | ||
d4a45c68 MZ |
594 | if (hwirq < domain->revmap_size) |
595 | rcu_assign_pointer(domain->revmap[hwirq], NULL); | |
596 | else | |
b526adfe | 597 | radix_tree_delete(&domain->revmap_tree, hwirq); |
b526adfe DD |
598 | } |
599 | ||
600 | static void irq_domain_set_mapping(struct irq_domain *domain, | |
601 | irq_hw_number_t hwirq, | |
602 | struct irq_data *irq_data) | |
603 | { | |
9dbb8e34 JH |
604 | /* |
605 | * This also makes sure that all domains point to the same root when | |
606 | * called from irq_domain_insert_irq() for each domain in a hierarchy. | |
607 | */ | |
608 | lockdep_assert_held(&domain->root->mutex); | |
47d1932f | 609 | |
4f86a06e MZ |
610 | if (irq_domain_is_nomap(domain)) |
611 | return; | |
612 | ||
d4a45c68 MZ |
613 | if (hwirq < domain->revmap_size) |
614 | rcu_assign_pointer(domain->revmap[hwirq], irq_data); | |
615 | else | |
b526adfe | 616 | radix_tree_insert(&domain->revmap_tree, hwirq, irq_data); |
b526adfe DD |
617 | } |
618 | ||
e906a546 | 619 | static void irq_domain_disassociate(struct irq_domain *domain, unsigned int irq) |
913af207 | 620 | { |
ddaf144c GL |
621 | struct irq_data *irq_data = irq_get_irq_data(irq); |
622 | irq_hw_number_t hwirq; | |
913af207 | 623 | |
ddaf144c GL |
624 | if (WARN(!irq_data || irq_data->domain != domain, |
625 | "virq%i doesn't exist; cannot disassociate\n", irq)) | |
626 | return; | |
913af207 | 627 | |
ddaf144c | 628 | hwirq = irq_data->hwirq; |
3f883c38 | 629 | |
9dbb8e34 | 630 | mutex_lock(&domain->root->mutex); |
3f883c38 | 631 | |
ddaf144c | 632 | irq_set_status_flags(irq, IRQ_NOREQUEST); |
913af207 | 633 | |
ddaf144c GL |
634 | /* remove chip and handler */ |
635 | irq_set_chip_and_handler(irq, NULL, NULL); | |
913af207 | 636 | |
ddaf144c GL |
637 | /* Make sure it's completed */ |
638 | synchronize_irq(irq); | |
913af207 | 639 | |
ddaf144c GL |
640 | /* Tell the PIC about it */ |
641 | if (domain->ops->unmap) | |
642 | domain->ops->unmap(domain, irq); | |
643 | smp_mb(); | |
913af207 | 644 | |
ddaf144c GL |
645 | irq_data->domain = NULL; |
646 | irq_data->hwirq = 0; | |
9dc6be3d | 647 | domain->mapcount--; |
913af207 | 648 | |
ddaf144c | 649 | /* Clear reverse map for this hwirq */ |
b526adfe | 650 | irq_domain_clear_mapping(domain, hwirq); |
3f883c38 | 651 | |
9dbb8e34 | 652 | mutex_unlock(&domain->root->mutex); |
913af207 GL |
653 | } |
654 | ||
b06730a5 JH |
655 | static int irq_domain_associate_locked(struct irq_domain *domain, unsigned int virq, |
656 | irq_hw_number_t hwirq) | |
cc79ca69 | 657 | { |
ddaf144c GL |
658 | struct irq_data *irq_data = irq_get_irq_data(virq); |
659 | int ret; | |
cc79ca69 | 660 | |
ddaf144c GL |
661 | if (WARN(hwirq >= domain->hwirq_max, |
662 | "error: hwirq 0x%x is too large for %s\n", (int)hwirq, domain->name)) | |
663 | return -EINVAL; | |
664 | if (WARN(!irq_data, "error: virq%i is not allocated", virq)) | |
665 | return -EINVAL; | |
666 | if (WARN(irq_data->domain, "error: virq%i is already associated", virq)) | |
667 | return -EINVAL; | |
cc79ca69 | 668 | |
ddaf144c GL |
669 | irq_data->hwirq = hwirq; |
670 | irq_data->domain = domain; | |
671 | if (domain->ops->map) { | |
672 | ret = domain->ops->map(domain, virq, hwirq); | |
673 | if (ret != 0) { | |
674 | /* | |
675 | * If map() returns -EPERM, this interrupt is protected | |
676 | * by the firmware or some other service and shall not | |
677 | * be mapped. Don't bother telling the user about it. | |
678 | */ | |
679 | if (ret != -EPERM) { | |
680 | pr_info("%s didn't like hwirq-0x%lx to VIRQ%i mapping (rc=%d)\n", | |
681 | domain->name, hwirq, virq, ret); | |
f5a1ad05 | 682 | } |
ddaf144c GL |
683 | irq_data->domain = NULL; |
684 | irq_data->hwirq = 0; | |
ddaf144c | 685 | return ret; |
98aa468e | 686 | } |
ddaf144c | 687 | } |
2a71a1a9 | 688 | |
9dc6be3d | 689 | domain->mapcount++; |
b526adfe | 690 | irq_domain_set_mapping(domain, hwirq, irq_data); |
ddaf144c GL |
691 | |
692 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
cc79ca69 GL |
693 | |
694 | return 0; | |
695 | } | |
b06730a5 JH |
696 | |
697 | int irq_domain_associate(struct irq_domain *domain, unsigned int virq, | |
698 | irq_hw_number_t hwirq) | |
699 | { | |
700 | int ret; | |
701 | ||
9dbb8e34 | 702 | mutex_lock(&domain->root->mutex); |
b06730a5 | 703 | ret = irq_domain_associate_locked(domain, virq, hwirq); |
9dbb8e34 | 704 | mutex_unlock(&domain->root->mutex); |
b06730a5 JH |
705 | |
706 | return ret; | |
707 | } | |
ddaf144c | 708 | EXPORT_SYMBOL_GPL(irq_domain_associate); |
98aa468e | 709 | |
ddaf144c GL |
710 | void irq_domain_associate_many(struct irq_domain *domain, unsigned int irq_base, |
711 | irq_hw_number_t hwirq_base, int count) | |
712 | { | |
5d4c9bc7 | 713 | struct device_node *of_node; |
ddaf144c GL |
714 | int i; |
715 | ||
5d4c9bc7 | 716 | of_node = irq_domain_get_of_node(domain); |
ddaf144c | 717 | pr_debug("%s(%s, irqbase=%i, hwbase=%i, count=%i)\n", __func__, |
5d4c9bc7 | 718 | of_node_full_name(of_node), irq_base, (int)hwirq_base, count); |
ddaf144c | 719 | |
4e0d86df | 720 | for (i = 0; i < count; i++) |
ddaf144c | 721 | irq_domain_associate(domain, irq_base + i, hwirq_base + i); |
cc79ca69 | 722 | } |
98aa468e | 723 | EXPORT_SYMBOL_GPL(irq_domain_associate_many); |
cc79ca69 | 724 | |
e37af801 | 725 | #ifdef CONFIG_IRQ_DOMAIN_NOMAP |
cc79ca69 GL |
726 | /** |
727 | * irq_create_direct_mapping() - Allocate an irq for direct mapping | |
68700650 | 728 | * @domain: domain to allocate the irq for or NULL for default domain |
cc79ca69 GL |
729 | * |
730 | * This routine is used for irq controllers which can choose the hardware | |
731 | * interrupt numbers they generate. In such a case it's simplest to use | |
1aa0dd94 GL |
732 | * the linux irq as the hardware interrupt number. It still uses the linear |
733 | * or radix tree to store the mapping, but the irq controller can optimize | |
734 | * the revmap path by using the hwirq directly. | |
cc79ca69 | 735 | */ |
68700650 | 736 | unsigned int irq_create_direct_mapping(struct irq_domain *domain) |
cc79ca69 | 737 | { |
5d4c9bc7 | 738 | struct device_node *of_node; |
cc79ca69 GL |
739 | unsigned int virq; |
740 | ||
68700650 GL |
741 | if (domain == NULL) |
742 | domain = irq_default_domain; | |
cc79ca69 | 743 | |
5d4c9bc7 MZ |
744 | of_node = irq_domain_get_of_node(domain); |
745 | virq = irq_alloc_desc_from(1, of_node_to_nid(of_node)); | |
03848373 | 746 | if (!virq) { |
54a90588 | 747 | pr_debug("create_direct virq allocation failed\n"); |
03848373 | 748 | return 0; |
cc79ca69 | 749 | } |
ef50cd57 XQ |
750 | if (virq >= domain->hwirq_max) { |
751 | pr_err("ERROR: no free irqs available below %lu maximum\n", | |
752 | domain->hwirq_max); | |
cc79ca69 GL |
753 | irq_free_desc(virq); |
754 | return 0; | |
755 | } | |
54a90588 | 756 | pr_debug("create_direct obtained virq %d\n", virq); |
cc79ca69 | 757 | |
98aa468e | 758 | if (irq_domain_associate(domain, virq, virq)) { |
cc79ca69 | 759 | irq_free_desc(virq); |
03848373 | 760 | return 0; |
cc79ca69 GL |
761 | } |
762 | ||
763 | return virq; | |
764 | } | |
ecd84eb2 | 765 | EXPORT_SYMBOL_GPL(irq_create_direct_mapping); |
e37af801 | 766 | #endif |
cc79ca69 | 767 | |
601363cc JH |
768 | static unsigned int irq_create_mapping_affinity_locked(struct irq_domain *domain, |
769 | irq_hw_number_t hwirq, | |
770 | const struct irq_affinity_desc *affinity) | |
6e6f75c9 JH |
771 | { |
772 | struct device_node *of_node = irq_domain_get_of_node(domain); | |
773 | int virq; | |
774 | ||
775 | pr_debug("irq_create_mapping(0x%p, 0x%lx)\n", domain, hwirq); | |
776 | ||
777 | /* Allocate a virtual interrupt number */ | |
778 | virq = irq_domain_alloc_descs(-1, 1, hwirq, of_node_to_nid(of_node), | |
779 | affinity); | |
780 | if (virq <= 0) { | |
781 | pr_debug("-> virq allocation failed\n"); | |
782 | return 0; | |
783 | } | |
784 | ||
601363cc | 785 | if (irq_domain_associate_locked(domain, virq, hwirq)) { |
6e6f75c9 JH |
786 | irq_free_desc(virq); |
787 | return 0; | |
788 | } | |
789 | ||
790 | pr_debug("irq %lu on domain %s mapped to virtual irq %u\n", | |
791 | hwirq, of_node_full_name(of_node), virq); | |
792 | ||
793 | return virq; | |
794 | } | |
795 | ||
cc79ca69 | 796 | /** |
bb4c6910 | 797 | * irq_create_mapping_affinity() - Map a hardware interrupt into linux irq space |
68700650 GL |
798 | * @domain: domain owning this hardware interrupt or NULL for default domain |
799 | * @hwirq: hardware irq number in that domain space | |
bb4c6910 | 800 | * @affinity: irq affinity |
cc79ca69 GL |
801 | * |
802 | * Only one mapping per hardware interrupt is permitted. Returns a linux | |
803 | * irq number. | |
804 | * If the sense/trigger is to be specified, set_irq_type() should be called | |
805 | * on the number returned from that call. | |
806 | */ | |
bb4c6910 | 807 | unsigned int irq_create_mapping_affinity(struct irq_domain *domain, |
6e6f75c9 JH |
808 | irq_hw_number_t hwirq, |
809 | const struct irq_affinity_desc *affinity) | |
cc79ca69 | 810 | { |
5b7526e3 | 811 | int virq; |
cc79ca69 | 812 | |
a359f757 | 813 | /* Look for default domain if necessary */ |
68700650 GL |
814 | if (domain == NULL) |
815 | domain = irq_default_domain; | |
816 | if (domain == NULL) { | |
798f0fd1 | 817 | WARN(1, "%s(, %lx) called with NULL domain\n", __func__, hwirq); |
03848373 | 818 | return 0; |
cc79ca69 | 819 | } |
cc79ca69 | 820 | |
9dbb8e34 | 821 | mutex_lock(&domain->root->mutex); |
5d4c9bc7 | 822 | |
cc79ca69 | 823 | /* Check if mapping already exists */ |
68700650 | 824 | virq = irq_find_mapping(domain, hwirq); |
03848373 | 825 | if (virq) { |
6e6f75c9 | 826 | pr_debug("existing mapping on virq %d\n", virq); |
601363cc | 827 | goto out; |
cc79ca69 GL |
828 | } |
829 | ||
601363cc JH |
830 | virq = irq_create_mapping_affinity_locked(domain, hwirq, affinity); |
831 | out: | |
9dbb8e34 | 832 | mutex_unlock(&domain->root->mutex); |
cc79ca69 GL |
833 | |
834 | return virq; | |
835 | } | |
bb4c6910 | 836 | EXPORT_SYMBOL_GPL(irq_create_mapping_affinity); |
cc79ca69 | 837 | |
11e4438e MZ |
838 | static int irq_domain_translate(struct irq_domain *d, |
839 | struct irq_fwspec *fwspec, | |
840 | irq_hw_number_t *hwirq, unsigned int *type) | |
841 | { | |
842 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
843 | if (d->ops->translate) | |
844 | return d->ops->translate(d, fwspec, hwirq, type); | |
845 | #endif | |
846 | if (d->ops->xlate) | |
847 | return d->ops->xlate(d, to_of_node(fwspec->fwnode), | |
848 | fwspec->param, fwspec->param_count, | |
849 | hwirq, type); | |
850 | ||
851 | /* If domain has no translation, then we assume interrupt line */ | |
852 | *hwirq = fwspec->param[0]; | |
853 | return 0; | |
854 | } | |
855 | ||
0ab8d0f6 MZ |
856 | void of_phandle_args_to_fwspec(struct device_node *np, const u32 *args, |
857 | unsigned int count, struct irq_fwspec *fwspec) | |
11e4438e MZ |
858 | { |
859 | int i; | |
860 | ||
e847a847 | 861 | fwspec->fwnode = of_fwnode_handle(np); |
b5c231d8 | 862 | fwspec->param_count = count; |
11e4438e | 863 | |
b5c231d8 BM |
864 | for (i = 0; i < count; i++) |
865 | fwspec->param[i] = args[i]; | |
11e4438e | 866 | } |
0ab8d0f6 | 867 | EXPORT_SYMBOL_GPL(of_phandle_args_to_fwspec); |
11e4438e | 868 | |
c0131f09 | 869 | unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec) |
cc79ca69 | 870 | { |
68700650 | 871 | struct irq_domain *domain; |
1e2a7d78 | 872 | struct irq_data *irq_data; |
cc79ca69 GL |
873 | irq_hw_number_t hwirq; |
874 | unsigned int type = IRQ_TYPE_NONE; | |
f8264e34 | 875 | int virq; |
cc79ca69 | 876 | |
530cbe10 | 877 | if (fwspec->fwnode) { |
651e8b54 | 878 | domain = irq_find_matching_fwspec(fwspec, DOMAIN_BUS_WIRED); |
530cbe10 | 879 | if (!domain) |
651e8b54 | 880 | domain = irq_find_matching_fwspec(fwspec, DOMAIN_BUS_ANY); |
530cbe10 | 881 | } else { |
11e4438e | 882 | domain = irq_default_domain; |
530cbe10 | 883 | } |
11e4438e | 884 | |
68700650 | 885 | if (!domain) { |
798f0fd1 | 886 | pr_warn("no irq domain found for %s !\n", |
c0131f09 | 887 | of_node_full_name(to_of_node(fwspec->fwnode))); |
03848373 | 888 | return 0; |
cc79ca69 GL |
889 | } |
890 | ||
c0131f09 | 891 | if (irq_domain_translate(domain, fwspec, &hwirq, &type)) |
11e4438e | 892 | return 0; |
cc79ca69 | 893 | |
b62b2cf5 JH |
894 | /* |
895 | * WARN if the irqchip returns a type with bits | |
896 | * outside the sense mask set and clear these bits. | |
897 | */ | |
898 | if (WARN_ON(type & ~IRQ_TYPE_SENSE_MASK)) | |
899 | type &= IRQ_TYPE_SENSE_MASK; | |
900 | ||
9dbb8e34 | 901 | mutex_lock(&domain->root->mutex); |
601363cc | 902 | |
b62b2cf5 JH |
903 | /* |
904 | * If we've already configured this interrupt, | |
905 | * don't do it again, or hell will break loose. | |
906 | */ | |
907 | virq = irq_find_mapping(domain, hwirq); | |
908 | if (virq) { | |
0cc01aba | 909 | /* |
b62b2cf5 JH |
910 | * If the trigger type is not specified or matches the |
911 | * current trigger type then we are done so return the | |
912 | * interrupt number. | |
0cc01aba | 913 | */ |
b62b2cf5 | 914 | if (type == IRQ_TYPE_NONE || type == irq_get_trigger_type(virq)) |
601363cc | 915 | goto out; |
0cc01aba | 916 | |
b62b2cf5 JH |
917 | /* |
918 | * If the trigger type has not been set yet, then set | |
919 | * it now and return the interrupt number. | |
920 | */ | |
921 | if (irq_get_trigger_type(virq) == IRQ_TYPE_NONE) { | |
1e2a7d78 | 922 | irq_data = irq_get_irq_data(virq); |
601363cc JH |
923 | if (!irq_data) { |
924 | virq = 0; | |
925 | goto out; | |
926 | } | |
1e2a7d78 JH |
927 | |
928 | irqd_set_trigger_type(irq_data, type); | |
601363cc | 929 | goto out; |
b62b2cf5 JH |
930 | } |
931 | ||
932 | pr_warn("type mismatch, failed to map hwirq-%lu for %s!\n", | |
933 | hwirq, of_node_full_name(to_of_node(fwspec->fwnode))); | |
601363cc JH |
934 | virq = 0; |
935 | goto out; | |
b62b2cf5 JH |
936 | } |
937 | ||
938 | if (irq_domain_is_hierarchy(domain)) { | |
e49312fe TG |
939 | if (irq_domain_is_msi_device(domain)) { |
940 | mutex_unlock(&domain->root->mutex); | |
941 | virq = msi_device_domain_alloc_wired(domain, hwirq, type); | |
942 | mutex_lock(&domain->root->mutex); | |
943 | } else | |
944 | virq = irq_domain_alloc_irqs_locked(domain, -1, 1, NUMA_NO_NODE, | |
945 | fwspec, false, NULL); | |
601363cc JH |
946 | if (virq <= 0) { |
947 | virq = 0; | |
948 | goto out; | |
949 | } | |
0cc01aba YC |
950 | } else { |
951 | /* Create mapping */ | |
601363cc | 952 | virq = irq_create_mapping_affinity_locked(domain, hwirq, NULL); |
0cc01aba | 953 | if (!virq) |
601363cc | 954 | goto out; |
0cc01aba | 955 | } |
cc79ca69 | 956 | |
1e2a7d78 | 957 | irq_data = irq_get_irq_data(virq); |
601363cc JH |
958 | if (WARN_ON(!irq_data)) { |
959 | virq = 0; | |
960 | goto out; | |
1e2a7d78 JH |
961 | } |
962 | ||
963 | /* Store trigger type */ | |
964 | irqd_set_trigger_type(irq_data, type); | |
601363cc | 965 | out: |
9dbb8e34 | 966 | mutex_unlock(&domain->root->mutex); |
1e2a7d78 | 967 | |
cc79ca69 GL |
968 | return virq; |
969 | } | |
c0131f09 MZ |
970 | EXPORT_SYMBOL_GPL(irq_create_fwspec_mapping); |
971 | ||
972 | unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data) | |
973 | { | |
974 | struct irq_fwspec fwspec; | |
975 | ||
b5c231d8 BM |
976 | of_phandle_args_to_fwspec(irq_data->np, irq_data->args, |
977 | irq_data->args_count, &fwspec); | |
978 | ||
c0131f09 MZ |
979 | return irq_create_fwspec_mapping(&fwspec); |
980 | } | |
cc79ca69 GL |
981 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
982 | ||
983 | /** | |
984 | * irq_dispose_mapping() - Unmap an interrupt | |
985 | * @virq: linux irq number of the interrupt to unmap | |
986 | */ | |
987 | void irq_dispose_mapping(unsigned int virq) | |
988 | { | |
a2ea3cd7 | 989 | struct irq_data *irq_data; |
68700650 | 990 | struct irq_domain *domain; |
cc79ca69 | 991 | |
a2ea3cd7 AS |
992 | irq_data = virq ? irq_get_irq_data(virq) : NULL; |
993 | if (!irq_data) | |
cc79ca69 GL |
994 | return; |
995 | ||
68700650 GL |
996 | domain = irq_data->domain; |
997 | if (WARN_ON(domain == NULL)) | |
cc79ca69 GL |
998 | return; |
999 | ||
d16dcd3d | 1000 | if (irq_domain_is_hierarchy(domain)) { |
e49312fe | 1001 | irq_domain_free_one_irq(domain, virq); |
d16dcd3d JH |
1002 | } else { |
1003 | irq_domain_disassociate(domain, virq); | |
1004 | irq_free_desc(virq); | |
1005 | } | |
cc79ca69 GL |
1006 | } |
1007 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); | |
1008 | ||
1009 | /** | |
d22558dd | 1010 | * __irq_resolve_mapping() - Find a linux irq from a hw irq number. |
68700650 GL |
1011 | * @domain: domain owning this hardware interrupt |
1012 | * @hwirq: hardware irq number in that domain space | |
d22558dd MZ |
1013 | * @irq: optional pointer to return the Linux irq if required |
1014 | * | |
1015 | * Returns the interrupt descriptor. | |
cc79ca69 | 1016 | */ |
d22558dd MZ |
1017 | struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain, |
1018 | irq_hw_number_t hwirq, | |
1019 | unsigned int *irq) | |
cc79ca69 | 1020 | { |
d22558dd | 1021 | struct irq_desc *desc = NULL; |
4c0946c4 | 1022 | struct irq_data *data; |
cc79ca69 | 1023 | |
a359f757 | 1024 | /* Look for default domain if necessary */ |
68700650 GL |
1025 | if (domain == NULL) |
1026 | domain = irq_default_domain; | |
1027 | if (domain == NULL) | |
d22558dd | 1028 | return desc; |
cc79ca69 | 1029 | |
4f86a06e | 1030 | if (irq_domain_is_nomap(domain)) { |
ef50cd57 | 1031 | if (hwirq < domain->hwirq_max) { |
4f86a06e MZ |
1032 | data = irq_domain_get_irq_data(domain, hwirq); |
1033 | if (data && data->hwirq == hwirq) | |
d22558dd | 1034 | desc = irq_data_to_desc(data); |
6f194c99 XQ |
1035 | if (irq && desc) |
1036 | *irq = hwirq; | |
4f86a06e MZ |
1037 | } |
1038 | ||
d22558dd | 1039 | return desc; |
4c0946c4 GL |
1040 | } |
1041 | ||
d4a45c68 | 1042 | rcu_read_lock(); |
d3dcb436 GL |
1043 | /* Check if the hwirq is in the linear revmap. */ |
1044 | if (hwirq < domain->revmap_size) | |
d4a45c68 MZ |
1045 | data = rcu_dereference(domain->revmap[hwirq]); |
1046 | else | |
1047 | data = radix_tree_lookup(&domain->revmap_tree, hwirq); | |
d22558dd MZ |
1048 | |
1049 | if (likely(data)) { | |
1050 | desc = irq_data_to_desc(data); | |
1051 | if (irq) | |
1052 | *irq = data->irq; | |
1053 | } | |
1054 | ||
d3dcb436 | 1055 | rcu_read_unlock(); |
d22558dd | 1056 | return desc; |
cc79ca69 | 1057 | } |
d22558dd | 1058 | EXPORT_SYMBOL_GPL(__irq_resolve_mapping); |
cc79ca69 | 1059 | |
16b2e6e2 GL |
1060 | /** |
1061 | * irq_domain_xlate_onecell() - Generic xlate for direct one cell bindings | |
b4dc049e HC |
1062 | * @d: Interrupt domain involved in the translation |
1063 | * @ctrlr: The device tree node for the device whose interrupt is translated | |
1064 | * @intspec: The interrupt specifier data from the device tree | |
1065 | * @intsize: The number of entries in @intspec | |
1066 | * @out_hwirq: Pointer to storage for the hardware interrupt number | |
1067 | * @out_type: Pointer to storage for the interrupt type | |
16b2e6e2 GL |
1068 | * |
1069 | * Device Tree IRQ specifier translation function which works with one cell | |
1070 | * bindings where the cell value maps directly to the hwirq number. | |
1071 | */ | |
1072 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
1073 | const u32 *intspec, unsigned int intsize, | |
1074 | unsigned long *out_hwirq, unsigned int *out_type) | |
7e713301 | 1075 | { |
16b2e6e2 | 1076 | if (WARN_ON(intsize < 1)) |
7e713301 | 1077 | return -EINVAL; |
7e713301 GL |
1078 | *out_hwirq = intspec[0]; |
1079 | *out_type = IRQ_TYPE_NONE; | |
7e713301 GL |
1080 | return 0; |
1081 | } | |
16b2e6e2 GL |
1082 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onecell); |
1083 | ||
1084 | /** | |
1085 | * irq_domain_xlate_twocell() - Generic xlate for direct two cell bindings | |
b4dc049e HC |
1086 | * @d: Interrupt domain involved in the translation |
1087 | * @ctrlr: The device tree node for the device whose interrupt is translated | |
1088 | * @intspec: The interrupt specifier data from the device tree | |
1089 | * @intsize: The number of entries in @intspec | |
1090 | * @out_hwirq: Pointer to storage for the hardware interrupt number | |
1091 | * @out_type: Pointer to storage for the interrupt type | |
16b2e6e2 GL |
1092 | * |
1093 | * Device Tree IRQ specifier translation function which works with two cell | |
1094 | * bindings where the cell values map directly to the hwirq number | |
1095 | * and linux irq flags. | |
1096 | */ | |
1097 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, | |
1098 | const u32 *intspec, unsigned int intsize, | |
1099 | irq_hw_number_t *out_hwirq, unsigned int *out_type) | |
1100 | { | |
b5c231d8 BM |
1101 | struct irq_fwspec fwspec; |
1102 | ||
1103 | of_phandle_args_to_fwspec(ctrlr, intspec, intsize, &fwspec); | |
1104 | return irq_domain_translate_twocell(d, &fwspec, out_hwirq, out_type); | |
16b2e6e2 GL |
1105 | } |
1106 | EXPORT_SYMBOL_GPL(irq_domain_xlate_twocell); | |
1107 | ||
0a02e1f4 YL |
1108 | /** |
1109 | * irq_domain_xlate_twothreecell() - Generic xlate for direct two or three cell bindings | |
1110 | * @d: Interrupt domain involved in the translation | |
1111 | * @ctrlr: The device tree node for the device whose interrupt is translated | |
1112 | * @intspec: The interrupt specifier data from the device tree | |
1113 | * @intsize: The number of entries in @intspec | |
1114 | * @out_hwirq: Pointer to storage for the hardware interrupt number | |
1115 | * @out_type: Pointer to storage for the interrupt type | |
1116 | * | |
1117 | * Device Tree interrupt specifier translation function for two or three | |
1118 | * cell bindings, where the cell values map directly to the hardware | |
1119 | * interrupt number and the type specifier. | |
1120 | */ | |
1121 | int irq_domain_xlate_twothreecell(struct irq_domain *d, struct device_node *ctrlr, | |
1122 | const u32 *intspec, unsigned int intsize, | |
1123 | irq_hw_number_t *out_hwirq, unsigned int *out_type) | |
1124 | { | |
1125 | struct irq_fwspec fwspec; | |
1126 | ||
1127 | of_phandle_args_to_fwspec(ctrlr, intspec, intsize, &fwspec); | |
1128 | ||
1129 | return irq_domain_translate_twothreecell(d, &fwspec, out_hwirq, out_type); | |
1130 | } | |
1131 | EXPORT_SYMBOL_GPL(irq_domain_xlate_twothreecell); | |
1132 | ||
16b2e6e2 GL |
1133 | /** |
1134 | * irq_domain_xlate_onetwocell() - Generic xlate for one or two cell bindings | |
b4dc049e HC |
1135 | * @d: Interrupt domain involved in the translation |
1136 | * @ctrlr: The device tree node for the device whose interrupt is translated | |
1137 | * @intspec: The interrupt specifier data from the device tree | |
1138 | * @intsize: The number of entries in @intspec | |
1139 | * @out_hwirq: Pointer to storage for the hardware interrupt number | |
1140 | * @out_type: Pointer to storage for the interrupt type | |
16b2e6e2 GL |
1141 | * |
1142 | * Device Tree IRQ specifier translation function which works with either one | |
1143 | * or two cell bindings where the cell values map directly to the hwirq number | |
1144 | * and linux irq flags. | |
1145 | * | |
1146 | * Note: don't use this function unless your interrupt controller explicitly | |
1147 | * supports both one and two cell bindings. For the majority of controllers | |
1148 | * the _onecell() or _twocell() variants above should be used. | |
1149 | */ | |
1150 | int irq_domain_xlate_onetwocell(struct irq_domain *d, | |
1151 | struct device_node *ctrlr, | |
1152 | const u32 *intspec, unsigned int intsize, | |
1153 | unsigned long *out_hwirq, unsigned int *out_type) | |
1154 | { | |
1155 | if (WARN_ON(intsize < 1)) | |
1156 | return -EINVAL; | |
1157 | *out_hwirq = intspec[0]; | |
0c228919 SF |
1158 | if (intsize > 1) |
1159 | *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; | |
1160 | else | |
1161 | *out_type = IRQ_TYPE_NONE; | |
16b2e6e2 GL |
1162 | return 0; |
1163 | } | |
1164 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onetwocell); | |
7e713301 | 1165 | |
a18dc81b | 1166 | const struct irq_domain_ops irq_domain_simple_ops = { |
16b2e6e2 | 1167 | .xlate = irq_domain_xlate_onetwocell, |
75294957 GL |
1168 | }; |
1169 | EXPORT_SYMBOL_GPL(irq_domain_simple_ops); | |
f8264e34 | 1170 | |
b01eccea YS |
1171 | /** |
1172 | * irq_domain_translate_onecell() - Generic translate for direct one cell | |
1173 | * bindings | |
b4dc049e HC |
1174 | * @d: Interrupt domain involved in the translation |
1175 | * @fwspec: The firmware interrupt specifier to translate | |
1176 | * @out_hwirq: Pointer to storage for the hardware interrupt number | |
1177 | * @out_type: Pointer to storage for the interrupt type | |
b01eccea YS |
1178 | */ |
1179 | int irq_domain_translate_onecell(struct irq_domain *d, | |
1180 | struct irq_fwspec *fwspec, | |
1181 | unsigned long *out_hwirq, | |
1182 | unsigned int *out_type) | |
1183 | { | |
1184 | if (WARN_ON(fwspec->param_count < 1)) | |
1185 | return -EINVAL; | |
1186 | *out_hwirq = fwspec->param[0]; | |
1187 | *out_type = IRQ_TYPE_NONE; | |
1188 | return 0; | |
1189 | } | |
1190 | EXPORT_SYMBOL_GPL(irq_domain_translate_onecell); | |
1191 | ||
b5c231d8 BM |
1192 | /** |
1193 | * irq_domain_translate_twocell() - Generic translate for direct two cell | |
1194 | * bindings | |
b4dc049e HC |
1195 | * @d: Interrupt domain involved in the translation |
1196 | * @fwspec: The firmware interrupt specifier to translate | |
1197 | * @out_hwirq: Pointer to storage for the hardware interrupt number | |
1198 | * @out_type: Pointer to storage for the interrupt type | |
b5c231d8 BM |
1199 | * |
1200 | * Device Tree IRQ specifier translation function which works with two cell | |
1201 | * bindings where the cell values map directly to the hwirq number | |
1202 | * and linux irq flags. | |
1203 | */ | |
1204 | int irq_domain_translate_twocell(struct irq_domain *d, | |
1205 | struct irq_fwspec *fwspec, | |
1206 | unsigned long *out_hwirq, | |
1207 | unsigned int *out_type) | |
1208 | { | |
1209 | if (WARN_ON(fwspec->param_count < 2)) | |
1210 | return -EINVAL; | |
1211 | *out_hwirq = fwspec->param[0]; | |
1212 | *out_type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; | |
1213 | return 0; | |
1214 | } | |
1215 | EXPORT_SYMBOL_GPL(irq_domain_translate_twocell); | |
1216 | ||
0a02e1f4 YL |
1217 | /** |
1218 | * irq_domain_translate_twothreecell() - Generic translate for direct two or three cell | |
1219 | * bindings | |
1220 | * @d: Interrupt domain involved in the translation | |
1221 | * @fwspec: The firmware interrupt specifier to translate | |
1222 | * @out_hwirq: Pointer to storage for the hardware interrupt number | |
1223 | * @out_type: Pointer to storage for the interrupt type | |
1224 | * | |
1225 | * Firmware interrupt specifier translation function for two or three cell | |
1226 | * specifications, where the parameter values map directly to the hardware | |
1227 | * interrupt number and the type specifier. | |
1228 | */ | |
1229 | int irq_domain_translate_twothreecell(struct irq_domain *d, struct irq_fwspec *fwspec, | |
1230 | unsigned long *out_hwirq, unsigned int *out_type) | |
1231 | { | |
1232 | if (fwspec->param_count == 2) { | |
1233 | *out_hwirq = fwspec->param[0]; | |
1234 | *out_type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; | |
1235 | return 0; | |
1236 | } | |
1237 | ||
1238 | if (fwspec->param_count == 3) { | |
1239 | *out_hwirq = fwspec->param[1]; | |
1240 | *out_type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK; | |
1241 | return 0; | |
1242 | } | |
1243 | ||
1244 | return -EINVAL; | |
1245 | } | |
1246 | EXPORT_SYMBOL_GPL(irq_domain_translate_twothreecell); | |
1247 | ||
ac0a0cd2 | 1248 | int irq_domain_alloc_descs(int virq, unsigned int cnt, irq_hw_number_t hwirq, |
bec04037 | 1249 | int node, const struct irq_affinity_desc *affinity) |
f8264e34 JL |
1250 | { |
1251 | unsigned int hint; | |
1252 | ||
1253 | if (virq >= 0) { | |
06ee6d57 TG |
1254 | virq = __irq_alloc_descs(virq, virq, cnt, node, THIS_MODULE, |
1255 | affinity); | |
f8264e34 | 1256 | } else { |
1ad2048b | 1257 | hint = hwirq % irq_get_nr_irqs(); |
f8264e34 JL |
1258 | if (hint == 0) |
1259 | hint++; | |
06ee6d57 TG |
1260 | virq = __irq_alloc_descs(-1, hint, cnt, node, THIS_MODULE, |
1261 | affinity); | |
1262 | if (virq <= 0 && hint > 1) { | |
1263 | virq = __irq_alloc_descs(-1, 1, cnt, node, THIS_MODULE, | |
1264 | affinity); | |
1265 | } | |
f8264e34 JL |
1266 | } |
1267 | ||
1268 | return virq; | |
1269 | } | |
1270 | ||
5c8f77a2 BG |
1271 | /** |
1272 | * irq_domain_reset_irq_data - Clear hwirq, chip and chip_data in @irq_data | |
1273 | * @irq_data: The pointer to irq_data | |
1274 | */ | |
1275 | void irq_domain_reset_irq_data(struct irq_data *irq_data) | |
1276 | { | |
1277 | irq_data->hwirq = 0; | |
1278 | irq_data->chip = &no_irq_chip; | |
1279 | irq_data->chip_data = NULL; | |
1280 | } | |
1281 | EXPORT_SYMBOL_GPL(irq_domain_reset_irq_data); | |
1282 | ||
f8264e34 JL |
1283 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1284 | static void irq_domain_insert_irq(int virq) | |
1285 | { | |
1286 | struct irq_data *data; | |
1287 | ||
1288 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
1289 | struct irq_domain *domain = data->domain; | |
f8264e34 | 1290 | |
9dc6be3d | 1291 | domain->mapcount++; |
b526adfe | 1292 | irq_domain_set_mapping(domain, data->hwirq, data); |
f8264e34 JL |
1293 | } |
1294 | ||
1295 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
1296 | } | |
1297 | ||
1298 | static void irq_domain_remove_irq(int virq) | |
1299 | { | |
1300 | struct irq_data *data; | |
1301 | ||
1302 | irq_set_status_flags(virq, IRQ_NOREQUEST); | |
1303 | irq_set_chip_and_handler(virq, NULL, NULL); | |
1304 | synchronize_irq(virq); | |
1305 | smp_mb(); | |
1306 | ||
1307 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
1308 | struct irq_domain *domain = data->domain; | |
1309 | irq_hw_number_t hwirq = data->hwirq; | |
1310 | ||
9dc6be3d | 1311 | domain->mapcount--; |
b526adfe | 1312 | irq_domain_clear_mapping(domain, hwirq); |
f8264e34 JL |
1313 | } |
1314 | } | |
1315 | ||
1316 | static struct irq_data *irq_domain_insert_irq_data(struct irq_domain *domain, | |
1317 | struct irq_data *child) | |
1318 | { | |
1319 | struct irq_data *irq_data; | |
1320 | ||
6783011b JL |
1321 | irq_data = kzalloc_node(sizeof(*irq_data), GFP_KERNEL, |
1322 | irq_data_get_node(child)); | |
f8264e34 JL |
1323 | if (irq_data) { |
1324 | child->parent_data = irq_data; | |
1325 | irq_data->irq = child->irq; | |
0d0b4c86 | 1326 | irq_data->common = child->common; |
f8264e34 JL |
1327 | irq_data->domain = domain; |
1328 | } | |
1329 | ||
1330 | return irq_data; | |
1331 | } | |
1332 | ||
55567976 MZ |
1333 | static void __irq_domain_free_hierarchy(struct irq_data *irq_data) |
1334 | { | |
1335 | struct irq_data *tmp; | |
1336 | ||
1337 | while (irq_data) { | |
1338 | tmp = irq_data; | |
1339 | irq_data = irq_data->parent_data; | |
1340 | kfree(tmp); | |
1341 | } | |
1342 | } | |
1343 | ||
f8264e34 JL |
1344 | static void irq_domain_free_irq_data(unsigned int virq, unsigned int nr_irqs) |
1345 | { | |
1346 | struct irq_data *irq_data, *tmp; | |
1347 | int i; | |
1348 | ||
1349 | for (i = 0; i < nr_irqs; i++) { | |
1350 | irq_data = irq_get_irq_data(virq + i); | |
1351 | tmp = irq_data->parent_data; | |
1352 | irq_data->parent_data = NULL; | |
1353 | irq_data->domain = NULL; | |
1354 | ||
55567976 MZ |
1355 | __irq_domain_free_hierarchy(tmp); |
1356 | } | |
1357 | } | |
1358 | ||
1359 | /** | |
1360 | * irq_domain_disconnect_hierarchy - Mark the first unused level of a hierarchy | |
1361 | * @domain: IRQ domain from which the hierarchy is to be disconnected | |
1362 | * @virq: IRQ number where the hierarchy is to be trimmed | |
1363 | * | |
1364 | * Marks the @virq level belonging to @domain as disconnected. | |
1365 | * Returns -EINVAL if @virq doesn't have a valid irq_data pointing | |
1366 | * to @domain. | |
1367 | * | |
1368 | * Its only use is to be able to trim levels of hierarchy that do not | |
1369 | * have any real meaning for this interrupt, and that the driver marks | |
1370 | * as such from its .alloc() callback. | |
1371 | */ | |
1372 | int irq_domain_disconnect_hierarchy(struct irq_domain *domain, | |
1373 | unsigned int virq) | |
1374 | { | |
1375 | struct irq_data *irqd; | |
1376 | ||
1377 | irqd = irq_domain_get_irq_data(domain, virq); | |
1378 | if (!irqd) | |
1379 | return -EINVAL; | |
1380 | ||
1381 | irqd->chip = ERR_PTR(-ENOTCONN); | |
1382 | return 0; | |
1383 | } | |
131d326b | 1384 | EXPORT_SYMBOL_GPL(irq_domain_disconnect_hierarchy); |
55567976 MZ |
1385 | |
1386 | static int irq_domain_trim_hierarchy(unsigned int virq) | |
1387 | { | |
1388 | struct irq_data *tail, *irqd, *irq_data; | |
1389 | ||
1390 | irq_data = irq_get_irq_data(virq); | |
1391 | tail = NULL; | |
1392 | ||
1393 | /* The first entry must have a valid irqchip */ | |
4609c6ea | 1394 | if (IS_ERR_OR_NULL(irq_data->chip)) |
55567976 MZ |
1395 | return -EINVAL; |
1396 | ||
1397 | /* | |
1398 | * Validate that the irq_data chain is sane in the presence of | |
1399 | * a hierarchy trimming marker. | |
1400 | */ | |
1401 | for (irqd = irq_data->parent_data; irqd; irq_data = irqd, irqd = irqd->parent_data) { | |
1402 | /* Can't have a valid irqchip after a trim marker */ | |
1403 | if (irqd->chip && tail) | |
1404 | return -EINVAL; | |
1405 | ||
1406 | /* Can't have an empty irqchip before a trim marker */ | |
1407 | if (!irqd->chip && !tail) | |
1408 | return -EINVAL; | |
1409 | ||
1410 | if (IS_ERR(irqd->chip)) { | |
1411 | /* Only -ENOTCONN is a valid trim marker */ | |
1412 | if (PTR_ERR(irqd->chip) != -ENOTCONN) | |
1413 | return -EINVAL; | |
1414 | ||
1415 | tail = irq_data; | |
f8264e34 JL |
1416 | } |
1417 | } | |
55567976 MZ |
1418 | |
1419 | /* No trim marker, nothing to do */ | |
1420 | if (!tail) | |
1421 | return 0; | |
1422 | ||
1423 | pr_info("IRQ%d: trimming hierarchy from %s\n", | |
1424 | virq, tail->parent_data->domain->name); | |
1425 | ||
1426 | /* Sever the inner part of the hierarchy... */ | |
1427 | irqd = tail; | |
1428 | tail = tail->parent_data; | |
1429 | irqd->parent_data = NULL; | |
1430 | __irq_domain_free_hierarchy(tail); | |
1431 | ||
1432 | return 0; | |
f8264e34 JL |
1433 | } |
1434 | ||
1435 | static int irq_domain_alloc_irq_data(struct irq_domain *domain, | |
1436 | unsigned int virq, unsigned int nr_irqs) | |
1437 | { | |
1438 | struct irq_data *irq_data; | |
1439 | struct irq_domain *parent; | |
1440 | int i; | |
1441 | ||
1442 | /* The outermost irq_data is embedded in struct irq_desc */ | |
1443 | for (i = 0; i < nr_irqs; i++) { | |
1444 | irq_data = irq_get_irq_data(virq + i); | |
1445 | irq_data->domain = domain; | |
1446 | ||
1447 | for (parent = domain->parent; parent; parent = parent->parent) { | |
1448 | irq_data = irq_domain_insert_irq_data(parent, irq_data); | |
1449 | if (!irq_data) { | |
1450 | irq_domain_free_irq_data(virq, i + 1); | |
1451 | return -ENOMEM; | |
1452 | } | |
1453 | } | |
1454 | } | |
1455 | ||
1456 | return 0; | |
1457 | } | |
1458 | ||
1459 | /** | |
1460 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain | |
1461 | * @domain: domain to match | |
1462 | * @virq: IRQ number to get irq_data | |
1463 | */ | |
1464 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
1465 | unsigned int virq) | |
1466 | { | |
1467 | struct irq_data *irq_data; | |
1468 | ||
1469 | for (irq_data = irq_get_irq_data(virq); irq_data; | |
1470 | irq_data = irq_data->parent_data) | |
1471 | if (irq_data->domain == domain) | |
1472 | return irq_data; | |
1473 | ||
1474 | return NULL; | |
1475 | } | |
a4289dc2 | 1476 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 JL |
1477 | |
1478 | /** | |
1479 | * irq_domain_set_hwirq_and_chip - Set hwirq and irqchip of @virq at @domain | |
1480 | * @domain: Interrupt domain to match | |
1481 | * @virq: IRQ number | |
1482 | * @hwirq: The hwirq number | |
1483 | * @chip: The associated interrupt chip | |
1484 | * @chip_data: The associated chip data | |
1485 | */ | |
1486 | int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, | |
45ec846c MZ |
1487 | irq_hw_number_t hwirq, |
1488 | const struct irq_chip *chip, | |
f8264e34 JL |
1489 | void *chip_data) |
1490 | { | |
1491 | struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); | |
1492 | ||
1493 | if (!irq_data) | |
1494 | return -ENOENT; | |
1495 | ||
1496 | irq_data->hwirq = hwirq; | |
45ec846c | 1497 | irq_data->chip = (struct irq_chip *)(chip ? chip : &no_irq_chip); |
f8264e34 JL |
1498 | irq_data->chip_data = chip_data; |
1499 | ||
1500 | return 0; | |
1501 | } | |
52b2a05f | 1502 | EXPORT_SYMBOL_GPL(irq_domain_set_hwirq_and_chip); |
f8264e34 | 1503 | |
1b537708 JL |
1504 | /** |
1505 | * irq_domain_set_info - Set the complete data for a @virq in @domain | |
1506 | * @domain: Interrupt domain to match | |
1507 | * @virq: IRQ number | |
1508 | * @hwirq: The hardware interrupt number | |
1509 | * @chip: The associated interrupt chip | |
1510 | * @chip_data: The associated interrupt chip data | |
1511 | * @handler: The interrupt flow handler | |
1512 | * @handler_data: The interrupt flow handler data | |
1513 | * @handler_name: The interrupt handler name | |
1514 | */ | |
1515 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
45ec846c | 1516 | irq_hw_number_t hwirq, const struct irq_chip *chip, |
1b537708 JL |
1517 | void *chip_data, irq_flow_handler_t handler, |
1518 | void *handler_data, const char *handler_name) | |
1519 | { | |
1520 | irq_domain_set_hwirq_and_chip(domain, virq, hwirq, chip, chip_data); | |
1521 | __irq_set_handler(virq, handler, 0, handler_name); | |
1522 | irq_set_handler_data(virq, handler_data); | |
1523 | } | |
64bce3e8 | 1524 | EXPORT_SYMBOL(irq_domain_set_info); |
1b537708 | 1525 | |
f8264e34 JL |
1526 | /** |
1527 | * irq_domain_free_irqs_common - Clear irq_data and free the parent | |
1528 | * @domain: Interrupt domain to match | |
1529 | * @virq: IRQ number to start with | |
1530 | * @nr_irqs: The number of irqs to free | |
1531 | */ | |
1532 | void irq_domain_free_irqs_common(struct irq_domain *domain, unsigned int virq, | |
1533 | unsigned int nr_irqs) | |
1534 | { | |
1535 | struct irq_data *irq_data; | |
1536 | int i; | |
1537 | ||
1538 | for (i = 0; i < nr_irqs; i++) { | |
1539 | irq_data = irq_domain_get_irq_data(domain, virq + i); | |
1540 | if (irq_data) | |
1541 | irq_domain_reset_irq_data(irq_data); | |
1542 | } | |
1543 | irq_domain_free_irqs_parent(domain, virq, nr_irqs); | |
1544 | } | |
63cc787e | 1545 | EXPORT_SYMBOL_GPL(irq_domain_free_irqs_common); |
f8264e34 JL |
1546 | |
1547 | /** | |
1548 | * irq_domain_free_irqs_top - Clear handler and handler data, clear irqdata and free parent | |
1549 | * @domain: Interrupt domain to match | |
1550 | * @virq: IRQ number to start with | |
1551 | * @nr_irqs: The number of irqs to free | |
1552 | */ | |
1553 | void irq_domain_free_irqs_top(struct irq_domain *domain, unsigned int virq, | |
1554 | unsigned int nr_irqs) | |
1555 | { | |
1556 | int i; | |
1557 | ||
1558 | for (i = 0; i < nr_irqs; i++) { | |
1559 | irq_set_handler_data(virq + i, NULL); | |
1560 | irq_set_handler(virq + i, NULL); | |
1561 | } | |
1562 | irq_domain_free_irqs_common(domain, virq, nr_irqs); | |
1563 | } | |
1564 | ||
6a6544e5 | 1565 | static void irq_domain_free_irqs_hierarchy(struct irq_domain *domain, |
36d72731 JL |
1566 | unsigned int irq_base, |
1567 | unsigned int nr_irqs) | |
1568 | { | |
4615fbc3 MZ |
1569 | unsigned int i; |
1570 | ||
1571 | if (!domain->ops->free) | |
1572 | return; | |
1573 | ||
1574 | for (i = 0; i < nr_irqs; i++) { | |
1575 | if (irq_domain_get_irq_data(domain, irq_base + i)) | |
1576 | domain->ops->free(domain, irq_base + i, 1); | |
1577 | } | |
36d72731 JL |
1578 | } |
1579 | ||
827bafd5 TG |
1580 | static int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain, unsigned int irq_base, |
1581 | unsigned int nr_irqs, void *arg) | |
36d72731 | 1582 | { |
87f2d1c6 AS |
1583 | if (!domain->ops->alloc) { |
1584 | pr_debug("domain->ops->alloc() is NULL\n"); | |
1585 | return -ENOSYS; | |
1586 | } | |
1587 | ||
6a6544e5 | 1588 | return domain->ops->alloc(domain, irq_base, nr_irqs, arg); |
36d72731 JL |
1589 | } |
1590 | ||
d55f7f4c JH |
1591 | static int irq_domain_alloc_irqs_locked(struct irq_domain *domain, int irq_base, |
1592 | unsigned int nr_irqs, int node, void *arg, | |
1593 | bool realloc, const struct irq_affinity_desc *affinity) | |
f8264e34 JL |
1594 | { |
1595 | int i, ret, virq; | |
1596 | ||
f8264e34 JL |
1597 | if (realloc && irq_base >= 0) { |
1598 | virq = irq_base; | |
1599 | } else { | |
06ee6d57 TG |
1600 | virq = irq_domain_alloc_descs(irq_base, nr_irqs, 0, node, |
1601 | affinity); | |
f8264e34 JL |
1602 | if (virq < 0) { |
1603 | pr_debug("cannot allocate IRQ(base %d, count %d)\n", | |
1604 | irq_base, nr_irqs); | |
1605 | return virq; | |
1606 | } | |
1607 | } | |
1608 | ||
1609 | if (irq_domain_alloc_irq_data(domain, virq, nr_irqs)) { | |
1610 | pr_debug("cannot allocate memory for IRQ%d\n", virq); | |
1611 | ret = -ENOMEM; | |
1612 | goto out_free_desc; | |
1613 | } | |
1614 | ||
6a6544e5 | 1615 | ret = irq_domain_alloc_irqs_hierarchy(domain, virq, nr_irqs, arg); |
d55f7f4c | 1616 | if (ret < 0) |
f8264e34 | 1617 | goto out_free_irq_data; |
55567976 MZ |
1618 | |
1619 | for (i = 0; i < nr_irqs; i++) { | |
1620 | ret = irq_domain_trim_hierarchy(virq + i); | |
d55f7f4c | 1621 | if (ret) |
55567976 | 1622 | goto out_free_irq_data; |
55567976 | 1623 | } |
d55f7f4c | 1624 | |
f8264e34 JL |
1625 | for (i = 0; i < nr_irqs; i++) |
1626 | irq_domain_insert_irq(virq + i); | |
f8264e34 JL |
1627 | |
1628 | return virq; | |
1629 | ||
1630 | out_free_irq_data: | |
1631 | irq_domain_free_irq_data(virq, nr_irqs); | |
1632 | out_free_desc: | |
1633 | irq_free_descs(virq, nr_irqs); | |
1634 | return ret; | |
1635 | } | |
d55f7f4c JH |
1636 | |
1637 | /** | |
1638 | * __irq_domain_alloc_irqs - Allocate IRQs from domain | |
1639 | * @domain: domain to allocate from | |
1640 | * @irq_base: allocate specified IRQ number if irq_base >= 0 | |
1641 | * @nr_irqs: number of IRQs to allocate | |
1642 | * @node: NUMA node id for memory allocation | |
1643 | * @arg: domain specific argument | |
1644 | * @realloc: IRQ descriptors have already been allocated if true | |
1645 | * @affinity: Optional irq affinity mask for multiqueue devices | |
1646 | * | |
1647 | * Allocate IRQ numbers and initialized all data structures to support | |
1648 | * hierarchy IRQ domains. | |
1649 | * Parameter @realloc is mainly to support legacy IRQs. | |
1650 | * Returns error code or allocated IRQ number | |
1651 | * | |
1652 | * The whole process to setup an IRQ has been split into two steps. | |
1653 | * The first step, __irq_domain_alloc_irqs(), is to allocate IRQ | |
1654 | * descriptor and required hardware resources. The second step, | |
1655 | * irq_domain_activate_irq(), is to program the hardware with preallocated | |
1656 | * resources. In this way, it's easier to rollback when failing to | |
1657 | * allocate resources. | |
1658 | */ | |
1659 | int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, | |
1660 | unsigned int nr_irqs, int node, void *arg, | |
1661 | bool realloc, const struct irq_affinity_desc *affinity) | |
1662 | { | |
1663 | int ret; | |
1664 | ||
1665 | if (domain == NULL) { | |
1666 | domain = irq_default_domain; | |
1667 | if (WARN(!domain, "domain is NULL; cannot allocate IRQ\n")) | |
1668 | return -EINVAL; | |
1669 | } | |
1670 | ||
9dbb8e34 | 1671 | mutex_lock(&domain->root->mutex); |
d55f7f4c JH |
1672 | ret = irq_domain_alloc_irqs_locked(domain, irq_base, nr_irqs, node, arg, |
1673 | realloc, affinity); | |
9dbb8e34 | 1674 | mutex_unlock(&domain->root->mutex); |
d55f7f4c JH |
1675 | |
1676 | return ret; | |
1677 | } | |
d8fcbe52 | 1678 | EXPORT_SYMBOL_GPL(__irq_domain_alloc_irqs); |
f8264e34 | 1679 | |
495c38d3 DD |
1680 | /* The irq_data was moved, fix the revmap to refer to the new location */ |
1681 | static void irq_domain_fix_revmap(struct irq_data *d) | |
1682 | { | |
d03cc2d8 | 1683 | void __rcu **slot; |
495c38d3 | 1684 | |
9dbb8e34 | 1685 | lockdep_assert_held(&d->domain->root->mutex); |
47d1932f | 1686 | |
48b15a79 MZ |
1687 | if (irq_domain_is_nomap(d->domain)) |
1688 | return; | |
1689 | ||
d4a45c68 | 1690 | /* Fix up the revmap. */ |
48b15a79 MZ |
1691 | if (d->hwirq < d->domain->revmap_size) { |
1692 | /* Not using radix tree */ | |
d4a45c68 MZ |
1693 | rcu_assign_pointer(d->domain->revmap[d->hwirq], d); |
1694 | } else { | |
1695 | slot = radix_tree_lookup_slot(&d->domain->revmap_tree, d->hwirq); | |
1696 | if (slot) | |
1697 | radix_tree_replace_slot(&d->domain->revmap_tree, slot, d); | |
48b15a79 | 1698 | } |
495c38d3 DD |
1699 | } |
1700 | ||
1701 | /** | |
1702 | * irq_domain_push_irq() - Push a domain in to the top of a hierarchy. | |
1703 | * @domain: Domain to push. | |
1704 | * @virq: Irq to push the domain in to. | |
1705 | * @arg: Passed to the irq_domain_ops alloc() function. | |
1706 | * | |
1707 | * For an already existing irqdomain hierarchy, as might be obtained | |
1708 | * via a call to pci_enable_msix(), add an additional domain to the | |
1709 | * head of the processing chain. Must be called before request_irq() | |
1710 | * has been called. | |
1711 | */ | |
1712 | int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg) | |
1713 | { | |
930a1bbb JH |
1714 | struct irq_data *irq_data = irq_get_irq_data(virq); |
1715 | struct irq_data *parent_irq_data; | |
495c38d3 DD |
1716 | struct irq_desc *desc; |
1717 | int rv = 0; | |
1718 | ||
1719 | /* | |
1720 | * Check that no action has been set, which indicates the virq | |
1721 | * is in a state where this function doesn't have to deal with | |
1722 | * races between interrupt handling and maintaining the | |
1723 | * hierarchy. This will catch gross misuse. Attempting to | |
1724 | * make the check race free would require holding locks across | |
1725 | * calls to struct irq_domain_ops->alloc(), which could lead | |
1726 | * to deadlock, so we just do a simple check before starting. | |
1727 | */ | |
1728 | desc = irq_to_desc(virq); | |
1729 | if (!desc) | |
1730 | return -EINVAL; | |
1731 | if (WARN_ON(desc->action)) | |
1732 | return -EBUSY; | |
1733 | ||
1734 | if (domain == NULL) | |
1735 | return -EINVAL; | |
1736 | ||
1737 | if (WARN_ON(!irq_domain_is_hierarchy(domain))) | |
1738 | return -EINVAL; | |
1739 | ||
930a1bbb | 1740 | if (!irq_data) |
495c38d3 DD |
1741 | return -EINVAL; |
1742 | ||
930a1bbb | 1743 | if (domain->parent != irq_data->domain) |
495c38d3 DD |
1744 | return -EINVAL; |
1745 | ||
930a1bbb JH |
1746 | parent_irq_data = kzalloc_node(sizeof(*parent_irq_data), GFP_KERNEL, |
1747 | irq_data_get_node(irq_data)); | |
1748 | if (!parent_irq_data) | |
495c38d3 DD |
1749 | return -ENOMEM; |
1750 | ||
9dbb8e34 | 1751 | mutex_lock(&domain->root->mutex); |
495c38d3 DD |
1752 | |
1753 | /* Copy the original irq_data. */ | |
930a1bbb | 1754 | *parent_irq_data = *irq_data; |
495c38d3 DD |
1755 | |
1756 | /* | |
930a1bbb JH |
1757 | * Overwrite the irq_data, which is embedded in struct irq_desc, with |
1758 | * values for this domain. | |
495c38d3 | 1759 | */ |
930a1bbb JH |
1760 | irq_data->parent_data = parent_irq_data; |
1761 | irq_data->domain = domain; | |
1762 | irq_data->mask = 0; | |
1763 | irq_data->hwirq = 0; | |
1764 | irq_data->chip = NULL; | |
1765 | irq_data->chip_data = NULL; | |
495c38d3 DD |
1766 | |
1767 | /* May (probably does) set hwirq, chip, etc. */ | |
1768 | rv = irq_domain_alloc_irqs_hierarchy(domain, virq, 1, arg); | |
1769 | if (rv) { | |
1770 | /* Restore the original irq_data. */ | |
930a1bbb JH |
1771 | *irq_data = *parent_irq_data; |
1772 | kfree(parent_irq_data); | |
495c38d3 DD |
1773 | goto error; |
1774 | } | |
1775 | ||
930a1bbb JH |
1776 | irq_domain_fix_revmap(parent_irq_data); |
1777 | irq_domain_set_mapping(domain, irq_data->hwirq, irq_data); | |
495c38d3 | 1778 | error: |
9dbb8e34 | 1779 | mutex_unlock(&domain->root->mutex); |
495c38d3 DD |
1780 | |
1781 | return rv; | |
1782 | } | |
1783 | EXPORT_SYMBOL_GPL(irq_domain_push_irq); | |
1784 | ||
1785 | /** | |
1786 | * irq_domain_pop_irq() - Remove a domain from the top of a hierarchy. | |
1787 | * @domain: Domain to remove. | |
1788 | * @virq: Irq to remove the domain from. | |
1789 | * | |
1790 | * Undo the effects of a call to irq_domain_push_irq(). Must be | |
1791 | * called either before request_irq() or after free_irq(). | |
1792 | */ | |
1793 | int irq_domain_pop_irq(struct irq_domain *domain, int virq) | |
1794 | { | |
930a1bbb JH |
1795 | struct irq_data *irq_data = irq_get_irq_data(virq); |
1796 | struct irq_data *parent_irq_data; | |
495c38d3 DD |
1797 | struct irq_data *tmp_irq_data; |
1798 | struct irq_desc *desc; | |
1799 | ||
1800 | /* | |
1801 | * Check that no action is set, which indicates the virq is in | |
1802 | * a state where this function doesn't have to deal with races | |
1803 | * between interrupt handling and maintaining the hierarchy. | |
1804 | * This will catch gross misuse. Attempting to make the check | |
1805 | * race free would require holding locks across calls to | |
1806 | * struct irq_domain_ops->free(), which could lead to | |
1807 | * deadlock, so we just do a simple check before starting. | |
1808 | */ | |
1809 | desc = irq_to_desc(virq); | |
1810 | if (!desc) | |
1811 | return -EINVAL; | |
1812 | if (WARN_ON(desc->action)) | |
1813 | return -EBUSY; | |
1814 | ||
1815 | if (domain == NULL) | |
1816 | return -EINVAL; | |
1817 | ||
930a1bbb | 1818 | if (!irq_data) |
495c38d3 DD |
1819 | return -EINVAL; |
1820 | ||
1821 | tmp_irq_data = irq_domain_get_irq_data(domain, virq); | |
1822 | ||
1823 | /* We can only "pop" if this domain is at the top of the list */ | |
930a1bbb | 1824 | if (WARN_ON(irq_data != tmp_irq_data)) |
495c38d3 DD |
1825 | return -EINVAL; |
1826 | ||
930a1bbb | 1827 | if (WARN_ON(irq_data->domain != domain)) |
495c38d3 DD |
1828 | return -EINVAL; |
1829 | ||
930a1bbb JH |
1830 | parent_irq_data = irq_data->parent_data; |
1831 | if (WARN_ON(!parent_irq_data)) | |
495c38d3 DD |
1832 | return -EINVAL; |
1833 | ||
9dbb8e34 | 1834 | mutex_lock(&domain->root->mutex); |
495c38d3 | 1835 | |
930a1bbb | 1836 | irq_data->parent_data = NULL; |
495c38d3 | 1837 | |
930a1bbb | 1838 | irq_domain_clear_mapping(domain, irq_data->hwirq); |
495c38d3 DD |
1839 | irq_domain_free_irqs_hierarchy(domain, virq, 1); |
1840 | ||
1841 | /* Restore the original irq_data. */ | |
930a1bbb | 1842 | *irq_data = *parent_irq_data; |
495c38d3 | 1843 | |
930a1bbb | 1844 | irq_domain_fix_revmap(irq_data); |
495c38d3 | 1845 | |
9dbb8e34 | 1846 | mutex_unlock(&domain->root->mutex); |
495c38d3 | 1847 | |
930a1bbb | 1848 | kfree(parent_irq_data); |
495c38d3 DD |
1849 | |
1850 | return 0; | |
1851 | } | |
1852 | EXPORT_SYMBOL_GPL(irq_domain_pop_irq); | |
1853 | ||
f8264e34 JL |
1854 | /** |
1855 | * irq_domain_free_irqs - Free IRQ number and associated data structures | |
1856 | * @virq: base IRQ number | |
1857 | * @nr_irqs: number of IRQs to free | |
1858 | */ | |
1859 | void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs) | |
1860 | { | |
1861 | struct irq_data *data = irq_get_irq_data(virq); | |
9dbb8e34 | 1862 | struct irq_domain *domain; |
f8264e34 JL |
1863 | int i; |
1864 | ||
1865 | if (WARN(!data || !data->domain || !data->domain->ops->free, | |
1866 | "NULL pointer, cannot free irq\n")) | |
1867 | return; | |
1868 | ||
9dbb8e34 JH |
1869 | domain = data->domain; |
1870 | ||
1871 | mutex_lock(&domain->root->mutex); | |
f8264e34 JL |
1872 | for (i = 0; i < nr_irqs; i++) |
1873 | irq_domain_remove_irq(virq + i); | |
9dbb8e34 JH |
1874 | irq_domain_free_irqs_hierarchy(domain, virq, nr_irqs); |
1875 | mutex_unlock(&domain->root->mutex); | |
f8264e34 JL |
1876 | |
1877 | irq_domain_free_irq_data(virq, nr_irqs); | |
1878 | irq_free_descs(virq, nr_irqs); | |
1879 | } | |
1880 | ||
e49312fe TG |
1881 | static void irq_domain_free_one_irq(struct irq_domain *domain, unsigned int virq) |
1882 | { | |
1883 | if (irq_domain_is_msi_device(domain)) | |
1884 | msi_device_domain_free_wired(domain, virq); | |
1885 | else | |
1886 | irq_domain_free_irqs(virq, 1); | |
1887 | } | |
1888 | ||
36d72731 JL |
1889 | /** |
1890 | * irq_domain_alloc_irqs_parent - Allocate interrupts from parent domain | |
817aad5d | 1891 | * @domain: Domain below which interrupts must be allocated |
36d72731 JL |
1892 | * @irq_base: Base IRQ number |
1893 | * @nr_irqs: Number of IRQs to allocate | |
1894 | * @arg: Allocation data (arch/domain specific) | |
36d72731 JL |
1895 | */ |
1896 | int irq_domain_alloc_irqs_parent(struct irq_domain *domain, | |
1897 | unsigned int irq_base, unsigned int nr_irqs, | |
1898 | void *arg) | |
1899 | { | |
6a6544e5 MZ |
1900 | if (!domain->parent) |
1901 | return -ENOSYS; | |
36d72731 | 1902 | |
6a6544e5 MZ |
1903 | return irq_domain_alloc_irqs_hierarchy(domain->parent, irq_base, |
1904 | nr_irqs, arg); | |
36d72731 | 1905 | } |
52b2a05f | 1906 | EXPORT_SYMBOL_GPL(irq_domain_alloc_irqs_parent); |
36d72731 JL |
1907 | |
1908 | /** | |
1909 | * irq_domain_free_irqs_parent - Free interrupts from parent domain | |
817aad5d | 1910 | * @domain: Domain below which interrupts must be freed |
36d72731 JL |
1911 | * @irq_base: Base IRQ number |
1912 | * @nr_irqs: Number of IRQs to free | |
36d72731 JL |
1913 | */ |
1914 | void irq_domain_free_irqs_parent(struct irq_domain *domain, | |
1915 | unsigned int irq_base, unsigned int nr_irqs) | |
1916 | { | |
6a6544e5 MZ |
1917 | if (!domain->parent) |
1918 | return; | |
1919 | ||
1920 | irq_domain_free_irqs_hierarchy(domain->parent, irq_base, nr_irqs); | |
36d72731 | 1921 | } |
52b2a05f | 1922 | EXPORT_SYMBOL_GPL(irq_domain_free_irqs_parent); |
36d72731 | 1923 | |
08d85f3e MZ |
1924 | static void __irq_domain_deactivate_irq(struct irq_data *irq_data) |
1925 | { | |
1926 | if (irq_data && irq_data->domain) { | |
1927 | struct irq_domain *domain = irq_data->domain; | |
1928 | ||
1929 | if (domain->ops->deactivate) | |
1930 | domain->ops->deactivate(domain, irq_data); | |
1931 | if (irq_data->parent_data) | |
1932 | __irq_domain_deactivate_irq(irq_data->parent_data); | |
1933 | } | |
1934 | } | |
1935 | ||
702cb0a0 | 1936 | static int __irq_domain_activate_irq(struct irq_data *irqd, bool reserve) |
bb9b428a TG |
1937 | { |
1938 | int ret = 0; | |
1939 | ||
1940 | if (irqd && irqd->domain) { | |
1941 | struct irq_domain *domain = irqd->domain; | |
1942 | ||
1943 | if (irqd->parent_data) | |
42e1cc2d | 1944 | ret = __irq_domain_activate_irq(irqd->parent_data, |
702cb0a0 | 1945 | reserve); |
bb9b428a | 1946 | if (!ret && domain->ops->activate) { |
702cb0a0 | 1947 | ret = domain->ops->activate(domain, irqd, reserve); |
bb9b428a TG |
1948 | /* Rollback in case of error */ |
1949 | if (ret && irqd->parent_data) | |
1950 | __irq_domain_deactivate_irq(irqd->parent_data); | |
1951 | } | |
1952 | } | |
1953 | return ret; | |
1954 | } | |
1955 | ||
f8264e34 JL |
1956 | /** |
1957 | * irq_domain_activate_irq - Call domain_ops->activate recursively to activate | |
1958 | * interrupt | |
702cb0a0 TG |
1959 | * @irq_data: Outermost irq_data associated with interrupt |
1960 | * @reserve: If set only reserve an interrupt vector instead of assigning one | |
f8264e34 JL |
1961 | * |
1962 | * This is the second step to call domain_ops->activate to program interrupt | |
1963 | * controllers, so the interrupt could actually get delivered. | |
1964 | */ | |
702cb0a0 | 1965 | int irq_domain_activate_irq(struct irq_data *irq_data, bool reserve) |
f8264e34 | 1966 | { |
bb9b428a TG |
1967 | int ret = 0; |
1968 | ||
1969 | if (!irqd_is_activated(irq_data)) | |
702cb0a0 | 1970 | ret = __irq_domain_activate_irq(irq_data, reserve); |
bb9b428a | 1971 | if (!ret) |
08d85f3e | 1972 | irqd_set_activated(irq_data); |
bb9b428a | 1973 | return ret; |
f8264e34 JL |
1974 | } |
1975 | ||
1976 | /** | |
1977 | * irq_domain_deactivate_irq - Call domain_ops->deactivate recursively to | |
1978 | * deactivate interrupt | |
1979 | * @irq_data: outermost irq_data associated with interrupt | |
1980 | * | |
1981 | * It calls domain_ops->deactivate to program interrupt controllers to disable | |
1982 | * interrupt delivery. | |
1983 | */ | |
1984 | void irq_domain_deactivate_irq(struct irq_data *irq_data) | |
1985 | { | |
08d85f3e MZ |
1986 | if (irqd_is_activated(irq_data)) { |
1987 | __irq_domain_deactivate_irq(irq_data); | |
1988 | irqd_clr_activated(irq_data); | |
f8264e34 JL |
1989 | } |
1990 | } | |
1991 | ||
1992 | static void irq_domain_check_hierarchy(struct irq_domain *domain) | |
1993 | { | |
1994 | /* Hierarchy irq_domains must implement callback alloc() */ | |
1995 | if (domain->ops->alloc) | |
1996 | domain->flags |= IRQ_DOMAIN_FLAG_HIERARCHY; | |
1997 | } | |
1998 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
a10024e6 | 1999 | /* |
f8264e34 JL |
2000 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain |
2001 | * @domain: domain to match | |
2002 | * @virq: IRQ number to get irq_data | |
2003 | */ | |
2004 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
2005 | unsigned int virq) | |
2006 | { | |
2007 | struct irq_data *irq_data = irq_get_irq_data(virq); | |
2008 | ||
2009 | return (irq_data && irq_data->domain == domain) ? irq_data : NULL; | |
2010 | } | |
a4289dc2 | 2011 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 | 2012 | |
a10024e6 | 2013 | /* |
5f22f5c6 SA |
2014 | * irq_domain_set_info - Set the complete data for a @virq in @domain |
2015 | * @domain: Interrupt domain to match | |
2016 | * @virq: IRQ number | |
2017 | * @hwirq: The hardware interrupt number | |
2018 | * @chip: The associated interrupt chip | |
2019 | * @chip_data: The associated interrupt chip data | |
2020 | * @handler: The interrupt flow handler | |
2021 | * @handler_data: The interrupt flow handler data | |
2022 | * @handler_name: The interrupt handler name | |
2023 | */ | |
2024 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
45ec846c | 2025 | irq_hw_number_t hwirq, const struct irq_chip *chip, |
5f22f5c6 SA |
2026 | void *chip_data, irq_flow_handler_t handler, |
2027 | void *handler_data, const char *handler_name) | |
2028 | { | |
2029 | irq_set_chip_and_handler_name(virq, chip, handler, handler_name); | |
2030 | irq_set_chip_data(virq, chip_data); | |
2031 | irq_set_handler_data(virq, handler_data); | |
2032 | } | |
2033 | ||
601363cc JH |
2034 | static int irq_domain_alloc_irqs_locked(struct irq_domain *domain, int irq_base, |
2035 | unsigned int nr_irqs, int node, void *arg, | |
2036 | bool realloc, const struct irq_affinity_desc *affinity) | |
2037 | { | |
2038 | return -EINVAL; | |
2039 | } | |
2040 | ||
e49312fe TG |
2041 | static void irq_domain_check_hierarchy(struct irq_domain *domain) { } |
2042 | static void irq_domain_free_one_irq(struct irq_domain *domain, unsigned int virq) { } | |
2043 | ||
f8264e34 | 2044 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
087cdfb6 TG |
2045 | |
2046 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS | |
8091f56e AB |
2047 | #include "internals.h" |
2048 | ||
087cdfb6 TG |
2049 | static struct dentry *domain_dir; |
2050 | ||
cb06c982 JR |
2051 | static const struct irq_bit_descr irqdomain_flags[] = { |
2052 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_HIERARCHY), | |
2053 | BIT_MASK_DESCR(IRQ_DOMAIN_NAME_ALLOCATED), | |
2054 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_IPI_PER_CPU), | |
2055 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_IPI_SINGLE), | |
2056 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_MSI), | |
2057 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_ISOLATED_MSI), | |
2058 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_NO_MAP), | |
2059 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_MSI_PARENT), | |
2060 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_MSI_DEVICE), | |
2061 | BIT_MASK_DESCR(IRQ_DOMAIN_FLAG_NONCORE), | |
2062 | }; | |
2063 | ||
2064 | static void irq_domain_debug_show_one(struct seq_file *m, struct irq_domain *d, int ind) | |
087cdfb6 TG |
2065 | { |
2066 | seq_printf(m, "%*sname: %s\n", ind, "", d->name); | |
4f86a06e | 2067 | seq_printf(m, "%*ssize: %u\n", ind + 1, "", d->revmap_size); |
087cdfb6 TG |
2068 | seq_printf(m, "%*smapped: %u\n", ind + 1, "", d->mapcount); |
2069 | seq_printf(m, "%*sflags: 0x%08x\n", ind +1 , "", d->flags); | |
cb06c982 | 2070 | irq_debug_show_bits(m, ind, d->flags, irqdomain_flags, ARRAY_SIZE(irqdomain_flags)); |
c3e7239a TG |
2071 | if (d->ops && d->ops->debug_show) |
2072 | d->ops->debug_show(m, d, NULL, ind + 1); | |
087cdfb6 TG |
2073 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2074 | if (!d->parent) | |
2075 | return; | |
2076 | seq_printf(m, "%*sparent: %s\n", ind + 1, "", d->parent->name); | |
2077 | irq_domain_debug_show_one(m, d->parent, ind + 4); | |
2078 | #endif | |
2079 | } | |
2080 | ||
2081 | static int irq_domain_debug_show(struct seq_file *m, void *p) | |
2082 | { | |
2083 | struct irq_domain *d = m->private; | |
2084 | ||
2085 | /* Default domain? Might be NULL */ | |
2086 | if (!d) { | |
2087 | if (!irq_default_domain) | |
2088 | return 0; | |
2089 | d = irq_default_domain; | |
2090 | } | |
2091 | irq_domain_debug_show_one(m, d, 0); | |
2092 | return 0; | |
2093 | } | |
0b24a0bb | 2094 | DEFINE_SHOW_ATTRIBUTE(irq_domain_debug); |
087cdfb6 TG |
2095 | |
2096 | static void debugfs_add_domain_dir(struct irq_domain *d) | |
2097 | { | |
69dd4503 | 2098 | if (!d->name || !domain_dir) |
087cdfb6 | 2099 | return; |
69dd4503 GKH |
2100 | debugfs_create_file(d->name, 0444, domain_dir, d, |
2101 | &irq_domain_debug_fops); | |
087cdfb6 TG |
2102 | } |
2103 | ||
2104 | static void debugfs_remove_domain_dir(struct irq_domain *d) | |
2105 | { | |
d83d7ed2 | 2106 | debugfs_lookup_and_remove(d->name, domain_dir); |
087cdfb6 TG |
2107 | } |
2108 | ||
2109 | void __init irq_domain_debugfs_init(struct dentry *root) | |
2110 | { | |
2111 | struct irq_domain *d; | |
2112 | ||
2113 | domain_dir = debugfs_create_dir("domains", root); | |
087cdfb6 | 2114 | |
0b24a0bb AS |
2115 | debugfs_create_file("default", 0444, domain_dir, NULL, |
2116 | &irq_domain_debug_fops); | |
087cdfb6 TG |
2117 | mutex_lock(&irq_domain_mutex); |
2118 | list_for_each_entry(d, &irq_domain_list, link) | |
2119 | debugfs_add_domain_dir(d); | |
2120 | mutex_unlock(&irq_domain_mutex); | |
2121 | } | |
2122 | #endif |