Commit | Line | Data |
---|---|---|
54a90588 PM |
1 | #define pr_fmt(fmt) "irq: " fmt |
2 | ||
cc79ca69 GL |
3 | #include <linux/debugfs.h> |
4 | #include <linux/hardirq.h> | |
5 | #include <linux/interrupt.h> | |
08a543ad | 6 | #include <linux/irq.h> |
cc79ca69 | 7 | #include <linux/irqdesc.h> |
08a543ad GL |
8 | #include <linux/irqdomain.h> |
9 | #include <linux/module.h> | |
10 | #include <linux/mutex.h> | |
11 | #include <linux/of.h> | |
7e713301 | 12 | #include <linux/of_address.h> |
64be38ab | 13 | #include <linux/of_irq.h> |
5ca4db61 | 14 | #include <linux/topology.h> |
cc79ca69 | 15 | #include <linux/seq_file.h> |
7e713301 | 16 | #include <linux/slab.h> |
cc79ca69 GL |
17 | #include <linux/smp.h> |
18 | #include <linux/fs.h> | |
08a543ad GL |
19 | |
20 | static LIST_HEAD(irq_domain_list); | |
21 | static DEFINE_MUTEX(irq_domain_mutex); | |
22 | ||
cc79ca69 | 23 | static DEFINE_MUTEX(revmap_trees_mutex); |
68700650 | 24 | static struct irq_domain *irq_default_domain; |
cc79ca69 | 25 | |
f8264e34 JL |
26 | static void irq_domain_check_hierarchy(struct irq_domain *domain); |
27 | ||
b145dcc4 MZ |
28 | struct irqchip_fwid { |
29 | struct fwnode_handle fwnode; | |
30 | char *name; | |
31 | void *data; | |
32 | }; | |
33 | ||
34 | /** | |
35 | * irq_domain_alloc_fwnode - Allocate a fwnode_handle suitable for | |
36 | * identifying an irq domain | |
37 | * @data: optional user-provided data | |
38 | * | |
39 | * Allocate a struct device_node, and return a poiner to the embedded | |
40 | * fwnode_handle (or NULL on failure). | |
41 | */ | |
42 | struct fwnode_handle *irq_domain_alloc_fwnode(void *data) | |
43 | { | |
44 | struct irqchip_fwid *fwid; | |
45 | char *name; | |
46 | ||
47 | fwid = kzalloc(sizeof(*fwid), GFP_KERNEL); | |
48 | name = kasprintf(GFP_KERNEL, "irqchip@%p", data); | |
49 | ||
50 | if (!fwid || !name) { | |
51 | kfree(fwid); | |
52 | kfree(name); | |
53 | return NULL; | |
54 | } | |
55 | ||
56 | fwid->name = name; | |
57 | fwid->data = data; | |
58 | fwid->fwnode.type = FWNODE_IRQCHIP; | |
59 | return &fwid->fwnode; | |
60 | } | |
a4289dc2 | 61 | EXPORT_SYMBOL_GPL(irq_domain_alloc_fwnode); |
b145dcc4 MZ |
62 | |
63 | /** | |
64 | * irq_domain_free_fwnode - Free a non-OF-backed fwnode_handle | |
65 | * | |
66 | * Free a fwnode_handle allocated with irq_domain_alloc_fwnode. | |
67 | */ | |
68 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode) | |
69 | { | |
70 | struct irqchip_fwid *fwid; | |
71 | ||
75aba7b0 | 72 | if (WARN_ON(!is_fwnode_irqchip(fwnode))) |
b145dcc4 MZ |
73 | return; |
74 | ||
75 | fwid = container_of(fwnode, struct irqchip_fwid, fwnode); | |
76 | kfree(fwid->name); | |
77 | kfree(fwid); | |
78 | } | |
a4289dc2 | 79 | EXPORT_SYMBOL_GPL(irq_domain_free_fwnode); |
b145dcc4 | 80 | |
cc79ca69 | 81 | /** |
fa40f377 | 82 | * __irq_domain_add() - Allocate a new irq_domain data structure |
cc79ca69 | 83 | * @of_node: optional device-tree node of the interrupt controller |
fa40f377 | 84 | * @size: Size of linear map; 0 for radix mapping only |
a257954b | 85 | * @hwirq_max: Maximum number of interrupts supported by controller |
fa40f377 GL |
86 | * @direct_max: Maximum value of direct maps; Use ~0 for no limit; 0 for no |
87 | * direct mapping | |
f8264e34 | 88 | * @ops: domain callbacks |
a8db8cf0 | 89 | * @host_data: Controller private data pointer |
cc79ca69 | 90 | * |
a257954b JL |
91 | * Allocates and initialize and irq_domain structure. |
92 | * Returns pointer to IRQ domain, or NULL on failure. | |
cc79ca69 | 93 | */ |
1bf4ddc4 | 94 | struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size, |
ddaf144c | 95 | irq_hw_number_t hwirq_max, int direct_max, |
fa40f377 GL |
96 | const struct irq_domain_ops *ops, |
97 | void *host_data) | |
cc79ca69 | 98 | { |
a8db8cf0 | 99 | struct irq_domain *domain; |
1bf4ddc4 MZ |
100 | struct device_node *of_node; |
101 | ||
102 | of_node = to_of_node(fwnode); | |
cc79ca69 | 103 | |
cef5075c GL |
104 | domain = kzalloc_node(sizeof(*domain) + (sizeof(unsigned int) * size), |
105 | GFP_KERNEL, of_node_to_nid(of_node)); | |
a8db8cf0 | 106 | if (WARN_ON(!domain)) |
cc79ca69 GL |
107 | return NULL; |
108 | ||
f110711a | 109 | of_node_get(of_node); |
f110711a | 110 | |
cc79ca69 | 111 | /* Fill structure */ |
1aa0dd94 | 112 | INIT_RADIX_TREE(&domain->revmap_tree, GFP_KERNEL); |
68700650 | 113 | domain->ops = ops; |
a8db8cf0 | 114 | domain->host_data = host_data; |
f110711a | 115 | domain->fwnode = fwnode; |
ddaf144c | 116 | domain->hwirq_max = hwirq_max; |
1aa0dd94 | 117 | domain->revmap_size = size; |
fa40f377 | 118 | domain->revmap_direct_max_irq = direct_max; |
f8264e34 | 119 | irq_domain_check_hierarchy(domain); |
cc79ca69 | 120 | |
a8db8cf0 GL |
121 | mutex_lock(&irq_domain_mutex); |
122 | list_add(&domain->link, &irq_domain_list); | |
123 | mutex_unlock(&irq_domain_mutex); | |
fa40f377 | 124 | |
1aa0dd94 | 125 | pr_debug("Added domain %s\n", domain->name); |
fa40f377 | 126 | return domain; |
a8db8cf0 | 127 | } |
fa40f377 | 128 | EXPORT_SYMBOL_GPL(__irq_domain_add); |
a8db8cf0 | 129 | |
58ee99ad PM |
130 | /** |
131 | * irq_domain_remove() - Remove an irq domain. | |
132 | * @domain: domain to remove | |
133 | * | |
134 | * This routine is used to remove an irq domain. The caller must ensure | |
135 | * that all mappings within the domain have been disposed of prior to | |
136 | * use, depending on the revmap type. | |
137 | */ | |
138 | void irq_domain_remove(struct irq_domain *domain) | |
139 | { | |
140 | mutex_lock(&irq_domain_mutex); | |
141 | ||
e9256efc | 142 | WARN_ON(!radix_tree_empty(&domain->revmap_tree)); |
58ee99ad PM |
143 | |
144 | list_del(&domain->link); | |
145 | ||
146 | /* | |
147 | * If the going away domain is the default one, reset it. | |
148 | */ | |
149 | if (unlikely(irq_default_domain == domain)) | |
150 | irq_set_default_host(NULL); | |
151 | ||
152 | mutex_unlock(&irq_domain_mutex); | |
153 | ||
1aa0dd94 | 154 | pr_debug("Removed domain %s\n", domain->name); |
58ee99ad | 155 | |
5d4c9bc7 | 156 | of_node_put(irq_domain_get_of_node(domain)); |
fa40f377 | 157 | kfree(domain); |
58ee99ad | 158 | } |
ecd84eb2 | 159 | EXPORT_SYMBOL_GPL(irq_domain_remove); |
58ee99ad | 160 | |
781d0f46 | 161 | /** |
fa40f377 | 162 | * irq_domain_add_simple() - Register an irq_domain and optionally map a range of irqs |
781d0f46 MB |
163 | * @of_node: pointer to interrupt controller's device tree node. |
164 | * @size: total number of irqs in mapping | |
94a63da0 | 165 | * @first_irq: first number of irq block assigned to the domain, |
fa40f377 GL |
166 | * pass zero to assign irqs on-the-fly. If first_irq is non-zero, then |
167 | * pre-map all of the irqs in the domain to virqs starting at first_irq. | |
f8264e34 | 168 | * @ops: domain callbacks |
781d0f46 MB |
169 | * @host_data: Controller private data pointer |
170 | * | |
fa40f377 GL |
171 | * Allocates an irq_domain, and optionally if first_irq is positive then also |
172 | * allocate irq_descs and map all of the hwirqs to virqs starting at first_irq. | |
781d0f46 MB |
173 | * |
174 | * This is intended to implement the expected behaviour for most | |
fa40f377 GL |
175 | * interrupt controllers. If device tree is used, then first_irq will be 0 and |
176 | * irqs get mapped dynamically on the fly. However, if the controller requires | |
177 | * static virq assignments (non-DT boot) then it will set that up correctly. | |
781d0f46 MB |
178 | */ |
179 | struct irq_domain *irq_domain_add_simple(struct device_node *of_node, | |
180 | unsigned int size, | |
181 | unsigned int first_irq, | |
182 | const struct irq_domain_ops *ops, | |
183 | void *host_data) | |
184 | { | |
fa40f377 GL |
185 | struct irq_domain *domain; |
186 | ||
1bf4ddc4 | 187 | domain = __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data); |
fa40f377 GL |
188 | if (!domain) |
189 | return NULL; | |
2854d167 | 190 | |
fa40f377 | 191 | if (first_irq > 0) { |
2854d167 | 192 | if (IS_ENABLED(CONFIG_SPARSE_IRQ)) { |
fa40f377 GL |
193 | /* attempt to allocated irq_descs */ |
194 | int rc = irq_alloc_descs(first_irq, first_irq, size, | |
195 | of_node_to_nid(of_node)); | |
196 | if (rc < 0) | |
d202b7b9 LW |
197 | pr_info("Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", |
198 | first_irq); | |
fa40f377 | 199 | } |
ddaf144c | 200 | irq_domain_associate_many(domain, first_irq, 0, size); |
2854d167 LW |
201 | } |
202 | ||
fa40f377 | 203 | return domain; |
781d0f46 | 204 | } |
346dbb79 | 205 | EXPORT_SYMBOL_GPL(irq_domain_add_simple); |
781d0f46 | 206 | |
a8db8cf0 GL |
207 | /** |
208 | * irq_domain_add_legacy() - Allocate and register a legacy revmap irq_domain. | |
209 | * @of_node: pointer to interrupt controller's device tree node. | |
1bc04f2c GL |
210 | * @size: total number of irqs in legacy mapping |
211 | * @first_irq: first number of irq block assigned to the domain | |
212 | * @first_hwirq: first hwirq number to use for the translation. Should normally | |
213 | * be '0', but a positive integer can be used if the effective | |
214 | * hwirqs numbering does not begin at zero. | |
a8db8cf0 GL |
215 | * @ops: map/unmap domain callbacks |
216 | * @host_data: Controller private data pointer | |
217 | * | |
218 | * Note: the map() callback will be called before this function returns | |
219 | * for all legacy interrupts except 0 (which is always the invalid irq for | |
220 | * a legacy controller). | |
221 | */ | |
222 | struct irq_domain *irq_domain_add_legacy(struct device_node *of_node, | |
1bc04f2c GL |
223 | unsigned int size, |
224 | unsigned int first_irq, | |
225 | irq_hw_number_t first_hwirq, | |
a18dc81b | 226 | const struct irq_domain_ops *ops, |
a8db8cf0 GL |
227 | void *host_data) |
228 | { | |
1bc04f2c | 229 | struct irq_domain *domain; |
a8db8cf0 | 230 | |
1bf4ddc4 | 231 | domain = __irq_domain_add(of_node_to_fwnode(of_node), first_hwirq + size, |
ddaf144c | 232 | first_hwirq + size, 0, ops, host_data); |
f8264e34 JL |
233 | if (domain) |
234 | irq_domain_associate_many(domain, first_irq, first_hwirq, size); | |
1bc04f2c | 235 | |
a8db8cf0 GL |
236 | return domain; |
237 | } | |
ecd84eb2 | 238 | EXPORT_SYMBOL_GPL(irq_domain_add_legacy); |
a8db8cf0 | 239 | |
cc79ca69 | 240 | /** |
651e8b54 MZ |
241 | * irq_find_matching_fwspec() - Locates a domain for a given fwspec |
242 | * @fwspec: FW specifier for an interrupt | |
ad3aedfb | 243 | * @bus_token: domain-specific data |
cc79ca69 | 244 | */ |
651e8b54 | 245 | struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, |
130b8c6c | 246 | enum irq_domain_bus_token bus_token) |
cc79ca69 GL |
247 | { |
248 | struct irq_domain *h, *found = NULL; | |
651e8b54 | 249 | struct fwnode_handle *fwnode = fwspec->fwnode; |
a18dc81b | 250 | int rc; |
cc79ca69 GL |
251 | |
252 | /* We might want to match the legacy controller last since | |
253 | * it might potentially be set to match all interrupts in | |
254 | * the absence of a device node. This isn't a problem so far | |
255 | * yet though... | |
ad3aedfb MZ |
256 | * |
257 | * bus_token == DOMAIN_BUS_ANY matches any domain, any other | |
258 | * values must generate an exact match for the domain to be | |
259 | * selected. | |
cc79ca69 GL |
260 | */ |
261 | mutex_lock(&irq_domain_mutex); | |
a18dc81b | 262 | list_for_each_entry(h, &irq_domain_list, link) { |
651e8b54 MZ |
263 | if (h->ops->select && fwspec->param_count) |
264 | rc = h->ops->select(h, fwspec, bus_token); | |
265 | else if (h->ops->match) | |
130b8c6c | 266 | rc = h->ops->match(h, to_of_node(fwnode), bus_token); |
a18dc81b | 267 | else |
130b8c6c | 268 | rc = ((fwnode != NULL) && (h->fwnode == fwnode) && |
ad3aedfb MZ |
269 | ((bus_token == DOMAIN_BUS_ANY) || |
270 | (h->bus_token == bus_token))); | |
a18dc81b GL |
271 | |
272 | if (rc) { | |
cc79ca69 GL |
273 | found = h; |
274 | break; | |
275 | } | |
a18dc81b | 276 | } |
cc79ca69 GL |
277 | mutex_unlock(&irq_domain_mutex); |
278 | return found; | |
279 | } | |
651e8b54 | 280 | EXPORT_SYMBOL_GPL(irq_find_matching_fwspec); |
cc79ca69 GL |
281 | |
282 | /** | |
283 | * irq_set_default_host() - Set a "default" irq domain | |
68700650 | 284 | * @domain: default domain pointer |
cc79ca69 GL |
285 | * |
286 | * For convenience, it's possible to set a "default" domain that will be used | |
287 | * whenever NULL is passed to irq_create_mapping(). It makes life easier for | |
288 | * platforms that want to manipulate a few hard coded interrupt numbers that | |
289 | * aren't properly represented in the device-tree. | |
290 | */ | |
68700650 | 291 | void irq_set_default_host(struct irq_domain *domain) |
cc79ca69 | 292 | { |
54a90588 | 293 | pr_debug("Default domain set to @0x%p\n", domain); |
cc79ca69 | 294 | |
68700650 | 295 | irq_default_domain = domain; |
cc79ca69 | 296 | } |
ecd84eb2 | 297 | EXPORT_SYMBOL_GPL(irq_set_default_host); |
cc79ca69 | 298 | |
43a77591 | 299 | void irq_domain_disassociate(struct irq_domain *domain, unsigned int irq) |
913af207 | 300 | { |
ddaf144c GL |
301 | struct irq_data *irq_data = irq_get_irq_data(irq); |
302 | irq_hw_number_t hwirq; | |
913af207 | 303 | |
ddaf144c GL |
304 | if (WARN(!irq_data || irq_data->domain != domain, |
305 | "virq%i doesn't exist; cannot disassociate\n", irq)) | |
306 | return; | |
913af207 | 307 | |
ddaf144c GL |
308 | hwirq = irq_data->hwirq; |
309 | irq_set_status_flags(irq, IRQ_NOREQUEST); | |
913af207 | 310 | |
ddaf144c GL |
311 | /* remove chip and handler */ |
312 | irq_set_chip_and_handler(irq, NULL, NULL); | |
913af207 | 313 | |
ddaf144c GL |
314 | /* Make sure it's completed */ |
315 | synchronize_irq(irq); | |
913af207 | 316 | |
ddaf144c GL |
317 | /* Tell the PIC about it */ |
318 | if (domain->ops->unmap) | |
319 | domain->ops->unmap(domain, irq); | |
320 | smp_mb(); | |
913af207 | 321 | |
ddaf144c GL |
322 | irq_data->domain = NULL; |
323 | irq_data->hwirq = 0; | |
913af207 | 324 | |
ddaf144c GL |
325 | /* Clear reverse map for this hwirq */ |
326 | if (hwirq < domain->revmap_size) { | |
327 | domain->linear_revmap[hwirq] = 0; | |
328 | } else { | |
329 | mutex_lock(&revmap_trees_mutex); | |
330 | radix_tree_delete(&domain->revmap_tree, hwirq); | |
331 | mutex_unlock(&revmap_trees_mutex); | |
913af207 GL |
332 | } |
333 | } | |
334 | ||
ddaf144c GL |
335 | int irq_domain_associate(struct irq_domain *domain, unsigned int virq, |
336 | irq_hw_number_t hwirq) | |
cc79ca69 | 337 | { |
ddaf144c GL |
338 | struct irq_data *irq_data = irq_get_irq_data(virq); |
339 | int ret; | |
cc79ca69 | 340 | |
ddaf144c GL |
341 | if (WARN(hwirq >= domain->hwirq_max, |
342 | "error: hwirq 0x%x is too large for %s\n", (int)hwirq, domain->name)) | |
343 | return -EINVAL; | |
344 | if (WARN(!irq_data, "error: virq%i is not allocated", virq)) | |
345 | return -EINVAL; | |
346 | if (WARN(irq_data->domain, "error: virq%i is already associated", virq)) | |
347 | return -EINVAL; | |
cc79ca69 | 348 | |
ddaf144c GL |
349 | mutex_lock(&irq_domain_mutex); |
350 | irq_data->hwirq = hwirq; | |
351 | irq_data->domain = domain; | |
352 | if (domain->ops->map) { | |
353 | ret = domain->ops->map(domain, virq, hwirq); | |
354 | if (ret != 0) { | |
355 | /* | |
356 | * If map() returns -EPERM, this interrupt is protected | |
357 | * by the firmware or some other service and shall not | |
358 | * be mapped. Don't bother telling the user about it. | |
359 | */ | |
360 | if (ret != -EPERM) { | |
361 | pr_info("%s didn't like hwirq-0x%lx to VIRQ%i mapping (rc=%d)\n", | |
362 | domain->name, hwirq, virq, ret); | |
f5a1ad05 | 363 | } |
ddaf144c GL |
364 | irq_data->domain = NULL; |
365 | irq_data->hwirq = 0; | |
366 | mutex_unlock(&irq_domain_mutex); | |
367 | return ret; | |
98aa468e GL |
368 | } |
369 | ||
ddaf144c GL |
370 | /* If not already assigned, give the domain the chip's name */ |
371 | if (!domain->name && irq_data->chip) | |
372 | domain->name = irq_data->chip->name; | |
373 | } | |
2a71a1a9 | 374 | |
ddaf144c GL |
375 | if (hwirq < domain->revmap_size) { |
376 | domain->linear_revmap[hwirq] = virq; | |
377 | } else { | |
378 | mutex_lock(&revmap_trees_mutex); | |
379 | radix_tree_insert(&domain->revmap_tree, hwirq, irq_data); | |
380 | mutex_unlock(&revmap_trees_mutex); | |
98aa468e | 381 | } |
ddaf144c GL |
382 | mutex_unlock(&irq_domain_mutex); |
383 | ||
384 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
cc79ca69 GL |
385 | |
386 | return 0; | |
387 | } | |
ddaf144c | 388 | EXPORT_SYMBOL_GPL(irq_domain_associate); |
98aa468e | 389 | |
ddaf144c GL |
390 | void irq_domain_associate_many(struct irq_domain *domain, unsigned int irq_base, |
391 | irq_hw_number_t hwirq_base, int count) | |
392 | { | |
5d4c9bc7 | 393 | struct device_node *of_node; |
ddaf144c GL |
394 | int i; |
395 | ||
5d4c9bc7 | 396 | of_node = irq_domain_get_of_node(domain); |
ddaf144c | 397 | pr_debug("%s(%s, irqbase=%i, hwbase=%i, count=%i)\n", __func__, |
5d4c9bc7 | 398 | of_node_full_name(of_node), irq_base, (int)hwirq_base, count); |
ddaf144c GL |
399 | |
400 | for (i = 0; i < count; i++) { | |
401 | irq_domain_associate(domain, irq_base + i, hwirq_base + i); | |
402 | } | |
cc79ca69 | 403 | } |
98aa468e | 404 | EXPORT_SYMBOL_GPL(irq_domain_associate_many); |
cc79ca69 GL |
405 | |
406 | /** | |
407 | * irq_create_direct_mapping() - Allocate an irq for direct mapping | |
68700650 | 408 | * @domain: domain to allocate the irq for or NULL for default domain |
cc79ca69 GL |
409 | * |
410 | * This routine is used for irq controllers which can choose the hardware | |
411 | * interrupt numbers they generate. In such a case it's simplest to use | |
1aa0dd94 GL |
412 | * the linux irq as the hardware interrupt number. It still uses the linear |
413 | * or radix tree to store the mapping, but the irq controller can optimize | |
414 | * the revmap path by using the hwirq directly. | |
cc79ca69 | 415 | */ |
68700650 | 416 | unsigned int irq_create_direct_mapping(struct irq_domain *domain) |
cc79ca69 | 417 | { |
5d4c9bc7 | 418 | struct device_node *of_node; |
cc79ca69 GL |
419 | unsigned int virq; |
420 | ||
68700650 GL |
421 | if (domain == NULL) |
422 | domain = irq_default_domain; | |
cc79ca69 | 423 | |
5d4c9bc7 MZ |
424 | of_node = irq_domain_get_of_node(domain); |
425 | virq = irq_alloc_desc_from(1, of_node_to_nid(of_node)); | |
03848373 | 426 | if (!virq) { |
54a90588 | 427 | pr_debug("create_direct virq allocation failed\n"); |
03848373 | 428 | return 0; |
cc79ca69 | 429 | } |
1aa0dd94 | 430 | if (virq >= domain->revmap_direct_max_irq) { |
cc79ca69 | 431 | pr_err("ERROR: no free irqs available below %i maximum\n", |
1aa0dd94 | 432 | domain->revmap_direct_max_irq); |
cc79ca69 GL |
433 | irq_free_desc(virq); |
434 | return 0; | |
435 | } | |
54a90588 | 436 | pr_debug("create_direct obtained virq %d\n", virq); |
cc79ca69 | 437 | |
98aa468e | 438 | if (irq_domain_associate(domain, virq, virq)) { |
cc79ca69 | 439 | irq_free_desc(virq); |
03848373 | 440 | return 0; |
cc79ca69 GL |
441 | } |
442 | ||
443 | return virq; | |
444 | } | |
ecd84eb2 | 445 | EXPORT_SYMBOL_GPL(irq_create_direct_mapping); |
cc79ca69 GL |
446 | |
447 | /** | |
448 | * irq_create_mapping() - Map a hardware interrupt into linux irq space | |
68700650 GL |
449 | * @domain: domain owning this hardware interrupt or NULL for default domain |
450 | * @hwirq: hardware irq number in that domain space | |
cc79ca69 GL |
451 | * |
452 | * Only one mapping per hardware interrupt is permitted. Returns a linux | |
453 | * irq number. | |
454 | * If the sense/trigger is to be specified, set_irq_type() should be called | |
455 | * on the number returned from that call. | |
456 | */ | |
68700650 | 457 | unsigned int irq_create_mapping(struct irq_domain *domain, |
cc79ca69 GL |
458 | irq_hw_number_t hwirq) |
459 | { | |
5d4c9bc7 | 460 | struct device_node *of_node; |
5b7526e3 | 461 | int virq; |
cc79ca69 | 462 | |
54a90588 | 463 | pr_debug("irq_create_mapping(0x%p, 0x%lx)\n", domain, hwirq); |
cc79ca69 | 464 | |
68700650 GL |
465 | /* Look for default domain if nececssary */ |
466 | if (domain == NULL) | |
467 | domain = irq_default_domain; | |
468 | if (domain == NULL) { | |
798f0fd1 | 469 | WARN(1, "%s(, %lx) called with NULL domain\n", __func__, hwirq); |
03848373 | 470 | return 0; |
cc79ca69 | 471 | } |
54a90588 | 472 | pr_debug("-> using domain @%p\n", domain); |
cc79ca69 | 473 | |
5d4c9bc7 MZ |
474 | of_node = irq_domain_get_of_node(domain); |
475 | ||
cc79ca69 | 476 | /* Check if mapping already exists */ |
68700650 | 477 | virq = irq_find_mapping(domain, hwirq); |
03848373 | 478 | if (virq) { |
54a90588 | 479 | pr_debug("-> existing mapping on virq %d\n", virq); |
cc79ca69 GL |
480 | return virq; |
481 | } | |
482 | ||
1bc04f2c | 483 | /* Allocate a virtual interrupt number */ |
5d4c9bc7 | 484 | virq = irq_domain_alloc_descs(-1, 1, hwirq, of_node_to_nid(of_node)); |
5b7526e3 | 485 | if (virq <= 0) { |
54a90588 | 486 | pr_debug("-> virq allocation failed\n"); |
1bc04f2c | 487 | return 0; |
cc79ca69 GL |
488 | } |
489 | ||
98aa468e | 490 | if (irq_domain_associate(domain, virq, hwirq)) { |
73255704 | 491 | irq_free_desc(virq); |
03848373 | 492 | return 0; |
cc79ca69 GL |
493 | } |
494 | ||
54a90588 | 495 | pr_debug("irq %lu on domain %s mapped to virtual irq %u\n", |
5d4c9bc7 | 496 | hwirq, of_node_full_name(of_node), virq); |
cc79ca69 GL |
497 | |
498 | return virq; | |
499 | } | |
500 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
501 | ||
98aa468e GL |
502 | /** |
503 | * irq_create_strict_mappings() - Map a range of hw irqs to fixed linux irqs | |
504 | * @domain: domain owning the interrupt range | |
505 | * @irq_base: beginning of linux IRQ range | |
506 | * @hwirq_base: beginning of hardware IRQ range | |
507 | * @count: Number of interrupts to map | |
508 | * | |
509 | * This routine is used for allocating and mapping a range of hardware | |
510 | * irqs to linux irqs where the linux irq numbers are at pre-defined | |
511 | * locations. For use by controllers that already have static mappings | |
512 | * to insert in to the domain. | |
513 | * | |
514 | * Non-linear users can use irq_create_identity_mapping() for IRQ-at-a-time | |
515 | * domain insertion. | |
516 | * | |
517 | * 0 is returned upon success, while any failure to establish a static | |
518 | * mapping is treated as an error. | |
519 | */ | |
520 | int irq_create_strict_mappings(struct irq_domain *domain, unsigned int irq_base, | |
521 | irq_hw_number_t hwirq_base, int count) | |
522 | { | |
5d4c9bc7 | 523 | struct device_node *of_node; |
98aa468e GL |
524 | int ret; |
525 | ||
5d4c9bc7 | 526 | of_node = irq_domain_get_of_node(domain); |
98aa468e | 527 | ret = irq_alloc_descs(irq_base, irq_base, count, |
5d4c9bc7 | 528 | of_node_to_nid(of_node)); |
98aa468e GL |
529 | if (unlikely(ret < 0)) |
530 | return ret; | |
531 | ||
ddaf144c | 532 | irq_domain_associate_many(domain, irq_base, hwirq_base, count); |
98aa468e GL |
533 | return 0; |
534 | } | |
535 | EXPORT_SYMBOL_GPL(irq_create_strict_mappings); | |
536 | ||
11e4438e MZ |
537 | static int irq_domain_translate(struct irq_domain *d, |
538 | struct irq_fwspec *fwspec, | |
539 | irq_hw_number_t *hwirq, unsigned int *type) | |
540 | { | |
541 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
542 | if (d->ops->translate) | |
543 | return d->ops->translate(d, fwspec, hwirq, type); | |
544 | #endif | |
545 | if (d->ops->xlate) | |
546 | return d->ops->xlate(d, to_of_node(fwspec->fwnode), | |
547 | fwspec->param, fwspec->param_count, | |
548 | hwirq, type); | |
549 | ||
550 | /* If domain has no translation, then we assume interrupt line */ | |
551 | *hwirq = fwspec->param[0]; | |
552 | return 0; | |
553 | } | |
554 | ||
555 | static void of_phandle_args_to_fwspec(struct of_phandle_args *irq_data, | |
556 | struct irq_fwspec *fwspec) | |
557 | { | |
558 | int i; | |
559 | ||
560 | fwspec->fwnode = irq_data->np ? &irq_data->np->fwnode : NULL; | |
561 | fwspec->param_count = irq_data->args_count; | |
562 | ||
563 | for (i = 0; i < irq_data->args_count; i++) | |
564 | fwspec->param[i] = irq_data->args[i]; | |
565 | } | |
566 | ||
c0131f09 | 567 | unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec) |
cc79ca69 | 568 | { |
68700650 | 569 | struct irq_domain *domain; |
cc79ca69 GL |
570 | irq_hw_number_t hwirq; |
571 | unsigned int type = IRQ_TYPE_NONE; | |
f8264e34 | 572 | int virq; |
cc79ca69 | 573 | |
530cbe10 | 574 | if (fwspec->fwnode) { |
651e8b54 | 575 | domain = irq_find_matching_fwspec(fwspec, DOMAIN_BUS_WIRED); |
530cbe10 | 576 | if (!domain) |
651e8b54 | 577 | domain = irq_find_matching_fwspec(fwspec, DOMAIN_BUS_ANY); |
530cbe10 | 578 | } else { |
11e4438e | 579 | domain = irq_default_domain; |
530cbe10 | 580 | } |
11e4438e | 581 | |
68700650 | 582 | if (!domain) { |
798f0fd1 | 583 | pr_warn("no irq domain found for %s !\n", |
c0131f09 | 584 | of_node_full_name(to_of_node(fwspec->fwnode))); |
03848373 | 585 | return 0; |
cc79ca69 GL |
586 | } |
587 | ||
c0131f09 | 588 | if (irq_domain_translate(domain, fwspec, &hwirq, &type)) |
11e4438e | 589 | return 0; |
cc79ca69 | 590 | |
b62b2cf5 JH |
591 | /* |
592 | * WARN if the irqchip returns a type with bits | |
593 | * outside the sense mask set and clear these bits. | |
594 | */ | |
595 | if (WARN_ON(type & ~IRQ_TYPE_SENSE_MASK)) | |
596 | type &= IRQ_TYPE_SENSE_MASK; | |
597 | ||
598 | /* | |
599 | * If we've already configured this interrupt, | |
600 | * don't do it again, or hell will break loose. | |
601 | */ | |
602 | virq = irq_find_mapping(domain, hwirq); | |
603 | if (virq) { | |
0cc01aba | 604 | /* |
b62b2cf5 JH |
605 | * If the trigger type is not specified or matches the |
606 | * current trigger type then we are done so return the | |
607 | * interrupt number. | |
0cc01aba | 608 | */ |
b62b2cf5 | 609 | if (type == IRQ_TYPE_NONE || type == irq_get_trigger_type(virq)) |
0cc01aba YC |
610 | return virq; |
611 | ||
b62b2cf5 JH |
612 | /* |
613 | * If the trigger type has not been set yet, then set | |
614 | * it now and return the interrupt number. | |
615 | */ | |
616 | if (irq_get_trigger_type(virq) == IRQ_TYPE_NONE) { | |
617 | irq_set_irq_type(virq, type); | |
618 | return virq; | |
619 | } | |
620 | ||
621 | pr_warn("type mismatch, failed to map hwirq-%lu for %s!\n", | |
622 | hwirq, of_node_full_name(to_of_node(fwspec->fwnode))); | |
623 | return 0; | |
624 | } | |
625 | ||
626 | if (irq_domain_is_hierarchy(domain)) { | |
c0131f09 | 627 | virq = irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, fwspec); |
0cc01aba YC |
628 | if (virq <= 0) |
629 | return 0; | |
630 | } else { | |
631 | /* Create mapping */ | |
632 | virq = irq_create_mapping(domain, hwirq); | |
633 | if (!virq) | |
634 | return virq; | |
635 | } | |
cc79ca69 GL |
636 | |
637 | /* Set type if specified and different than the current one */ | |
638 | if (type != IRQ_TYPE_NONE && | |
fbab62c5 | 639 | type != irq_get_trigger_type(virq)) |
cc79ca69 GL |
640 | irq_set_irq_type(virq, type); |
641 | return virq; | |
642 | } | |
c0131f09 MZ |
643 | EXPORT_SYMBOL_GPL(irq_create_fwspec_mapping); |
644 | ||
645 | unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data) | |
646 | { | |
647 | struct irq_fwspec fwspec; | |
648 | ||
649 | of_phandle_args_to_fwspec(irq_data, &fwspec); | |
650 | return irq_create_fwspec_mapping(&fwspec); | |
651 | } | |
cc79ca69 GL |
652 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
653 | ||
654 | /** | |
655 | * irq_dispose_mapping() - Unmap an interrupt | |
656 | * @virq: linux irq number of the interrupt to unmap | |
657 | */ | |
658 | void irq_dispose_mapping(unsigned int virq) | |
659 | { | |
660 | struct irq_data *irq_data = irq_get_irq_data(virq); | |
68700650 | 661 | struct irq_domain *domain; |
cc79ca69 | 662 | |
03848373 | 663 | if (!virq || !irq_data) |
cc79ca69 GL |
664 | return; |
665 | ||
68700650 GL |
666 | domain = irq_data->domain; |
667 | if (WARN_ON(domain == NULL)) | |
cc79ca69 GL |
668 | return; |
669 | ||
ddaf144c | 670 | irq_domain_disassociate(domain, virq); |
cc79ca69 GL |
671 | irq_free_desc(virq); |
672 | } | |
673 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); | |
674 | ||
675 | /** | |
676 | * irq_find_mapping() - Find a linux irq from an hw irq number. | |
68700650 GL |
677 | * @domain: domain owning this hardware interrupt |
678 | * @hwirq: hardware irq number in that domain space | |
cc79ca69 | 679 | */ |
68700650 | 680 | unsigned int irq_find_mapping(struct irq_domain *domain, |
cc79ca69 GL |
681 | irq_hw_number_t hwirq) |
682 | { | |
4c0946c4 | 683 | struct irq_data *data; |
cc79ca69 | 684 | |
68700650 GL |
685 | /* Look for default domain if nececssary */ |
686 | if (domain == NULL) | |
687 | domain = irq_default_domain; | |
688 | if (domain == NULL) | |
03848373 | 689 | return 0; |
cc79ca69 | 690 | |
1aa0dd94 | 691 | if (hwirq < domain->revmap_direct_max_irq) { |
f8264e34 JL |
692 | data = irq_domain_get_irq_data(domain, hwirq); |
693 | if (data && data->hwirq == hwirq) | |
4c0946c4 | 694 | return hwirq; |
4c0946c4 GL |
695 | } |
696 | ||
d3dcb436 GL |
697 | /* Check if the hwirq is in the linear revmap. */ |
698 | if (hwirq < domain->revmap_size) | |
699 | return domain->linear_revmap[hwirq]; | |
cc79ca69 | 700 | |
d3dcb436 GL |
701 | rcu_read_lock(); |
702 | data = radix_tree_lookup(&domain->revmap_tree, hwirq); | |
703 | rcu_read_unlock(); | |
704 | return data ? data->irq : 0; | |
cc79ca69 | 705 | } |
cc79ca69 | 706 | EXPORT_SYMBOL_GPL(irq_find_mapping); |
cc79ca69 | 707 | |
092b2fb0 | 708 | #ifdef CONFIG_IRQ_DOMAIN_DEBUG |
cc79ca69 GL |
709 | static int virq_debug_show(struct seq_file *m, void *private) |
710 | { | |
711 | unsigned long flags; | |
712 | struct irq_desc *desc; | |
1400ea86 GL |
713 | struct irq_domain *domain; |
714 | struct radix_tree_iter iter; | |
715 | void *data, **slot; | |
cc79ca69 GL |
716 | int i; |
717 | ||
1400ea86 GL |
718 | seq_printf(m, " %-16s %-6s %-10s %-10s %s\n", |
719 | "name", "mapped", "linear-max", "direct-max", "devtree-node"); | |
720 | mutex_lock(&irq_domain_mutex); | |
721 | list_for_each_entry(domain, &irq_domain_list, link) { | |
5d4c9bc7 | 722 | struct device_node *of_node; |
1400ea86 | 723 | int count = 0; |
5d4c9bc7 | 724 | of_node = irq_domain_get_of_node(domain); |
1400ea86 GL |
725 | radix_tree_for_each_slot(slot, &domain->revmap_tree, &iter, 0) |
726 | count++; | |
727 | seq_printf(m, "%c%-16s %6u %10u %10u %s\n", | |
728 | domain == irq_default_domain ? '*' : ' ', domain->name, | |
729 | domain->revmap_size + count, domain->revmap_size, | |
730 | domain->revmap_direct_max_irq, | |
5d4c9bc7 | 731 | of_node ? of_node_full_name(of_node) : ""); |
1400ea86 GL |
732 | } |
733 | mutex_unlock(&irq_domain_mutex); | |
734 | ||
735 | seq_printf(m, "%-5s %-7s %-15s %-*s %6s %-14s %s\n", "irq", "hwirq", | |
5269a9ab | 736 | "chip name", (int)(2 * sizeof(void *) + 2), "chip data", |
1400ea86 | 737 | "active", "type", "domain"); |
cc79ca69 GL |
738 | |
739 | for (i = 1; i < nr_irqs; i++) { | |
740 | desc = irq_to_desc(i); | |
741 | if (!desc) | |
742 | continue; | |
743 | ||
744 | raw_spin_lock_irqsave(&desc->lock, flags); | |
1400ea86 | 745 | domain = desc->irq_data.domain; |
cc79ca69 | 746 | |
1400ea86 | 747 | if (domain) { |
cc79ca69 | 748 | struct irq_chip *chip; |
1400ea86 GL |
749 | int hwirq = desc->irq_data.hwirq; |
750 | bool direct; | |
cc79ca69 GL |
751 | |
752 | seq_printf(m, "%5d ", i); | |
1400ea86 | 753 | seq_printf(m, "0x%05x ", hwirq); |
cc79ca69 GL |
754 | |
755 | chip = irq_desc_get_chip(desc); | |
0bb4afb4 | 756 | seq_printf(m, "%-15s ", (chip && chip->name) ? chip->name : "none"); |
cc79ca69 GL |
757 | |
758 | data = irq_desc_get_chip_data(desc); | |
15e06bf6 | 759 | seq_printf(m, data ? "0x%p " : " %p ", data); |
cc79ca69 | 760 | |
1400ea86 GL |
761 | seq_printf(m, " %c ", (desc->action && desc->action->handler) ? '*' : ' '); |
762 | direct = (i == hwirq) && (i < domain->revmap_direct_max_irq); | |
763 | seq_printf(m, "%6s%-8s ", | |
764 | (hwirq < domain->revmap_size) ? "LINEAR" : "RADIX", | |
765 | direct ? "(DIRECT)" : ""); | |
0bb4afb4 | 766 | seq_printf(m, "%s\n", desc->irq_data.domain->name); |
cc79ca69 GL |
767 | } |
768 | ||
769 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
770 | } | |
771 | ||
772 | return 0; | |
773 | } | |
774 | ||
775 | static int virq_debug_open(struct inode *inode, struct file *file) | |
776 | { | |
777 | return single_open(file, virq_debug_show, inode->i_private); | |
778 | } | |
779 | ||
780 | static const struct file_operations virq_debug_fops = { | |
781 | .open = virq_debug_open, | |
782 | .read = seq_read, | |
783 | .llseek = seq_lseek, | |
784 | .release = single_release, | |
785 | }; | |
786 | ||
787 | static int __init irq_debugfs_init(void) | |
788 | { | |
092b2fb0 | 789 | if (debugfs_create_file("irq_domain_mapping", S_IRUGO, NULL, |
cc79ca69 GL |
790 | NULL, &virq_debug_fops) == NULL) |
791 | return -ENOMEM; | |
792 | ||
793 | return 0; | |
794 | } | |
795 | __initcall(irq_debugfs_init); | |
092b2fb0 | 796 | #endif /* CONFIG_IRQ_DOMAIN_DEBUG */ |
cc79ca69 | 797 | |
16b2e6e2 GL |
798 | /** |
799 | * irq_domain_xlate_onecell() - Generic xlate for direct one cell bindings | |
800 | * | |
801 | * Device Tree IRQ specifier translation function which works with one cell | |
802 | * bindings where the cell value maps directly to the hwirq number. | |
803 | */ | |
804 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
805 | const u32 *intspec, unsigned int intsize, | |
806 | unsigned long *out_hwirq, unsigned int *out_type) | |
7e713301 | 807 | { |
16b2e6e2 | 808 | if (WARN_ON(intsize < 1)) |
7e713301 | 809 | return -EINVAL; |
7e713301 GL |
810 | *out_hwirq = intspec[0]; |
811 | *out_type = IRQ_TYPE_NONE; | |
7e713301 GL |
812 | return 0; |
813 | } | |
16b2e6e2 GL |
814 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onecell); |
815 | ||
816 | /** | |
817 | * irq_domain_xlate_twocell() - Generic xlate for direct two cell bindings | |
818 | * | |
819 | * Device Tree IRQ specifier translation function which works with two cell | |
820 | * bindings where the cell values map directly to the hwirq number | |
821 | * and linux irq flags. | |
822 | */ | |
823 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, | |
824 | const u32 *intspec, unsigned int intsize, | |
825 | irq_hw_number_t *out_hwirq, unsigned int *out_type) | |
826 | { | |
827 | if (WARN_ON(intsize < 2)) | |
828 | return -EINVAL; | |
829 | *out_hwirq = intspec[0]; | |
830 | *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; | |
831 | return 0; | |
832 | } | |
833 | EXPORT_SYMBOL_GPL(irq_domain_xlate_twocell); | |
834 | ||
835 | /** | |
836 | * irq_domain_xlate_onetwocell() - Generic xlate for one or two cell bindings | |
837 | * | |
838 | * Device Tree IRQ specifier translation function which works with either one | |
839 | * or two cell bindings where the cell values map directly to the hwirq number | |
840 | * and linux irq flags. | |
841 | * | |
842 | * Note: don't use this function unless your interrupt controller explicitly | |
843 | * supports both one and two cell bindings. For the majority of controllers | |
844 | * the _onecell() or _twocell() variants above should be used. | |
845 | */ | |
846 | int irq_domain_xlate_onetwocell(struct irq_domain *d, | |
847 | struct device_node *ctrlr, | |
848 | const u32 *intspec, unsigned int intsize, | |
849 | unsigned long *out_hwirq, unsigned int *out_type) | |
850 | { | |
851 | if (WARN_ON(intsize < 1)) | |
852 | return -EINVAL; | |
853 | *out_hwirq = intspec[0]; | |
854 | *out_type = (intsize > 1) ? intspec[1] : IRQ_TYPE_NONE; | |
855 | return 0; | |
856 | } | |
857 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onetwocell); | |
7e713301 | 858 | |
a18dc81b | 859 | const struct irq_domain_ops irq_domain_simple_ops = { |
16b2e6e2 | 860 | .xlate = irq_domain_xlate_onetwocell, |
75294957 GL |
861 | }; |
862 | EXPORT_SYMBOL_GPL(irq_domain_simple_ops); | |
f8264e34 | 863 | |
ac0a0cd2 QY |
864 | int irq_domain_alloc_descs(int virq, unsigned int cnt, irq_hw_number_t hwirq, |
865 | int node) | |
f8264e34 JL |
866 | { |
867 | unsigned int hint; | |
868 | ||
869 | if (virq >= 0) { | |
870 | virq = irq_alloc_descs(virq, virq, cnt, node); | |
871 | } else { | |
872 | hint = hwirq % nr_irqs; | |
873 | if (hint == 0) | |
874 | hint++; | |
875 | virq = irq_alloc_descs_from(hint, cnt, node); | |
876 | if (virq <= 0 && hint > 1) | |
877 | virq = irq_alloc_descs_from(1, cnt, node); | |
878 | } | |
879 | ||
880 | return virq; | |
881 | } | |
882 | ||
883 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
afb7da83 | 884 | /** |
2a5e9a07 | 885 | * irq_domain_create_hierarchy - Add a irqdomain into the hierarchy |
afb7da83 JL |
886 | * @parent: Parent irq domain to associate with the new domain |
887 | * @flags: Irq domain flags associated to the domain | |
888 | * @size: Size of the domain. See below | |
2a5e9a07 | 889 | * @fwnode: Optional fwnode of the interrupt controller |
afb7da83 JL |
890 | * @ops: Pointer to the interrupt domain callbacks |
891 | * @host_data: Controller private data pointer | |
892 | * | |
893 | * If @size is 0 a tree domain is created, otherwise a linear domain. | |
894 | * | |
895 | * If successful the parent is associated to the new domain and the | |
896 | * domain flags are set. | |
897 | * Returns pointer to IRQ domain, or NULL on failure. | |
898 | */ | |
2a5e9a07 | 899 | struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, |
afb7da83 JL |
900 | unsigned int flags, |
901 | unsigned int size, | |
2a5e9a07 | 902 | struct fwnode_handle *fwnode, |
afb7da83 JL |
903 | const struct irq_domain_ops *ops, |
904 | void *host_data) | |
905 | { | |
906 | struct irq_domain *domain; | |
907 | ||
908 | if (size) | |
2a5e9a07 | 909 | domain = irq_domain_create_linear(fwnode, size, ops, host_data); |
afb7da83 | 910 | else |
2a5e9a07 | 911 | domain = irq_domain_create_tree(fwnode, ops, host_data); |
afb7da83 JL |
912 | if (domain) { |
913 | domain->parent = parent; | |
914 | domain->flags |= flags; | |
915 | } | |
916 | ||
917 | return domain; | |
918 | } | |
52b2a05f | 919 | EXPORT_SYMBOL_GPL(irq_domain_create_hierarchy); |
afb7da83 | 920 | |
f8264e34 JL |
921 | static void irq_domain_insert_irq(int virq) |
922 | { | |
923 | struct irq_data *data; | |
924 | ||
925 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
926 | struct irq_domain *domain = data->domain; | |
927 | irq_hw_number_t hwirq = data->hwirq; | |
928 | ||
929 | if (hwirq < domain->revmap_size) { | |
930 | domain->linear_revmap[hwirq] = virq; | |
931 | } else { | |
932 | mutex_lock(&revmap_trees_mutex); | |
933 | radix_tree_insert(&domain->revmap_tree, hwirq, data); | |
934 | mutex_unlock(&revmap_trees_mutex); | |
935 | } | |
936 | ||
937 | /* If not already assigned, give the domain the chip's name */ | |
938 | if (!domain->name && data->chip) | |
939 | domain->name = data->chip->name; | |
940 | } | |
941 | ||
942 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
943 | } | |
944 | ||
945 | static void irq_domain_remove_irq(int virq) | |
946 | { | |
947 | struct irq_data *data; | |
948 | ||
949 | irq_set_status_flags(virq, IRQ_NOREQUEST); | |
950 | irq_set_chip_and_handler(virq, NULL, NULL); | |
951 | synchronize_irq(virq); | |
952 | smp_mb(); | |
953 | ||
954 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
955 | struct irq_domain *domain = data->domain; | |
956 | irq_hw_number_t hwirq = data->hwirq; | |
957 | ||
958 | if (hwirq < domain->revmap_size) { | |
959 | domain->linear_revmap[hwirq] = 0; | |
960 | } else { | |
961 | mutex_lock(&revmap_trees_mutex); | |
962 | radix_tree_delete(&domain->revmap_tree, hwirq); | |
963 | mutex_unlock(&revmap_trees_mutex); | |
964 | } | |
965 | } | |
966 | } | |
967 | ||
968 | static struct irq_data *irq_domain_insert_irq_data(struct irq_domain *domain, | |
969 | struct irq_data *child) | |
970 | { | |
971 | struct irq_data *irq_data; | |
972 | ||
6783011b JL |
973 | irq_data = kzalloc_node(sizeof(*irq_data), GFP_KERNEL, |
974 | irq_data_get_node(child)); | |
f8264e34 JL |
975 | if (irq_data) { |
976 | child->parent_data = irq_data; | |
977 | irq_data->irq = child->irq; | |
0d0b4c86 | 978 | irq_data->common = child->common; |
f8264e34 JL |
979 | irq_data->domain = domain; |
980 | } | |
981 | ||
982 | return irq_data; | |
983 | } | |
984 | ||
985 | static void irq_domain_free_irq_data(unsigned int virq, unsigned int nr_irqs) | |
986 | { | |
987 | struct irq_data *irq_data, *tmp; | |
988 | int i; | |
989 | ||
990 | for (i = 0; i < nr_irqs; i++) { | |
991 | irq_data = irq_get_irq_data(virq + i); | |
992 | tmp = irq_data->parent_data; | |
993 | irq_data->parent_data = NULL; | |
994 | irq_data->domain = NULL; | |
995 | ||
996 | while (tmp) { | |
997 | irq_data = tmp; | |
998 | tmp = tmp->parent_data; | |
999 | kfree(irq_data); | |
1000 | } | |
1001 | } | |
1002 | } | |
1003 | ||
1004 | static int irq_domain_alloc_irq_data(struct irq_domain *domain, | |
1005 | unsigned int virq, unsigned int nr_irqs) | |
1006 | { | |
1007 | struct irq_data *irq_data; | |
1008 | struct irq_domain *parent; | |
1009 | int i; | |
1010 | ||
1011 | /* The outermost irq_data is embedded in struct irq_desc */ | |
1012 | for (i = 0; i < nr_irqs; i++) { | |
1013 | irq_data = irq_get_irq_data(virq + i); | |
1014 | irq_data->domain = domain; | |
1015 | ||
1016 | for (parent = domain->parent; parent; parent = parent->parent) { | |
1017 | irq_data = irq_domain_insert_irq_data(parent, irq_data); | |
1018 | if (!irq_data) { | |
1019 | irq_domain_free_irq_data(virq, i + 1); | |
1020 | return -ENOMEM; | |
1021 | } | |
1022 | } | |
1023 | } | |
1024 | ||
1025 | return 0; | |
1026 | } | |
1027 | ||
1028 | /** | |
1029 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain | |
1030 | * @domain: domain to match | |
1031 | * @virq: IRQ number to get irq_data | |
1032 | */ | |
1033 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
1034 | unsigned int virq) | |
1035 | { | |
1036 | struct irq_data *irq_data; | |
1037 | ||
1038 | for (irq_data = irq_get_irq_data(virq); irq_data; | |
1039 | irq_data = irq_data->parent_data) | |
1040 | if (irq_data->domain == domain) | |
1041 | return irq_data; | |
1042 | ||
1043 | return NULL; | |
1044 | } | |
a4289dc2 | 1045 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 JL |
1046 | |
1047 | /** | |
1048 | * irq_domain_set_hwirq_and_chip - Set hwirq and irqchip of @virq at @domain | |
1049 | * @domain: Interrupt domain to match | |
1050 | * @virq: IRQ number | |
1051 | * @hwirq: The hwirq number | |
1052 | * @chip: The associated interrupt chip | |
1053 | * @chip_data: The associated chip data | |
1054 | */ | |
1055 | int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, | |
1056 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1057 | void *chip_data) | |
1058 | { | |
1059 | struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); | |
1060 | ||
1061 | if (!irq_data) | |
1062 | return -ENOENT; | |
1063 | ||
1064 | irq_data->hwirq = hwirq; | |
1065 | irq_data->chip = chip ? chip : &no_irq_chip; | |
1066 | irq_data->chip_data = chip_data; | |
1067 | ||
1068 | return 0; | |
1069 | } | |
52b2a05f | 1070 | EXPORT_SYMBOL_GPL(irq_domain_set_hwirq_and_chip); |
f8264e34 | 1071 | |
1b537708 JL |
1072 | /** |
1073 | * irq_domain_set_info - Set the complete data for a @virq in @domain | |
1074 | * @domain: Interrupt domain to match | |
1075 | * @virq: IRQ number | |
1076 | * @hwirq: The hardware interrupt number | |
1077 | * @chip: The associated interrupt chip | |
1078 | * @chip_data: The associated interrupt chip data | |
1079 | * @handler: The interrupt flow handler | |
1080 | * @handler_data: The interrupt flow handler data | |
1081 | * @handler_name: The interrupt handler name | |
1082 | */ | |
1083 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
1084 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1085 | void *chip_data, irq_flow_handler_t handler, | |
1086 | void *handler_data, const char *handler_name) | |
1087 | { | |
1088 | irq_domain_set_hwirq_and_chip(domain, virq, hwirq, chip, chip_data); | |
1089 | __irq_set_handler(virq, handler, 0, handler_name); | |
1090 | irq_set_handler_data(virq, handler_data); | |
1091 | } | |
64bce3e8 | 1092 | EXPORT_SYMBOL(irq_domain_set_info); |
1b537708 | 1093 | |
f8264e34 JL |
1094 | /** |
1095 | * irq_domain_reset_irq_data - Clear hwirq, chip and chip_data in @irq_data | |
1096 | * @irq_data: The pointer to irq_data | |
1097 | */ | |
1098 | void irq_domain_reset_irq_data(struct irq_data *irq_data) | |
1099 | { | |
1100 | irq_data->hwirq = 0; | |
1101 | irq_data->chip = &no_irq_chip; | |
1102 | irq_data->chip_data = NULL; | |
1103 | } | |
52b2a05f | 1104 | EXPORT_SYMBOL_GPL(irq_domain_reset_irq_data); |
f8264e34 JL |
1105 | |
1106 | /** | |
1107 | * irq_domain_free_irqs_common - Clear irq_data and free the parent | |
1108 | * @domain: Interrupt domain to match | |
1109 | * @virq: IRQ number to start with | |
1110 | * @nr_irqs: The number of irqs to free | |
1111 | */ | |
1112 | void irq_domain_free_irqs_common(struct irq_domain *domain, unsigned int virq, | |
1113 | unsigned int nr_irqs) | |
1114 | { | |
1115 | struct irq_data *irq_data; | |
1116 | int i; | |
1117 | ||
1118 | for (i = 0; i < nr_irqs; i++) { | |
1119 | irq_data = irq_domain_get_irq_data(domain, virq + i); | |
1120 | if (irq_data) | |
1121 | irq_domain_reset_irq_data(irq_data); | |
1122 | } | |
1123 | irq_domain_free_irqs_parent(domain, virq, nr_irqs); | |
1124 | } | |
63cc787e | 1125 | EXPORT_SYMBOL_GPL(irq_domain_free_irqs_common); |
f8264e34 JL |
1126 | |
1127 | /** | |
1128 | * irq_domain_free_irqs_top - Clear handler and handler data, clear irqdata and free parent | |
1129 | * @domain: Interrupt domain to match | |
1130 | * @virq: IRQ number to start with | |
1131 | * @nr_irqs: The number of irqs to free | |
1132 | */ | |
1133 | void irq_domain_free_irqs_top(struct irq_domain *domain, unsigned int virq, | |
1134 | unsigned int nr_irqs) | |
1135 | { | |
1136 | int i; | |
1137 | ||
1138 | for (i = 0; i < nr_irqs; i++) { | |
1139 | irq_set_handler_data(virq + i, NULL); | |
1140 | irq_set_handler(virq + i, NULL); | |
1141 | } | |
1142 | irq_domain_free_irqs_common(domain, virq, nr_irqs); | |
1143 | } | |
1144 | ||
36d72731 JL |
1145 | static bool irq_domain_is_auto_recursive(struct irq_domain *domain) |
1146 | { | |
1147 | return domain->flags & IRQ_DOMAIN_FLAG_AUTO_RECURSIVE; | |
1148 | } | |
1149 | ||
1150 | static void irq_domain_free_irqs_recursive(struct irq_domain *domain, | |
1151 | unsigned int irq_base, | |
1152 | unsigned int nr_irqs) | |
1153 | { | |
1154 | domain->ops->free(domain, irq_base, nr_irqs); | |
1155 | if (irq_domain_is_auto_recursive(domain)) { | |
1156 | BUG_ON(!domain->parent); | |
1157 | irq_domain_free_irqs_recursive(domain->parent, irq_base, | |
1158 | nr_irqs); | |
1159 | } | |
1160 | } | |
1161 | ||
c466595c MZ |
1162 | int irq_domain_alloc_irqs_recursive(struct irq_domain *domain, |
1163 | unsigned int irq_base, | |
1164 | unsigned int nr_irqs, void *arg) | |
36d72731 JL |
1165 | { |
1166 | int ret = 0; | |
1167 | struct irq_domain *parent = domain->parent; | |
1168 | bool recursive = irq_domain_is_auto_recursive(domain); | |
1169 | ||
1170 | BUG_ON(recursive && !parent); | |
1171 | if (recursive) | |
1172 | ret = irq_domain_alloc_irqs_recursive(parent, irq_base, | |
1173 | nr_irqs, arg); | |
1174 | if (ret >= 0) | |
1175 | ret = domain->ops->alloc(domain, irq_base, nr_irqs, arg); | |
1176 | if (ret < 0 && recursive) | |
1177 | irq_domain_free_irqs_recursive(parent, irq_base, nr_irqs); | |
1178 | ||
1179 | return ret; | |
1180 | } | |
1181 | ||
f8264e34 JL |
1182 | /** |
1183 | * __irq_domain_alloc_irqs - Allocate IRQs from domain | |
1184 | * @domain: domain to allocate from | |
1185 | * @irq_base: allocate specified IRQ nubmer if irq_base >= 0 | |
1186 | * @nr_irqs: number of IRQs to allocate | |
1187 | * @node: NUMA node id for memory allocation | |
1188 | * @arg: domain specific argument | |
1189 | * @realloc: IRQ descriptors have already been allocated if true | |
1190 | * | |
1191 | * Allocate IRQ numbers and initialized all data structures to support | |
1192 | * hierarchy IRQ domains. | |
1193 | * Parameter @realloc is mainly to support legacy IRQs. | |
1194 | * Returns error code or allocated IRQ number | |
1195 | * | |
1196 | * The whole process to setup an IRQ has been split into two steps. | |
1197 | * The first step, __irq_domain_alloc_irqs(), is to allocate IRQ | |
1198 | * descriptor and required hardware resources. The second step, | |
1199 | * irq_domain_activate_irq(), is to program hardwares with preallocated | |
1200 | * resources. In this way, it's easier to rollback when failing to | |
1201 | * allocate resources. | |
1202 | */ | |
1203 | int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, | |
1204 | unsigned int nr_irqs, int node, void *arg, | |
1205 | bool realloc) | |
1206 | { | |
1207 | int i, ret, virq; | |
1208 | ||
1209 | if (domain == NULL) { | |
1210 | domain = irq_default_domain; | |
1211 | if (WARN(!domain, "domain is NULL; cannot allocate IRQ\n")) | |
1212 | return -EINVAL; | |
1213 | } | |
1214 | ||
1215 | if (!domain->ops->alloc) { | |
1216 | pr_debug("domain->ops->alloc() is NULL\n"); | |
1217 | return -ENOSYS; | |
1218 | } | |
1219 | ||
1220 | if (realloc && irq_base >= 0) { | |
1221 | virq = irq_base; | |
1222 | } else { | |
1223 | virq = irq_domain_alloc_descs(irq_base, nr_irqs, 0, node); | |
1224 | if (virq < 0) { | |
1225 | pr_debug("cannot allocate IRQ(base %d, count %d)\n", | |
1226 | irq_base, nr_irqs); | |
1227 | return virq; | |
1228 | } | |
1229 | } | |
1230 | ||
1231 | if (irq_domain_alloc_irq_data(domain, virq, nr_irqs)) { | |
1232 | pr_debug("cannot allocate memory for IRQ%d\n", virq); | |
1233 | ret = -ENOMEM; | |
1234 | goto out_free_desc; | |
1235 | } | |
1236 | ||
1237 | mutex_lock(&irq_domain_mutex); | |
36d72731 | 1238 | ret = irq_domain_alloc_irqs_recursive(domain, virq, nr_irqs, arg); |
f8264e34 JL |
1239 | if (ret < 0) { |
1240 | mutex_unlock(&irq_domain_mutex); | |
1241 | goto out_free_irq_data; | |
1242 | } | |
1243 | for (i = 0; i < nr_irqs; i++) | |
1244 | irq_domain_insert_irq(virq + i); | |
1245 | mutex_unlock(&irq_domain_mutex); | |
1246 | ||
1247 | return virq; | |
1248 | ||
1249 | out_free_irq_data: | |
1250 | irq_domain_free_irq_data(virq, nr_irqs); | |
1251 | out_free_desc: | |
1252 | irq_free_descs(virq, nr_irqs); | |
1253 | return ret; | |
1254 | } | |
1255 | ||
1256 | /** | |
1257 | * irq_domain_free_irqs - Free IRQ number and associated data structures | |
1258 | * @virq: base IRQ number | |
1259 | * @nr_irqs: number of IRQs to free | |
1260 | */ | |
1261 | void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs) | |
1262 | { | |
1263 | struct irq_data *data = irq_get_irq_data(virq); | |
1264 | int i; | |
1265 | ||
1266 | if (WARN(!data || !data->domain || !data->domain->ops->free, | |
1267 | "NULL pointer, cannot free irq\n")) | |
1268 | return; | |
1269 | ||
1270 | mutex_lock(&irq_domain_mutex); | |
1271 | for (i = 0; i < nr_irqs; i++) | |
1272 | irq_domain_remove_irq(virq + i); | |
36d72731 | 1273 | irq_domain_free_irqs_recursive(data->domain, virq, nr_irqs); |
f8264e34 JL |
1274 | mutex_unlock(&irq_domain_mutex); |
1275 | ||
1276 | irq_domain_free_irq_data(virq, nr_irqs); | |
1277 | irq_free_descs(virq, nr_irqs); | |
1278 | } | |
1279 | ||
36d72731 JL |
1280 | /** |
1281 | * irq_domain_alloc_irqs_parent - Allocate interrupts from parent domain | |
1282 | * @irq_base: Base IRQ number | |
1283 | * @nr_irqs: Number of IRQs to allocate | |
1284 | * @arg: Allocation data (arch/domain specific) | |
1285 | * | |
1286 | * Check whether the domain has been setup recursive. If not allocate | |
1287 | * through the parent domain. | |
1288 | */ | |
1289 | int irq_domain_alloc_irqs_parent(struct irq_domain *domain, | |
1290 | unsigned int irq_base, unsigned int nr_irqs, | |
1291 | void *arg) | |
1292 | { | |
1293 | /* irq_domain_alloc_irqs_recursive() has called parent's alloc() */ | |
1294 | if (irq_domain_is_auto_recursive(domain)) | |
1295 | return 0; | |
1296 | ||
1297 | domain = domain->parent; | |
1298 | if (domain) | |
1299 | return irq_domain_alloc_irqs_recursive(domain, irq_base, | |
1300 | nr_irqs, arg); | |
1301 | return -ENOSYS; | |
1302 | } | |
52b2a05f | 1303 | EXPORT_SYMBOL_GPL(irq_domain_alloc_irqs_parent); |
36d72731 JL |
1304 | |
1305 | /** | |
1306 | * irq_domain_free_irqs_parent - Free interrupts from parent domain | |
1307 | * @irq_base: Base IRQ number | |
1308 | * @nr_irqs: Number of IRQs to free | |
1309 | * | |
1310 | * Check whether the domain has been setup recursive. If not free | |
1311 | * through the parent domain. | |
1312 | */ | |
1313 | void irq_domain_free_irqs_parent(struct irq_domain *domain, | |
1314 | unsigned int irq_base, unsigned int nr_irqs) | |
1315 | { | |
1316 | /* irq_domain_free_irqs_recursive() will call parent's free */ | |
1317 | if (!irq_domain_is_auto_recursive(domain) && domain->parent) | |
1318 | irq_domain_free_irqs_recursive(domain->parent, irq_base, | |
1319 | nr_irqs); | |
1320 | } | |
52b2a05f | 1321 | EXPORT_SYMBOL_GPL(irq_domain_free_irqs_parent); |
36d72731 | 1322 | |
f8264e34 JL |
1323 | /** |
1324 | * irq_domain_activate_irq - Call domain_ops->activate recursively to activate | |
1325 | * interrupt | |
1326 | * @irq_data: outermost irq_data associated with interrupt | |
1327 | * | |
1328 | * This is the second step to call domain_ops->activate to program interrupt | |
1329 | * controllers, so the interrupt could actually get delivered. | |
1330 | */ | |
1331 | void irq_domain_activate_irq(struct irq_data *irq_data) | |
1332 | { | |
1333 | if (irq_data && irq_data->domain) { | |
1334 | struct irq_domain *domain = irq_data->domain; | |
1335 | ||
1336 | if (irq_data->parent_data) | |
1337 | irq_domain_activate_irq(irq_data->parent_data); | |
1338 | if (domain->ops->activate) | |
1339 | domain->ops->activate(domain, irq_data); | |
1340 | } | |
1341 | } | |
1342 | ||
1343 | /** | |
1344 | * irq_domain_deactivate_irq - Call domain_ops->deactivate recursively to | |
1345 | * deactivate interrupt | |
1346 | * @irq_data: outermost irq_data associated with interrupt | |
1347 | * | |
1348 | * It calls domain_ops->deactivate to program interrupt controllers to disable | |
1349 | * interrupt delivery. | |
1350 | */ | |
1351 | void irq_domain_deactivate_irq(struct irq_data *irq_data) | |
1352 | { | |
1353 | if (irq_data && irq_data->domain) { | |
1354 | struct irq_domain *domain = irq_data->domain; | |
1355 | ||
1356 | if (domain->ops->deactivate) | |
1357 | domain->ops->deactivate(domain, irq_data); | |
1358 | if (irq_data->parent_data) | |
1359 | irq_domain_deactivate_irq(irq_data->parent_data); | |
1360 | } | |
1361 | } | |
1362 | ||
1363 | static void irq_domain_check_hierarchy(struct irq_domain *domain) | |
1364 | { | |
1365 | /* Hierarchy irq_domains must implement callback alloc() */ | |
1366 | if (domain->ops->alloc) | |
1367 | domain->flags |= IRQ_DOMAIN_FLAG_HIERARCHY; | |
1368 | } | |
1369 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1370 | /** | |
1371 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain | |
1372 | * @domain: domain to match | |
1373 | * @virq: IRQ number to get irq_data | |
1374 | */ | |
1375 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
1376 | unsigned int virq) | |
1377 | { | |
1378 | struct irq_data *irq_data = irq_get_irq_data(virq); | |
1379 | ||
1380 | return (irq_data && irq_data->domain == domain) ? irq_data : NULL; | |
1381 | } | |
a4289dc2 | 1382 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 | 1383 | |
5f22f5c6 SA |
1384 | /** |
1385 | * irq_domain_set_info - Set the complete data for a @virq in @domain | |
1386 | * @domain: Interrupt domain to match | |
1387 | * @virq: IRQ number | |
1388 | * @hwirq: The hardware interrupt number | |
1389 | * @chip: The associated interrupt chip | |
1390 | * @chip_data: The associated interrupt chip data | |
1391 | * @handler: The interrupt flow handler | |
1392 | * @handler_data: The interrupt flow handler data | |
1393 | * @handler_name: The interrupt handler name | |
1394 | */ | |
1395 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
1396 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1397 | void *chip_data, irq_flow_handler_t handler, | |
1398 | void *handler_data, const char *handler_name) | |
1399 | { | |
1400 | irq_set_chip_and_handler_name(virq, chip, handler, handler_name); | |
1401 | irq_set_chip_data(virq, chip_data); | |
1402 | irq_set_handler_data(virq, handler_data); | |
1403 | } | |
1404 | ||
f8264e34 JL |
1405 | static void irq_domain_check_hierarchy(struct irq_domain *domain) |
1406 | { | |
1407 | } | |
1408 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |