Commit | Line | Data |
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54a90588 PM |
1 | #define pr_fmt(fmt) "irq: " fmt |
2 | ||
c5c601c4 | 3 | #include <linux/acpi.h> |
cc79ca69 GL |
4 | #include <linux/debugfs.h> |
5 | #include <linux/hardirq.h> | |
6 | #include <linux/interrupt.h> | |
08a543ad | 7 | #include <linux/irq.h> |
cc79ca69 | 8 | #include <linux/irqdesc.h> |
08a543ad GL |
9 | #include <linux/irqdomain.h> |
10 | #include <linux/module.h> | |
11 | #include <linux/mutex.h> | |
12 | #include <linux/of.h> | |
7e713301 | 13 | #include <linux/of_address.h> |
64be38ab | 14 | #include <linux/of_irq.h> |
5ca4db61 | 15 | #include <linux/topology.h> |
cc79ca69 | 16 | #include <linux/seq_file.h> |
7e713301 | 17 | #include <linux/slab.h> |
cc79ca69 GL |
18 | #include <linux/smp.h> |
19 | #include <linux/fs.h> | |
08a543ad GL |
20 | |
21 | static LIST_HEAD(irq_domain_list); | |
22 | static DEFINE_MUTEX(irq_domain_mutex); | |
23 | ||
68700650 | 24 | static struct irq_domain *irq_default_domain; |
cc79ca69 | 25 | |
f8264e34 JL |
26 | static void irq_domain_check_hierarchy(struct irq_domain *domain); |
27 | ||
b145dcc4 | 28 | struct irqchip_fwid { |
d59f6617 TG |
29 | struct fwnode_handle fwnode; |
30 | unsigned int type; | |
31 | char *name; | |
087cdfb6 | 32 | void *data; |
b145dcc4 MZ |
33 | }; |
34 | ||
087cdfb6 TG |
35 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
36 | static void debugfs_add_domain_dir(struct irq_domain *d); | |
37 | static void debugfs_remove_domain_dir(struct irq_domain *d); | |
38 | #else | |
39 | static inline void debugfs_add_domain_dir(struct irq_domain *d) { } | |
40 | static inline void debugfs_remove_domain_dir(struct irq_domain *d) { } | |
41 | #endif | |
42 | ||
db3e50f3 | 43 | const struct fwnode_operations irqchip_fwnode_ops; |
b6eb66fd | 44 | EXPORT_SYMBOL_GPL(irqchip_fwnode_ops); |
db3e50f3 | 45 | |
b145dcc4 MZ |
46 | /** |
47 | * irq_domain_alloc_fwnode - Allocate a fwnode_handle suitable for | |
48 | * identifying an irq domain | |
d59f6617 TG |
49 | * @type: Type of irqchip_fwnode. See linux/irqdomain.h |
50 | * @name: Optional user provided domain name | |
51 | * @id: Optional user provided id if name != NULL | |
52 | * @data: Optional user-provided data | |
b145dcc4 | 53 | * |
d59f6617 | 54 | * Allocate a struct irqchip_fwid, and return a poiner to the embedded |
b145dcc4 | 55 | * fwnode_handle (or NULL on failure). |
d59f6617 TG |
56 | * |
57 | * Note: The types IRQCHIP_FWNODE_NAMED and IRQCHIP_FWNODE_NAMED_ID are | |
58 | * solely to transport name information to irqdomain creation code. The | |
59 | * node is not stored. For other types the pointer is kept in the irq | |
60 | * domain struct. | |
b145dcc4 | 61 | */ |
d59f6617 TG |
62 | struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, |
63 | const char *name, void *data) | |
b145dcc4 MZ |
64 | { |
65 | struct irqchip_fwid *fwid; | |
d59f6617 | 66 | char *n; |
b145dcc4 MZ |
67 | |
68 | fwid = kzalloc(sizeof(*fwid), GFP_KERNEL); | |
b145dcc4 | 69 | |
d59f6617 TG |
70 | switch (type) { |
71 | case IRQCHIP_FWNODE_NAMED: | |
72 | n = kasprintf(GFP_KERNEL, "%s", name); | |
73 | break; | |
74 | case IRQCHIP_FWNODE_NAMED_ID: | |
75 | n = kasprintf(GFP_KERNEL, "%s-%d", name, id); | |
76 | break; | |
77 | default: | |
78 | n = kasprintf(GFP_KERNEL, "irqchip@%p", data); | |
79 | break; | |
80 | } | |
81 | ||
82 | if (!fwid || !n) { | |
b145dcc4 | 83 | kfree(fwid); |
d59f6617 | 84 | kfree(n); |
b145dcc4 MZ |
85 | return NULL; |
86 | } | |
87 | ||
d59f6617 TG |
88 | fwid->type = type; |
89 | fwid->name = n; | |
b145dcc4 | 90 | fwid->data = data; |
db3e50f3 | 91 | fwid->fwnode.ops = &irqchip_fwnode_ops; |
b145dcc4 MZ |
92 | return &fwid->fwnode; |
93 | } | |
d59f6617 | 94 | EXPORT_SYMBOL_GPL(__irq_domain_alloc_fwnode); |
b145dcc4 MZ |
95 | |
96 | /** | |
97 | * irq_domain_free_fwnode - Free a non-OF-backed fwnode_handle | |
98 | * | |
99 | * Free a fwnode_handle allocated with irq_domain_alloc_fwnode. | |
100 | */ | |
101 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode) | |
102 | { | |
103 | struct irqchip_fwid *fwid; | |
104 | ||
75aba7b0 | 105 | if (WARN_ON(!is_fwnode_irqchip(fwnode))) |
b145dcc4 MZ |
106 | return; |
107 | ||
108 | fwid = container_of(fwnode, struct irqchip_fwid, fwnode); | |
109 | kfree(fwid->name); | |
110 | kfree(fwid); | |
111 | } | |
a4289dc2 | 112 | EXPORT_SYMBOL_GPL(irq_domain_free_fwnode); |
b145dcc4 | 113 | |
cc79ca69 | 114 | /** |
fa40f377 | 115 | * __irq_domain_add() - Allocate a new irq_domain data structure |
545d5d65 | 116 | * @fwnode: firmware node for the interrupt controller |
fa40f377 | 117 | * @size: Size of linear map; 0 for radix mapping only |
a257954b | 118 | * @hwirq_max: Maximum number of interrupts supported by controller |
fa40f377 GL |
119 | * @direct_max: Maximum value of direct maps; Use ~0 for no limit; 0 for no |
120 | * direct mapping | |
f8264e34 | 121 | * @ops: domain callbacks |
a8db8cf0 | 122 | * @host_data: Controller private data pointer |
cc79ca69 | 123 | * |
a257954b JL |
124 | * Allocates and initialize and irq_domain structure. |
125 | * Returns pointer to IRQ domain, or NULL on failure. | |
cc79ca69 | 126 | */ |
1bf4ddc4 | 127 | struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size, |
ddaf144c | 128 | irq_hw_number_t hwirq_max, int direct_max, |
fa40f377 GL |
129 | const struct irq_domain_ops *ops, |
130 | void *host_data) | |
cc79ca69 | 131 | { |
545d5d65 | 132 | struct device_node *of_node = to_of_node(fwnode); |
d59f6617 | 133 | struct irqchip_fwid *fwid; |
a8db8cf0 | 134 | struct irq_domain *domain; |
cc79ca69 | 135 | |
d59f6617 TG |
136 | static atomic_t unknown_domains; |
137 | ||
cef5075c GL |
138 | domain = kzalloc_node(sizeof(*domain) + (sizeof(unsigned int) * size), |
139 | GFP_KERNEL, of_node_to_nid(of_node)); | |
a8db8cf0 | 140 | if (WARN_ON(!domain)) |
cc79ca69 GL |
141 | return NULL; |
142 | ||
d59f6617 TG |
143 | if (fwnode && is_fwnode_irqchip(fwnode)) { |
144 | fwid = container_of(fwnode, struct irqchip_fwid, fwnode); | |
145 | ||
146 | switch (fwid->type) { | |
147 | case IRQCHIP_FWNODE_NAMED: | |
148 | case IRQCHIP_FWNODE_NAMED_ID: | |
149 | domain->name = kstrdup(fwid->name, GFP_KERNEL); | |
150 | if (!domain->name) { | |
151 | kfree(domain); | |
152 | return NULL; | |
153 | } | |
154 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
155 | break; | |
156 | default: | |
157 | domain->fwnode = fwnode; | |
158 | domain->name = fwid->name; | |
159 | break; | |
160 | } | |
c5c601c4 MZ |
161 | #ifdef CONFIG_ACPI |
162 | } else if (is_acpi_device_node(fwnode)) { | |
163 | struct acpi_buffer buf = { | |
164 | .length = ACPI_ALLOCATE_BUFFER, | |
165 | }; | |
166 | acpi_handle handle; | |
167 | ||
168 | handle = acpi_device_handle(to_acpi_device_node(fwnode)); | |
169 | if (acpi_get_name(handle, ACPI_FULL_PATHNAME, &buf) == AE_OK) { | |
170 | domain->name = buf.pointer; | |
171 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
172 | } | |
173 | ||
174 | domain->fwnode = fwnode; | |
175 | #endif | |
d59f6617 TG |
176 | } else if (of_node) { |
177 | char *name; | |
178 | ||
179 | /* | |
180 | * DT paths contain '/', which debugfs is legitimately | |
181 | * unhappy about. Replace them with ':', which does | |
182 | * the trick and is not as offensive as '\'... | |
183 | */ | |
184 | name = kstrdup(of_node_full_name(of_node), GFP_KERNEL); | |
185 | if (!name) { | |
186 | kfree(domain); | |
187 | return NULL; | |
188 | } | |
189 | ||
190 | strreplace(name, '/', ':'); | |
191 | ||
192 | domain->name = name; | |
193 | domain->fwnode = fwnode; | |
194 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
195 | } | |
196 | ||
197 | if (!domain->name) { | |
db3e50f3 SA |
198 | if (fwnode) |
199 | pr_err("Invalid fwnode type for irqdomain\n"); | |
d59f6617 TG |
200 | domain->name = kasprintf(GFP_KERNEL, "unknown-%d", |
201 | atomic_inc_return(&unknown_domains)); | |
202 | if (!domain->name) { | |
203 | kfree(domain); | |
204 | return NULL; | |
205 | } | |
206 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
207 | } | |
208 | ||
f110711a | 209 | of_node_get(of_node); |
f110711a | 210 | |
cc79ca69 | 211 | /* Fill structure */ |
1aa0dd94 | 212 | INIT_RADIX_TREE(&domain->revmap_tree, GFP_KERNEL); |
f1d78358 | 213 | mutex_init(&domain->revmap_tree_mutex); |
68700650 | 214 | domain->ops = ops; |
a8db8cf0 | 215 | domain->host_data = host_data; |
ddaf144c | 216 | domain->hwirq_max = hwirq_max; |
1aa0dd94 | 217 | domain->revmap_size = size; |
fa40f377 | 218 | domain->revmap_direct_max_irq = direct_max; |
f8264e34 | 219 | irq_domain_check_hierarchy(domain); |
cc79ca69 | 220 | |
a8db8cf0 | 221 | mutex_lock(&irq_domain_mutex); |
087cdfb6 | 222 | debugfs_add_domain_dir(domain); |
a8db8cf0 GL |
223 | list_add(&domain->link, &irq_domain_list); |
224 | mutex_unlock(&irq_domain_mutex); | |
fa40f377 | 225 | |
1aa0dd94 | 226 | pr_debug("Added domain %s\n", domain->name); |
fa40f377 | 227 | return domain; |
a8db8cf0 | 228 | } |
fa40f377 | 229 | EXPORT_SYMBOL_GPL(__irq_domain_add); |
a8db8cf0 | 230 | |
58ee99ad PM |
231 | /** |
232 | * irq_domain_remove() - Remove an irq domain. | |
233 | * @domain: domain to remove | |
234 | * | |
235 | * This routine is used to remove an irq domain. The caller must ensure | |
236 | * that all mappings within the domain have been disposed of prior to | |
237 | * use, depending on the revmap type. | |
238 | */ | |
239 | void irq_domain_remove(struct irq_domain *domain) | |
240 | { | |
241 | mutex_lock(&irq_domain_mutex); | |
087cdfb6 | 242 | debugfs_remove_domain_dir(domain); |
58ee99ad | 243 | |
e9256efc | 244 | WARN_ON(!radix_tree_empty(&domain->revmap_tree)); |
58ee99ad PM |
245 | |
246 | list_del(&domain->link); | |
247 | ||
248 | /* | |
249 | * If the going away domain is the default one, reset it. | |
250 | */ | |
251 | if (unlikely(irq_default_domain == domain)) | |
252 | irq_set_default_host(NULL); | |
253 | ||
254 | mutex_unlock(&irq_domain_mutex); | |
255 | ||
1aa0dd94 | 256 | pr_debug("Removed domain %s\n", domain->name); |
58ee99ad | 257 | |
5d4c9bc7 | 258 | of_node_put(irq_domain_get_of_node(domain)); |
d59f6617 TG |
259 | if (domain->flags & IRQ_DOMAIN_NAME_ALLOCATED) |
260 | kfree(domain->name); | |
fa40f377 | 261 | kfree(domain); |
58ee99ad | 262 | } |
ecd84eb2 | 263 | EXPORT_SYMBOL_GPL(irq_domain_remove); |
58ee99ad | 264 | |
61d0a000 MZ |
265 | void irq_domain_update_bus_token(struct irq_domain *domain, |
266 | enum irq_domain_bus_token bus_token) | |
267 | { | |
268 | char *name; | |
269 | ||
270 | if (domain->bus_token == bus_token) | |
271 | return; | |
272 | ||
273 | mutex_lock(&irq_domain_mutex); | |
274 | ||
275 | domain->bus_token = bus_token; | |
276 | ||
277 | name = kasprintf(GFP_KERNEL, "%s-%d", domain->name, bus_token); | |
278 | if (!name) { | |
279 | mutex_unlock(&irq_domain_mutex); | |
280 | return; | |
281 | } | |
282 | ||
283 | debugfs_remove_domain_dir(domain); | |
284 | ||
285 | if (domain->flags & IRQ_DOMAIN_NAME_ALLOCATED) | |
286 | kfree(domain->name); | |
287 | else | |
288 | domain->flags |= IRQ_DOMAIN_NAME_ALLOCATED; | |
289 | ||
290 | domain->name = name; | |
291 | debugfs_add_domain_dir(domain); | |
292 | ||
293 | mutex_unlock(&irq_domain_mutex); | |
294 | } | |
295 | ||
781d0f46 | 296 | /** |
fa40f377 | 297 | * irq_domain_add_simple() - Register an irq_domain and optionally map a range of irqs |
781d0f46 MB |
298 | * @of_node: pointer to interrupt controller's device tree node. |
299 | * @size: total number of irqs in mapping | |
94a63da0 | 300 | * @first_irq: first number of irq block assigned to the domain, |
fa40f377 GL |
301 | * pass zero to assign irqs on-the-fly. If first_irq is non-zero, then |
302 | * pre-map all of the irqs in the domain to virqs starting at first_irq. | |
f8264e34 | 303 | * @ops: domain callbacks |
781d0f46 MB |
304 | * @host_data: Controller private data pointer |
305 | * | |
fa40f377 GL |
306 | * Allocates an irq_domain, and optionally if first_irq is positive then also |
307 | * allocate irq_descs and map all of the hwirqs to virqs starting at first_irq. | |
781d0f46 MB |
308 | * |
309 | * This is intended to implement the expected behaviour for most | |
fa40f377 GL |
310 | * interrupt controllers. If device tree is used, then first_irq will be 0 and |
311 | * irqs get mapped dynamically on the fly. However, if the controller requires | |
312 | * static virq assignments (non-DT boot) then it will set that up correctly. | |
781d0f46 MB |
313 | */ |
314 | struct irq_domain *irq_domain_add_simple(struct device_node *of_node, | |
315 | unsigned int size, | |
316 | unsigned int first_irq, | |
317 | const struct irq_domain_ops *ops, | |
318 | void *host_data) | |
319 | { | |
fa40f377 GL |
320 | struct irq_domain *domain; |
321 | ||
1bf4ddc4 | 322 | domain = __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data); |
fa40f377 GL |
323 | if (!domain) |
324 | return NULL; | |
2854d167 | 325 | |
fa40f377 | 326 | if (first_irq > 0) { |
2854d167 | 327 | if (IS_ENABLED(CONFIG_SPARSE_IRQ)) { |
fa40f377 GL |
328 | /* attempt to allocated irq_descs */ |
329 | int rc = irq_alloc_descs(first_irq, first_irq, size, | |
330 | of_node_to_nid(of_node)); | |
331 | if (rc < 0) | |
d202b7b9 LW |
332 | pr_info("Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", |
333 | first_irq); | |
fa40f377 | 334 | } |
ddaf144c | 335 | irq_domain_associate_many(domain, first_irq, 0, size); |
2854d167 LW |
336 | } |
337 | ||
fa40f377 | 338 | return domain; |
781d0f46 | 339 | } |
346dbb79 | 340 | EXPORT_SYMBOL_GPL(irq_domain_add_simple); |
781d0f46 | 341 | |
a8db8cf0 GL |
342 | /** |
343 | * irq_domain_add_legacy() - Allocate and register a legacy revmap irq_domain. | |
344 | * @of_node: pointer to interrupt controller's device tree node. | |
1bc04f2c GL |
345 | * @size: total number of irqs in legacy mapping |
346 | * @first_irq: first number of irq block assigned to the domain | |
347 | * @first_hwirq: first hwirq number to use for the translation. Should normally | |
348 | * be '0', but a positive integer can be used if the effective | |
349 | * hwirqs numbering does not begin at zero. | |
a8db8cf0 GL |
350 | * @ops: map/unmap domain callbacks |
351 | * @host_data: Controller private data pointer | |
352 | * | |
353 | * Note: the map() callback will be called before this function returns | |
354 | * for all legacy interrupts except 0 (which is always the invalid irq for | |
355 | * a legacy controller). | |
356 | */ | |
357 | struct irq_domain *irq_domain_add_legacy(struct device_node *of_node, | |
1bc04f2c GL |
358 | unsigned int size, |
359 | unsigned int first_irq, | |
360 | irq_hw_number_t first_hwirq, | |
a18dc81b | 361 | const struct irq_domain_ops *ops, |
a8db8cf0 GL |
362 | void *host_data) |
363 | { | |
1bc04f2c | 364 | struct irq_domain *domain; |
a8db8cf0 | 365 | |
1bf4ddc4 | 366 | domain = __irq_domain_add(of_node_to_fwnode(of_node), first_hwirq + size, |
ddaf144c | 367 | first_hwirq + size, 0, ops, host_data); |
f8264e34 JL |
368 | if (domain) |
369 | irq_domain_associate_many(domain, first_irq, first_hwirq, size); | |
1bc04f2c | 370 | |
a8db8cf0 GL |
371 | return domain; |
372 | } | |
ecd84eb2 | 373 | EXPORT_SYMBOL_GPL(irq_domain_add_legacy); |
a8db8cf0 | 374 | |
cc79ca69 | 375 | /** |
651e8b54 MZ |
376 | * irq_find_matching_fwspec() - Locates a domain for a given fwspec |
377 | * @fwspec: FW specifier for an interrupt | |
ad3aedfb | 378 | * @bus_token: domain-specific data |
cc79ca69 | 379 | */ |
651e8b54 | 380 | struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, |
130b8c6c | 381 | enum irq_domain_bus_token bus_token) |
cc79ca69 GL |
382 | { |
383 | struct irq_domain *h, *found = NULL; | |
651e8b54 | 384 | struct fwnode_handle *fwnode = fwspec->fwnode; |
a18dc81b | 385 | int rc; |
cc79ca69 GL |
386 | |
387 | /* We might want to match the legacy controller last since | |
388 | * it might potentially be set to match all interrupts in | |
389 | * the absence of a device node. This isn't a problem so far | |
390 | * yet though... | |
ad3aedfb MZ |
391 | * |
392 | * bus_token == DOMAIN_BUS_ANY matches any domain, any other | |
393 | * values must generate an exact match for the domain to be | |
394 | * selected. | |
cc79ca69 GL |
395 | */ |
396 | mutex_lock(&irq_domain_mutex); | |
a18dc81b | 397 | list_for_each_entry(h, &irq_domain_list, link) { |
651e8b54 MZ |
398 | if (h->ops->select && fwspec->param_count) |
399 | rc = h->ops->select(h, fwspec, bus_token); | |
400 | else if (h->ops->match) | |
130b8c6c | 401 | rc = h->ops->match(h, to_of_node(fwnode), bus_token); |
a18dc81b | 402 | else |
130b8c6c | 403 | rc = ((fwnode != NULL) && (h->fwnode == fwnode) && |
ad3aedfb MZ |
404 | ((bus_token == DOMAIN_BUS_ANY) || |
405 | (h->bus_token == bus_token))); | |
a18dc81b GL |
406 | |
407 | if (rc) { | |
cc79ca69 GL |
408 | found = h; |
409 | break; | |
410 | } | |
a18dc81b | 411 | } |
cc79ca69 GL |
412 | mutex_unlock(&irq_domain_mutex); |
413 | return found; | |
414 | } | |
651e8b54 | 415 | EXPORT_SYMBOL_GPL(irq_find_matching_fwspec); |
cc79ca69 | 416 | |
c7b41f0a EA |
417 | /** |
418 | * irq_domain_check_msi_remap - Check whether all MSI irq domains implement | |
419 | * IRQ remapping | |
420 | * | |
421 | * Return: false if any MSI irq domain does not support IRQ remapping, | |
422 | * true otherwise (including if there is no MSI irq domain) | |
423 | */ | |
424 | bool irq_domain_check_msi_remap(void) | |
425 | { | |
426 | struct irq_domain *h; | |
427 | bool ret = true; | |
428 | ||
429 | mutex_lock(&irq_domain_mutex); | |
430 | list_for_each_entry(h, &irq_domain_list, link) { | |
431 | if (irq_domain_is_msi(h) && | |
432 | !irq_domain_hierarchical_is_msi_remap(h)) { | |
433 | ret = false; | |
434 | break; | |
435 | } | |
436 | } | |
437 | mutex_unlock(&irq_domain_mutex); | |
438 | return ret; | |
439 | } | |
440 | EXPORT_SYMBOL_GPL(irq_domain_check_msi_remap); | |
441 | ||
cc79ca69 GL |
442 | /** |
443 | * irq_set_default_host() - Set a "default" irq domain | |
68700650 | 444 | * @domain: default domain pointer |
cc79ca69 GL |
445 | * |
446 | * For convenience, it's possible to set a "default" domain that will be used | |
447 | * whenever NULL is passed to irq_create_mapping(). It makes life easier for | |
448 | * platforms that want to manipulate a few hard coded interrupt numbers that | |
449 | * aren't properly represented in the device-tree. | |
450 | */ | |
68700650 | 451 | void irq_set_default_host(struct irq_domain *domain) |
cc79ca69 | 452 | { |
54a90588 | 453 | pr_debug("Default domain set to @0x%p\n", domain); |
cc79ca69 | 454 | |
68700650 | 455 | irq_default_domain = domain; |
cc79ca69 | 456 | } |
ecd84eb2 | 457 | EXPORT_SYMBOL_GPL(irq_set_default_host); |
cc79ca69 | 458 | |
b526adfe DD |
459 | static void irq_domain_clear_mapping(struct irq_domain *domain, |
460 | irq_hw_number_t hwirq) | |
461 | { | |
462 | if (hwirq < domain->revmap_size) { | |
463 | domain->linear_revmap[hwirq] = 0; | |
464 | } else { | |
f1d78358 | 465 | mutex_lock(&domain->revmap_tree_mutex); |
b526adfe | 466 | radix_tree_delete(&domain->revmap_tree, hwirq); |
f1d78358 | 467 | mutex_unlock(&domain->revmap_tree_mutex); |
b526adfe DD |
468 | } |
469 | } | |
470 | ||
471 | static void irq_domain_set_mapping(struct irq_domain *domain, | |
472 | irq_hw_number_t hwirq, | |
473 | struct irq_data *irq_data) | |
474 | { | |
475 | if (hwirq < domain->revmap_size) { | |
476 | domain->linear_revmap[hwirq] = irq_data->irq; | |
477 | } else { | |
f1d78358 | 478 | mutex_lock(&domain->revmap_tree_mutex); |
b526adfe | 479 | radix_tree_insert(&domain->revmap_tree, hwirq, irq_data); |
f1d78358 | 480 | mutex_unlock(&domain->revmap_tree_mutex); |
b526adfe DD |
481 | } |
482 | } | |
483 | ||
43a77591 | 484 | void irq_domain_disassociate(struct irq_domain *domain, unsigned int irq) |
913af207 | 485 | { |
ddaf144c GL |
486 | struct irq_data *irq_data = irq_get_irq_data(irq); |
487 | irq_hw_number_t hwirq; | |
913af207 | 488 | |
ddaf144c GL |
489 | if (WARN(!irq_data || irq_data->domain != domain, |
490 | "virq%i doesn't exist; cannot disassociate\n", irq)) | |
491 | return; | |
913af207 | 492 | |
ddaf144c GL |
493 | hwirq = irq_data->hwirq; |
494 | irq_set_status_flags(irq, IRQ_NOREQUEST); | |
913af207 | 495 | |
ddaf144c GL |
496 | /* remove chip and handler */ |
497 | irq_set_chip_and_handler(irq, NULL, NULL); | |
913af207 | 498 | |
ddaf144c GL |
499 | /* Make sure it's completed */ |
500 | synchronize_irq(irq); | |
913af207 | 501 | |
ddaf144c GL |
502 | /* Tell the PIC about it */ |
503 | if (domain->ops->unmap) | |
504 | domain->ops->unmap(domain, irq); | |
505 | smp_mb(); | |
913af207 | 506 | |
ddaf144c GL |
507 | irq_data->domain = NULL; |
508 | irq_data->hwirq = 0; | |
9dc6be3d | 509 | domain->mapcount--; |
913af207 | 510 | |
ddaf144c | 511 | /* Clear reverse map for this hwirq */ |
b526adfe | 512 | irq_domain_clear_mapping(domain, hwirq); |
913af207 GL |
513 | } |
514 | ||
ddaf144c GL |
515 | int irq_domain_associate(struct irq_domain *domain, unsigned int virq, |
516 | irq_hw_number_t hwirq) | |
cc79ca69 | 517 | { |
ddaf144c GL |
518 | struct irq_data *irq_data = irq_get_irq_data(virq); |
519 | int ret; | |
cc79ca69 | 520 | |
ddaf144c GL |
521 | if (WARN(hwirq >= domain->hwirq_max, |
522 | "error: hwirq 0x%x is too large for %s\n", (int)hwirq, domain->name)) | |
523 | return -EINVAL; | |
524 | if (WARN(!irq_data, "error: virq%i is not allocated", virq)) | |
525 | return -EINVAL; | |
526 | if (WARN(irq_data->domain, "error: virq%i is already associated", virq)) | |
527 | return -EINVAL; | |
cc79ca69 | 528 | |
ddaf144c GL |
529 | mutex_lock(&irq_domain_mutex); |
530 | irq_data->hwirq = hwirq; | |
531 | irq_data->domain = domain; | |
532 | if (domain->ops->map) { | |
533 | ret = domain->ops->map(domain, virq, hwirq); | |
534 | if (ret != 0) { | |
535 | /* | |
536 | * If map() returns -EPERM, this interrupt is protected | |
537 | * by the firmware or some other service and shall not | |
538 | * be mapped. Don't bother telling the user about it. | |
539 | */ | |
540 | if (ret != -EPERM) { | |
541 | pr_info("%s didn't like hwirq-0x%lx to VIRQ%i mapping (rc=%d)\n", | |
542 | domain->name, hwirq, virq, ret); | |
f5a1ad05 | 543 | } |
ddaf144c GL |
544 | irq_data->domain = NULL; |
545 | irq_data->hwirq = 0; | |
546 | mutex_unlock(&irq_domain_mutex); | |
547 | return ret; | |
98aa468e GL |
548 | } |
549 | ||
ddaf144c GL |
550 | /* If not already assigned, give the domain the chip's name */ |
551 | if (!domain->name && irq_data->chip) | |
552 | domain->name = irq_data->chip->name; | |
553 | } | |
2a71a1a9 | 554 | |
9dc6be3d | 555 | domain->mapcount++; |
b526adfe | 556 | irq_domain_set_mapping(domain, hwirq, irq_data); |
ddaf144c GL |
557 | mutex_unlock(&irq_domain_mutex); |
558 | ||
559 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
cc79ca69 GL |
560 | |
561 | return 0; | |
562 | } | |
ddaf144c | 563 | EXPORT_SYMBOL_GPL(irq_domain_associate); |
98aa468e | 564 | |
ddaf144c GL |
565 | void irq_domain_associate_many(struct irq_domain *domain, unsigned int irq_base, |
566 | irq_hw_number_t hwirq_base, int count) | |
567 | { | |
5d4c9bc7 | 568 | struct device_node *of_node; |
ddaf144c GL |
569 | int i; |
570 | ||
5d4c9bc7 | 571 | of_node = irq_domain_get_of_node(domain); |
ddaf144c | 572 | pr_debug("%s(%s, irqbase=%i, hwbase=%i, count=%i)\n", __func__, |
5d4c9bc7 | 573 | of_node_full_name(of_node), irq_base, (int)hwirq_base, count); |
ddaf144c GL |
574 | |
575 | for (i = 0; i < count; i++) { | |
576 | irq_domain_associate(domain, irq_base + i, hwirq_base + i); | |
577 | } | |
cc79ca69 | 578 | } |
98aa468e | 579 | EXPORT_SYMBOL_GPL(irq_domain_associate_many); |
cc79ca69 GL |
580 | |
581 | /** | |
582 | * irq_create_direct_mapping() - Allocate an irq for direct mapping | |
68700650 | 583 | * @domain: domain to allocate the irq for or NULL for default domain |
cc79ca69 GL |
584 | * |
585 | * This routine is used for irq controllers which can choose the hardware | |
586 | * interrupt numbers they generate. In such a case it's simplest to use | |
1aa0dd94 GL |
587 | * the linux irq as the hardware interrupt number. It still uses the linear |
588 | * or radix tree to store the mapping, but the irq controller can optimize | |
589 | * the revmap path by using the hwirq directly. | |
cc79ca69 | 590 | */ |
68700650 | 591 | unsigned int irq_create_direct_mapping(struct irq_domain *domain) |
cc79ca69 | 592 | { |
5d4c9bc7 | 593 | struct device_node *of_node; |
cc79ca69 GL |
594 | unsigned int virq; |
595 | ||
68700650 GL |
596 | if (domain == NULL) |
597 | domain = irq_default_domain; | |
cc79ca69 | 598 | |
5d4c9bc7 MZ |
599 | of_node = irq_domain_get_of_node(domain); |
600 | virq = irq_alloc_desc_from(1, of_node_to_nid(of_node)); | |
03848373 | 601 | if (!virq) { |
54a90588 | 602 | pr_debug("create_direct virq allocation failed\n"); |
03848373 | 603 | return 0; |
cc79ca69 | 604 | } |
1aa0dd94 | 605 | if (virq >= domain->revmap_direct_max_irq) { |
cc79ca69 | 606 | pr_err("ERROR: no free irqs available below %i maximum\n", |
1aa0dd94 | 607 | domain->revmap_direct_max_irq); |
cc79ca69 GL |
608 | irq_free_desc(virq); |
609 | return 0; | |
610 | } | |
54a90588 | 611 | pr_debug("create_direct obtained virq %d\n", virq); |
cc79ca69 | 612 | |
98aa468e | 613 | if (irq_domain_associate(domain, virq, virq)) { |
cc79ca69 | 614 | irq_free_desc(virq); |
03848373 | 615 | return 0; |
cc79ca69 GL |
616 | } |
617 | ||
618 | return virq; | |
619 | } | |
ecd84eb2 | 620 | EXPORT_SYMBOL_GPL(irq_create_direct_mapping); |
cc79ca69 GL |
621 | |
622 | /** | |
623 | * irq_create_mapping() - Map a hardware interrupt into linux irq space | |
68700650 GL |
624 | * @domain: domain owning this hardware interrupt or NULL for default domain |
625 | * @hwirq: hardware irq number in that domain space | |
cc79ca69 GL |
626 | * |
627 | * Only one mapping per hardware interrupt is permitted. Returns a linux | |
628 | * irq number. | |
629 | * If the sense/trigger is to be specified, set_irq_type() should be called | |
630 | * on the number returned from that call. | |
631 | */ | |
68700650 | 632 | unsigned int irq_create_mapping(struct irq_domain *domain, |
cc79ca69 GL |
633 | irq_hw_number_t hwirq) |
634 | { | |
5d4c9bc7 | 635 | struct device_node *of_node; |
5b7526e3 | 636 | int virq; |
cc79ca69 | 637 | |
54a90588 | 638 | pr_debug("irq_create_mapping(0x%p, 0x%lx)\n", domain, hwirq); |
cc79ca69 | 639 | |
68700650 GL |
640 | /* Look for default domain if nececssary */ |
641 | if (domain == NULL) | |
642 | domain = irq_default_domain; | |
643 | if (domain == NULL) { | |
798f0fd1 | 644 | WARN(1, "%s(, %lx) called with NULL domain\n", __func__, hwirq); |
03848373 | 645 | return 0; |
cc79ca69 | 646 | } |
54a90588 | 647 | pr_debug("-> using domain @%p\n", domain); |
cc79ca69 | 648 | |
5d4c9bc7 MZ |
649 | of_node = irq_domain_get_of_node(domain); |
650 | ||
cc79ca69 | 651 | /* Check if mapping already exists */ |
68700650 | 652 | virq = irq_find_mapping(domain, hwirq); |
03848373 | 653 | if (virq) { |
54a90588 | 654 | pr_debug("-> existing mapping on virq %d\n", virq); |
cc79ca69 GL |
655 | return virq; |
656 | } | |
657 | ||
1bc04f2c | 658 | /* Allocate a virtual interrupt number */ |
06ee6d57 | 659 | virq = irq_domain_alloc_descs(-1, 1, hwirq, of_node_to_nid(of_node), NULL); |
5b7526e3 | 660 | if (virq <= 0) { |
54a90588 | 661 | pr_debug("-> virq allocation failed\n"); |
1bc04f2c | 662 | return 0; |
cc79ca69 GL |
663 | } |
664 | ||
98aa468e | 665 | if (irq_domain_associate(domain, virq, hwirq)) { |
73255704 | 666 | irq_free_desc(virq); |
03848373 | 667 | return 0; |
cc79ca69 GL |
668 | } |
669 | ||
54a90588 | 670 | pr_debug("irq %lu on domain %s mapped to virtual irq %u\n", |
5d4c9bc7 | 671 | hwirq, of_node_full_name(of_node), virq); |
cc79ca69 GL |
672 | |
673 | return virq; | |
674 | } | |
675 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
676 | ||
98aa468e GL |
677 | /** |
678 | * irq_create_strict_mappings() - Map a range of hw irqs to fixed linux irqs | |
679 | * @domain: domain owning the interrupt range | |
680 | * @irq_base: beginning of linux IRQ range | |
681 | * @hwirq_base: beginning of hardware IRQ range | |
682 | * @count: Number of interrupts to map | |
683 | * | |
684 | * This routine is used for allocating and mapping a range of hardware | |
685 | * irqs to linux irqs where the linux irq numbers are at pre-defined | |
686 | * locations. For use by controllers that already have static mappings | |
687 | * to insert in to the domain. | |
688 | * | |
689 | * Non-linear users can use irq_create_identity_mapping() for IRQ-at-a-time | |
690 | * domain insertion. | |
691 | * | |
692 | * 0 is returned upon success, while any failure to establish a static | |
693 | * mapping is treated as an error. | |
694 | */ | |
695 | int irq_create_strict_mappings(struct irq_domain *domain, unsigned int irq_base, | |
696 | irq_hw_number_t hwirq_base, int count) | |
697 | { | |
5d4c9bc7 | 698 | struct device_node *of_node; |
98aa468e GL |
699 | int ret; |
700 | ||
5d4c9bc7 | 701 | of_node = irq_domain_get_of_node(domain); |
98aa468e | 702 | ret = irq_alloc_descs(irq_base, irq_base, count, |
5d4c9bc7 | 703 | of_node_to_nid(of_node)); |
98aa468e GL |
704 | if (unlikely(ret < 0)) |
705 | return ret; | |
706 | ||
ddaf144c | 707 | irq_domain_associate_many(domain, irq_base, hwirq_base, count); |
98aa468e GL |
708 | return 0; |
709 | } | |
710 | EXPORT_SYMBOL_GPL(irq_create_strict_mappings); | |
711 | ||
11e4438e MZ |
712 | static int irq_domain_translate(struct irq_domain *d, |
713 | struct irq_fwspec *fwspec, | |
714 | irq_hw_number_t *hwirq, unsigned int *type) | |
715 | { | |
716 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
717 | if (d->ops->translate) | |
718 | return d->ops->translate(d, fwspec, hwirq, type); | |
719 | #endif | |
720 | if (d->ops->xlate) | |
721 | return d->ops->xlate(d, to_of_node(fwspec->fwnode), | |
722 | fwspec->param, fwspec->param_count, | |
723 | hwirq, type); | |
724 | ||
725 | /* If domain has no translation, then we assume interrupt line */ | |
726 | *hwirq = fwspec->param[0]; | |
727 | return 0; | |
728 | } | |
729 | ||
730 | static void of_phandle_args_to_fwspec(struct of_phandle_args *irq_data, | |
731 | struct irq_fwspec *fwspec) | |
732 | { | |
733 | int i; | |
734 | ||
735 | fwspec->fwnode = irq_data->np ? &irq_data->np->fwnode : NULL; | |
736 | fwspec->param_count = irq_data->args_count; | |
737 | ||
738 | for (i = 0; i < irq_data->args_count; i++) | |
739 | fwspec->param[i] = irq_data->args[i]; | |
740 | } | |
741 | ||
c0131f09 | 742 | unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec) |
cc79ca69 | 743 | { |
68700650 | 744 | struct irq_domain *domain; |
1e2a7d78 | 745 | struct irq_data *irq_data; |
cc79ca69 GL |
746 | irq_hw_number_t hwirq; |
747 | unsigned int type = IRQ_TYPE_NONE; | |
f8264e34 | 748 | int virq; |
cc79ca69 | 749 | |
530cbe10 | 750 | if (fwspec->fwnode) { |
651e8b54 | 751 | domain = irq_find_matching_fwspec(fwspec, DOMAIN_BUS_WIRED); |
530cbe10 | 752 | if (!domain) |
651e8b54 | 753 | domain = irq_find_matching_fwspec(fwspec, DOMAIN_BUS_ANY); |
530cbe10 | 754 | } else { |
11e4438e | 755 | domain = irq_default_domain; |
530cbe10 | 756 | } |
11e4438e | 757 | |
68700650 | 758 | if (!domain) { |
798f0fd1 | 759 | pr_warn("no irq domain found for %s !\n", |
c0131f09 | 760 | of_node_full_name(to_of_node(fwspec->fwnode))); |
03848373 | 761 | return 0; |
cc79ca69 GL |
762 | } |
763 | ||
c0131f09 | 764 | if (irq_domain_translate(domain, fwspec, &hwirq, &type)) |
11e4438e | 765 | return 0; |
cc79ca69 | 766 | |
b62b2cf5 JH |
767 | /* |
768 | * WARN if the irqchip returns a type with bits | |
769 | * outside the sense mask set and clear these bits. | |
770 | */ | |
771 | if (WARN_ON(type & ~IRQ_TYPE_SENSE_MASK)) | |
772 | type &= IRQ_TYPE_SENSE_MASK; | |
773 | ||
774 | /* | |
775 | * If we've already configured this interrupt, | |
776 | * don't do it again, or hell will break loose. | |
777 | */ | |
778 | virq = irq_find_mapping(domain, hwirq); | |
779 | if (virq) { | |
0cc01aba | 780 | /* |
b62b2cf5 JH |
781 | * If the trigger type is not specified or matches the |
782 | * current trigger type then we are done so return the | |
783 | * interrupt number. | |
0cc01aba | 784 | */ |
b62b2cf5 | 785 | if (type == IRQ_TYPE_NONE || type == irq_get_trigger_type(virq)) |
0cc01aba YC |
786 | return virq; |
787 | ||
b62b2cf5 JH |
788 | /* |
789 | * If the trigger type has not been set yet, then set | |
790 | * it now and return the interrupt number. | |
791 | */ | |
792 | if (irq_get_trigger_type(virq) == IRQ_TYPE_NONE) { | |
1e2a7d78 JH |
793 | irq_data = irq_get_irq_data(virq); |
794 | if (!irq_data) | |
795 | return 0; | |
796 | ||
797 | irqd_set_trigger_type(irq_data, type); | |
b62b2cf5 JH |
798 | return virq; |
799 | } | |
800 | ||
801 | pr_warn("type mismatch, failed to map hwirq-%lu for %s!\n", | |
802 | hwirq, of_node_full_name(to_of_node(fwspec->fwnode))); | |
803 | return 0; | |
804 | } | |
805 | ||
806 | if (irq_domain_is_hierarchy(domain)) { | |
c0131f09 | 807 | virq = irq_domain_alloc_irqs(domain, 1, NUMA_NO_NODE, fwspec); |
0cc01aba YC |
808 | if (virq <= 0) |
809 | return 0; | |
810 | } else { | |
811 | /* Create mapping */ | |
812 | virq = irq_create_mapping(domain, hwirq); | |
813 | if (!virq) | |
814 | return virq; | |
815 | } | |
cc79ca69 | 816 | |
1e2a7d78 JH |
817 | irq_data = irq_get_irq_data(virq); |
818 | if (!irq_data) { | |
819 | if (irq_domain_is_hierarchy(domain)) | |
820 | irq_domain_free_irqs(virq, 1); | |
821 | else | |
822 | irq_dispose_mapping(virq); | |
823 | return 0; | |
824 | } | |
825 | ||
826 | /* Store trigger type */ | |
827 | irqd_set_trigger_type(irq_data, type); | |
828 | ||
cc79ca69 GL |
829 | return virq; |
830 | } | |
c0131f09 MZ |
831 | EXPORT_SYMBOL_GPL(irq_create_fwspec_mapping); |
832 | ||
833 | unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data) | |
834 | { | |
835 | struct irq_fwspec fwspec; | |
836 | ||
837 | of_phandle_args_to_fwspec(irq_data, &fwspec); | |
838 | return irq_create_fwspec_mapping(&fwspec); | |
839 | } | |
cc79ca69 GL |
840 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
841 | ||
842 | /** | |
843 | * irq_dispose_mapping() - Unmap an interrupt | |
844 | * @virq: linux irq number of the interrupt to unmap | |
845 | */ | |
846 | void irq_dispose_mapping(unsigned int virq) | |
847 | { | |
848 | struct irq_data *irq_data = irq_get_irq_data(virq); | |
68700650 | 849 | struct irq_domain *domain; |
cc79ca69 | 850 | |
03848373 | 851 | if (!virq || !irq_data) |
cc79ca69 GL |
852 | return; |
853 | ||
68700650 GL |
854 | domain = irq_data->domain; |
855 | if (WARN_ON(domain == NULL)) | |
cc79ca69 GL |
856 | return; |
857 | ||
d16dcd3d JH |
858 | if (irq_domain_is_hierarchy(domain)) { |
859 | irq_domain_free_irqs(virq, 1); | |
860 | } else { | |
861 | irq_domain_disassociate(domain, virq); | |
862 | irq_free_desc(virq); | |
863 | } | |
cc79ca69 GL |
864 | } |
865 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); | |
866 | ||
867 | /** | |
868 | * irq_find_mapping() - Find a linux irq from an hw irq number. | |
68700650 GL |
869 | * @domain: domain owning this hardware interrupt |
870 | * @hwirq: hardware irq number in that domain space | |
cc79ca69 | 871 | */ |
68700650 | 872 | unsigned int irq_find_mapping(struct irq_domain *domain, |
cc79ca69 GL |
873 | irq_hw_number_t hwirq) |
874 | { | |
4c0946c4 | 875 | struct irq_data *data; |
cc79ca69 | 876 | |
68700650 GL |
877 | /* Look for default domain if nececssary */ |
878 | if (domain == NULL) | |
879 | domain = irq_default_domain; | |
880 | if (domain == NULL) | |
03848373 | 881 | return 0; |
cc79ca69 | 882 | |
1aa0dd94 | 883 | if (hwirq < domain->revmap_direct_max_irq) { |
f8264e34 JL |
884 | data = irq_domain_get_irq_data(domain, hwirq); |
885 | if (data && data->hwirq == hwirq) | |
4c0946c4 | 886 | return hwirq; |
4c0946c4 GL |
887 | } |
888 | ||
d3dcb436 GL |
889 | /* Check if the hwirq is in the linear revmap. */ |
890 | if (hwirq < domain->revmap_size) | |
891 | return domain->linear_revmap[hwirq]; | |
cc79ca69 | 892 | |
d3dcb436 GL |
893 | rcu_read_lock(); |
894 | data = radix_tree_lookup(&domain->revmap_tree, hwirq); | |
895 | rcu_read_unlock(); | |
896 | return data ? data->irq : 0; | |
cc79ca69 | 897 | } |
cc79ca69 | 898 | EXPORT_SYMBOL_GPL(irq_find_mapping); |
cc79ca69 | 899 | |
092b2fb0 | 900 | #ifdef CONFIG_IRQ_DOMAIN_DEBUG |
fe17a42e MZ |
901 | static void virq_debug_show_one(struct seq_file *m, struct irq_desc *desc) |
902 | { | |
903 | struct irq_domain *domain; | |
904 | struct irq_data *data; | |
905 | ||
906 | domain = desc->irq_data.domain; | |
907 | data = &desc->irq_data; | |
908 | ||
909 | while (domain) { | |
910 | unsigned int irq = data->irq; | |
911 | unsigned long hwirq = data->hwirq; | |
912 | struct irq_chip *chip; | |
913 | bool direct; | |
914 | ||
915 | if (data == &desc->irq_data) | |
916 | seq_printf(m, "%5d ", irq); | |
917 | else | |
918 | seq_printf(m, "%5d+ ", irq); | |
919 | seq_printf(m, "0x%05lx ", hwirq); | |
920 | ||
921 | chip = irq_data_get_irq_chip(data); | |
922 | seq_printf(m, "%-15s ", (chip && chip->name) ? chip->name : "none"); | |
923 | ||
306eb5a3 | 924 | seq_printf(m, "0x%p ", irq_data_get_irq_chip_data(data)); |
fe17a42e MZ |
925 | |
926 | seq_printf(m, " %c ", (desc->action && desc->action->handler) ? '*' : ' '); | |
927 | direct = (irq == hwirq) && (irq < domain->revmap_direct_max_irq); | |
928 | seq_printf(m, "%6s%-8s ", | |
929 | (hwirq < domain->revmap_size) ? "LINEAR" : "RADIX", | |
930 | direct ? "(DIRECT)" : ""); | |
931 | seq_printf(m, "%s\n", domain->name); | |
932 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
933 | domain = domain->parent; | |
934 | data = data->parent_data; | |
935 | #else | |
936 | domain = NULL; | |
937 | #endif | |
938 | } | |
939 | } | |
940 | ||
cc79ca69 GL |
941 | static int virq_debug_show(struct seq_file *m, void *private) |
942 | { | |
943 | unsigned long flags; | |
944 | struct irq_desc *desc; | |
1400ea86 GL |
945 | struct irq_domain *domain; |
946 | struct radix_tree_iter iter; | |
d03cc2d8 | 947 | void __rcu **slot; |
cc79ca69 GL |
948 | int i; |
949 | ||
1400ea86 GL |
950 | seq_printf(m, " %-16s %-6s %-10s %-10s %s\n", |
951 | "name", "mapped", "linear-max", "direct-max", "devtree-node"); | |
952 | mutex_lock(&irq_domain_mutex); | |
953 | list_for_each_entry(domain, &irq_domain_list, link) { | |
5d4c9bc7 | 954 | struct device_node *of_node; |
2370c00d MZ |
955 | const char *name; |
956 | ||
1400ea86 | 957 | int count = 0; |
2370c00d | 958 | |
5d4c9bc7 | 959 | of_node = irq_domain_get_of_node(domain); |
2370c00d MZ |
960 | if (of_node) |
961 | name = of_node_full_name(of_node); | |
962 | else if (is_fwnode_irqchip(domain->fwnode)) | |
963 | name = container_of(domain->fwnode, struct irqchip_fwid, | |
964 | fwnode)->name; | |
965 | else | |
966 | name = ""; | |
967 | ||
1400ea86 GL |
968 | radix_tree_for_each_slot(slot, &domain->revmap_tree, &iter, 0) |
969 | count++; | |
970 | seq_printf(m, "%c%-16s %6u %10u %10u %s\n", | |
971 | domain == irq_default_domain ? '*' : ' ', domain->name, | |
972 | domain->revmap_size + count, domain->revmap_size, | |
973 | domain->revmap_direct_max_irq, | |
2370c00d | 974 | name); |
1400ea86 GL |
975 | } |
976 | mutex_unlock(&irq_domain_mutex); | |
977 | ||
978 | seq_printf(m, "%-5s %-7s %-15s %-*s %6s %-14s %s\n", "irq", "hwirq", | |
5269a9ab | 979 | "chip name", (int)(2 * sizeof(void *) + 2), "chip data", |
1400ea86 | 980 | "active", "type", "domain"); |
cc79ca69 GL |
981 | |
982 | for (i = 1; i < nr_irqs; i++) { | |
983 | desc = irq_to_desc(i); | |
984 | if (!desc) | |
985 | continue; | |
986 | ||
987 | raw_spin_lock_irqsave(&desc->lock, flags); | |
fe17a42e | 988 | virq_debug_show_one(m, desc); |
cc79ca69 GL |
989 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
990 | } | |
991 | ||
992 | return 0; | |
993 | } | |
994 | ||
995 | static int virq_debug_open(struct inode *inode, struct file *file) | |
996 | { | |
997 | return single_open(file, virq_debug_show, inode->i_private); | |
998 | } | |
999 | ||
1000 | static const struct file_operations virq_debug_fops = { | |
1001 | .open = virq_debug_open, | |
1002 | .read = seq_read, | |
1003 | .llseek = seq_lseek, | |
1004 | .release = single_release, | |
1005 | }; | |
1006 | ||
1007 | static int __init irq_debugfs_init(void) | |
1008 | { | |
092b2fb0 | 1009 | if (debugfs_create_file("irq_domain_mapping", S_IRUGO, NULL, |
cc79ca69 GL |
1010 | NULL, &virq_debug_fops) == NULL) |
1011 | return -ENOMEM; | |
1012 | ||
1013 | return 0; | |
1014 | } | |
1015 | __initcall(irq_debugfs_init); | |
092b2fb0 | 1016 | #endif /* CONFIG_IRQ_DOMAIN_DEBUG */ |
cc79ca69 | 1017 | |
16b2e6e2 GL |
1018 | /** |
1019 | * irq_domain_xlate_onecell() - Generic xlate for direct one cell bindings | |
1020 | * | |
1021 | * Device Tree IRQ specifier translation function which works with one cell | |
1022 | * bindings where the cell value maps directly to the hwirq number. | |
1023 | */ | |
1024 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
1025 | const u32 *intspec, unsigned int intsize, | |
1026 | unsigned long *out_hwirq, unsigned int *out_type) | |
7e713301 | 1027 | { |
16b2e6e2 | 1028 | if (WARN_ON(intsize < 1)) |
7e713301 | 1029 | return -EINVAL; |
7e713301 GL |
1030 | *out_hwirq = intspec[0]; |
1031 | *out_type = IRQ_TYPE_NONE; | |
7e713301 GL |
1032 | return 0; |
1033 | } | |
16b2e6e2 GL |
1034 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onecell); |
1035 | ||
1036 | /** | |
1037 | * irq_domain_xlate_twocell() - Generic xlate for direct two cell bindings | |
1038 | * | |
1039 | * Device Tree IRQ specifier translation function which works with two cell | |
1040 | * bindings where the cell values map directly to the hwirq number | |
1041 | * and linux irq flags. | |
1042 | */ | |
1043 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, | |
1044 | const u32 *intspec, unsigned int intsize, | |
1045 | irq_hw_number_t *out_hwirq, unsigned int *out_type) | |
1046 | { | |
1047 | if (WARN_ON(intsize < 2)) | |
1048 | return -EINVAL; | |
1049 | *out_hwirq = intspec[0]; | |
1050 | *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; | |
1051 | return 0; | |
1052 | } | |
1053 | EXPORT_SYMBOL_GPL(irq_domain_xlate_twocell); | |
1054 | ||
1055 | /** | |
1056 | * irq_domain_xlate_onetwocell() - Generic xlate for one or two cell bindings | |
1057 | * | |
1058 | * Device Tree IRQ specifier translation function which works with either one | |
1059 | * or two cell bindings where the cell values map directly to the hwirq number | |
1060 | * and linux irq flags. | |
1061 | * | |
1062 | * Note: don't use this function unless your interrupt controller explicitly | |
1063 | * supports both one and two cell bindings. For the majority of controllers | |
1064 | * the _onecell() or _twocell() variants above should be used. | |
1065 | */ | |
1066 | int irq_domain_xlate_onetwocell(struct irq_domain *d, | |
1067 | struct device_node *ctrlr, | |
1068 | const u32 *intspec, unsigned int intsize, | |
1069 | unsigned long *out_hwirq, unsigned int *out_type) | |
1070 | { | |
1071 | if (WARN_ON(intsize < 1)) | |
1072 | return -EINVAL; | |
1073 | *out_hwirq = intspec[0]; | |
0c228919 SF |
1074 | if (intsize > 1) |
1075 | *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; | |
1076 | else | |
1077 | *out_type = IRQ_TYPE_NONE; | |
16b2e6e2 GL |
1078 | return 0; |
1079 | } | |
1080 | EXPORT_SYMBOL_GPL(irq_domain_xlate_onetwocell); | |
7e713301 | 1081 | |
a18dc81b | 1082 | const struct irq_domain_ops irq_domain_simple_ops = { |
16b2e6e2 | 1083 | .xlate = irq_domain_xlate_onetwocell, |
75294957 GL |
1084 | }; |
1085 | EXPORT_SYMBOL_GPL(irq_domain_simple_ops); | |
f8264e34 | 1086 | |
ac0a0cd2 | 1087 | int irq_domain_alloc_descs(int virq, unsigned int cnt, irq_hw_number_t hwirq, |
06ee6d57 | 1088 | int node, const struct cpumask *affinity) |
f8264e34 JL |
1089 | { |
1090 | unsigned int hint; | |
1091 | ||
1092 | if (virq >= 0) { | |
06ee6d57 TG |
1093 | virq = __irq_alloc_descs(virq, virq, cnt, node, THIS_MODULE, |
1094 | affinity); | |
f8264e34 JL |
1095 | } else { |
1096 | hint = hwirq % nr_irqs; | |
1097 | if (hint == 0) | |
1098 | hint++; | |
06ee6d57 TG |
1099 | virq = __irq_alloc_descs(-1, hint, cnt, node, THIS_MODULE, |
1100 | affinity); | |
1101 | if (virq <= 0 && hint > 1) { | |
1102 | virq = __irq_alloc_descs(-1, 1, cnt, node, THIS_MODULE, | |
1103 | affinity); | |
1104 | } | |
f8264e34 JL |
1105 | } |
1106 | ||
1107 | return virq; | |
1108 | } | |
1109 | ||
1110 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
afb7da83 | 1111 | /** |
2a5e9a07 | 1112 | * irq_domain_create_hierarchy - Add a irqdomain into the hierarchy |
afb7da83 JL |
1113 | * @parent: Parent irq domain to associate with the new domain |
1114 | * @flags: Irq domain flags associated to the domain | |
1115 | * @size: Size of the domain. See below | |
2a5e9a07 | 1116 | * @fwnode: Optional fwnode of the interrupt controller |
afb7da83 JL |
1117 | * @ops: Pointer to the interrupt domain callbacks |
1118 | * @host_data: Controller private data pointer | |
1119 | * | |
1120 | * If @size is 0 a tree domain is created, otherwise a linear domain. | |
1121 | * | |
1122 | * If successful the parent is associated to the new domain and the | |
1123 | * domain flags are set. | |
1124 | * Returns pointer to IRQ domain, or NULL on failure. | |
1125 | */ | |
2a5e9a07 | 1126 | struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, |
afb7da83 JL |
1127 | unsigned int flags, |
1128 | unsigned int size, | |
2a5e9a07 | 1129 | struct fwnode_handle *fwnode, |
afb7da83 JL |
1130 | const struct irq_domain_ops *ops, |
1131 | void *host_data) | |
1132 | { | |
1133 | struct irq_domain *domain; | |
1134 | ||
1135 | if (size) | |
2a5e9a07 | 1136 | domain = irq_domain_create_linear(fwnode, size, ops, host_data); |
afb7da83 | 1137 | else |
2a5e9a07 | 1138 | domain = irq_domain_create_tree(fwnode, ops, host_data); |
afb7da83 JL |
1139 | if (domain) { |
1140 | domain->parent = parent; | |
1141 | domain->flags |= flags; | |
1142 | } | |
1143 | ||
1144 | return domain; | |
1145 | } | |
52b2a05f | 1146 | EXPORT_SYMBOL_GPL(irq_domain_create_hierarchy); |
afb7da83 | 1147 | |
f8264e34 JL |
1148 | static void irq_domain_insert_irq(int virq) |
1149 | { | |
1150 | struct irq_data *data; | |
1151 | ||
1152 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
1153 | struct irq_domain *domain = data->domain; | |
f8264e34 | 1154 | |
9dc6be3d | 1155 | domain->mapcount++; |
b526adfe | 1156 | irq_domain_set_mapping(domain, data->hwirq, data); |
f8264e34 JL |
1157 | |
1158 | /* If not already assigned, give the domain the chip's name */ | |
1159 | if (!domain->name && data->chip) | |
1160 | domain->name = data->chip->name; | |
1161 | } | |
1162 | ||
1163 | irq_clear_status_flags(virq, IRQ_NOREQUEST); | |
1164 | } | |
1165 | ||
1166 | static void irq_domain_remove_irq(int virq) | |
1167 | { | |
1168 | struct irq_data *data; | |
1169 | ||
1170 | irq_set_status_flags(virq, IRQ_NOREQUEST); | |
1171 | irq_set_chip_and_handler(virq, NULL, NULL); | |
1172 | synchronize_irq(virq); | |
1173 | smp_mb(); | |
1174 | ||
1175 | for (data = irq_get_irq_data(virq); data; data = data->parent_data) { | |
1176 | struct irq_domain *domain = data->domain; | |
1177 | irq_hw_number_t hwirq = data->hwirq; | |
1178 | ||
9dc6be3d | 1179 | domain->mapcount--; |
b526adfe | 1180 | irq_domain_clear_mapping(domain, hwirq); |
f8264e34 JL |
1181 | } |
1182 | } | |
1183 | ||
1184 | static struct irq_data *irq_domain_insert_irq_data(struct irq_domain *domain, | |
1185 | struct irq_data *child) | |
1186 | { | |
1187 | struct irq_data *irq_data; | |
1188 | ||
6783011b JL |
1189 | irq_data = kzalloc_node(sizeof(*irq_data), GFP_KERNEL, |
1190 | irq_data_get_node(child)); | |
f8264e34 JL |
1191 | if (irq_data) { |
1192 | child->parent_data = irq_data; | |
1193 | irq_data->irq = child->irq; | |
0d0b4c86 | 1194 | irq_data->common = child->common; |
f8264e34 JL |
1195 | irq_data->domain = domain; |
1196 | } | |
1197 | ||
1198 | return irq_data; | |
1199 | } | |
1200 | ||
1201 | static void irq_domain_free_irq_data(unsigned int virq, unsigned int nr_irqs) | |
1202 | { | |
1203 | struct irq_data *irq_data, *tmp; | |
1204 | int i; | |
1205 | ||
1206 | for (i = 0; i < nr_irqs; i++) { | |
1207 | irq_data = irq_get_irq_data(virq + i); | |
1208 | tmp = irq_data->parent_data; | |
1209 | irq_data->parent_data = NULL; | |
1210 | irq_data->domain = NULL; | |
1211 | ||
1212 | while (tmp) { | |
1213 | irq_data = tmp; | |
1214 | tmp = tmp->parent_data; | |
1215 | kfree(irq_data); | |
1216 | } | |
1217 | } | |
1218 | } | |
1219 | ||
1220 | static int irq_domain_alloc_irq_data(struct irq_domain *domain, | |
1221 | unsigned int virq, unsigned int nr_irqs) | |
1222 | { | |
1223 | struct irq_data *irq_data; | |
1224 | struct irq_domain *parent; | |
1225 | int i; | |
1226 | ||
1227 | /* The outermost irq_data is embedded in struct irq_desc */ | |
1228 | for (i = 0; i < nr_irqs; i++) { | |
1229 | irq_data = irq_get_irq_data(virq + i); | |
1230 | irq_data->domain = domain; | |
1231 | ||
1232 | for (parent = domain->parent; parent; parent = parent->parent) { | |
1233 | irq_data = irq_domain_insert_irq_data(parent, irq_data); | |
1234 | if (!irq_data) { | |
1235 | irq_domain_free_irq_data(virq, i + 1); | |
1236 | return -ENOMEM; | |
1237 | } | |
1238 | } | |
1239 | } | |
1240 | ||
1241 | return 0; | |
1242 | } | |
1243 | ||
1244 | /** | |
1245 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain | |
1246 | * @domain: domain to match | |
1247 | * @virq: IRQ number to get irq_data | |
1248 | */ | |
1249 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
1250 | unsigned int virq) | |
1251 | { | |
1252 | struct irq_data *irq_data; | |
1253 | ||
1254 | for (irq_data = irq_get_irq_data(virq); irq_data; | |
1255 | irq_data = irq_data->parent_data) | |
1256 | if (irq_data->domain == domain) | |
1257 | return irq_data; | |
1258 | ||
1259 | return NULL; | |
1260 | } | |
a4289dc2 | 1261 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 JL |
1262 | |
1263 | /** | |
1264 | * irq_domain_set_hwirq_and_chip - Set hwirq and irqchip of @virq at @domain | |
1265 | * @domain: Interrupt domain to match | |
1266 | * @virq: IRQ number | |
1267 | * @hwirq: The hwirq number | |
1268 | * @chip: The associated interrupt chip | |
1269 | * @chip_data: The associated chip data | |
1270 | */ | |
1271 | int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, | |
1272 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1273 | void *chip_data) | |
1274 | { | |
1275 | struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); | |
1276 | ||
1277 | if (!irq_data) | |
1278 | return -ENOENT; | |
1279 | ||
1280 | irq_data->hwirq = hwirq; | |
1281 | irq_data->chip = chip ? chip : &no_irq_chip; | |
1282 | irq_data->chip_data = chip_data; | |
1283 | ||
1284 | return 0; | |
1285 | } | |
52b2a05f | 1286 | EXPORT_SYMBOL_GPL(irq_domain_set_hwirq_and_chip); |
f8264e34 | 1287 | |
1b537708 JL |
1288 | /** |
1289 | * irq_domain_set_info - Set the complete data for a @virq in @domain | |
1290 | * @domain: Interrupt domain to match | |
1291 | * @virq: IRQ number | |
1292 | * @hwirq: The hardware interrupt number | |
1293 | * @chip: The associated interrupt chip | |
1294 | * @chip_data: The associated interrupt chip data | |
1295 | * @handler: The interrupt flow handler | |
1296 | * @handler_data: The interrupt flow handler data | |
1297 | * @handler_name: The interrupt handler name | |
1298 | */ | |
1299 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
1300 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1301 | void *chip_data, irq_flow_handler_t handler, | |
1302 | void *handler_data, const char *handler_name) | |
1303 | { | |
1304 | irq_domain_set_hwirq_and_chip(domain, virq, hwirq, chip, chip_data); | |
1305 | __irq_set_handler(virq, handler, 0, handler_name); | |
1306 | irq_set_handler_data(virq, handler_data); | |
1307 | } | |
64bce3e8 | 1308 | EXPORT_SYMBOL(irq_domain_set_info); |
1b537708 | 1309 | |
f8264e34 JL |
1310 | /** |
1311 | * irq_domain_reset_irq_data - Clear hwirq, chip and chip_data in @irq_data | |
1312 | * @irq_data: The pointer to irq_data | |
1313 | */ | |
1314 | void irq_domain_reset_irq_data(struct irq_data *irq_data) | |
1315 | { | |
1316 | irq_data->hwirq = 0; | |
1317 | irq_data->chip = &no_irq_chip; | |
1318 | irq_data->chip_data = NULL; | |
1319 | } | |
52b2a05f | 1320 | EXPORT_SYMBOL_GPL(irq_domain_reset_irq_data); |
f8264e34 JL |
1321 | |
1322 | /** | |
1323 | * irq_domain_free_irqs_common - Clear irq_data and free the parent | |
1324 | * @domain: Interrupt domain to match | |
1325 | * @virq: IRQ number to start with | |
1326 | * @nr_irqs: The number of irqs to free | |
1327 | */ | |
1328 | void irq_domain_free_irqs_common(struct irq_domain *domain, unsigned int virq, | |
1329 | unsigned int nr_irqs) | |
1330 | { | |
1331 | struct irq_data *irq_data; | |
1332 | int i; | |
1333 | ||
1334 | for (i = 0; i < nr_irqs; i++) { | |
1335 | irq_data = irq_domain_get_irq_data(domain, virq + i); | |
1336 | if (irq_data) | |
1337 | irq_domain_reset_irq_data(irq_data); | |
1338 | } | |
1339 | irq_domain_free_irqs_parent(domain, virq, nr_irqs); | |
1340 | } | |
63cc787e | 1341 | EXPORT_SYMBOL_GPL(irq_domain_free_irqs_common); |
f8264e34 JL |
1342 | |
1343 | /** | |
1344 | * irq_domain_free_irqs_top - Clear handler and handler data, clear irqdata and free parent | |
1345 | * @domain: Interrupt domain to match | |
1346 | * @virq: IRQ number to start with | |
1347 | * @nr_irqs: The number of irqs to free | |
1348 | */ | |
1349 | void irq_domain_free_irqs_top(struct irq_domain *domain, unsigned int virq, | |
1350 | unsigned int nr_irqs) | |
1351 | { | |
1352 | int i; | |
1353 | ||
1354 | for (i = 0; i < nr_irqs; i++) { | |
1355 | irq_set_handler_data(virq + i, NULL); | |
1356 | irq_set_handler(virq + i, NULL); | |
1357 | } | |
1358 | irq_domain_free_irqs_common(domain, virq, nr_irqs); | |
1359 | } | |
1360 | ||
6a6544e5 | 1361 | static void irq_domain_free_irqs_hierarchy(struct irq_domain *domain, |
36d72731 JL |
1362 | unsigned int irq_base, |
1363 | unsigned int nr_irqs) | |
1364 | { | |
0d12ec07 DD |
1365 | if (domain->ops->free) |
1366 | domain->ops->free(domain, irq_base, nr_irqs); | |
36d72731 JL |
1367 | } |
1368 | ||
6a6544e5 | 1369 | int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain, |
c466595c MZ |
1370 | unsigned int irq_base, |
1371 | unsigned int nr_irqs, void *arg) | |
36d72731 | 1372 | { |
6a6544e5 | 1373 | return domain->ops->alloc(domain, irq_base, nr_irqs, arg); |
36d72731 JL |
1374 | } |
1375 | ||
f8264e34 JL |
1376 | /** |
1377 | * __irq_domain_alloc_irqs - Allocate IRQs from domain | |
1378 | * @domain: domain to allocate from | |
1379 | * @irq_base: allocate specified IRQ nubmer if irq_base >= 0 | |
1380 | * @nr_irqs: number of IRQs to allocate | |
1381 | * @node: NUMA node id for memory allocation | |
1382 | * @arg: domain specific argument | |
1383 | * @realloc: IRQ descriptors have already been allocated if true | |
06ee6d57 | 1384 | * @affinity: Optional irq affinity mask for multiqueue devices |
f8264e34 JL |
1385 | * |
1386 | * Allocate IRQ numbers and initialized all data structures to support | |
1387 | * hierarchy IRQ domains. | |
1388 | * Parameter @realloc is mainly to support legacy IRQs. | |
1389 | * Returns error code or allocated IRQ number | |
1390 | * | |
1391 | * The whole process to setup an IRQ has been split into two steps. | |
1392 | * The first step, __irq_domain_alloc_irqs(), is to allocate IRQ | |
1393 | * descriptor and required hardware resources. The second step, | |
1394 | * irq_domain_activate_irq(), is to program hardwares with preallocated | |
1395 | * resources. In this way, it's easier to rollback when failing to | |
1396 | * allocate resources. | |
1397 | */ | |
1398 | int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, | |
1399 | unsigned int nr_irqs, int node, void *arg, | |
06ee6d57 | 1400 | bool realloc, const struct cpumask *affinity) |
f8264e34 JL |
1401 | { |
1402 | int i, ret, virq; | |
1403 | ||
1404 | if (domain == NULL) { | |
1405 | domain = irq_default_domain; | |
1406 | if (WARN(!domain, "domain is NULL; cannot allocate IRQ\n")) | |
1407 | return -EINVAL; | |
1408 | } | |
1409 | ||
1410 | if (!domain->ops->alloc) { | |
1411 | pr_debug("domain->ops->alloc() is NULL\n"); | |
1412 | return -ENOSYS; | |
1413 | } | |
1414 | ||
1415 | if (realloc && irq_base >= 0) { | |
1416 | virq = irq_base; | |
1417 | } else { | |
06ee6d57 TG |
1418 | virq = irq_domain_alloc_descs(irq_base, nr_irqs, 0, node, |
1419 | affinity); | |
f8264e34 JL |
1420 | if (virq < 0) { |
1421 | pr_debug("cannot allocate IRQ(base %d, count %d)\n", | |
1422 | irq_base, nr_irqs); | |
1423 | return virq; | |
1424 | } | |
1425 | } | |
1426 | ||
1427 | if (irq_domain_alloc_irq_data(domain, virq, nr_irqs)) { | |
1428 | pr_debug("cannot allocate memory for IRQ%d\n", virq); | |
1429 | ret = -ENOMEM; | |
1430 | goto out_free_desc; | |
1431 | } | |
1432 | ||
1433 | mutex_lock(&irq_domain_mutex); | |
6a6544e5 | 1434 | ret = irq_domain_alloc_irqs_hierarchy(domain, virq, nr_irqs, arg); |
f8264e34 JL |
1435 | if (ret < 0) { |
1436 | mutex_unlock(&irq_domain_mutex); | |
1437 | goto out_free_irq_data; | |
1438 | } | |
1439 | for (i = 0; i < nr_irqs; i++) | |
1440 | irq_domain_insert_irq(virq + i); | |
1441 | mutex_unlock(&irq_domain_mutex); | |
1442 | ||
1443 | return virq; | |
1444 | ||
1445 | out_free_irq_data: | |
1446 | irq_domain_free_irq_data(virq, nr_irqs); | |
1447 | out_free_desc: | |
1448 | irq_free_descs(virq, nr_irqs); | |
1449 | return ret; | |
1450 | } | |
1451 | ||
495c38d3 DD |
1452 | /* The irq_data was moved, fix the revmap to refer to the new location */ |
1453 | static void irq_domain_fix_revmap(struct irq_data *d) | |
1454 | { | |
d03cc2d8 | 1455 | void __rcu **slot; |
495c38d3 DD |
1456 | |
1457 | if (d->hwirq < d->domain->revmap_size) | |
1458 | return; /* Not using radix tree. */ | |
1459 | ||
1460 | /* Fix up the revmap. */ | |
f1d78358 | 1461 | mutex_lock(&d->domain->revmap_tree_mutex); |
495c38d3 DD |
1462 | slot = radix_tree_lookup_slot(&d->domain->revmap_tree, d->hwirq); |
1463 | if (slot) | |
1464 | radix_tree_replace_slot(&d->domain->revmap_tree, slot, d); | |
f1d78358 | 1465 | mutex_unlock(&d->domain->revmap_tree_mutex); |
495c38d3 DD |
1466 | } |
1467 | ||
1468 | /** | |
1469 | * irq_domain_push_irq() - Push a domain in to the top of a hierarchy. | |
1470 | * @domain: Domain to push. | |
1471 | * @virq: Irq to push the domain in to. | |
1472 | * @arg: Passed to the irq_domain_ops alloc() function. | |
1473 | * | |
1474 | * For an already existing irqdomain hierarchy, as might be obtained | |
1475 | * via a call to pci_enable_msix(), add an additional domain to the | |
1476 | * head of the processing chain. Must be called before request_irq() | |
1477 | * has been called. | |
1478 | */ | |
1479 | int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg) | |
1480 | { | |
1481 | struct irq_data *child_irq_data; | |
1482 | struct irq_data *root_irq_data = irq_get_irq_data(virq); | |
1483 | struct irq_desc *desc; | |
1484 | int rv = 0; | |
1485 | ||
1486 | /* | |
1487 | * Check that no action has been set, which indicates the virq | |
1488 | * is in a state where this function doesn't have to deal with | |
1489 | * races between interrupt handling and maintaining the | |
1490 | * hierarchy. This will catch gross misuse. Attempting to | |
1491 | * make the check race free would require holding locks across | |
1492 | * calls to struct irq_domain_ops->alloc(), which could lead | |
1493 | * to deadlock, so we just do a simple check before starting. | |
1494 | */ | |
1495 | desc = irq_to_desc(virq); | |
1496 | if (!desc) | |
1497 | return -EINVAL; | |
1498 | if (WARN_ON(desc->action)) | |
1499 | return -EBUSY; | |
1500 | ||
1501 | if (domain == NULL) | |
1502 | return -EINVAL; | |
1503 | ||
1504 | if (WARN_ON(!irq_domain_is_hierarchy(domain))) | |
1505 | return -EINVAL; | |
1506 | ||
20c4d49c | 1507 | if (!root_irq_data) |
495c38d3 DD |
1508 | return -EINVAL; |
1509 | ||
20c4d49c | 1510 | if (domain->parent != root_irq_data->domain) |
495c38d3 DD |
1511 | return -EINVAL; |
1512 | ||
1513 | child_irq_data = kzalloc_node(sizeof(*child_irq_data), GFP_KERNEL, | |
1514 | irq_data_get_node(root_irq_data)); | |
1515 | if (!child_irq_data) | |
1516 | return -ENOMEM; | |
1517 | ||
1518 | mutex_lock(&irq_domain_mutex); | |
1519 | ||
1520 | /* Copy the original irq_data. */ | |
1521 | *child_irq_data = *root_irq_data; | |
1522 | ||
1523 | /* | |
1524 | * Overwrite the root_irq_data, which is embedded in struct | |
1525 | * irq_desc, with values for this domain. | |
1526 | */ | |
1527 | root_irq_data->parent_data = child_irq_data; | |
1528 | root_irq_data->domain = domain; | |
1529 | root_irq_data->mask = 0; | |
1530 | root_irq_data->hwirq = 0; | |
1531 | root_irq_data->chip = NULL; | |
1532 | root_irq_data->chip_data = NULL; | |
1533 | ||
1534 | /* May (probably does) set hwirq, chip, etc. */ | |
1535 | rv = irq_domain_alloc_irqs_hierarchy(domain, virq, 1, arg); | |
1536 | if (rv) { | |
1537 | /* Restore the original irq_data. */ | |
1538 | *root_irq_data = *child_irq_data; | |
1539 | goto error; | |
1540 | } | |
1541 | ||
1542 | irq_domain_fix_revmap(child_irq_data); | |
1543 | irq_domain_set_mapping(domain, root_irq_data->hwirq, root_irq_data); | |
1544 | ||
1545 | error: | |
1546 | mutex_unlock(&irq_domain_mutex); | |
1547 | ||
1548 | return rv; | |
1549 | } | |
1550 | EXPORT_SYMBOL_GPL(irq_domain_push_irq); | |
1551 | ||
1552 | /** | |
1553 | * irq_domain_pop_irq() - Remove a domain from the top of a hierarchy. | |
1554 | * @domain: Domain to remove. | |
1555 | * @virq: Irq to remove the domain from. | |
1556 | * | |
1557 | * Undo the effects of a call to irq_domain_push_irq(). Must be | |
1558 | * called either before request_irq() or after free_irq(). | |
1559 | */ | |
1560 | int irq_domain_pop_irq(struct irq_domain *domain, int virq) | |
1561 | { | |
1562 | struct irq_data *root_irq_data = irq_get_irq_data(virq); | |
1563 | struct irq_data *child_irq_data; | |
1564 | struct irq_data *tmp_irq_data; | |
1565 | struct irq_desc *desc; | |
1566 | ||
1567 | /* | |
1568 | * Check that no action is set, which indicates the virq is in | |
1569 | * a state where this function doesn't have to deal with races | |
1570 | * between interrupt handling and maintaining the hierarchy. | |
1571 | * This will catch gross misuse. Attempting to make the check | |
1572 | * race free would require holding locks across calls to | |
1573 | * struct irq_domain_ops->free(), which could lead to | |
1574 | * deadlock, so we just do a simple check before starting. | |
1575 | */ | |
1576 | desc = irq_to_desc(virq); | |
1577 | if (!desc) | |
1578 | return -EINVAL; | |
1579 | if (WARN_ON(desc->action)) | |
1580 | return -EBUSY; | |
1581 | ||
1582 | if (domain == NULL) | |
1583 | return -EINVAL; | |
1584 | ||
1585 | if (!root_irq_data) | |
1586 | return -EINVAL; | |
1587 | ||
1588 | tmp_irq_data = irq_domain_get_irq_data(domain, virq); | |
1589 | ||
1590 | /* We can only "pop" if this domain is at the top of the list */ | |
1591 | if (WARN_ON(root_irq_data != tmp_irq_data)) | |
1592 | return -EINVAL; | |
1593 | ||
1594 | if (WARN_ON(root_irq_data->domain != domain)) | |
1595 | return -EINVAL; | |
1596 | ||
1597 | child_irq_data = root_irq_data->parent_data; | |
1598 | if (WARN_ON(!child_irq_data)) | |
1599 | return -EINVAL; | |
1600 | ||
1601 | mutex_lock(&irq_domain_mutex); | |
1602 | ||
1603 | root_irq_data->parent_data = NULL; | |
1604 | ||
1605 | irq_domain_clear_mapping(domain, root_irq_data->hwirq); | |
1606 | irq_domain_free_irqs_hierarchy(domain, virq, 1); | |
1607 | ||
1608 | /* Restore the original irq_data. */ | |
1609 | *root_irq_data = *child_irq_data; | |
1610 | ||
1611 | irq_domain_fix_revmap(root_irq_data); | |
1612 | ||
1613 | mutex_unlock(&irq_domain_mutex); | |
1614 | ||
1615 | kfree(child_irq_data); | |
1616 | ||
1617 | return 0; | |
1618 | } | |
1619 | EXPORT_SYMBOL_GPL(irq_domain_pop_irq); | |
1620 | ||
f8264e34 JL |
1621 | /** |
1622 | * irq_domain_free_irqs - Free IRQ number and associated data structures | |
1623 | * @virq: base IRQ number | |
1624 | * @nr_irqs: number of IRQs to free | |
1625 | */ | |
1626 | void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs) | |
1627 | { | |
1628 | struct irq_data *data = irq_get_irq_data(virq); | |
1629 | int i; | |
1630 | ||
1631 | if (WARN(!data || !data->domain || !data->domain->ops->free, | |
1632 | "NULL pointer, cannot free irq\n")) | |
1633 | return; | |
1634 | ||
1635 | mutex_lock(&irq_domain_mutex); | |
1636 | for (i = 0; i < nr_irqs; i++) | |
1637 | irq_domain_remove_irq(virq + i); | |
6a6544e5 | 1638 | irq_domain_free_irqs_hierarchy(data->domain, virq, nr_irqs); |
f8264e34 JL |
1639 | mutex_unlock(&irq_domain_mutex); |
1640 | ||
1641 | irq_domain_free_irq_data(virq, nr_irqs); | |
1642 | irq_free_descs(virq, nr_irqs); | |
1643 | } | |
1644 | ||
36d72731 JL |
1645 | /** |
1646 | * irq_domain_alloc_irqs_parent - Allocate interrupts from parent domain | |
1647 | * @irq_base: Base IRQ number | |
1648 | * @nr_irqs: Number of IRQs to allocate | |
1649 | * @arg: Allocation data (arch/domain specific) | |
1650 | * | |
1651 | * Check whether the domain has been setup recursive. If not allocate | |
1652 | * through the parent domain. | |
1653 | */ | |
1654 | int irq_domain_alloc_irqs_parent(struct irq_domain *domain, | |
1655 | unsigned int irq_base, unsigned int nr_irqs, | |
1656 | void *arg) | |
1657 | { | |
6a6544e5 MZ |
1658 | if (!domain->parent) |
1659 | return -ENOSYS; | |
36d72731 | 1660 | |
6a6544e5 MZ |
1661 | return irq_domain_alloc_irqs_hierarchy(domain->parent, irq_base, |
1662 | nr_irqs, arg); | |
36d72731 | 1663 | } |
52b2a05f | 1664 | EXPORT_SYMBOL_GPL(irq_domain_alloc_irqs_parent); |
36d72731 JL |
1665 | |
1666 | /** | |
1667 | * irq_domain_free_irqs_parent - Free interrupts from parent domain | |
1668 | * @irq_base: Base IRQ number | |
1669 | * @nr_irqs: Number of IRQs to free | |
1670 | * | |
1671 | * Check whether the domain has been setup recursive. If not free | |
1672 | * through the parent domain. | |
1673 | */ | |
1674 | void irq_domain_free_irqs_parent(struct irq_domain *domain, | |
1675 | unsigned int irq_base, unsigned int nr_irqs) | |
1676 | { | |
6a6544e5 MZ |
1677 | if (!domain->parent) |
1678 | return; | |
1679 | ||
1680 | irq_domain_free_irqs_hierarchy(domain->parent, irq_base, nr_irqs); | |
36d72731 | 1681 | } |
52b2a05f | 1682 | EXPORT_SYMBOL_GPL(irq_domain_free_irqs_parent); |
36d72731 | 1683 | |
08d85f3e MZ |
1684 | static void __irq_domain_deactivate_irq(struct irq_data *irq_data) |
1685 | { | |
1686 | if (irq_data && irq_data->domain) { | |
1687 | struct irq_domain *domain = irq_data->domain; | |
1688 | ||
1689 | if (domain->ops->deactivate) | |
1690 | domain->ops->deactivate(domain, irq_data); | |
1691 | if (irq_data->parent_data) | |
1692 | __irq_domain_deactivate_irq(irq_data->parent_data); | |
1693 | } | |
1694 | } | |
1695 | ||
702cb0a0 | 1696 | static int __irq_domain_activate_irq(struct irq_data *irqd, bool reserve) |
bb9b428a TG |
1697 | { |
1698 | int ret = 0; | |
1699 | ||
1700 | if (irqd && irqd->domain) { | |
1701 | struct irq_domain *domain = irqd->domain; | |
1702 | ||
1703 | if (irqd->parent_data) | |
42e1cc2d | 1704 | ret = __irq_domain_activate_irq(irqd->parent_data, |
702cb0a0 | 1705 | reserve); |
bb9b428a | 1706 | if (!ret && domain->ops->activate) { |
702cb0a0 | 1707 | ret = domain->ops->activate(domain, irqd, reserve); |
bb9b428a TG |
1708 | /* Rollback in case of error */ |
1709 | if (ret && irqd->parent_data) | |
1710 | __irq_domain_deactivate_irq(irqd->parent_data); | |
1711 | } | |
1712 | } | |
1713 | return ret; | |
1714 | } | |
1715 | ||
f8264e34 JL |
1716 | /** |
1717 | * irq_domain_activate_irq - Call domain_ops->activate recursively to activate | |
1718 | * interrupt | |
702cb0a0 TG |
1719 | * @irq_data: Outermost irq_data associated with interrupt |
1720 | * @reserve: If set only reserve an interrupt vector instead of assigning one | |
f8264e34 JL |
1721 | * |
1722 | * This is the second step to call domain_ops->activate to program interrupt | |
1723 | * controllers, so the interrupt could actually get delivered. | |
1724 | */ | |
702cb0a0 | 1725 | int irq_domain_activate_irq(struct irq_data *irq_data, bool reserve) |
f8264e34 | 1726 | { |
bb9b428a TG |
1727 | int ret = 0; |
1728 | ||
1729 | if (!irqd_is_activated(irq_data)) | |
702cb0a0 | 1730 | ret = __irq_domain_activate_irq(irq_data, reserve); |
bb9b428a | 1731 | if (!ret) |
08d85f3e | 1732 | irqd_set_activated(irq_data); |
bb9b428a | 1733 | return ret; |
f8264e34 JL |
1734 | } |
1735 | ||
1736 | /** | |
1737 | * irq_domain_deactivate_irq - Call domain_ops->deactivate recursively to | |
1738 | * deactivate interrupt | |
1739 | * @irq_data: outermost irq_data associated with interrupt | |
1740 | * | |
1741 | * It calls domain_ops->deactivate to program interrupt controllers to disable | |
1742 | * interrupt delivery. | |
1743 | */ | |
1744 | void irq_domain_deactivate_irq(struct irq_data *irq_data) | |
1745 | { | |
08d85f3e MZ |
1746 | if (irqd_is_activated(irq_data)) { |
1747 | __irq_domain_deactivate_irq(irq_data); | |
1748 | irqd_clr_activated(irq_data); | |
f8264e34 JL |
1749 | } |
1750 | } | |
1751 | ||
1752 | static void irq_domain_check_hierarchy(struct irq_domain *domain) | |
1753 | { | |
1754 | /* Hierarchy irq_domains must implement callback alloc() */ | |
1755 | if (domain->ops->alloc) | |
1756 | domain->flags |= IRQ_DOMAIN_FLAG_HIERARCHY; | |
1757 | } | |
631a9639 EA |
1758 | |
1759 | /** | |
1760 | * irq_domain_hierarchical_is_msi_remap - Check if the domain or any | |
1761 | * parent has MSI remapping support | |
1762 | * @domain: domain pointer | |
1763 | */ | |
1764 | bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain) | |
1765 | { | |
1766 | for (; domain; domain = domain->parent) { | |
1767 | if (irq_domain_is_msi_remap(domain)) | |
1768 | return true; | |
1769 | } | |
1770 | return false; | |
1771 | } | |
f8264e34 JL |
1772 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
1773 | /** | |
1774 | * irq_domain_get_irq_data - Get irq_data associated with @virq and @domain | |
1775 | * @domain: domain to match | |
1776 | * @virq: IRQ number to get irq_data | |
1777 | */ | |
1778 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
1779 | unsigned int virq) | |
1780 | { | |
1781 | struct irq_data *irq_data = irq_get_irq_data(virq); | |
1782 | ||
1783 | return (irq_data && irq_data->domain == domain) ? irq_data : NULL; | |
1784 | } | |
a4289dc2 | 1785 | EXPORT_SYMBOL_GPL(irq_domain_get_irq_data); |
f8264e34 | 1786 | |
5f22f5c6 SA |
1787 | /** |
1788 | * irq_domain_set_info - Set the complete data for a @virq in @domain | |
1789 | * @domain: Interrupt domain to match | |
1790 | * @virq: IRQ number | |
1791 | * @hwirq: The hardware interrupt number | |
1792 | * @chip: The associated interrupt chip | |
1793 | * @chip_data: The associated interrupt chip data | |
1794 | * @handler: The interrupt flow handler | |
1795 | * @handler_data: The interrupt flow handler data | |
1796 | * @handler_name: The interrupt handler name | |
1797 | */ | |
1798 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, | |
1799 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
1800 | void *chip_data, irq_flow_handler_t handler, | |
1801 | void *handler_data, const char *handler_name) | |
1802 | { | |
1803 | irq_set_chip_and_handler_name(virq, chip, handler, handler_name); | |
1804 | irq_set_chip_data(virq, chip_data); | |
1805 | irq_set_handler_data(virq, handler_data); | |
1806 | } | |
1807 | ||
f8264e34 JL |
1808 | static void irq_domain_check_hierarchy(struct irq_domain *domain) |
1809 | { | |
1810 | } | |
1811 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
087cdfb6 TG |
1812 | |
1813 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS | |
1814 | static struct dentry *domain_dir; | |
1815 | ||
1816 | static void | |
1817 | irq_domain_debug_show_one(struct seq_file *m, struct irq_domain *d, int ind) | |
1818 | { | |
1819 | seq_printf(m, "%*sname: %s\n", ind, "", d->name); | |
1820 | seq_printf(m, "%*ssize: %u\n", ind + 1, "", | |
1821 | d->revmap_size + d->revmap_direct_max_irq); | |
1822 | seq_printf(m, "%*smapped: %u\n", ind + 1, "", d->mapcount); | |
1823 | seq_printf(m, "%*sflags: 0x%08x\n", ind +1 , "", d->flags); | |
c3e7239a TG |
1824 | if (d->ops && d->ops->debug_show) |
1825 | d->ops->debug_show(m, d, NULL, ind + 1); | |
087cdfb6 TG |
1826 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1827 | if (!d->parent) | |
1828 | return; | |
1829 | seq_printf(m, "%*sparent: %s\n", ind + 1, "", d->parent->name); | |
1830 | irq_domain_debug_show_one(m, d->parent, ind + 4); | |
1831 | #endif | |
1832 | } | |
1833 | ||
1834 | static int irq_domain_debug_show(struct seq_file *m, void *p) | |
1835 | { | |
1836 | struct irq_domain *d = m->private; | |
1837 | ||
1838 | /* Default domain? Might be NULL */ | |
1839 | if (!d) { | |
1840 | if (!irq_default_domain) | |
1841 | return 0; | |
1842 | d = irq_default_domain; | |
1843 | } | |
1844 | irq_domain_debug_show_one(m, d, 0); | |
1845 | return 0; | |
1846 | } | |
1847 | ||
1848 | static int irq_domain_debug_open(struct inode *inode, struct file *file) | |
1849 | { | |
1850 | return single_open(file, irq_domain_debug_show, inode->i_private); | |
1851 | } | |
1852 | ||
1853 | static const struct file_operations dfs_domain_ops = { | |
1854 | .open = irq_domain_debug_open, | |
1855 | .read = seq_read, | |
1856 | .llseek = seq_lseek, | |
1857 | .release = single_release, | |
1858 | }; | |
1859 | ||
1860 | static void debugfs_add_domain_dir(struct irq_domain *d) | |
1861 | { | |
1862 | if (!d->name || !domain_dir || d->debugfs_file) | |
1863 | return; | |
1864 | d->debugfs_file = debugfs_create_file(d->name, 0444, domain_dir, d, | |
1865 | &dfs_domain_ops); | |
1866 | } | |
1867 | ||
1868 | static void debugfs_remove_domain_dir(struct irq_domain *d) | |
1869 | { | |
f610c9d6 | 1870 | debugfs_remove(d->debugfs_file); |
087cdfb6 TG |
1871 | } |
1872 | ||
1873 | void __init irq_domain_debugfs_init(struct dentry *root) | |
1874 | { | |
1875 | struct irq_domain *d; | |
1876 | ||
1877 | domain_dir = debugfs_create_dir("domains", root); | |
1878 | if (!domain_dir) | |
1879 | return; | |
1880 | ||
1881 | debugfs_create_file("default", 0444, domain_dir, NULL, &dfs_domain_ops); | |
1882 | mutex_lock(&irq_domain_mutex); | |
1883 | list_for_each_entry(d, &irq_domain_list, link) | |
1884 | debugfs_add_domain_dir(d); | |
1885 | mutex_unlock(&irq_domain_mutex); | |
1886 | } | |
1887 | #endif |