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3795de23 TG |
1 | /* |
2 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | |
3 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
4 | * | |
5 | * This file contains the interrupt descriptor management code | |
6 | * | |
7 | * Detailed information is available in Documentation/DocBook/genericirq | |
8 | * | |
9 | */ | |
10 | #include <linux/irq.h> | |
11 | #include <linux/slab.h> | |
ec53cf23 | 12 | #include <linux/export.h> |
3795de23 TG |
13 | #include <linux/interrupt.h> |
14 | #include <linux/kernel_stat.h> | |
15 | #include <linux/radix-tree.h> | |
1f5a5b87 | 16 | #include <linux/bitmap.h> |
3795de23 TG |
17 | |
18 | #include "internals.h" | |
19 | ||
20 | /* | |
21 | * lockdep: we want to handle all irq_desc locks as a single lock-class: | |
22 | */ | |
78f90d91 | 23 | static struct lock_class_key irq_desc_lock_class; |
3795de23 | 24 | |
fe051434 | 25 | #if defined(CONFIG_SMP) |
3795de23 TG |
26 | static void __init init_irq_default_affinity(void) |
27 | { | |
28 | alloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT); | |
29 | cpumask_setall(irq_default_affinity); | |
30 | } | |
31 | #else | |
32 | static void __init init_irq_default_affinity(void) | |
33 | { | |
34 | } | |
35 | #endif | |
36 | ||
1f5a5b87 TG |
37 | #ifdef CONFIG_SMP |
38 | static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) | |
39 | { | |
40 | if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node)) | |
41 | return -ENOMEM; | |
42 | ||
43 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
44 | if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) { | |
45 | free_cpumask_var(desc->irq_data.affinity); | |
46 | return -ENOMEM; | |
47 | } | |
48 | #endif | |
49 | return 0; | |
50 | } | |
51 | ||
52 | static void desc_smp_init(struct irq_desc *desc, int node) | |
53 | { | |
aa99ec0f | 54 | desc->irq_data.node = node; |
1f5a5b87 | 55 | cpumask_copy(desc->irq_data.affinity, irq_default_affinity); |
b7b29338 TG |
56 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
57 | cpumask_clear(desc->pending_mask); | |
58 | #endif | |
59 | } | |
60 | ||
61 | static inline int desc_node(struct irq_desc *desc) | |
62 | { | |
63 | return desc->irq_data.node; | |
1f5a5b87 TG |
64 | } |
65 | ||
66 | #else | |
67 | static inline int | |
68 | alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; } | |
69 | static inline void desc_smp_init(struct irq_desc *desc, int node) { } | |
b7b29338 | 70 | static inline int desc_node(struct irq_desc *desc) { return 0; } |
1f5a5b87 TG |
71 | #endif |
72 | ||
b6873807 SAS |
73 | static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node, |
74 | struct module *owner) | |
1f5a5b87 | 75 | { |
6c9ae009 ED |
76 | int cpu; |
77 | ||
1f5a5b87 TG |
78 | desc->irq_data.irq = irq; |
79 | desc->irq_data.chip = &no_irq_chip; | |
80 | desc->irq_data.chip_data = NULL; | |
81 | desc->irq_data.handler_data = NULL; | |
82 | desc->irq_data.msi_desc = NULL; | |
f9e4989e | 83 | irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS); |
801a0e9a | 84 | irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED); |
1f5a5b87 TG |
85 | desc->handle_irq = handle_bad_irq; |
86 | desc->depth = 1; | |
b7b29338 TG |
87 | desc->irq_count = 0; |
88 | desc->irqs_unhandled = 0; | |
1f5a5b87 | 89 | desc->name = NULL; |
b6873807 | 90 | desc->owner = owner; |
6c9ae009 ED |
91 | for_each_possible_cpu(cpu) |
92 | *per_cpu_ptr(desc->kstat_irqs, cpu) = 0; | |
1f5a5b87 TG |
93 | desc_smp_init(desc, node); |
94 | } | |
95 | ||
3795de23 TG |
96 | int nr_irqs = NR_IRQS; |
97 | EXPORT_SYMBOL_GPL(nr_irqs); | |
98 | ||
a05a900a | 99 | static DEFINE_MUTEX(sparse_irq_lock); |
c1ee6264 | 100 | static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS); |
1f5a5b87 | 101 | |
3795de23 TG |
102 | #ifdef CONFIG_SPARSE_IRQ |
103 | ||
baa0d233 | 104 | static RADIX_TREE(irq_desc_tree, GFP_KERNEL); |
3795de23 | 105 | |
1f5a5b87 | 106 | static void irq_insert_desc(unsigned int irq, struct irq_desc *desc) |
3795de23 TG |
107 | { |
108 | radix_tree_insert(&irq_desc_tree, irq, desc); | |
109 | } | |
110 | ||
111 | struct irq_desc *irq_to_desc(unsigned int irq) | |
112 | { | |
113 | return radix_tree_lookup(&irq_desc_tree, irq); | |
114 | } | |
3911ff30 | 115 | EXPORT_SYMBOL(irq_to_desc); |
3795de23 | 116 | |
1f5a5b87 TG |
117 | static void delete_irq_desc(unsigned int irq) |
118 | { | |
119 | radix_tree_delete(&irq_desc_tree, irq); | |
120 | } | |
121 | ||
122 | #ifdef CONFIG_SMP | |
123 | static void free_masks(struct irq_desc *desc) | |
124 | { | |
125 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
126 | free_cpumask_var(desc->pending_mask); | |
127 | #endif | |
c0a19ebc | 128 | free_cpumask_var(desc->irq_data.affinity); |
1f5a5b87 TG |
129 | } |
130 | #else | |
131 | static inline void free_masks(struct irq_desc *desc) { } | |
132 | #endif | |
133 | ||
b6873807 | 134 | static struct irq_desc *alloc_desc(int irq, int node, struct module *owner) |
1f5a5b87 TG |
135 | { |
136 | struct irq_desc *desc; | |
baa0d233 | 137 | gfp_t gfp = GFP_KERNEL; |
1f5a5b87 TG |
138 | |
139 | desc = kzalloc_node(sizeof(*desc), gfp, node); | |
140 | if (!desc) | |
141 | return NULL; | |
142 | /* allocate based on nr_cpu_ids */ | |
6c9ae009 | 143 | desc->kstat_irqs = alloc_percpu(unsigned int); |
1f5a5b87 TG |
144 | if (!desc->kstat_irqs) |
145 | goto err_desc; | |
146 | ||
147 | if (alloc_masks(desc, gfp, node)) | |
148 | goto err_kstat; | |
149 | ||
150 | raw_spin_lock_init(&desc->lock); | |
151 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); | |
152 | ||
b6873807 | 153 | desc_set_defaults(irq, desc, node, owner); |
1f5a5b87 TG |
154 | |
155 | return desc; | |
156 | ||
157 | err_kstat: | |
6c9ae009 | 158 | free_percpu(desc->kstat_irqs); |
1f5a5b87 TG |
159 | err_desc: |
160 | kfree(desc); | |
161 | return NULL; | |
162 | } | |
163 | ||
164 | static void free_desc(unsigned int irq) | |
165 | { | |
166 | struct irq_desc *desc = irq_to_desc(irq); | |
1f5a5b87 | 167 | |
13bfe99e TG |
168 | unregister_irq_proc(irq, desc); |
169 | ||
a05a900a | 170 | mutex_lock(&sparse_irq_lock); |
1f5a5b87 | 171 | delete_irq_desc(irq); |
a05a900a | 172 | mutex_unlock(&sparse_irq_lock); |
1f5a5b87 TG |
173 | |
174 | free_masks(desc); | |
6c9ae009 | 175 | free_percpu(desc->kstat_irqs); |
1f5a5b87 TG |
176 | kfree(desc); |
177 | } | |
178 | ||
b6873807 SAS |
179 | static int alloc_descs(unsigned int start, unsigned int cnt, int node, |
180 | struct module *owner) | |
1f5a5b87 TG |
181 | { |
182 | struct irq_desc *desc; | |
1f5a5b87 TG |
183 | int i; |
184 | ||
185 | for (i = 0; i < cnt; i++) { | |
b6873807 | 186 | desc = alloc_desc(start + i, node, owner); |
1f5a5b87 TG |
187 | if (!desc) |
188 | goto err; | |
a05a900a | 189 | mutex_lock(&sparse_irq_lock); |
1f5a5b87 | 190 | irq_insert_desc(start + i, desc); |
a05a900a | 191 | mutex_unlock(&sparse_irq_lock); |
1f5a5b87 TG |
192 | } |
193 | return start; | |
194 | ||
195 | err: | |
196 | for (i--; i >= 0; i--) | |
197 | free_desc(start + i); | |
198 | ||
a05a900a | 199 | mutex_lock(&sparse_irq_lock); |
1f5a5b87 | 200 | bitmap_clear(allocated_irqs, start, cnt); |
a05a900a | 201 | mutex_unlock(&sparse_irq_lock); |
1f5a5b87 TG |
202 | return -ENOMEM; |
203 | } | |
204 | ||
ed4dea6e | 205 | static int irq_expand_nr_irqs(unsigned int nr) |
e7bcecb7 | 206 | { |
ed4dea6e | 207 | if (nr > IRQ_BITMAP_BITS) |
e7bcecb7 | 208 | return -ENOMEM; |
ed4dea6e | 209 | nr_irqs = nr; |
e7bcecb7 TG |
210 | return 0; |
211 | } | |
212 | ||
3795de23 TG |
213 | int __init early_irq_init(void) |
214 | { | |
b683de2b | 215 | int i, initcnt, node = first_online_node; |
3795de23 | 216 | struct irq_desc *desc; |
3795de23 TG |
217 | |
218 | init_irq_default_affinity(); | |
219 | ||
b683de2b TG |
220 | /* Let arch update nr_irqs and return the nr of preallocated irqs */ |
221 | initcnt = arch_probe_nr_irqs(); | |
222 | printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt); | |
3795de23 | 223 | |
c1ee6264 TG |
224 | if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS)) |
225 | nr_irqs = IRQ_BITMAP_BITS; | |
226 | ||
227 | if (WARN_ON(initcnt > IRQ_BITMAP_BITS)) | |
228 | initcnt = IRQ_BITMAP_BITS; | |
229 | ||
230 | if (initcnt > nr_irqs) | |
231 | nr_irqs = initcnt; | |
232 | ||
b683de2b | 233 | for (i = 0; i < initcnt; i++) { |
b6873807 | 234 | desc = alloc_desc(i, node, NULL); |
aa99ec0f TG |
235 | set_bit(i, allocated_irqs); |
236 | irq_insert_desc(i, desc); | |
3795de23 | 237 | } |
3795de23 TG |
238 | return arch_early_irq_init(); |
239 | } | |
240 | ||
3795de23 TG |
241 | #else /* !CONFIG_SPARSE_IRQ */ |
242 | ||
243 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = { | |
244 | [0 ... NR_IRQS-1] = { | |
3795de23 TG |
245 | .handle_irq = handle_bad_irq, |
246 | .depth = 1, | |
247 | .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock), | |
248 | } | |
249 | }; | |
250 | ||
3795de23 TG |
251 | int __init early_irq_init(void) |
252 | { | |
aa99ec0f | 253 | int count, i, node = first_online_node; |
3795de23 | 254 | struct irq_desc *desc; |
3795de23 TG |
255 | |
256 | init_irq_default_affinity(); | |
257 | ||
258 | printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS); | |
259 | ||
260 | desc = irq_desc; | |
261 | count = ARRAY_SIZE(irq_desc); | |
262 | ||
263 | for (i = 0; i < count; i++) { | |
6c9ae009 | 264 | desc[i].kstat_irqs = alloc_percpu(unsigned int); |
e7fbad30 LW |
265 | alloc_masks(&desc[i], GFP_KERNEL, node); |
266 | raw_spin_lock_init(&desc[i].lock); | |
154cd387 | 267 | lockdep_set_class(&desc[i].lock, &irq_desc_lock_class); |
b6873807 | 268 | desc_set_defaults(i, &desc[i], node, NULL); |
3795de23 TG |
269 | } |
270 | return arch_early_irq_init(); | |
271 | } | |
272 | ||
273 | struct irq_desc *irq_to_desc(unsigned int irq) | |
274 | { | |
275 | return (irq < NR_IRQS) ? irq_desc + irq : NULL; | |
276 | } | |
2c45aada | 277 | EXPORT_SYMBOL(irq_to_desc); |
3795de23 | 278 | |
1f5a5b87 TG |
279 | static void free_desc(unsigned int irq) |
280 | { | |
d8179bc0 TG |
281 | struct irq_desc *desc = irq_to_desc(irq); |
282 | unsigned long flags; | |
283 | ||
284 | raw_spin_lock_irqsave(&desc->lock, flags); | |
285 | desc_set_defaults(irq, desc, desc_node(desc), NULL); | |
286 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
1f5a5b87 TG |
287 | } |
288 | ||
b6873807 SAS |
289 | static inline int alloc_descs(unsigned int start, unsigned int cnt, int node, |
290 | struct module *owner) | |
1f5a5b87 | 291 | { |
b6873807 SAS |
292 | u32 i; |
293 | ||
294 | for (i = 0; i < cnt; i++) { | |
295 | struct irq_desc *desc = irq_to_desc(start + i); | |
296 | ||
297 | desc->owner = owner; | |
298 | } | |
1f5a5b87 TG |
299 | return start; |
300 | } | |
e7bcecb7 | 301 | |
ed4dea6e | 302 | static int irq_expand_nr_irqs(unsigned int nr) |
e7bcecb7 TG |
303 | { |
304 | return -ENOMEM; | |
305 | } | |
306 | ||
f63b6a05 TG |
307 | void irq_mark_irq(unsigned int irq) |
308 | { | |
309 | mutex_lock(&sparse_irq_lock); | |
310 | bitmap_set(allocated_irqs, irq, 1); | |
311 | mutex_unlock(&sparse_irq_lock); | |
312 | } | |
313 | ||
c940e01c TG |
314 | #ifdef CONFIG_GENERIC_IRQ_LEGACY |
315 | void irq_init_desc(unsigned int irq) | |
316 | { | |
d8179bc0 | 317 | free_desc(irq); |
c940e01c TG |
318 | } |
319 | #endif | |
320 | ||
3795de23 TG |
321 | #endif /* !CONFIG_SPARSE_IRQ */ |
322 | ||
fe12bc2c TG |
323 | /** |
324 | * generic_handle_irq - Invoke the handler for a particular irq | |
325 | * @irq: The irq number to handle | |
326 | * | |
327 | */ | |
328 | int generic_handle_irq(unsigned int irq) | |
329 | { | |
330 | struct irq_desc *desc = irq_to_desc(irq); | |
331 | ||
332 | if (!desc) | |
333 | return -EINVAL; | |
334 | generic_handle_irq_desc(irq, desc); | |
335 | return 0; | |
336 | } | |
edf76f83 | 337 | EXPORT_SYMBOL_GPL(generic_handle_irq); |
fe12bc2c | 338 | |
1f5a5b87 TG |
339 | /* Dynamic interrupt handling */ |
340 | ||
341 | /** | |
342 | * irq_free_descs - free irq descriptors | |
343 | * @from: Start of descriptor range | |
344 | * @cnt: Number of consecutive irqs to free | |
345 | */ | |
346 | void irq_free_descs(unsigned int from, unsigned int cnt) | |
347 | { | |
1f5a5b87 TG |
348 | int i; |
349 | ||
350 | if (from >= nr_irqs || (from + cnt) > nr_irqs) | |
351 | return; | |
352 | ||
353 | for (i = 0; i < cnt; i++) | |
354 | free_desc(from + i); | |
355 | ||
a05a900a | 356 | mutex_lock(&sparse_irq_lock); |
1f5a5b87 | 357 | bitmap_clear(allocated_irqs, from, cnt); |
a05a900a | 358 | mutex_unlock(&sparse_irq_lock); |
1f5a5b87 | 359 | } |
edf76f83 | 360 | EXPORT_SYMBOL_GPL(irq_free_descs); |
1f5a5b87 TG |
361 | |
362 | /** | |
363 | * irq_alloc_descs - allocate and initialize a range of irq descriptors | |
364 | * @irq: Allocate for specific irq number if irq >= 0 | |
365 | * @from: Start the search from this irq number | |
366 | * @cnt: Number of consecutive irqs to allocate. | |
367 | * @node: Preferred node on which the irq descriptor should be allocated | |
d522a0d1 | 368 | * @owner: Owning module (can be NULL) |
1f5a5b87 TG |
369 | * |
370 | * Returns the first irq number or error code | |
371 | */ | |
372 | int __ref | |
b6873807 SAS |
373 | __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node, |
374 | struct module *owner) | |
1f5a5b87 | 375 | { |
1f5a5b87 TG |
376 | int start, ret; |
377 | ||
378 | if (!cnt) | |
379 | return -EINVAL; | |
380 | ||
c5182b88 MB |
381 | if (irq >= 0) { |
382 | if (from > irq) | |
383 | return -EINVAL; | |
384 | from = irq; | |
62a08ae2 TG |
385 | } else { |
386 | /* | |
387 | * For interrupts which are freely allocated the | |
388 | * architecture can force a lower bound to the @from | |
389 | * argument. x86 uses this to exclude the GSI space. | |
390 | */ | |
391 | from = arch_dynirq_lower_bound(from); | |
c5182b88 MB |
392 | } |
393 | ||
a05a900a | 394 | mutex_lock(&sparse_irq_lock); |
1f5a5b87 | 395 | |
ed4dea6e YL |
396 | start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS, |
397 | from, cnt, 0); | |
1f5a5b87 TG |
398 | ret = -EEXIST; |
399 | if (irq >=0 && start != irq) | |
400 | goto err; | |
401 | ||
ed4dea6e YL |
402 | if (start + cnt > nr_irqs) { |
403 | ret = irq_expand_nr_irqs(start + cnt); | |
e7bcecb7 TG |
404 | if (ret) |
405 | goto err; | |
406 | } | |
1f5a5b87 TG |
407 | |
408 | bitmap_set(allocated_irqs, start, cnt); | |
a05a900a | 409 | mutex_unlock(&sparse_irq_lock); |
b6873807 | 410 | return alloc_descs(start, cnt, node, owner); |
1f5a5b87 TG |
411 | |
412 | err: | |
a05a900a | 413 | mutex_unlock(&sparse_irq_lock); |
1f5a5b87 TG |
414 | return ret; |
415 | } | |
b6873807 | 416 | EXPORT_SYMBOL_GPL(__irq_alloc_descs); |
1f5a5b87 | 417 | |
7b6ef126 TG |
418 | #ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ |
419 | /** | |
420 | * irq_alloc_hwirqs - Allocate an irq descriptor and initialize the hardware | |
421 | * @cnt: number of interrupts to allocate | |
422 | * @node: node on which to allocate | |
423 | * | |
424 | * Returns an interrupt number > 0 or 0, if the allocation fails. | |
425 | */ | |
426 | unsigned int irq_alloc_hwirqs(int cnt, int node) | |
427 | { | |
428 | int i, irq = __irq_alloc_descs(-1, 0, cnt, node, NULL); | |
429 | ||
430 | if (irq < 0) | |
431 | return 0; | |
432 | ||
433 | for (i = irq; cnt > 0; i++, cnt--) { | |
434 | if (arch_setup_hwirq(i, node)) | |
435 | goto err; | |
436 | irq_clear_status_flags(i, _IRQ_NOREQUEST); | |
437 | } | |
438 | return irq; | |
439 | ||
440 | err: | |
441 | for (i--; i >= irq; i--) { | |
442 | irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE); | |
443 | arch_teardown_hwirq(i); | |
444 | } | |
445 | irq_free_descs(irq, cnt); | |
446 | return 0; | |
447 | } | |
448 | EXPORT_SYMBOL_GPL(irq_alloc_hwirqs); | |
449 | ||
450 | /** | |
451 | * irq_free_hwirqs - Free irq descriptor and cleanup the hardware | |
452 | * @from: Free from irq number | |
453 | * @cnt: number of interrupts to free | |
454 | * | |
455 | */ | |
456 | void irq_free_hwirqs(unsigned int from, int cnt) | |
457 | { | |
8844aad8 | 458 | int i, j; |
7b6ef126 | 459 | |
8844aad8 | 460 | for (i = from, j = cnt; j > 0; i++, j--) { |
7b6ef126 TG |
461 | irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE); |
462 | arch_teardown_hwirq(i); | |
463 | } | |
464 | irq_free_descs(from, cnt); | |
465 | } | |
466 | EXPORT_SYMBOL_GPL(irq_free_hwirqs); | |
467 | #endif | |
468 | ||
a98d24b7 TG |
469 | /** |
470 | * irq_get_next_irq - get next allocated irq number | |
471 | * @offset: where to start the search | |
472 | * | |
473 | * Returns next irq number after offset or nr_irqs if none is found. | |
474 | */ | |
475 | unsigned int irq_get_next_irq(unsigned int offset) | |
476 | { | |
477 | return find_next_bit(allocated_irqs, nr_irqs, offset); | |
478 | } | |
479 | ||
d5eb4ad2 | 480 | struct irq_desc * |
31d9d9b6 MZ |
481 | __irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, |
482 | unsigned int check) | |
d5eb4ad2 TG |
483 | { |
484 | struct irq_desc *desc = irq_to_desc(irq); | |
485 | ||
486 | if (desc) { | |
31d9d9b6 MZ |
487 | if (check & _IRQ_DESC_CHECK) { |
488 | if ((check & _IRQ_DESC_PERCPU) && | |
489 | !irq_settings_is_per_cpu_devid(desc)) | |
490 | return NULL; | |
491 | ||
492 | if (!(check & _IRQ_DESC_PERCPU) && | |
493 | irq_settings_is_per_cpu_devid(desc)) | |
494 | return NULL; | |
495 | } | |
496 | ||
d5eb4ad2 TG |
497 | if (bus) |
498 | chip_bus_lock(desc); | |
499 | raw_spin_lock_irqsave(&desc->lock, *flags); | |
500 | } | |
501 | return desc; | |
502 | } | |
503 | ||
504 | void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus) | |
505 | { | |
506 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
507 | if (bus) | |
508 | chip_bus_sync_unlock(desc); | |
509 | } | |
510 | ||
31d9d9b6 MZ |
511 | int irq_set_percpu_devid(unsigned int irq) |
512 | { | |
513 | struct irq_desc *desc = irq_to_desc(irq); | |
514 | ||
515 | if (!desc) | |
516 | return -EINVAL; | |
517 | ||
518 | if (desc->percpu_enabled) | |
519 | return -EINVAL; | |
520 | ||
521 | desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL); | |
522 | ||
523 | if (!desc->percpu_enabled) | |
524 | return -ENOMEM; | |
525 | ||
526 | irq_set_percpu_devid_flags(irq); | |
527 | return 0; | |
528 | } | |
529 | ||
792d0018 TG |
530 | void kstat_incr_irq_this_cpu(unsigned int irq) |
531 | { | |
532 | kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq)); | |
533 | } | |
534 | ||
3795de23 TG |
535 | unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) |
536 | { | |
537 | struct irq_desc *desc = irq_to_desc(irq); | |
6c9ae009 ED |
538 | |
539 | return desc && desc->kstat_irqs ? | |
540 | *per_cpu_ptr(desc->kstat_irqs, cpu) : 0; | |
3795de23 | 541 | } |
478735e3 | 542 | |
478735e3 KH |
543 | unsigned int kstat_irqs(unsigned int irq) |
544 | { | |
545 | struct irq_desc *desc = irq_to_desc(irq); | |
546 | int cpu; | |
547 | int sum = 0; | |
548 | ||
6c9ae009 | 549 | if (!desc || !desc->kstat_irqs) |
478735e3 KH |
550 | return 0; |
551 | for_each_possible_cpu(cpu) | |
6c9ae009 | 552 | sum += *per_cpu_ptr(desc->kstat_irqs, cpu); |
478735e3 KH |
553 | return sum; |
554 | } |