powerpc/32: Remove 'noltlbs' kernel parameter
[linux-2.6-block.git] / kernel / irq / irqdesc.c
CommitLineData
52a65ff5 1// SPDX-License-Identifier: GPL-2.0
3795de23
TG
2/*
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5 *
99bfce5d
TG
6 * This file contains the interrupt descriptor management code. Detailed
7 * information is available in Documentation/core-api/genericirq.rst
3795de23
TG
8 *
9 */
10#include <linux/irq.h>
11#include <linux/slab.h>
ec53cf23 12#include <linux/export.h>
3795de23
TG
13#include <linux/interrupt.h>
14#include <linux/kernel_stat.h>
15#include <linux/radix-tree.h>
1f5a5b87 16#include <linux/bitmap.h>
76ba59f8 17#include <linux/irqdomain.h>
ecb3f394 18#include <linux/sysfs.h>
3795de23
TG
19
20#include "internals.h"
21
22/*
23 * lockdep: we want to handle all irq_desc locks as a single lock-class:
24 */
78f90d91 25static struct lock_class_key irq_desc_lock_class;
3795de23 26
fe051434 27#if defined(CONFIG_SMP)
fbf19803
TG
28static int __init irq_affinity_setup(char *str)
29{
10d94ff4 30 alloc_bootmem_cpumask_var(&irq_default_affinity);
fbf19803
TG
31 cpulist_parse(str, irq_default_affinity);
32 /*
33 * Set at least the boot cpu. We don't want to end up with
a359f757 34 * bugreports caused by random commandline masks
fbf19803
TG
35 */
36 cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
37 return 1;
38}
39__setup("irqaffinity=", irq_affinity_setup);
40
3795de23
TG
41static void __init init_irq_default_affinity(void)
42{
10d94ff4 43 if (!cpumask_available(irq_default_affinity))
fbf19803 44 zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
fbf19803
TG
45 if (cpumask_empty(irq_default_affinity))
46 cpumask_setall(irq_default_affinity);
3795de23
TG
47}
48#else
49static void __init init_irq_default_affinity(void)
50{
51}
52#endif
53
1f5a5b87 54#ifdef CONFIG_SMP
4ab764c3 55static int alloc_masks(struct irq_desc *desc, int node)
1f5a5b87 56{
9df872fa 57 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity,
4ab764c3 58 GFP_KERNEL, node))
1f5a5b87
TG
59 return -ENOMEM;
60
0d3f5425
TG
61#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
62 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity,
63 GFP_KERNEL, node)) {
64 free_cpumask_var(desc->irq_common_data.affinity);
65 return -ENOMEM;
66 }
67#endif
68
1f5a5b87 69#ifdef CONFIG_GENERIC_PENDING_IRQ
4ab764c3 70 if (!zalloc_cpumask_var_node(&desc->pending_mask, GFP_KERNEL, node)) {
0d3f5425
TG
71#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
72 free_cpumask_var(desc->irq_common_data.effective_affinity);
73#endif
9df872fa 74 free_cpumask_var(desc->irq_common_data.affinity);
1f5a5b87
TG
75 return -ENOMEM;
76 }
77#endif
78 return 0;
79}
80
45ddcecb
TG
81static void desc_smp_init(struct irq_desc *desc, int node,
82 const struct cpumask *affinity)
1f5a5b87 83{
45ddcecb
TG
84 if (!affinity)
85 affinity = irq_default_affinity;
86 cpumask_copy(desc->irq_common_data.affinity, affinity);
87
b7b29338
TG
88#ifdef CONFIG_GENERIC_PENDING_IRQ
89 cpumask_clear(desc->pending_mask);
90#endif
449e9cae
JL
91#ifdef CONFIG_NUMA
92 desc->irq_common_data.node = node;
93#endif
b7b29338
TG
94}
95
1f5a5b87
TG
96#else
97static inline int
4ab764c3 98alloc_masks(struct irq_desc *desc, int node) { return 0; }
45ddcecb
TG
99static inline void
100desc_smp_init(struct irq_desc *desc, int node, const struct cpumask *affinity) { }
1f5a5b87
TG
101#endif
102
b6873807 103static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
45ddcecb 104 const struct cpumask *affinity, struct module *owner)
1f5a5b87 105{
6c9ae009
ED
106 int cpu;
107
af7080e0 108 desc->irq_common_data.handler_data = NULL;
b237721c 109 desc->irq_common_data.msi_desc = NULL;
af7080e0 110
0d0b4c86 111 desc->irq_data.common = &desc->irq_common_data;
1f5a5b87
TG
112 desc->irq_data.irq = irq;
113 desc->irq_data.chip = &no_irq_chip;
114 desc->irq_data.chip_data = NULL;
f9e4989e 115 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
801a0e9a 116 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
d829b8fb 117 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
1f5a5b87
TG
118 desc->handle_irq = handle_bad_irq;
119 desc->depth = 1;
b7b29338
TG
120 desc->irq_count = 0;
121 desc->irqs_unhandled = 0;
1136b072 122 desc->tot_count = 0;
1f5a5b87 123 desc->name = NULL;
b6873807 124 desc->owner = owner;
6c9ae009
ED
125 for_each_possible_cpu(cpu)
126 *per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
45ddcecb 127 desc_smp_init(desc, node, affinity);
1f5a5b87
TG
128}
129
3795de23
TG
130int nr_irqs = NR_IRQS;
131EXPORT_SYMBOL_GPL(nr_irqs);
132
a05a900a 133static DEFINE_MUTEX(sparse_irq_lock);
c1ee6264 134static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
1f5a5b87 135
3795de23
TG
136#ifdef CONFIG_SPARSE_IRQ
137
ecb3f394
CG
138static void irq_kobj_release(struct kobject *kobj);
139
140#ifdef CONFIG_SYSFS
141static struct kobject *irq_kobj_base;
142
143#define IRQ_ATTR_RO(_name) \
144static struct kobj_attribute _name##_attr = __ATTR_RO(_name)
145
146static ssize_t per_cpu_count_show(struct kobject *kobj,
147 struct kobj_attribute *attr, char *buf)
148{
149 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
ecb3f394
CG
150 ssize_t ret = 0;
151 char *p = "";
501e2db6 152 int cpu;
ecb3f394
CG
153
154 for_each_possible_cpu(cpu) {
501e2db6 155 unsigned int c = irq_desc_kstat_cpu(desc, cpu);
ecb3f394
CG
156
157 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%u", p, c);
158 p = ",";
159 }
160
161 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
162 return ret;
163}
164IRQ_ATTR_RO(per_cpu_count);
165
166static ssize_t chip_name_show(struct kobject *kobj,
167 struct kobj_attribute *attr, char *buf)
168{
169 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
170 ssize_t ret = 0;
171
172 raw_spin_lock_irq(&desc->lock);
173 if (desc->irq_data.chip && desc->irq_data.chip->name) {
174 ret = scnprintf(buf, PAGE_SIZE, "%s\n",
175 desc->irq_data.chip->name);
176 }
177 raw_spin_unlock_irq(&desc->lock);
178
179 return ret;
180}
181IRQ_ATTR_RO(chip_name);
182
183static ssize_t hwirq_show(struct kobject *kobj,
184 struct kobj_attribute *attr, char *buf)
185{
186 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
187 ssize_t ret = 0;
188
189 raw_spin_lock_irq(&desc->lock);
190 if (desc->irq_data.domain)
d92df42d 191 ret = sprintf(buf, "%lu\n", desc->irq_data.hwirq);
ecb3f394
CG
192 raw_spin_unlock_irq(&desc->lock);
193
194 return ret;
195}
196IRQ_ATTR_RO(hwirq);
197
198static ssize_t type_show(struct kobject *kobj,
199 struct kobj_attribute *attr, char *buf)
200{
201 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
202 ssize_t ret = 0;
203
204 raw_spin_lock_irq(&desc->lock);
205 ret = sprintf(buf, "%s\n",
206 irqd_is_level_type(&desc->irq_data) ? "level" : "edge");
207 raw_spin_unlock_irq(&desc->lock);
208
209 return ret;
210
211}
212IRQ_ATTR_RO(type);
213
d61e2944
AS
214static ssize_t wakeup_show(struct kobject *kobj,
215 struct kobj_attribute *attr, char *buf)
216{
217 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
218 ssize_t ret = 0;
219
220 raw_spin_lock_irq(&desc->lock);
221 ret = sprintf(buf, "%s\n",
222 irqd_is_wakeup_set(&desc->irq_data) ? "enabled" : "disabled");
223 raw_spin_unlock_irq(&desc->lock);
224
225 return ret;
226
227}
228IRQ_ATTR_RO(wakeup);
229
ecb3f394
CG
230static ssize_t name_show(struct kobject *kobj,
231 struct kobj_attribute *attr, char *buf)
232{
233 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
234 ssize_t ret = 0;
235
236 raw_spin_lock_irq(&desc->lock);
237 if (desc->name)
238 ret = scnprintf(buf, PAGE_SIZE, "%s\n", desc->name);
239 raw_spin_unlock_irq(&desc->lock);
240
241 return ret;
242}
243IRQ_ATTR_RO(name);
244
245static ssize_t actions_show(struct kobject *kobj,
246 struct kobj_attribute *attr, char *buf)
247{
248 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
249 struct irqaction *action;
250 ssize_t ret = 0;
251 char *p = "";
252
253 raw_spin_lock_irq(&desc->lock);
254 for (action = desc->action; action != NULL; action = action->next) {
255 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%s",
256 p, action->name);
257 p = ",";
258 }
259 raw_spin_unlock_irq(&desc->lock);
260
261 if (ret)
262 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
263
264 return ret;
265}
266IRQ_ATTR_RO(actions);
267
268static struct attribute *irq_attrs[] = {
269 &per_cpu_count_attr.attr,
270 &chip_name_attr.attr,
271 &hwirq_attr.attr,
272 &type_attr.attr,
d61e2944 273 &wakeup_attr.attr,
ecb3f394
CG
274 &name_attr.attr,
275 &actions_attr.attr,
276 NULL
277};
52ba92f5 278ATTRIBUTE_GROUPS(irq);
ecb3f394
CG
279
280static struct kobj_type irq_kobj_type = {
281 .release = irq_kobj_release,
282 .sysfs_ops = &kobj_sysfs_ops,
52ba92f5 283 .default_groups = irq_groups,
ecb3f394
CG
284};
285
286static void irq_sysfs_add(int irq, struct irq_desc *desc)
287{
288 if (irq_kobj_base) {
289 /*
290 * Continue even in case of failure as this is nothing
291 * crucial.
292 */
293 if (kobject_add(&desc->kobj, irq_kobj_base, "%d", irq))
294 pr_warn("Failed to add kobject for irq %d\n", irq);
295 }
296}
297
d0ff14fd
MK
298static void irq_sysfs_del(struct irq_desc *desc)
299{
300 /*
301 * If irq_sysfs_init() has not yet been invoked (early boot), then
302 * irq_kobj_base is NULL and the descriptor was never added.
303 * kobject_del() complains about a object with no parent, so make
304 * it conditional.
305 */
306 if (irq_kobj_base)
307 kobject_del(&desc->kobj);
308}
309
ecb3f394
CG
310static int __init irq_sysfs_init(void)
311{
312 struct irq_desc *desc;
313 int irq;
314
315 /* Prevent concurrent irq alloc/free */
316 irq_lock_sparse();
317
318 irq_kobj_base = kobject_create_and_add("irq", kernel_kobj);
319 if (!irq_kobj_base) {
320 irq_unlock_sparse();
321 return -ENOMEM;
322 }
323
324 /* Add the already allocated interrupts */
325 for_each_irq_desc(irq, desc)
326 irq_sysfs_add(irq, desc);
327 irq_unlock_sparse();
328
329 return 0;
330}
331postcore_initcall(irq_sysfs_init);
332
333#else /* !CONFIG_SYSFS */
334
335static struct kobj_type irq_kobj_type = {
336 .release = irq_kobj_release,
337};
338
339static void irq_sysfs_add(int irq, struct irq_desc *desc) {}
d0ff14fd 340static void irq_sysfs_del(struct irq_desc *desc) {}
ecb3f394
CG
341
342#endif /* CONFIG_SYSFS */
343
baa0d233 344static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
3795de23 345
1f5a5b87 346static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
3795de23
TG
347{
348 radix_tree_insert(&irq_desc_tree, irq, desc);
349}
350
351struct irq_desc *irq_to_desc(unsigned int irq)
352{
353 return radix_tree_lookup(&irq_desc_tree, irq);
354}
11cc92eb 355#ifdef CONFIG_KVM_BOOK3S_64_HV_MODULE
64a1b95b
TG
356EXPORT_SYMBOL_GPL(irq_to_desc);
357#endif
3795de23 358
1f5a5b87
TG
359static void delete_irq_desc(unsigned int irq)
360{
361 radix_tree_delete(&irq_desc_tree, irq);
362}
363
364#ifdef CONFIG_SMP
365static void free_masks(struct irq_desc *desc)
366{
367#ifdef CONFIG_GENERIC_PENDING_IRQ
368 free_cpumask_var(desc->pending_mask);
369#endif
9df872fa 370 free_cpumask_var(desc->irq_common_data.affinity);
0d3f5425
TG
371#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
372 free_cpumask_var(desc->irq_common_data.effective_affinity);
373#endif
1f5a5b87
TG
374}
375#else
376static inline void free_masks(struct irq_desc *desc) { }
377#endif
378
c291ee62
TG
379void irq_lock_sparse(void)
380{
381 mutex_lock(&sparse_irq_lock);
382}
383
384void irq_unlock_sparse(void)
385{
386 mutex_unlock(&sparse_irq_lock);
387}
388
45ddcecb
TG
389static struct irq_desc *alloc_desc(int irq, int node, unsigned int flags,
390 const struct cpumask *affinity,
391 struct module *owner)
1f5a5b87
TG
392{
393 struct irq_desc *desc;
1f5a5b87 394
4ab764c3 395 desc = kzalloc_node(sizeof(*desc), GFP_KERNEL, node);
1f5a5b87
TG
396 if (!desc)
397 return NULL;
398 /* allocate based on nr_cpu_ids */
6c9ae009 399 desc->kstat_irqs = alloc_percpu(unsigned int);
1f5a5b87
TG
400 if (!desc->kstat_irqs)
401 goto err_desc;
402
4ab764c3 403 if (alloc_masks(desc, node))
1f5a5b87
TG
404 goto err_kstat;
405
406 raw_spin_lock_init(&desc->lock);
407 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
9114014c 408 mutex_init(&desc->request_mutex);
425a5072 409 init_rcu_head(&desc->rcu);
8707898e 410 init_waitqueue_head(&desc->wait_for_threads);
1f5a5b87 411
45ddcecb
TG
412 desc_set_defaults(irq, desc, node, affinity, owner);
413 irqd_set(&desc->irq_data, flags);
ecb3f394 414 kobject_init(&desc->kobj, &irq_kobj_type);
1f5a5b87
TG
415
416 return desc;
417
418err_kstat:
6c9ae009 419 free_percpu(desc->kstat_irqs);
1f5a5b87
TG
420err_desc:
421 kfree(desc);
422 return NULL;
423}
424
ecb3f394 425static void irq_kobj_release(struct kobject *kobj)
425a5072 426{
ecb3f394 427 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
425a5072
TG
428
429 free_masks(desc);
430 free_percpu(desc->kstat_irqs);
431 kfree(desc);
432}
433
ecb3f394
CG
434static void delayed_free_desc(struct rcu_head *rhp)
435{
436 struct irq_desc *desc = container_of(rhp, struct irq_desc, rcu);
437
438 kobject_put(&desc->kobj);
439}
440
1f5a5b87
TG
441static void free_desc(unsigned int irq)
442{
443 struct irq_desc *desc = irq_to_desc(irq);
1f5a5b87 444
087cdfb6 445 irq_remove_debugfs_entry(desc);
13bfe99e
TG
446 unregister_irq_proc(irq, desc);
447
c291ee62
TG
448 /*
449 * sparse_irq_lock protects also show_interrupts() and
450 * kstat_irq_usr(). Once we deleted the descriptor from the
451 * sparse tree we can free it. Access in proc will fail to
452 * lookup the descriptor.
ecb3f394
CG
453 *
454 * The sysfs entry must be serialized against a concurrent
455 * irq_sysfs_init() as well.
c291ee62 456 */
d0ff14fd 457 irq_sysfs_del(desc);
1f5a5b87 458 delete_irq_desc(irq);
1f5a5b87 459
425a5072
TG
460 /*
461 * We free the descriptor, masks and stat fields via RCU. That
462 * allows demultiplex interrupts to do rcu based management of
463 * the child interrupts.
4a5f4d2f 464 * This also allows us to use rcu in kstat_irqs_usr().
425a5072
TG
465 */
466 call_rcu(&desc->rcu, delayed_free_desc);
1f5a5b87
TG
467}
468
b6873807 469static int alloc_descs(unsigned int start, unsigned int cnt, int node,
bec04037
DL
470 const struct irq_affinity_desc *affinity,
471 struct module *owner)
1f5a5b87
TG
472{
473 struct irq_desc *desc;
e75eafb9 474 int i;
45ddcecb 475
e75eafb9
TG
476 /* Validate affinity mask(s) */
477 if (affinity) {
12fee4cd 478 for (i = 0; i < cnt; i++) {
bec04037 479 if (cpumask_empty(&affinity[i].mask))
e75eafb9
TG
480 return -EINVAL;
481 }
482 }
45ddcecb 483
1f5a5b87 484 for (i = 0; i < cnt; i++) {
bec04037 485 const struct cpumask *mask = NULL;
c410abbb 486 unsigned int flags = 0;
bec04037 487
45ddcecb 488 if (affinity) {
c410abbb
DL
489 if (affinity->is_managed) {
490 flags = IRQD_AFFINITY_MANAGED |
491 IRQD_MANAGED_SHUTDOWN;
492 }
bec04037 493 mask = &affinity->mask;
c410abbb 494 node = cpu_to_node(cpumask_first(mask));
e75eafb9 495 affinity++;
45ddcecb 496 }
c410abbb 497
45ddcecb 498 desc = alloc_desc(start + i, node, flags, mask, owner);
1f5a5b87
TG
499 if (!desc)
500 goto err;
1f5a5b87 501 irq_insert_desc(start + i, desc);
ecb3f394 502 irq_sysfs_add(start + i, desc);
e0b47794 503 irq_add_debugfs_entry(start + i, desc);
1f5a5b87 504 }
12ac1d0f 505 bitmap_set(allocated_irqs, start, cnt);
1f5a5b87
TG
506 return start;
507
508err:
509 for (i--; i >= 0; i--)
510 free_desc(start + i);
1f5a5b87
TG
511 return -ENOMEM;
512}
513
ed4dea6e 514static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7 515{
ed4dea6e 516 if (nr > IRQ_BITMAP_BITS)
e7bcecb7 517 return -ENOMEM;
ed4dea6e 518 nr_irqs = nr;
e7bcecb7
TG
519 return 0;
520}
521
3795de23
TG
522int __init early_irq_init(void)
523{
b683de2b 524 int i, initcnt, node = first_online_node;
3795de23 525 struct irq_desc *desc;
3795de23
TG
526
527 init_irq_default_affinity();
528
b683de2b
TG
529 /* Let arch update nr_irqs and return the nr of preallocated irqs */
530 initcnt = arch_probe_nr_irqs();
5a29ef22
VL
531 printk(KERN_INFO "NR_IRQS: %d, nr_irqs: %d, preallocated irqs: %d\n",
532 NR_IRQS, nr_irqs, initcnt);
3795de23 533
c1ee6264
TG
534 if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
535 nr_irqs = IRQ_BITMAP_BITS;
536
537 if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
538 initcnt = IRQ_BITMAP_BITS;
539
540 if (initcnt > nr_irqs)
541 nr_irqs = initcnt;
542
b683de2b 543 for (i = 0; i < initcnt; i++) {
45ddcecb 544 desc = alloc_desc(i, node, 0, NULL, NULL);
aa99ec0f
TG
545 set_bit(i, allocated_irqs);
546 irq_insert_desc(i, desc);
3795de23 547 }
3795de23
TG
548 return arch_early_irq_init();
549}
550
3795de23
TG
551#else /* !CONFIG_SPARSE_IRQ */
552
553struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
554 [0 ... NR_IRQS-1] = {
3795de23
TG
555 .handle_irq = handle_bad_irq,
556 .depth = 1,
557 .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
558 }
559};
560
3795de23
TG
561int __init early_irq_init(void)
562{
aa99ec0f 563 int count, i, node = first_online_node;
3795de23 564 struct irq_desc *desc;
3795de23
TG
565
566 init_irq_default_affinity();
567
5a29ef22 568 printk(KERN_INFO "NR_IRQS: %d\n", NR_IRQS);
3795de23
TG
569
570 desc = irq_desc;
571 count = ARRAY_SIZE(irq_desc);
572
573 for (i = 0; i < count; i++) {
6c9ae009 574 desc[i].kstat_irqs = alloc_percpu(unsigned int);
4ab764c3 575 alloc_masks(&desc[i], node);
e7fbad30 576 raw_spin_lock_init(&desc[i].lock);
154cd387 577 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
e8458e7a 578 mutex_init(&desc[i].request_mutex);
8707898e 579 init_waitqueue_head(&desc[i].wait_for_threads);
45ddcecb 580 desc_set_defaults(i, &desc[i], node, NULL, NULL);
3795de23
TG
581 }
582 return arch_early_irq_init();
583}
584
585struct irq_desc *irq_to_desc(unsigned int irq)
586{
587 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
588}
2c45aada 589EXPORT_SYMBOL(irq_to_desc);
3795de23 590
1f5a5b87
TG
591static void free_desc(unsigned int irq)
592{
d8179bc0
TG
593 struct irq_desc *desc = irq_to_desc(irq);
594 unsigned long flags;
595
596 raw_spin_lock_irqsave(&desc->lock, flags);
45ddcecb 597 desc_set_defaults(irq, desc, irq_desc_get_node(desc), NULL, NULL);
d8179bc0 598 raw_spin_unlock_irqrestore(&desc->lock, flags);
1f5a5b87
TG
599}
600
b6873807 601static inline int alloc_descs(unsigned int start, unsigned int cnt, int node,
bec04037 602 const struct irq_affinity_desc *affinity,
b6873807 603 struct module *owner)
1f5a5b87 604{
b6873807
SAS
605 u32 i;
606
607 for (i = 0; i < cnt; i++) {
608 struct irq_desc *desc = irq_to_desc(start + i);
609
610 desc->owner = owner;
611 }
12ac1d0f 612 bitmap_set(allocated_irqs, start, cnt);
1f5a5b87
TG
613 return start;
614}
e7bcecb7 615
ed4dea6e 616static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7
TG
617{
618 return -ENOMEM;
619}
620
f63b6a05
TG
621void irq_mark_irq(unsigned int irq)
622{
623 mutex_lock(&sparse_irq_lock);
624 bitmap_set(allocated_irqs, irq, 1);
625 mutex_unlock(&sparse_irq_lock);
626}
627
c940e01c
TG
628#ifdef CONFIG_GENERIC_IRQ_LEGACY
629void irq_init_desc(unsigned int irq)
630{
d8179bc0 631 free_desc(irq);
c940e01c
TG
632}
633#endif
634
3795de23
TG
635#endif /* !CONFIG_SPARSE_IRQ */
636
a3016b26 637int handle_irq_desc(struct irq_desc *desc)
fe12bc2c 638{
c16816ac 639 struct irq_data *data;
fe12bc2c
TG
640
641 if (!desc)
642 return -EINVAL;
c16816ac
TG
643
644 data = irq_desc_get_irq_data(desc);
fe13889c 645 if (WARN_ON_ONCE(!in_hardirq() && handle_enforce_irqctx(data)))
c16816ac
TG
646 return -EPERM;
647
bd0b9ac4 648 generic_handle_irq_desc(desc);
fe12bc2c
TG
649 return 0;
650}
a3016b26
MZ
651
652/**
653 * generic_handle_irq - Invoke the handler for a particular irq
654 * @irq: The irq number to handle
655 *
0953fb26
MR
656 * Returns: 0 on success, or -EINVAL if conversion has failed
657 *
658 * This function must be called from an IRQ context with irq regs
659 * initialized.
660 */
a3016b26
MZ
661int generic_handle_irq(unsigned int irq)
662{
663 return handle_irq_desc(irq_to_desc(irq));
664}
edf76f83 665EXPORT_SYMBOL_GPL(generic_handle_irq);
fe12bc2c 666
509853f9
SAS
667/**
668 * generic_handle_irq_safe - Invoke the handler for a particular irq from any
669 * context.
670 * @irq: The irq number to handle
671 *
672 * Returns: 0 on success, a negative value on error.
673 *
674 * This function can be called from any context (IRQ or process context). It
675 * will report an error if not invoked from IRQ context and the irq has been
676 * marked to enforce IRQ-context only.
677 */
678int generic_handle_irq_safe(unsigned int irq)
679{
680 unsigned long flags;
681 int ret;
682
683 local_irq_save(flags);
684 ret = handle_irq_desc(irq_to_desc(irq));
685 local_irq_restore(flags);
686 return ret;
687}
688EXPORT_SYMBOL_GPL(generic_handle_irq_safe);
689
e1c05491 690#ifdef CONFIG_IRQ_DOMAIN
76ba59f8 691/**
8240ef50 692 * generic_handle_domain_irq - Invoke the handler for a HW irq belonging
0953fb26 693 * to a domain.
8240ef50
MZ
694 * @domain: The domain where to perform the lookup
695 * @hwirq: The HW irq number to convert to a logical one
696 *
697 * Returns: 0 on success, or -EINVAL if conversion has failed
698 *
0953fb26
MR
699 * This function must be called from an IRQ context with irq regs
700 * initialized.
8240ef50
MZ
701 */
702int generic_handle_domain_irq(struct irq_domain *domain, unsigned int hwirq)
703{
704 return handle_irq_desc(irq_resolve_mapping(domain, hwirq));
705}
706EXPORT_SYMBOL_GPL(generic_handle_domain_irq);
707
2fe35f8e 708/**
0953fb26
MR
709 * generic_handle_domain_nmi - Invoke the handler for a HW nmi belonging
710 * to a domain.
2fe35f8e
MR
711 * @domain: The domain where to perform the lookup
712 * @hwirq: The HW irq number to convert to a logical one
2fe35f8e
MR
713 *
714 * Returns: 0 on success, or -EINVAL if conversion has failed
17ce302f 715 *
0953fb26
MR
716 * This function must be called from an NMI context with irq regs
717 * initialized.
718 **/
719int generic_handle_domain_nmi(struct irq_domain *domain, unsigned int hwirq)
6e4933a0 720{
0953fb26
MR
721 WARN_ON_ONCE(!in_nmi());
722 return handle_irq_desc(irq_resolve_mapping(domain, hwirq));
6e4933a0
JT
723}
724#endif
76ba59f8 725
1f5a5b87
TG
726/* Dynamic interrupt handling */
727
728/**
729 * irq_free_descs - free irq descriptors
730 * @from: Start of descriptor range
731 * @cnt: Number of consecutive irqs to free
732 */
733void irq_free_descs(unsigned int from, unsigned int cnt)
734{
1f5a5b87
TG
735 int i;
736
737 if (from >= nr_irqs || (from + cnt) > nr_irqs)
738 return;
739
12ac1d0f 740 mutex_lock(&sparse_irq_lock);
1f5a5b87
TG
741 for (i = 0; i < cnt; i++)
742 free_desc(from + i);
743
1f5a5b87 744 bitmap_clear(allocated_irqs, from, cnt);
a05a900a 745 mutex_unlock(&sparse_irq_lock);
1f5a5b87 746}
edf76f83 747EXPORT_SYMBOL_GPL(irq_free_descs);
1f5a5b87
TG
748
749/**
20a15ee0 750 * __irq_alloc_descs - allocate and initialize a range of irq descriptors
1f5a5b87
TG
751 * @irq: Allocate for specific irq number if irq >= 0
752 * @from: Start the search from this irq number
753 * @cnt: Number of consecutive irqs to allocate.
754 * @node: Preferred node on which the irq descriptor should be allocated
d522a0d1 755 * @owner: Owning module (can be NULL)
e75eafb9
TG
756 * @affinity: Optional pointer to an affinity mask array of size @cnt which
757 * hints where the irq descriptors should be allocated and which
758 * default affinities to use
1f5a5b87
TG
759 *
760 * Returns the first irq number or error code
761 */
762int __ref
b6873807 763__irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
bec04037 764 struct module *owner, const struct irq_affinity_desc *affinity)
1f5a5b87 765{
1f5a5b87
TG
766 int start, ret;
767
768 if (!cnt)
769 return -EINVAL;
770
c5182b88
MB
771 if (irq >= 0) {
772 if (from > irq)
773 return -EINVAL;
774 from = irq;
62a08ae2
TG
775 } else {
776 /*
777 * For interrupts which are freely allocated the
778 * architecture can force a lower bound to the @from
779 * argument. x86 uses this to exclude the GSI space.
780 */
781 from = arch_dynirq_lower_bound(from);
c5182b88
MB
782 }
783
a05a900a 784 mutex_lock(&sparse_irq_lock);
1f5a5b87 785
ed4dea6e
YL
786 start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
787 from, cnt, 0);
1f5a5b87
TG
788 ret = -EEXIST;
789 if (irq >=0 && start != irq)
12ac1d0f 790 goto unlock;
1f5a5b87 791
ed4dea6e
YL
792 if (start + cnt > nr_irqs) {
793 ret = irq_expand_nr_irqs(start + cnt);
e7bcecb7 794 if (ret)
12ac1d0f 795 goto unlock;
e7bcecb7 796 }
12ac1d0f
TG
797 ret = alloc_descs(start, cnt, node, affinity, owner);
798unlock:
a05a900a 799 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
800 return ret;
801}
b6873807 802EXPORT_SYMBOL_GPL(__irq_alloc_descs);
1f5a5b87 803
a98d24b7
TG
804/**
805 * irq_get_next_irq - get next allocated irq number
806 * @offset: where to start the search
807 *
808 * Returns next irq number after offset or nr_irqs if none is found.
809 */
810unsigned int irq_get_next_irq(unsigned int offset)
811{
812 return find_next_bit(allocated_irqs, nr_irqs, offset);
813}
814
d5eb4ad2 815struct irq_desc *
31d9d9b6
MZ
816__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
817 unsigned int check)
d5eb4ad2
TG
818{
819 struct irq_desc *desc = irq_to_desc(irq);
820
821 if (desc) {
31d9d9b6
MZ
822 if (check & _IRQ_DESC_CHECK) {
823 if ((check & _IRQ_DESC_PERCPU) &&
824 !irq_settings_is_per_cpu_devid(desc))
825 return NULL;
826
827 if (!(check & _IRQ_DESC_PERCPU) &&
828 irq_settings_is_per_cpu_devid(desc))
829 return NULL;
830 }
831
d5eb4ad2
TG
832 if (bus)
833 chip_bus_lock(desc);
834 raw_spin_lock_irqsave(&desc->lock, *flags);
835 }
836 return desc;
837}
838
839void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
8b3b5479 840 __releases(&desc->lock)
d5eb4ad2
TG
841{
842 raw_spin_unlock_irqrestore(&desc->lock, flags);
843 if (bus)
844 chip_bus_sync_unlock(desc);
845}
846
222df54f
MZ
847int irq_set_percpu_devid_partition(unsigned int irq,
848 const struct cpumask *affinity)
31d9d9b6
MZ
849{
850 struct irq_desc *desc = irq_to_desc(irq);
851
852 if (!desc)
853 return -EINVAL;
854
855 if (desc->percpu_enabled)
856 return -EINVAL;
857
858 desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL);
859
860 if (!desc->percpu_enabled)
861 return -ENOMEM;
862
222df54f
MZ
863 if (affinity)
864 desc->percpu_affinity = affinity;
865 else
866 desc->percpu_affinity = cpu_possible_mask;
867
31d9d9b6
MZ
868 irq_set_percpu_devid_flags(irq);
869 return 0;
870}
871
222df54f
MZ
872int irq_set_percpu_devid(unsigned int irq)
873{
874 return irq_set_percpu_devid_partition(irq, NULL);
875}
876
877int irq_get_percpu_devid_partition(unsigned int irq, struct cpumask *affinity)
878{
879 struct irq_desc *desc = irq_to_desc(irq);
880
881 if (!desc || !desc->percpu_enabled)
882 return -EINVAL;
883
884 if (affinity)
885 cpumask_copy(affinity, desc->percpu_affinity);
886
887 return 0;
888}
5ffeb050 889EXPORT_SYMBOL_GPL(irq_get_percpu_devid_partition);
222df54f 890
792d0018
TG
891void kstat_incr_irq_this_cpu(unsigned int irq)
892{
b51bf95c 893 kstat_incr_irqs_this_cpu(irq_to_desc(irq));
792d0018
TG
894}
895
c291ee62
TG
896/**
897 * kstat_irqs_cpu - Get the statistics for an interrupt on a cpu
898 * @irq: The interrupt number
899 * @cpu: The cpu number
900 *
901 * Returns the sum of interrupt counts on @cpu since boot for
902 * @irq. The caller must ensure that the interrupt is not removed
903 * concurrently.
904 */
3795de23
TG
905unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
906{
907 struct irq_desc *desc = irq_to_desc(irq);
6c9ae009
ED
908
909 return desc && desc->kstat_irqs ?
910 *per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
3795de23 911}
478735e3 912
c09cb129
ST
913static bool irq_is_nmi(struct irq_desc *desc)
914{
915 return desc->istate & IRQS_NMI;
916}
917
26c19d0a 918static unsigned int kstat_irqs(unsigned int irq)
478735e3
KH
919{
920 struct irq_desc *desc = irq_to_desc(irq);
5e9662fa 921 unsigned int sum = 0;
1136b072 922 int cpu;
478735e3 923
6c9ae009 924 if (!desc || !desc->kstat_irqs)
478735e3 925 return 0;
1136b072 926 if (!irq_settings_is_per_cpu_devid(desc) &&
c09cb129
ST
927 !irq_settings_is_per_cpu(desc) &&
928 !irq_is_nmi(desc))
9e42ad10 929 return data_race(desc->tot_count);
1136b072 930
478735e3 931 for_each_possible_cpu(cpu)
9e42ad10 932 sum += data_race(*per_cpu_ptr(desc->kstat_irqs, cpu));
478735e3
KH
933 return sum;
934}
c291ee62
TG
935
936/**
26c19d0a 937 * kstat_irqs_usr - Get the statistics for an interrupt from thread context
c291ee62
TG
938 * @irq: The interrupt number
939 *
4a5f4d2f 940 * Returns the sum of interrupt counts on all cpus since boot for @irq.
26c19d0a
TG
941 *
942 * It uses rcu to protect the access since a concurrent removal of an
943 * interrupt descriptor is observing an rcu grace period before
944 * delayed_free_desc()/irq_kobj_release().
c291ee62
TG
945 */
946unsigned int kstat_irqs_usr(unsigned int irq)
947{
7df0b278 948 unsigned int sum;
c291ee62 949
4a5f4d2f 950 rcu_read_lock();
c291ee62 951 sum = kstat_irqs(irq);
4a5f4d2f 952 rcu_read_unlock();
c291ee62
TG
953 return sum;
954}
f1c6306c
TG
955
956#ifdef CONFIG_LOCKDEP
957void __irq_set_lockdep_class(unsigned int irq, struct lock_class_key *lock_class,
958 struct lock_class_key *request_class)
959{
960 struct irq_desc *desc = irq_to_desc(irq);
961
962 if (desc) {
963 lockdep_set_class(&desc->lock, lock_class);
964 lockdep_set_class(&desc->request_mutex, request_class);
965 }
966}
967EXPORT_SYMBOL_GPL(__irq_set_lockdep_class);
968#endif