genirq/msi: Provide domain flags to allocate/free MSI descriptors automatically
[linux-block.git] / kernel / irq / irqdesc.c
CommitLineData
52a65ff5 1// SPDX-License-Identifier: GPL-2.0
3795de23
TG
2/*
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5 *
99bfce5d
TG
6 * This file contains the interrupt descriptor management code. Detailed
7 * information is available in Documentation/core-api/genericirq.rst
3795de23
TG
8 *
9 */
10#include <linux/irq.h>
11#include <linux/slab.h>
ec53cf23 12#include <linux/export.h>
3795de23
TG
13#include <linux/interrupt.h>
14#include <linux/kernel_stat.h>
15#include <linux/radix-tree.h>
1f5a5b87 16#include <linux/bitmap.h>
76ba59f8 17#include <linux/irqdomain.h>
ecb3f394 18#include <linux/sysfs.h>
3795de23
TG
19
20#include "internals.h"
21
22/*
23 * lockdep: we want to handle all irq_desc locks as a single lock-class:
24 */
78f90d91 25static struct lock_class_key irq_desc_lock_class;
3795de23 26
fe051434 27#if defined(CONFIG_SMP)
fbf19803
TG
28static int __init irq_affinity_setup(char *str)
29{
10d94ff4 30 alloc_bootmem_cpumask_var(&irq_default_affinity);
fbf19803
TG
31 cpulist_parse(str, irq_default_affinity);
32 /*
33 * Set at least the boot cpu. We don't want to end up with
a359f757 34 * bugreports caused by random commandline masks
fbf19803
TG
35 */
36 cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
37 return 1;
38}
39__setup("irqaffinity=", irq_affinity_setup);
40
3795de23
TG
41static void __init init_irq_default_affinity(void)
42{
10d94ff4 43 if (!cpumask_available(irq_default_affinity))
fbf19803 44 zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
fbf19803
TG
45 if (cpumask_empty(irq_default_affinity))
46 cpumask_setall(irq_default_affinity);
3795de23
TG
47}
48#else
49static void __init init_irq_default_affinity(void)
50{
51}
52#endif
53
1f5a5b87 54#ifdef CONFIG_SMP
4ab764c3 55static int alloc_masks(struct irq_desc *desc, int node)
1f5a5b87 56{
9df872fa 57 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity,
4ab764c3 58 GFP_KERNEL, node))
1f5a5b87
TG
59 return -ENOMEM;
60
0d3f5425
TG
61#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
62 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity,
63 GFP_KERNEL, node)) {
64 free_cpumask_var(desc->irq_common_data.affinity);
65 return -ENOMEM;
66 }
67#endif
68
1f5a5b87 69#ifdef CONFIG_GENERIC_PENDING_IRQ
4ab764c3 70 if (!zalloc_cpumask_var_node(&desc->pending_mask, GFP_KERNEL, node)) {
0d3f5425
TG
71#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
72 free_cpumask_var(desc->irq_common_data.effective_affinity);
73#endif
9df872fa 74 free_cpumask_var(desc->irq_common_data.affinity);
1f5a5b87
TG
75 return -ENOMEM;
76 }
77#endif
78 return 0;
79}
80
45ddcecb
TG
81static void desc_smp_init(struct irq_desc *desc, int node,
82 const struct cpumask *affinity)
1f5a5b87 83{
45ddcecb
TG
84 if (!affinity)
85 affinity = irq_default_affinity;
86 cpumask_copy(desc->irq_common_data.affinity, affinity);
87
b7b29338
TG
88#ifdef CONFIG_GENERIC_PENDING_IRQ
89 cpumask_clear(desc->pending_mask);
90#endif
449e9cae
JL
91#ifdef CONFIG_NUMA
92 desc->irq_common_data.node = node;
93#endif
b7b29338
TG
94}
95
1f5a5b87
TG
96#else
97static inline int
4ab764c3 98alloc_masks(struct irq_desc *desc, int node) { return 0; }
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TG
99static inline void
100desc_smp_init(struct irq_desc *desc, int node, const struct cpumask *affinity) { }
1f5a5b87
TG
101#endif
102
b6873807 103static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
45ddcecb 104 const struct cpumask *affinity, struct module *owner)
1f5a5b87 105{
6c9ae009
ED
106 int cpu;
107
af7080e0 108 desc->irq_common_data.handler_data = NULL;
b237721c 109 desc->irq_common_data.msi_desc = NULL;
af7080e0 110
0d0b4c86 111 desc->irq_data.common = &desc->irq_common_data;
1f5a5b87
TG
112 desc->irq_data.irq = irq;
113 desc->irq_data.chip = &no_irq_chip;
114 desc->irq_data.chip_data = NULL;
f9e4989e 115 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
801a0e9a 116 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
d829b8fb 117 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
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TG
118 desc->handle_irq = handle_bad_irq;
119 desc->depth = 1;
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TG
120 desc->irq_count = 0;
121 desc->irqs_unhandled = 0;
1136b072 122 desc->tot_count = 0;
1f5a5b87 123 desc->name = NULL;
b6873807 124 desc->owner = owner;
6c9ae009
ED
125 for_each_possible_cpu(cpu)
126 *per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
45ddcecb 127 desc_smp_init(desc, node, affinity);
1f5a5b87
TG
128}
129
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130int nr_irqs = NR_IRQS;
131EXPORT_SYMBOL_GPL(nr_irqs);
132
a05a900a 133static DEFINE_MUTEX(sparse_irq_lock);
c1ee6264 134static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
1f5a5b87 135
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TG
136#ifdef CONFIG_SPARSE_IRQ
137
ecb3f394
CG
138static void irq_kobj_release(struct kobject *kobj);
139
140#ifdef CONFIG_SYSFS
141static struct kobject *irq_kobj_base;
142
143#define IRQ_ATTR_RO(_name) \
144static struct kobj_attribute _name##_attr = __ATTR_RO(_name)
145
146static ssize_t per_cpu_count_show(struct kobject *kobj,
147 struct kobj_attribute *attr, char *buf)
148{
149 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
ecb3f394
CG
150 ssize_t ret = 0;
151 char *p = "";
501e2db6 152 int cpu;
ecb3f394
CG
153
154 for_each_possible_cpu(cpu) {
501e2db6 155 unsigned int c = irq_desc_kstat_cpu(desc, cpu);
ecb3f394
CG
156
157 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%u", p, c);
158 p = ",";
159 }
160
161 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
162 return ret;
163}
164IRQ_ATTR_RO(per_cpu_count);
165
166static ssize_t chip_name_show(struct kobject *kobj,
167 struct kobj_attribute *attr, char *buf)
168{
169 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
170 ssize_t ret = 0;
171
172 raw_spin_lock_irq(&desc->lock);
173 if (desc->irq_data.chip && desc->irq_data.chip->name) {
174 ret = scnprintf(buf, PAGE_SIZE, "%s\n",
175 desc->irq_data.chip->name);
176 }
177 raw_spin_unlock_irq(&desc->lock);
178
179 return ret;
180}
181IRQ_ATTR_RO(chip_name);
182
183static ssize_t hwirq_show(struct kobject *kobj,
184 struct kobj_attribute *attr, char *buf)
185{
186 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
187 ssize_t ret = 0;
188
189 raw_spin_lock_irq(&desc->lock);
190 if (desc->irq_data.domain)
d92df42d 191 ret = sprintf(buf, "%lu\n", desc->irq_data.hwirq);
ecb3f394
CG
192 raw_spin_unlock_irq(&desc->lock);
193
194 return ret;
195}
196IRQ_ATTR_RO(hwirq);
197
198static ssize_t type_show(struct kobject *kobj,
199 struct kobj_attribute *attr, char *buf)
200{
201 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
202 ssize_t ret = 0;
203
204 raw_spin_lock_irq(&desc->lock);
205 ret = sprintf(buf, "%s\n",
206 irqd_is_level_type(&desc->irq_data) ? "level" : "edge");
207 raw_spin_unlock_irq(&desc->lock);
208
209 return ret;
210
211}
212IRQ_ATTR_RO(type);
213
d61e2944
AS
214static ssize_t wakeup_show(struct kobject *kobj,
215 struct kobj_attribute *attr, char *buf)
216{
217 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
218 ssize_t ret = 0;
219
220 raw_spin_lock_irq(&desc->lock);
221 ret = sprintf(buf, "%s\n",
222 irqd_is_wakeup_set(&desc->irq_data) ? "enabled" : "disabled");
223 raw_spin_unlock_irq(&desc->lock);
224
225 return ret;
226
227}
228IRQ_ATTR_RO(wakeup);
229
ecb3f394
CG
230static ssize_t name_show(struct kobject *kobj,
231 struct kobj_attribute *attr, char *buf)
232{
233 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
234 ssize_t ret = 0;
235
236 raw_spin_lock_irq(&desc->lock);
237 if (desc->name)
238 ret = scnprintf(buf, PAGE_SIZE, "%s\n", desc->name);
239 raw_spin_unlock_irq(&desc->lock);
240
241 return ret;
242}
243IRQ_ATTR_RO(name);
244
245static ssize_t actions_show(struct kobject *kobj,
246 struct kobj_attribute *attr, char *buf)
247{
248 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
249 struct irqaction *action;
250 ssize_t ret = 0;
251 char *p = "";
252
253 raw_spin_lock_irq(&desc->lock);
254 for (action = desc->action; action != NULL; action = action->next) {
255 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%s",
256 p, action->name);
257 p = ",";
258 }
259 raw_spin_unlock_irq(&desc->lock);
260
261 if (ret)
262 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
263
264 return ret;
265}
266IRQ_ATTR_RO(actions);
267
268static struct attribute *irq_attrs[] = {
269 &per_cpu_count_attr.attr,
270 &chip_name_attr.attr,
271 &hwirq_attr.attr,
272 &type_attr.attr,
d61e2944 273 &wakeup_attr.attr,
ecb3f394
CG
274 &name_attr.attr,
275 &actions_attr.attr,
276 NULL
277};
52ba92f5 278ATTRIBUTE_GROUPS(irq);
ecb3f394
CG
279
280static struct kobj_type irq_kobj_type = {
281 .release = irq_kobj_release,
282 .sysfs_ops = &kobj_sysfs_ops,
52ba92f5 283 .default_groups = irq_groups,
ecb3f394
CG
284};
285
286static void irq_sysfs_add(int irq, struct irq_desc *desc)
287{
288 if (irq_kobj_base) {
289 /*
290 * Continue even in case of failure as this is nothing
291 * crucial.
292 */
293 if (kobject_add(&desc->kobj, irq_kobj_base, "%d", irq))
294 pr_warn("Failed to add kobject for irq %d\n", irq);
295 }
296}
297
d0ff14fd
MK
298static void irq_sysfs_del(struct irq_desc *desc)
299{
300 /*
301 * If irq_sysfs_init() has not yet been invoked (early boot), then
302 * irq_kobj_base is NULL and the descriptor was never added.
303 * kobject_del() complains about a object with no parent, so make
304 * it conditional.
305 */
306 if (irq_kobj_base)
307 kobject_del(&desc->kobj);
308}
309
ecb3f394
CG
310static int __init irq_sysfs_init(void)
311{
312 struct irq_desc *desc;
313 int irq;
314
315 /* Prevent concurrent irq alloc/free */
316 irq_lock_sparse();
317
318 irq_kobj_base = kobject_create_and_add("irq", kernel_kobj);
319 if (!irq_kobj_base) {
320 irq_unlock_sparse();
321 return -ENOMEM;
322 }
323
324 /* Add the already allocated interrupts */
325 for_each_irq_desc(irq, desc)
326 irq_sysfs_add(irq, desc);
327 irq_unlock_sparse();
328
329 return 0;
330}
331postcore_initcall(irq_sysfs_init);
332
333#else /* !CONFIG_SYSFS */
334
335static struct kobj_type irq_kobj_type = {
336 .release = irq_kobj_release,
337};
338
339static void irq_sysfs_add(int irq, struct irq_desc *desc) {}
d0ff14fd 340static void irq_sysfs_del(struct irq_desc *desc) {}
ecb3f394
CG
341
342#endif /* CONFIG_SYSFS */
343
baa0d233 344static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
3795de23 345
1f5a5b87 346static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
3795de23
TG
347{
348 radix_tree_insert(&irq_desc_tree, irq, desc);
349}
350
351struct irq_desc *irq_to_desc(unsigned int irq)
352{
353 return radix_tree_lookup(&irq_desc_tree, irq);
354}
11cc92eb 355#ifdef CONFIG_KVM_BOOK3S_64_HV_MODULE
64a1b95b
TG
356EXPORT_SYMBOL_GPL(irq_to_desc);
357#endif
3795de23 358
1f5a5b87
TG
359static void delete_irq_desc(unsigned int irq)
360{
361 radix_tree_delete(&irq_desc_tree, irq);
362}
363
364#ifdef CONFIG_SMP
365static void free_masks(struct irq_desc *desc)
366{
367#ifdef CONFIG_GENERIC_PENDING_IRQ
368 free_cpumask_var(desc->pending_mask);
369#endif
9df872fa 370 free_cpumask_var(desc->irq_common_data.affinity);
0d3f5425
TG
371#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
372 free_cpumask_var(desc->irq_common_data.effective_affinity);
373#endif
1f5a5b87
TG
374}
375#else
376static inline void free_masks(struct irq_desc *desc) { }
377#endif
378
c291ee62
TG
379void irq_lock_sparse(void)
380{
381 mutex_lock(&sparse_irq_lock);
382}
383
384void irq_unlock_sparse(void)
385{
386 mutex_unlock(&sparse_irq_lock);
387}
388
45ddcecb
TG
389static struct irq_desc *alloc_desc(int irq, int node, unsigned int flags,
390 const struct cpumask *affinity,
391 struct module *owner)
1f5a5b87
TG
392{
393 struct irq_desc *desc;
1f5a5b87 394
4ab764c3 395 desc = kzalloc_node(sizeof(*desc), GFP_KERNEL, node);
1f5a5b87
TG
396 if (!desc)
397 return NULL;
398 /* allocate based on nr_cpu_ids */
6c9ae009 399 desc->kstat_irqs = alloc_percpu(unsigned int);
1f5a5b87
TG
400 if (!desc->kstat_irqs)
401 goto err_desc;
402
4ab764c3 403 if (alloc_masks(desc, node))
1f5a5b87
TG
404 goto err_kstat;
405
406 raw_spin_lock_init(&desc->lock);
407 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
9114014c 408 mutex_init(&desc->request_mutex);
425a5072 409 init_rcu_head(&desc->rcu);
1f5a5b87 410
45ddcecb
TG
411 desc_set_defaults(irq, desc, node, affinity, owner);
412 irqd_set(&desc->irq_data, flags);
ecb3f394 413 kobject_init(&desc->kobj, &irq_kobj_type);
1f5a5b87
TG
414
415 return desc;
416
417err_kstat:
6c9ae009 418 free_percpu(desc->kstat_irqs);
1f5a5b87
TG
419err_desc:
420 kfree(desc);
421 return NULL;
422}
423
ecb3f394 424static void irq_kobj_release(struct kobject *kobj)
425a5072 425{
ecb3f394 426 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
425a5072
TG
427
428 free_masks(desc);
429 free_percpu(desc->kstat_irqs);
430 kfree(desc);
431}
432
ecb3f394
CG
433static void delayed_free_desc(struct rcu_head *rhp)
434{
435 struct irq_desc *desc = container_of(rhp, struct irq_desc, rcu);
436
437 kobject_put(&desc->kobj);
438}
439
1f5a5b87
TG
440static void free_desc(unsigned int irq)
441{
442 struct irq_desc *desc = irq_to_desc(irq);
1f5a5b87 443
087cdfb6 444 irq_remove_debugfs_entry(desc);
13bfe99e
TG
445 unregister_irq_proc(irq, desc);
446
c291ee62
TG
447 /*
448 * sparse_irq_lock protects also show_interrupts() and
449 * kstat_irq_usr(). Once we deleted the descriptor from the
450 * sparse tree we can free it. Access in proc will fail to
451 * lookup the descriptor.
ecb3f394
CG
452 *
453 * The sysfs entry must be serialized against a concurrent
454 * irq_sysfs_init() as well.
c291ee62 455 */
d0ff14fd 456 irq_sysfs_del(desc);
1f5a5b87 457 delete_irq_desc(irq);
1f5a5b87 458
425a5072
TG
459 /*
460 * We free the descriptor, masks and stat fields via RCU. That
461 * allows demultiplex interrupts to do rcu based management of
462 * the child interrupts.
4a5f4d2f 463 * This also allows us to use rcu in kstat_irqs_usr().
425a5072
TG
464 */
465 call_rcu(&desc->rcu, delayed_free_desc);
1f5a5b87
TG
466}
467
b6873807 468static int alloc_descs(unsigned int start, unsigned int cnt, int node,
bec04037
DL
469 const struct irq_affinity_desc *affinity,
470 struct module *owner)
1f5a5b87
TG
471{
472 struct irq_desc *desc;
e75eafb9 473 int i;
45ddcecb 474
e75eafb9
TG
475 /* Validate affinity mask(s) */
476 if (affinity) {
12fee4cd 477 for (i = 0; i < cnt; i++) {
bec04037 478 if (cpumask_empty(&affinity[i].mask))
e75eafb9
TG
479 return -EINVAL;
480 }
481 }
45ddcecb 482
1f5a5b87 483 for (i = 0; i < cnt; i++) {
bec04037 484 const struct cpumask *mask = NULL;
c410abbb 485 unsigned int flags = 0;
bec04037 486
45ddcecb 487 if (affinity) {
c410abbb
DL
488 if (affinity->is_managed) {
489 flags = IRQD_AFFINITY_MANAGED |
490 IRQD_MANAGED_SHUTDOWN;
491 }
bec04037 492 mask = &affinity->mask;
c410abbb 493 node = cpu_to_node(cpumask_first(mask));
e75eafb9 494 affinity++;
45ddcecb 495 }
c410abbb 496
45ddcecb 497 desc = alloc_desc(start + i, node, flags, mask, owner);
1f5a5b87
TG
498 if (!desc)
499 goto err;
1f5a5b87 500 irq_insert_desc(start + i, desc);
ecb3f394 501 irq_sysfs_add(start + i, desc);
e0b47794 502 irq_add_debugfs_entry(start + i, desc);
1f5a5b87 503 }
12ac1d0f 504 bitmap_set(allocated_irqs, start, cnt);
1f5a5b87
TG
505 return start;
506
507err:
508 for (i--; i >= 0; i--)
509 free_desc(start + i);
1f5a5b87
TG
510 return -ENOMEM;
511}
512
ed4dea6e 513static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7 514{
ed4dea6e 515 if (nr > IRQ_BITMAP_BITS)
e7bcecb7 516 return -ENOMEM;
ed4dea6e 517 nr_irqs = nr;
e7bcecb7
TG
518 return 0;
519}
520
3795de23
TG
521int __init early_irq_init(void)
522{
b683de2b 523 int i, initcnt, node = first_online_node;
3795de23 524 struct irq_desc *desc;
3795de23
TG
525
526 init_irq_default_affinity();
527
b683de2b
TG
528 /* Let arch update nr_irqs and return the nr of preallocated irqs */
529 initcnt = arch_probe_nr_irqs();
5a29ef22
VL
530 printk(KERN_INFO "NR_IRQS: %d, nr_irqs: %d, preallocated irqs: %d\n",
531 NR_IRQS, nr_irqs, initcnt);
3795de23 532
c1ee6264
TG
533 if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
534 nr_irqs = IRQ_BITMAP_BITS;
535
536 if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
537 initcnt = IRQ_BITMAP_BITS;
538
539 if (initcnt > nr_irqs)
540 nr_irqs = initcnt;
541
b683de2b 542 for (i = 0; i < initcnt; i++) {
45ddcecb 543 desc = alloc_desc(i, node, 0, NULL, NULL);
aa99ec0f
TG
544 set_bit(i, allocated_irqs);
545 irq_insert_desc(i, desc);
3795de23 546 }
3795de23
TG
547 return arch_early_irq_init();
548}
549
3795de23
TG
550#else /* !CONFIG_SPARSE_IRQ */
551
552struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
553 [0 ... NR_IRQS-1] = {
3795de23
TG
554 .handle_irq = handle_bad_irq,
555 .depth = 1,
556 .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
557 }
558};
559
3795de23
TG
560int __init early_irq_init(void)
561{
aa99ec0f 562 int count, i, node = first_online_node;
3795de23 563 struct irq_desc *desc;
3795de23
TG
564
565 init_irq_default_affinity();
566
5a29ef22 567 printk(KERN_INFO "NR_IRQS: %d\n", NR_IRQS);
3795de23
TG
568
569 desc = irq_desc;
570 count = ARRAY_SIZE(irq_desc);
571
572 for (i = 0; i < count; i++) {
6c9ae009 573 desc[i].kstat_irqs = alloc_percpu(unsigned int);
4ab764c3 574 alloc_masks(&desc[i], node);
e7fbad30 575 raw_spin_lock_init(&desc[i].lock);
154cd387 576 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
e8458e7a 577 mutex_init(&desc[i].request_mutex);
45ddcecb 578 desc_set_defaults(i, &desc[i], node, NULL, NULL);
3795de23
TG
579 }
580 return arch_early_irq_init();
581}
582
583struct irq_desc *irq_to_desc(unsigned int irq)
584{
585 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
586}
2c45aada 587EXPORT_SYMBOL(irq_to_desc);
3795de23 588
1f5a5b87
TG
589static void free_desc(unsigned int irq)
590{
d8179bc0
TG
591 struct irq_desc *desc = irq_to_desc(irq);
592 unsigned long flags;
593
594 raw_spin_lock_irqsave(&desc->lock, flags);
45ddcecb 595 desc_set_defaults(irq, desc, irq_desc_get_node(desc), NULL, NULL);
d8179bc0 596 raw_spin_unlock_irqrestore(&desc->lock, flags);
1f5a5b87
TG
597}
598
b6873807 599static inline int alloc_descs(unsigned int start, unsigned int cnt, int node,
bec04037 600 const struct irq_affinity_desc *affinity,
b6873807 601 struct module *owner)
1f5a5b87 602{
b6873807
SAS
603 u32 i;
604
605 for (i = 0; i < cnt; i++) {
606 struct irq_desc *desc = irq_to_desc(start + i);
607
608 desc->owner = owner;
609 }
12ac1d0f 610 bitmap_set(allocated_irqs, start, cnt);
1f5a5b87
TG
611 return start;
612}
e7bcecb7 613
ed4dea6e 614static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7
TG
615{
616 return -ENOMEM;
617}
618
f63b6a05
TG
619void irq_mark_irq(unsigned int irq)
620{
621 mutex_lock(&sparse_irq_lock);
622 bitmap_set(allocated_irqs, irq, 1);
623 mutex_unlock(&sparse_irq_lock);
624}
625
c940e01c
TG
626#ifdef CONFIG_GENERIC_IRQ_LEGACY
627void irq_init_desc(unsigned int irq)
628{
d8179bc0 629 free_desc(irq);
c940e01c
TG
630}
631#endif
632
3795de23
TG
633#endif /* !CONFIG_SPARSE_IRQ */
634
a3016b26 635int handle_irq_desc(struct irq_desc *desc)
fe12bc2c 636{
c16816ac 637 struct irq_data *data;
fe12bc2c
TG
638
639 if (!desc)
640 return -EINVAL;
c16816ac
TG
641
642 data = irq_desc_get_irq_data(desc);
643 if (WARN_ON_ONCE(!in_irq() && handle_enforce_irqctx(data)))
644 return -EPERM;
645
bd0b9ac4 646 generic_handle_irq_desc(desc);
fe12bc2c
TG
647 return 0;
648}
a3016b26
MZ
649
650/**
651 * generic_handle_irq - Invoke the handler for a particular irq
652 * @irq: The irq number to handle
653 *
0953fb26
MR
654 * Returns: 0 on success, or -EINVAL if conversion has failed
655 *
656 * This function must be called from an IRQ context with irq regs
657 * initialized.
658 */
a3016b26
MZ
659int generic_handle_irq(unsigned int irq)
660{
661 return handle_irq_desc(irq_to_desc(irq));
662}
edf76f83 663EXPORT_SYMBOL_GPL(generic_handle_irq);
fe12bc2c 664
e1c05491 665#ifdef CONFIG_IRQ_DOMAIN
76ba59f8 666/**
8240ef50 667 * generic_handle_domain_irq - Invoke the handler for a HW irq belonging
0953fb26 668 * to a domain.
8240ef50
MZ
669 * @domain: The domain where to perform the lookup
670 * @hwirq: The HW irq number to convert to a logical one
671 *
672 * Returns: 0 on success, or -EINVAL if conversion has failed
673 *
0953fb26
MR
674 * This function must be called from an IRQ context with irq regs
675 * initialized.
8240ef50
MZ
676 */
677int generic_handle_domain_irq(struct irq_domain *domain, unsigned int hwirq)
678{
0953fb26 679 WARN_ON_ONCE(!in_irq());
8240ef50
MZ
680 return handle_irq_desc(irq_resolve_mapping(domain, hwirq));
681}
682EXPORT_SYMBOL_GPL(generic_handle_domain_irq);
683
2fe35f8e 684/**
0953fb26
MR
685 * generic_handle_domain_nmi - Invoke the handler for a HW nmi belonging
686 * to a domain.
2fe35f8e
MR
687 * @domain: The domain where to perform the lookup
688 * @hwirq: The HW irq number to convert to a logical one
2fe35f8e
MR
689 *
690 * Returns: 0 on success, or -EINVAL if conversion has failed
17ce302f 691 *
0953fb26
MR
692 * This function must be called from an NMI context with irq regs
693 * initialized.
694 **/
695int generic_handle_domain_nmi(struct irq_domain *domain, unsigned int hwirq)
6e4933a0 696{
0953fb26
MR
697 WARN_ON_ONCE(!in_nmi());
698 return handle_irq_desc(irq_resolve_mapping(domain, hwirq));
6e4933a0
JT
699}
700#endif
76ba59f8 701
1f5a5b87
TG
702/* Dynamic interrupt handling */
703
704/**
705 * irq_free_descs - free irq descriptors
706 * @from: Start of descriptor range
707 * @cnt: Number of consecutive irqs to free
708 */
709void irq_free_descs(unsigned int from, unsigned int cnt)
710{
1f5a5b87
TG
711 int i;
712
713 if (from >= nr_irqs || (from + cnt) > nr_irqs)
714 return;
715
12ac1d0f 716 mutex_lock(&sparse_irq_lock);
1f5a5b87
TG
717 for (i = 0; i < cnt; i++)
718 free_desc(from + i);
719
1f5a5b87 720 bitmap_clear(allocated_irqs, from, cnt);
a05a900a 721 mutex_unlock(&sparse_irq_lock);
1f5a5b87 722}
edf76f83 723EXPORT_SYMBOL_GPL(irq_free_descs);
1f5a5b87
TG
724
725/**
20a15ee0 726 * __irq_alloc_descs - allocate and initialize a range of irq descriptors
1f5a5b87
TG
727 * @irq: Allocate for specific irq number if irq >= 0
728 * @from: Start the search from this irq number
729 * @cnt: Number of consecutive irqs to allocate.
730 * @node: Preferred node on which the irq descriptor should be allocated
d522a0d1 731 * @owner: Owning module (can be NULL)
e75eafb9
TG
732 * @affinity: Optional pointer to an affinity mask array of size @cnt which
733 * hints where the irq descriptors should be allocated and which
734 * default affinities to use
1f5a5b87
TG
735 *
736 * Returns the first irq number or error code
737 */
738int __ref
b6873807 739__irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
bec04037 740 struct module *owner, const struct irq_affinity_desc *affinity)
1f5a5b87 741{
1f5a5b87
TG
742 int start, ret;
743
744 if (!cnt)
745 return -EINVAL;
746
c5182b88
MB
747 if (irq >= 0) {
748 if (from > irq)
749 return -EINVAL;
750 from = irq;
62a08ae2
TG
751 } else {
752 /*
753 * For interrupts which are freely allocated the
754 * architecture can force a lower bound to the @from
755 * argument. x86 uses this to exclude the GSI space.
756 */
757 from = arch_dynirq_lower_bound(from);
c5182b88
MB
758 }
759
a05a900a 760 mutex_lock(&sparse_irq_lock);
1f5a5b87 761
ed4dea6e
YL
762 start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
763 from, cnt, 0);
1f5a5b87
TG
764 ret = -EEXIST;
765 if (irq >=0 && start != irq)
12ac1d0f 766 goto unlock;
1f5a5b87 767
ed4dea6e
YL
768 if (start + cnt > nr_irqs) {
769 ret = irq_expand_nr_irqs(start + cnt);
e7bcecb7 770 if (ret)
12ac1d0f 771 goto unlock;
e7bcecb7 772 }
12ac1d0f
TG
773 ret = alloc_descs(start, cnt, node, affinity, owner);
774unlock:
a05a900a 775 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
776 return ret;
777}
b6873807 778EXPORT_SYMBOL_GPL(__irq_alloc_descs);
1f5a5b87 779
a98d24b7
TG
780/**
781 * irq_get_next_irq - get next allocated irq number
782 * @offset: where to start the search
783 *
784 * Returns next irq number after offset or nr_irqs if none is found.
785 */
786unsigned int irq_get_next_irq(unsigned int offset)
787{
788 return find_next_bit(allocated_irqs, nr_irqs, offset);
789}
790
d5eb4ad2 791struct irq_desc *
31d9d9b6
MZ
792__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
793 unsigned int check)
d5eb4ad2
TG
794{
795 struct irq_desc *desc = irq_to_desc(irq);
796
797 if (desc) {
31d9d9b6
MZ
798 if (check & _IRQ_DESC_CHECK) {
799 if ((check & _IRQ_DESC_PERCPU) &&
800 !irq_settings_is_per_cpu_devid(desc))
801 return NULL;
802
803 if (!(check & _IRQ_DESC_PERCPU) &&
804 irq_settings_is_per_cpu_devid(desc))
805 return NULL;
806 }
807
d5eb4ad2
TG
808 if (bus)
809 chip_bus_lock(desc);
810 raw_spin_lock_irqsave(&desc->lock, *flags);
811 }
812 return desc;
813}
814
815void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
8b3b5479 816 __releases(&desc->lock)
d5eb4ad2
TG
817{
818 raw_spin_unlock_irqrestore(&desc->lock, flags);
819 if (bus)
820 chip_bus_sync_unlock(desc);
821}
822
222df54f
MZ
823int irq_set_percpu_devid_partition(unsigned int irq,
824 const struct cpumask *affinity)
31d9d9b6
MZ
825{
826 struct irq_desc *desc = irq_to_desc(irq);
827
828 if (!desc)
829 return -EINVAL;
830
831 if (desc->percpu_enabled)
832 return -EINVAL;
833
834 desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL);
835
836 if (!desc->percpu_enabled)
837 return -ENOMEM;
838
222df54f
MZ
839 if (affinity)
840 desc->percpu_affinity = affinity;
841 else
842 desc->percpu_affinity = cpu_possible_mask;
843
31d9d9b6
MZ
844 irq_set_percpu_devid_flags(irq);
845 return 0;
846}
847
222df54f
MZ
848int irq_set_percpu_devid(unsigned int irq)
849{
850 return irq_set_percpu_devid_partition(irq, NULL);
851}
852
853int irq_get_percpu_devid_partition(unsigned int irq, struct cpumask *affinity)
854{
855 struct irq_desc *desc = irq_to_desc(irq);
856
857 if (!desc || !desc->percpu_enabled)
858 return -EINVAL;
859
860 if (affinity)
861 cpumask_copy(affinity, desc->percpu_affinity);
862
863 return 0;
864}
5ffeb050 865EXPORT_SYMBOL_GPL(irq_get_percpu_devid_partition);
222df54f 866
792d0018
TG
867void kstat_incr_irq_this_cpu(unsigned int irq)
868{
b51bf95c 869 kstat_incr_irqs_this_cpu(irq_to_desc(irq));
792d0018
TG
870}
871
c291ee62
TG
872/**
873 * kstat_irqs_cpu - Get the statistics for an interrupt on a cpu
874 * @irq: The interrupt number
875 * @cpu: The cpu number
876 *
877 * Returns the sum of interrupt counts on @cpu since boot for
878 * @irq. The caller must ensure that the interrupt is not removed
879 * concurrently.
880 */
3795de23
TG
881unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
882{
883 struct irq_desc *desc = irq_to_desc(irq);
6c9ae009
ED
884
885 return desc && desc->kstat_irqs ?
886 *per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
3795de23 887}
478735e3 888
c09cb129
ST
889static bool irq_is_nmi(struct irq_desc *desc)
890{
891 return desc->istate & IRQS_NMI;
892}
893
26c19d0a 894static unsigned int kstat_irqs(unsigned int irq)
478735e3
KH
895{
896 struct irq_desc *desc = irq_to_desc(irq);
5e9662fa 897 unsigned int sum = 0;
1136b072 898 int cpu;
478735e3 899
6c9ae009 900 if (!desc || !desc->kstat_irqs)
478735e3 901 return 0;
1136b072 902 if (!irq_settings_is_per_cpu_devid(desc) &&
c09cb129
ST
903 !irq_settings_is_per_cpu(desc) &&
904 !irq_is_nmi(desc))
9e42ad10 905 return data_race(desc->tot_count);
1136b072 906
478735e3 907 for_each_possible_cpu(cpu)
9e42ad10 908 sum += data_race(*per_cpu_ptr(desc->kstat_irqs, cpu));
478735e3
KH
909 return sum;
910}
c291ee62
TG
911
912/**
26c19d0a 913 * kstat_irqs_usr - Get the statistics for an interrupt from thread context
c291ee62
TG
914 * @irq: The interrupt number
915 *
4a5f4d2f 916 * Returns the sum of interrupt counts on all cpus since boot for @irq.
26c19d0a
TG
917 *
918 * It uses rcu to protect the access since a concurrent removal of an
919 * interrupt descriptor is observing an rcu grace period before
920 * delayed_free_desc()/irq_kobj_release().
c291ee62
TG
921 */
922unsigned int kstat_irqs_usr(unsigned int irq)
923{
7df0b278 924 unsigned int sum;
c291ee62 925
4a5f4d2f 926 rcu_read_lock();
c291ee62 927 sum = kstat_irqs(irq);
4a5f4d2f 928 rcu_read_unlock();
c291ee62
TG
929 return sum;
930}
f1c6306c
TG
931
932#ifdef CONFIG_LOCKDEP
933void __irq_set_lockdep_class(unsigned int irq, struct lock_class_key *lock_class,
934 struct lock_class_key *request_class)
935{
936 struct irq_desc *desc = irq_to_desc(irq);
937
938 if (desc) {
939 lockdep_set_class(&desc->lock, lock_class);
940 lockdep_set_class(&desc->request_mutex, request_class);
941 }
942}
943EXPORT_SYMBOL_GPL(__irq_set_lockdep_class);
944#endif