Merge branch 'linux-5.7' of git://github.com/skeggsb/linux into drm-fixes
[linux-block.git] / kernel / irq / irqdesc.c
CommitLineData
52a65ff5 1// SPDX-License-Identifier: GPL-2.0
3795de23
TG
2/*
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5 *
99bfce5d
TG
6 * This file contains the interrupt descriptor management code. Detailed
7 * information is available in Documentation/core-api/genericirq.rst
3795de23
TG
8 *
9 */
10#include <linux/irq.h>
11#include <linux/slab.h>
ec53cf23 12#include <linux/export.h>
3795de23
TG
13#include <linux/interrupt.h>
14#include <linux/kernel_stat.h>
15#include <linux/radix-tree.h>
1f5a5b87 16#include <linux/bitmap.h>
76ba59f8 17#include <linux/irqdomain.h>
ecb3f394 18#include <linux/sysfs.h>
3795de23
TG
19
20#include "internals.h"
21
22/*
23 * lockdep: we want to handle all irq_desc locks as a single lock-class:
24 */
78f90d91 25static struct lock_class_key irq_desc_lock_class;
3795de23 26
fe051434 27#if defined(CONFIG_SMP)
fbf19803
TG
28static int __init irq_affinity_setup(char *str)
29{
10d94ff4 30 alloc_bootmem_cpumask_var(&irq_default_affinity);
fbf19803
TG
31 cpulist_parse(str, irq_default_affinity);
32 /*
33 * Set at least the boot cpu. We don't want to end up with
34 * bugreports caused by random comandline masks
35 */
36 cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
37 return 1;
38}
39__setup("irqaffinity=", irq_affinity_setup);
40
3795de23
TG
41static void __init init_irq_default_affinity(void)
42{
10d94ff4 43 if (!cpumask_available(irq_default_affinity))
fbf19803 44 zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
fbf19803
TG
45 if (cpumask_empty(irq_default_affinity))
46 cpumask_setall(irq_default_affinity);
3795de23
TG
47}
48#else
49static void __init init_irq_default_affinity(void)
50{
51}
52#endif
53
1f5a5b87 54#ifdef CONFIG_SMP
4ab764c3 55static int alloc_masks(struct irq_desc *desc, int node)
1f5a5b87 56{
9df872fa 57 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity,
4ab764c3 58 GFP_KERNEL, node))
1f5a5b87
TG
59 return -ENOMEM;
60
0d3f5425
TG
61#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
62 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity,
63 GFP_KERNEL, node)) {
64 free_cpumask_var(desc->irq_common_data.affinity);
65 return -ENOMEM;
66 }
67#endif
68
1f5a5b87 69#ifdef CONFIG_GENERIC_PENDING_IRQ
4ab764c3 70 if (!zalloc_cpumask_var_node(&desc->pending_mask, GFP_KERNEL, node)) {
0d3f5425
TG
71#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
72 free_cpumask_var(desc->irq_common_data.effective_affinity);
73#endif
9df872fa 74 free_cpumask_var(desc->irq_common_data.affinity);
1f5a5b87
TG
75 return -ENOMEM;
76 }
77#endif
78 return 0;
79}
80
45ddcecb
TG
81static void desc_smp_init(struct irq_desc *desc, int node,
82 const struct cpumask *affinity)
1f5a5b87 83{
45ddcecb
TG
84 if (!affinity)
85 affinity = irq_default_affinity;
86 cpumask_copy(desc->irq_common_data.affinity, affinity);
87
b7b29338
TG
88#ifdef CONFIG_GENERIC_PENDING_IRQ
89 cpumask_clear(desc->pending_mask);
90#endif
449e9cae
JL
91#ifdef CONFIG_NUMA
92 desc->irq_common_data.node = node;
93#endif
b7b29338
TG
94}
95
1f5a5b87
TG
96#else
97static inline int
4ab764c3 98alloc_masks(struct irq_desc *desc, int node) { return 0; }
45ddcecb
TG
99static inline void
100desc_smp_init(struct irq_desc *desc, int node, const struct cpumask *affinity) { }
1f5a5b87
TG
101#endif
102
b6873807 103static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
45ddcecb 104 const struct cpumask *affinity, struct module *owner)
1f5a5b87 105{
6c9ae009
ED
106 int cpu;
107
af7080e0 108 desc->irq_common_data.handler_data = NULL;
b237721c 109 desc->irq_common_data.msi_desc = NULL;
af7080e0 110
0d0b4c86 111 desc->irq_data.common = &desc->irq_common_data;
1f5a5b87
TG
112 desc->irq_data.irq = irq;
113 desc->irq_data.chip = &no_irq_chip;
114 desc->irq_data.chip_data = NULL;
f9e4989e 115 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
801a0e9a 116 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
d829b8fb 117 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
1f5a5b87
TG
118 desc->handle_irq = handle_bad_irq;
119 desc->depth = 1;
b7b29338
TG
120 desc->irq_count = 0;
121 desc->irqs_unhandled = 0;
1136b072 122 desc->tot_count = 0;
1f5a5b87 123 desc->name = NULL;
b6873807 124 desc->owner = owner;
6c9ae009
ED
125 for_each_possible_cpu(cpu)
126 *per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
45ddcecb 127 desc_smp_init(desc, node, affinity);
1f5a5b87
TG
128}
129
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130int nr_irqs = NR_IRQS;
131EXPORT_SYMBOL_GPL(nr_irqs);
132
a05a900a 133static DEFINE_MUTEX(sparse_irq_lock);
c1ee6264 134static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
1f5a5b87 135
3795de23
TG
136#ifdef CONFIG_SPARSE_IRQ
137
ecb3f394
CG
138static void irq_kobj_release(struct kobject *kobj);
139
140#ifdef CONFIG_SYSFS
141static struct kobject *irq_kobj_base;
142
143#define IRQ_ATTR_RO(_name) \
144static struct kobj_attribute _name##_attr = __ATTR_RO(_name)
145
146static ssize_t per_cpu_count_show(struct kobject *kobj,
147 struct kobj_attribute *attr, char *buf)
148{
149 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
150 int cpu, irq = desc->irq_data.irq;
151 ssize_t ret = 0;
152 char *p = "";
153
154 for_each_possible_cpu(cpu) {
155 unsigned int c = kstat_irqs_cpu(irq, cpu);
156
157 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%u", p, c);
158 p = ",";
159 }
160
161 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
162 return ret;
163}
164IRQ_ATTR_RO(per_cpu_count);
165
166static ssize_t chip_name_show(struct kobject *kobj,
167 struct kobj_attribute *attr, char *buf)
168{
169 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
170 ssize_t ret = 0;
171
172 raw_spin_lock_irq(&desc->lock);
173 if (desc->irq_data.chip && desc->irq_data.chip->name) {
174 ret = scnprintf(buf, PAGE_SIZE, "%s\n",
175 desc->irq_data.chip->name);
176 }
177 raw_spin_unlock_irq(&desc->lock);
178
179 return ret;
180}
181IRQ_ATTR_RO(chip_name);
182
183static ssize_t hwirq_show(struct kobject *kobj,
184 struct kobj_attribute *attr, char *buf)
185{
186 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
187 ssize_t ret = 0;
188
189 raw_spin_lock_irq(&desc->lock);
190 if (desc->irq_data.domain)
191 ret = sprintf(buf, "%d\n", (int)desc->irq_data.hwirq);
192 raw_spin_unlock_irq(&desc->lock);
193
194 return ret;
195}
196IRQ_ATTR_RO(hwirq);
197
198static ssize_t type_show(struct kobject *kobj,
199 struct kobj_attribute *attr, char *buf)
200{
201 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
202 ssize_t ret = 0;
203
204 raw_spin_lock_irq(&desc->lock);
205 ret = sprintf(buf, "%s\n",
206 irqd_is_level_type(&desc->irq_data) ? "level" : "edge");
207 raw_spin_unlock_irq(&desc->lock);
208
209 return ret;
210
211}
212IRQ_ATTR_RO(type);
213
d61e2944
AS
214static ssize_t wakeup_show(struct kobject *kobj,
215 struct kobj_attribute *attr, char *buf)
216{
217 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
218 ssize_t ret = 0;
219
220 raw_spin_lock_irq(&desc->lock);
221 ret = sprintf(buf, "%s\n",
222 irqd_is_wakeup_set(&desc->irq_data) ? "enabled" : "disabled");
223 raw_spin_unlock_irq(&desc->lock);
224
225 return ret;
226
227}
228IRQ_ATTR_RO(wakeup);
229
ecb3f394
CG
230static ssize_t name_show(struct kobject *kobj,
231 struct kobj_attribute *attr, char *buf)
232{
233 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
234 ssize_t ret = 0;
235
236 raw_spin_lock_irq(&desc->lock);
237 if (desc->name)
238 ret = scnprintf(buf, PAGE_SIZE, "%s\n", desc->name);
239 raw_spin_unlock_irq(&desc->lock);
240
241 return ret;
242}
243IRQ_ATTR_RO(name);
244
245static ssize_t actions_show(struct kobject *kobj,
246 struct kobj_attribute *attr, char *buf)
247{
248 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
249 struct irqaction *action;
250 ssize_t ret = 0;
251 char *p = "";
252
253 raw_spin_lock_irq(&desc->lock);
254 for (action = desc->action; action != NULL; action = action->next) {
255 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%s",
256 p, action->name);
257 p = ",";
258 }
259 raw_spin_unlock_irq(&desc->lock);
260
261 if (ret)
262 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
263
264 return ret;
265}
266IRQ_ATTR_RO(actions);
267
268static struct attribute *irq_attrs[] = {
269 &per_cpu_count_attr.attr,
270 &chip_name_attr.attr,
271 &hwirq_attr.attr,
272 &type_attr.attr,
d61e2944 273 &wakeup_attr.attr,
ecb3f394
CG
274 &name_attr.attr,
275 &actions_attr.attr,
276 NULL
277};
52ba92f5 278ATTRIBUTE_GROUPS(irq);
ecb3f394
CG
279
280static struct kobj_type irq_kobj_type = {
281 .release = irq_kobj_release,
282 .sysfs_ops = &kobj_sysfs_ops,
52ba92f5 283 .default_groups = irq_groups,
ecb3f394
CG
284};
285
286static void irq_sysfs_add(int irq, struct irq_desc *desc)
287{
288 if (irq_kobj_base) {
289 /*
290 * Continue even in case of failure as this is nothing
291 * crucial.
292 */
293 if (kobject_add(&desc->kobj, irq_kobj_base, "%d", irq))
294 pr_warn("Failed to add kobject for irq %d\n", irq);
295 }
296}
297
d0ff14fd
MK
298static void irq_sysfs_del(struct irq_desc *desc)
299{
300 /*
301 * If irq_sysfs_init() has not yet been invoked (early boot), then
302 * irq_kobj_base is NULL and the descriptor was never added.
303 * kobject_del() complains about a object with no parent, so make
304 * it conditional.
305 */
306 if (irq_kobj_base)
307 kobject_del(&desc->kobj);
308}
309
ecb3f394
CG
310static int __init irq_sysfs_init(void)
311{
312 struct irq_desc *desc;
313 int irq;
314
315 /* Prevent concurrent irq alloc/free */
316 irq_lock_sparse();
317
318 irq_kobj_base = kobject_create_and_add("irq", kernel_kobj);
319 if (!irq_kobj_base) {
320 irq_unlock_sparse();
321 return -ENOMEM;
322 }
323
324 /* Add the already allocated interrupts */
325 for_each_irq_desc(irq, desc)
326 irq_sysfs_add(irq, desc);
327 irq_unlock_sparse();
328
329 return 0;
330}
331postcore_initcall(irq_sysfs_init);
332
333#else /* !CONFIG_SYSFS */
334
335static struct kobj_type irq_kobj_type = {
336 .release = irq_kobj_release,
337};
338
339static void irq_sysfs_add(int irq, struct irq_desc *desc) {}
d0ff14fd 340static void irq_sysfs_del(struct irq_desc *desc) {}
ecb3f394
CG
341
342#endif /* CONFIG_SYSFS */
343
baa0d233 344static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
3795de23 345
1f5a5b87 346static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
3795de23
TG
347{
348 radix_tree_insert(&irq_desc_tree, irq, desc);
349}
350
351struct irq_desc *irq_to_desc(unsigned int irq)
352{
353 return radix_tree_lookup(&irq_desc_tree, irq);
354}
3911ff30 355EXPORT_SYMBOL(irq_to_desc);
3795de23 356
1f5a5b87
TG
357static void delete_irq_desc(unsigned int irq)
358{
359 radix_tree_delete(&irq_desc_tree, irq);
360}
361
362#ifdef CONFIG_SMP
363static void free_masks(struct irq_desc *desc)
364{
365#ifdef CONFIG_GENERIC_PENDING_IRQ
366 free_cpumask_var(desc->pending_mask);
367#endif
9df872fa 368 free_cpumask_var(desc->irq_common_data.affinity);
0d3f5425
TG
369#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
370 free_cpumask_var(desc->irq_common_data.effective_affinity);
371#endif
1f5a5b87
TG
372}
373#else
374static inline void free_masks(struct irq_desc *desc) { }
375#endif
376
c291ee62
TG
377void irq_lock_sparse(void)
378{
379 mutex_lock(&sparse_irq_lock);
380}
381
382void irq_unlock_sparse(void)
383{
384 mutex_unlock(&sparse_irq_lock);
385}
386
45ddcecb
TG
387static struct irq_desc *alloc_desc(int irq, int node, unsigned int flags,
388 const struct cpumask *affinity,
389 struct module *owner)
1f5a5b87
TG
390{
391 struct irq_desc *desc;
1f5a5b87 392
4ab764c3 393 desc = kzalloc_node(sizeof(*desc), GFP_KERNEL, node);
1f5a5b87
TG
394 if (!desc)
395 return NULL;
396 /* allocate based on nr_cpu_ids */
6c9ae009 397 desc->kstat_irqs = alloc_percpu(unsigned int);
1f5a5b87
TG
398 if (!desc->kstat_irqs)
399 goto err_desc;
400
4ab764c3 401 if (alloc_masks(desc, node))
1f5a5b87
TG
402 goto err_kstat;
403
404 raw_spin_lock_init(&desc->lock);
405 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
9114014c 406 mutex_init(&desc->request_mutex);
425a5072 407 init_rcu_head(&desc->rcu);
1f5a5b87 408
45ddcecb
TG
409 desc_set_defaults(irq, desc, node, affinity, owner);
410 irqd_set(&desc->irq_data, flags);
ecb3f394 411 kobject_init(&desc->kobj, &irq_kobj_type);
1f5a5b87
TG
412
413 return desc;
414
415err_kstat:
6c9ae009 416 free_percpu(desc->kstat_irqs);
1f5a5b87
TG
417err_desc:
418 kfree(desc);
419 return NULL;
420}
421
ecb3f394 422static void irq_kobj_release(struct kobject *kobj)
425a5072 423{
ecb3f394 424 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
425a5072
TG
425
426 free_masks(desc);
427 free_percpu(desc->kstat_irqs);
428 kfree(desc);
429}
430
ecb3f394
CG
431static void delayed_free_desc(struct rcu_head *rhp)
432{
433 struct irq_desc *desc = container_of(rhp, struct irq_desc, rcu);
434
435 kobject_put(&desc->kobj);
436}
437
1f5a5b87
TG
438static void free_desc(unsigned int irq)
439{
440 struct irq_desc *desc = irq_to_desc(irq);
1f5a5b87 441
087cdfb6 442 irq_remove_debugfs_entry(desc);
13bfe99e
TG
443 unregister_irq_proc(irq, desc);
444
c291ee62
TG
445 /*
446 * sparse_irq_lock protects also show_interrupts() and
447 * kstat_irq_usr(). Once we deleted the descriptor from the
448 * sparse tree we can free it. Access in proc will fail to
449 * lookup the descriptor.
ecb3f394
CG
450 *
451 * The sysfs entry must be serialized against a concurrent
452 * irq_sysfs_init() as well.
c291ee62 453 */
d0ff14fd 454 irq_sysfs_del(desc);
1f5a5b87 455 delete_irq_desc(irq);
1f5a5b87 456
425a5072
TG
457 /*
458 * We free the descriptor, masks and stat fields via RCU. That
459 * allows demultiplex interrupts to do rcu based management of
460 * the child interrupts.
4a5f4d2f 461 * This also allows us to use rcu in kstat_irqs_usr().
425a5072
TG
462 */
463 call_rcu(&desc->rcu, delayed_free_desc);
1f5a5b87
TG
464}
465
b6873807 466static int alloc_descs(unsigned int start, unsigned int cnt, int node,
bec04037
DL
467 const struct irq_affinity_desc *affinity,
468 struct module *owner)
1f5a5b87
TG
469{
470 struct irq_desc *desc;
e75eafb9 471 int i;
45ddcecb 472
e75eafb9
TG
473 /* Validate affinity mask(s) */
474 if (affinity) {
12fee4cd 475 for (i = 0; i < cnt; i++) {
bec04037 476 if (cpumask_empty(&affinity[i].mask))
e75eafb9
TG
477 return -EINVAL;
478 }
479 }
45ddcecb 480
1f5a5b87 481 for (i = 0; i < cnt; i++) {
bec04037 482 const struct cpumask *mask = NULL;
c410abbb 483 unsigned int flags = 0;
bec04037 484
45ddcecb 485 if (affinity) {
c410abbb
DL
486 if (affinity->is_managed) {
487 flags = IRQD_AFFINITY_MANAGED |
488 IRQD_MANAGED_SHUTDOWN;
489 }
bec04037 490 mask = &affinity->mask;
c410abbb 491 node = cpu_to_node(cpumask_first(mask));
e75eafb9 492 affinity++;
45ddcecb 493 }
c410abbb 494
45ddcecb 495 desc = alloc_desc(start + i, node, flags, mask, owner);
1f5a5b87
TG
496 if (!desc)
497 goto err;
1f5a5b87 498 irq_insert_desc(start + i, desc);
ecb3f394 499 irq_sysfs_add(start + i, desc);
e0b47794 500 irq_add_debugfs_entry(start + i, desc);
1f5a5b87 501 }
12ac1d0f 502 bitmap_set(allocated_irqs, start, cnt);
1f5a5b87
TG
503 return start;
504
505err:
506 for (i--; i >= 0; i--)
507 free_desc(start + i);
1f5a5b87
TG
508 return -ENOMEM;
509}
510
ed4dea6e 511static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7 512{
ed4dea6e 513 if (nr > IRQ_BITMAP_BITS)
e7bcecb7 514 return -ENOMEM;
ed4dea6e 515 nr_irqs = nr;
e7bcecb7
TG
516 return 0;
517}
518
3795de23
TG
519int __init early_irq_init(void)
520{
b683de2b 521 int i, initcnt, node = first_online_node;
3795de23 522 struct irq_desc *desc;
3795de23
TG
523
524 init_irq_default_affinity();
525
b683de2b
TG
526 /* Let arch update nr_irqs and return the nr of preallocated irqs */
527 initcnt = arch_probe_nr_irqs();
5a29ef22
VL
528 printk(KERN_INFO "NR_IRQS: %d, nr_irqs: %d, preallocated irqs: %d\n",
529 NR_IRQS, nr_irqs, initcnt);
3795de23 530
c1ee6264
TG
531 if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
532 nr_irqs = IRQ_BITMAP_BITS;
533
534 if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
535 initcnt = IRQ_BITMAP_BITS;
536
537 if (initcnt > nr_irqs)
538 nr_irqs = initcnt;
539
b683de2b 540 for (i = 0; i < initcnt; i++) {
45ddcecb 541 desc = alloc_desc(i, node, 0, NULL, NULL);
aa99ec0f
TG
542 set_bit(i, allocated_irqs);
543 irq_insert_desc(i, desc);
3795de23 544 }
3795de23
TG
545 return arch_early_irq_init();
546}
547
3795de23
TG
548#else /* !CONFIG_SPARSE_IRQ */
549
550struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
551 [0 ... NR_IRQS-1] = {
3795de23
TG
552 .handle_irq = handle_bad_irq,
553 .depth = 1,
554 .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
555 }
556};
557
3795de23
TG
558int __init early_irq_init(void)
559{
aa99ec0f 560 int count, i, node = first_online_node;
3795de23 561 struct irq_desc *desc;
3795de23
TG
562
563 init_irq_default_affinity();
564
5a29ef22 565 printk(KERN_INFO "NR_IRQS: %d\n", NR_IRQS);
3795de23
TG
566
567 desc = irq_desc;
568 count = ARRAY_SIZE(irq_desc);
569
570 for (i = 0; i < count; i++) {
6c9ae009 571 desc[i].kstat_irqs = alloc_percpu(unsigned int);
4ab764c3 572 alloc_masks(&desc[i], node);
e7fbad30 573 raw_spin_lock_init(&desc[i].lock);
154cd387 574 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
e8458e7a 575 mutex_init(&desc[i].request_mutex);
45ddcecb 576 desc_set_defaults(i, &desc[i], node, NULL, NULL);
3795de23
TG
577 }
578 return arch_early_irq_init();
579}
580
581struct irq_desc *irq_to_desc(unsigned int irq)
582{
583 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
584}
2c45aada 585EXPORT_SYMBOL(irq_to_desc);
3795de23 586
1f5a5b87
TG
587static void free_desc(unsigned int irq)
588{
d8179bc0
TG
589 struct irq_desc *desc = irq_to_desc(irq);
590 unsigned long flags;
591
592 raw_spin_lock_irqsave(&desc->lock, flags);
45ddcecb 593 desc_set_defaults(irq, desc, irq_desc_get_node(desc), NULL, NULL);
d8179bc0 594 raw_spin_unlock_irqrestore(&desc->lock, flags);
1f5a5b87
TG
595}
596
b6873807 597static inline int alloc_descs(unsigned int start, unsigned int cnt, int node,
bec04037 598 const struct irq_affinity_desc *affinity,
b6873807 599 struct module *owner)
1f5a5b87 600{
b6873807
SAS
601 u32 i;
602
603 for (i = 0; i < cnt; i++) {
604 struct irq_desc *desc = irq_to_desc(start + i);
605
606 desc->owner = owner;
607 }
12ac1d0f 608 bitmap_set(allocated_irqs, start, cnt);
1f5a5b87
TG
609 return start;
610}
e7bcecb7 611
ed4dea6e 612static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7
TG
613{
614 return -ENOMEM;
615}
616
f63b6a05
TG
617void irq_mark_irq(unsigned int irq)
618{
619 mutex_lock(&sparse_irq_lock);
620 bitmap_set(allocated_irqs, irq, 1);
621 mutex_unlock(&sparse_irq_lock);
622}
623
c940e01c
TG
624#ifdef CONFIG_GENERIC_IRQ_LEGACY
625void irq_init_desc(unsigned int irq)
626{
d8179bc0 627 free_desc(irq);
c940e01c
TG
628}
629#endif
630
3795de23
TG
631#endif /* !CONFIG_SPARSE_IRQ */
632
fe12bc2c
TG
633/**
634 * generic_handle_irq - Invoke the handler for a particular irq
635 * @irq: The irq number to handle
636 *
637 */
638int generic_handle_irq(unsigned int irq)
639{
640 struct irq_desc *desc = irq_to_desc(irq);
c16816ac 641 struct irq_data *data;
fe12bc2c
TG
642
643 if (!desc)
644 return -EINVAL;
c16816ac
TG
645
646 data = irq_desc_get_irq_data(desc);
647 if (WARN_ON_ONCE(!in_irq() && handle_enforce_irqctx(data)))
648 return -EPERM;
649
bd0b9ac4 650 generic_handle_irq_desc(desc);
fe12bc2c
TG
651 return 0;
652}
edf76f83 653EXPORT_SYMBOL_GPL(generic_handle_irq);
fe12bc2c 654
76ba59f8
MZ
655#ifdef CONFIG_HANDLE_DOMAIN_IRQ
656/**
657 * __handle_domain_irq - Invoke the handler for a HW irq belonging to a domain
658 * @domain: The domain where to perform the lookup
659 * @hwirq: The HW irq number to convert to a logical one
660 * @lookup: Whether to perform the domain lookup or not
661 * @regs: Register file coming from the low-level handling code
662 *
663 * Returns: 0 on success, or -EINVAL if conversion has failed
664 */
665int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq,
666 bool lookup, struct pt_regs *regs)
667{
668 struct pt_regs *old_regs = set_irq_regs(regs);
669 unsigned int irq = hwirq;
670 int ret = 0;
671
672 irq_enter();
673
674#ifdef CONFIG_IRQ_DOMAIN
675 if (lookup)
676 irq = irq_find_mapping(domain, hwirq);
677#endif
678
679 /*
680 * Some hardware gives randomly wrong interrupts. Rather
681 * than crashing, do something sensible.
682 */
683 if (unlikely(!irq || irq >= nr_irqs)) {
684 ack_bad_irq(irq);
685 ret = -EINVAL;
686 } else {
687 generic_handle_irq(irq);
688 }
689
690 irq_exit();
691 set_irq_regs(old_regs);
692 return ret;
693}
6e4933a0
JT
694
695#ifdef CONFIG_IRQ_DOMAIN
696/**
697 * handle_domain_nmi - Invoke the handler for a HW irq belonging to a domain
698 * @domain: The domain where to perform the lookup
699 * @hwirq: The HW irq number to convert to a logical one
700 * @regs: Register file coming from the low-level handling code
701 *
17ce302f
JT
702 * This function must be called from an NMI context.
703 *
6e4933a0
JT
704 * Returns: 0 on success, or -EINVAL if conversion has failed
705 */
706int handle_domain_nmi(struct irq_domain *domain, unsigned int hwirq,
707 struct pt_regs *regs)
708{
709 struct pt_regs *old_regs = set_irq_regs(regs);
710 unsigned int irq;
711 int ret = 0;
712
17ce302f
JT
713 /*
714 * NMI context needs to be setup earlier in order to deal with tracing.
715 */
716 WARN_ON(!in_nmi());
6e4933a0
JT
717
718 irq = irq_find_mapping(domain, hwirq);
719
720 /*
721 * ack_bad_irq is not NMI-safe, just report
722 * an invalid interrupt.
723 */
724 if (likely(irq))
725 generic_handle_irq(irq);
726 else
727 ret = -EINVAL;
728
6e4933a0
JT
729 set_irq_regs(old_regs);
730 return ret;
731}
732#endif
76ba59f8
MZ
733#endif
734
1f5a5b87
TG
735/* Dynamic interrupt handling */
736
737/**
738 * irq_free_descs - free irq descriptors
739 * @from: Start of descriptor range
740 * @cnt: Number of consecutive irqs to free
741 */
742void irq_free_descs(unsigned int from, unsigned int cnt)
743{
1f5a5b87
TG
744 int i;
745
746 if (from >= nr_irqs || (from + cnt) > nr_irqs)
747 return;
748
12ac1d0f 749 mutex_lock(&sparse_irq_lock);
1f5a5b87
TG
750 for (i = 0; i < cnt; i++)
751 free_desc(from + i);
752
1f5a5b87 753 bitmap_clear(allocated_irqs, from, cnt);
a05a900a 754 mutex_unlock(&sparse_irq_lock);
1f5a5b87 755}
edf76f83 756EXPORT_SYMBOL_GPL(irq_free_descs);
1f5a5b87
TG
757
758/**
20a15ee0 759 * __irq_alloc_descs - allocate and initialize a range of irq descriptors
1f5a5b87
TG
760 * @irq: Allocate for specific irq number if irq >= 0
761 * @from: Start the search from this irq number
762 * @cnt: Number of consecutive irqs to allocate.
763 * @node: Preferred node on which the irq descriptor should be allocated
d522a0d1 764 * @owner: Owning module (can be NULL)
e75eafb9
TG
765 * @affinity: Optional pointer to an affinity mask array of size @cnt which
766 * hints where the irq descriptors should be allocated and which
767 * default affinities to use
1f5a5b87
TG
768 *
769 * Returns the first irq number or error code
770 */
771int __ref
b6873807 772__irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
bec04037 773 struct module *owner, const struct irq_affinity_desc *affinity)
1f5a5b87 774{
1f5a5b87
TG
775 int start, ret;
776
777 if (!cnt)
778 return -EINVAL;
779
c5182b88
MB
780 if (irq >= 0) {
781 if (from > irq)
782 return -EINVAL;
783 from = irq;
62a08ae2
TG
784 } else {
785 /*
786 * For interrupts which are freely allocated the
787 * architecture can force a lower bound to the @from
788 * argument. x86 uses this to exclude the GSI space.
789 */
790 from = arch_dynirq_lower_bound(from);
c5182b88
MB
791 }
792
a05a900a 793 mutex_lock(&sparse_irq_lock);
1f5a5b87 794
ed4dea6e
YL
795 start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
796 from, cnt, 0);
1f5a5b87
TG
797 ret = -EEXIST;
798 if (irq >=0 && start != irq)
12ac1d0f 799 goto unlock;
1f5a5b87 800
ed4dea6e
YL
801 if (start + cnt > nr_irqs) {
802 ret = irq_expand_nr_irqs(start + cnt);
e7bcecb7 803 if (ret)
12ac1d0f 804 goto unlock;
e7bcecb7 805 }
12ac1d0f
TG
806 ret = alloc_descs(start, cnt, node, affinity, owner);
807unlock:
a05a900a 808 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
809 return ret;
810}
b6873807 811EXPORT_SYMBOL_GPL(__irq_alloc_descs);
1f5a5b87 812
7b6ef126
TG
813#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
814/**
815 * irq_alloc_hwirqs - Allocate an irq descriptor and initialize the hardware
816 * @cnt: number of interrupts to allocate
817 * @node: node on which to allocate
818 *
819 * Returns an interrupt number > 0 or 0, if the allocation fails.
820 */
821unsigned int irq_alloc_hwirqs(int cnt, int node)
822{
06ee6d57 823 int i, irq = __irq_alloc_descs(-1, 0, cnt, node, NULL, NULL);
7b6ef126
TG
824
825 if (irq < 0)
826 return 0;
827
828 for (i = irq; cnt > 0; i++, cnt--) {
829 if (arch_setup_hwirq(i, node))
830 goto err;
831 irq_clear_status_flags(i, _IRQ_NOREQUEST);
832 }
833 return irq;
834
835err:
836 for (i--; i >= irq; i--) {
837 irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
838 arch_teardown_hwirq(i);
839 }
840 irq_free_descs(irq, cnt);
841 return 0;
842}
843EXPORT_SYMBOL_GPL(irq_alloc_hwirqs);
844
845/**
846 * irq_free_hwirqs - Free irq descriptor and cleanup the hardware
847 * @from: Free from irq number
848 * @cnt: number of interrupts to free
849 *
850 */
851void irq_free_hwirqs(unsigned int from, int cnt)
852{
8844aad8 853 int i, j;
7b6ef126 854
8844aad8 855 for (i = from, j = cnt; j > 0; i++, j--) {
7b6ef126
TG
856 irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
857 arch_teardown_hwirq(i);
858 }
859 irq_free_descs(from, cnt);
860}
861EXPORT_SYMBOL_GPL(irq_free_hwirqs);
862#endif
863
a98d24b7
TG
864/**
865 * irq_get_next_irq - get next allocated irq number
866 * @offset: where to start the search
867 *
868 * Returns next irq number after offset or nr_irqs if none is found.
869 */
870unsigned int irq_get_next_irq(unsigned int offset)
871{
872 return find_next_bit(allocated_irqs, nr_irqs, offset);
873}
874
d5eb4ad2 875struct irq_desc *
31d9d9b6
MZ
876__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
877 unsigned int check)
d5eb4ad2
TG
878{
879 struct irq_desc *desc = irq_to_desc(irq);
880
881 if (desc) {
31d9d9b6
MZ
882 if (check & _IRQ_DESC_CHECK) {
883 if ((check & _IRQ_DESC_PERCPU) &&
884 !irq_settings_is_per_cpu_devid(desc))
885 return NULL;
886
887 if (!(check & _IRQ_DESC_PERCPU) &&
888 irq_settings_is_per_cpu_devid(desc))
889 return NULL;
890 }
891
d5eb4ad2
TG
892 if (bus)
893 chip_bus_lock(desc);
894 raw_spin_lock_irqsave(&desc->lock, *flags);
895 }
896 return desc;
897}
898
899void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
8b3b5479 900 __releases(&desc->lock)
d5eb4ad2
TG
901{
902 raw_spin_unlock_irqrestore(&desc->lock, flags);
903 if (bus)
904 chip_bus_sync_unlock(desc);
905}
906
222df54f
MZ
907int irq_set_percpu_devid_partition(unsigned int irq,
908 const struct cpumask *affinity)
31d9d9b6
MZ
909{
910 struct irq_desc *desc = irq_to_desc(irq);
911
912 if (!desc)
913 return -EINVAL;
914
915 if (desc->percpu_enabled)
916 return -EINVAL;
917
918 desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL);
919
920 if (!desc->percpu_enabled)
921 return -ENOMEM;
922
222df54f
MZ
923 if (affinity)
924 desc->percpu_affinity = affinity;
925 else
926 desc->percpu_affinity = cpu_possible_mask;
927
31d9d9b6
MZ
928 irq_set_percpu_devid_flags(irq);
929 return 0;
930}
931
222df54f
MZ
932int irq_set_percpu_devid(unsigned int irq)
933{
934 return irq_set_percpu_devid_partition(irq, NULL);
935}
936
937int irq_get_percpu_devid_partition(unsigned int irq, struct cpumask *affinity)
938{
939 struct irq_desc *desc = irq_to_desc(irq);
940
941 if (!desc || !desc->percpu_enabled)
942 return -EINVAL;
943
944 if (affinity)
945 cpumask_copy(affinity, desc->percpu_affinity);
946
947 return 0;
948}
5ffeb050 949EXPORT_SYMBOL_GPL(irq_get_percpu_devid_partition);
222df54f 950
792d0018
TG
951void kstat_incr_irq_this_cpu(unsigned int irq)
952{
b51bf95c 953 kstat_incr_irqs_this_cpu(irq_to_desc(irq));
792d0018
TG
954}
955
c291ee62
TG
956/**
957 * kstat_irqs_cpu - Get the statistics for an interrupt on a cpu
958 * @irq: The interrupt number
959 * @cpu: The cpu number
960 *
961 * Returns the sum of interrupt counts on @cpu since boot for
962 * @irq. The caller must ensure that the interrupt is not removed
963 * concurrently.
964 */
3795de23
TG
965unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
966{
967 struct irq_desc *desc = irq_to_desc(irq);
6c9ae009
ED
968
969 return desc && desc->kstat_irqs ?
970 *per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
3795de23 971}
478735e3 972
c09cb129
ST
973static bool irq_is_nmi(struct irq_desc *desc)
974{
975 return desc->istate & IRQS_NMI;
976}
977
c291ee62
TG
978/**
979 * kstat_irqs - Get the statistics for an interrupt
980 * @irq: The interrupt number
981 *
982 * Returns the sum of interrupt counts on all cpus since boot for
983 * @irq. The caller must ensure that the interrupt is not removed
984 * concurrently.
985 */
478735e3
KH
986unsigned int kstat_irqs(unsigned int irq)
987{
988 struct irq_desc *desc = irq_to_desc(irq);
5e9662fa 989 unsigned int sum = 0;
1136b072 990 int cpu;
478735e3 991
6c9ae009 992 if (!desc || !desc->kstat_irqs)
478735e3 993 return 0;
1136b072 994 if (!irq_settings_is_per_cpu_devid(desc) &&
c09cb129
ST
995 !irq_settings_is_per_cpu(desc) &&
996 !irq_is_nmi(desc))
1136b072
TG
997 return desc->tot_count;
998
478735e3 999 for_each_possible_cpu(cpu)
6c9ae009 1000 sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
478735e3
KH
1001 return sum;
1002}
c291ee62
TG
1003
1004/**
1005 * kstat_irqs_usr - Get the statistics for an interrupt
1006 * @irq: The interrupt number
1007 *
4a5f4d2f
ED
1008 * Returns the sum of interrupt counts on all cpus since boot for @irq.
1009 * Contrary to kstat_irqs() this can be called from any context.
1010 * It uses rcu since a concurrent removal of an interrupt descriptor is
1011 * observing an rcu grace period before delayed_free_desc()/irq_kobj_release().
c291ee62
TG
1012 */
1013unsigned int kstat_irqs_usr(unsigned int irq)
1014{
7df0b278 1015 unsigned int sum;
c291ee62 1016
4a5f4d2f 1017 rcu_read_lock();
c291ee62 1018 sum = kstat_irqs(irq);
4a5f4d2f 1019 rcu_read_unlock();
c291ee62
TG
1020 return sum;
1021}