Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /* |
3 | * IRQ subsystem internal functions and variables: | |
dbec07ba TG |
4 | * |
5 | * Do not ever include this file from anything else than | |
6 | * kernel/irq/. Do not even think about using any information outside | |
7 | * of this file for your non core code. | |
1da177e4 | 8 | */ |
e144710b | 9 | #include <linux/irqdesc.h> |
8f945a33 | 10 | #include <linux/kernel_stat.h> |
be45beb2 | 11 | #include <linux/pm_runtime.h> |
b2d3d61a | 12 | #include <linux/sched/clock.h> |
1da177e4 | 13 | |
c1ee6264 TG |
14 | #ifdef CONFIG_SPARSE_IRQ |
15 | # define IRQ_BITMAP_BITS (NR_IRQS + 8196) | |
16 | #else | |
17 | # define IRQ_BITMAP_BITS NR_IRQS | |
18 | #endif | |
19 | ||
dbec07ba TG |
20 | #define istate core_internal_state__do_not_mess_with_it |
21 | ||
2329abfa | 22 | extern bool noirqdebug; |
1da177e4 | 23 | |
e509bd7d MW |
24 | extern struct irqaction chained_action; |
25 | ||
1535dfac TG |
26 | /* |
27 | * Bits used by threaded handlers: | |
28 | * IRQTF_RUNTHREAD - signals that the interrupt handler thread should run | |
1535dfac TG |
29 | * IRQTF_WARNED - warning "IRQ_WAKE_THREAD w/o thread_fn" has been printed |
30 | * IRQTF_AFFINITY - irq thread is requested to adjust affinity | |
8d32a307 | 31 | * IRQTF_FORCED_THREAD - irq action is force threaded |
1535dfac TG |
32 | */ |
33 | enum { | |
34 | IRQTF_RUNTHREAD, | |
1535dfac TG |
35 | IRQTF_WARNED, |
36 | IRQTF_AFFINITY, | |
8d32a307 | 37 | IRQTF_FORCED_THREAD, |
1535dfac TG |
38 | }; |
39 | ||
bd062e76 | 40 | /* |
a257954b | 41 | * Bit masks for desc->core_internal_state__do_not_mess_with_it |
bd062e76 TG |
42 | * |
43 | * IRQS_AUTODETECT - autodetection in progress | |
7acdd53e TG |
44 | * IRQS_SPURIOUS_DISABLED - was disabled due to spurious interrupt |
45 | * detection | |
6954b75b | 46 | * IRQS_POLL_INPROGRESS - polling in progress |
3d67baec | 47 | * IRQS_ONESHOT - irq is not unmasked in primary handler |
163ef309 TG |
48 | * IRQS_REPLAY - irq is replayed |
49 | * IRQS_WAITING - irq is waiting | |
2a0d6fb3 | 50 | * IRQS_PENDING - irq is pending and replayed later |
c531e836 | 51 | * IRQS_SUSPENDED - irq is suspended |
bd062e76 TG |
52 | */ |
53 | enum { | |
54 | IRQS_AUTODETECT = 0x00000001, | |
7acdd53e | 55 | IRQS_SPURIOUS_DISABLED = 0x00000002, |
6954b75b | 56 | IRQS_POLL_INPROGRESS = 0x00000008, |
3d67baec | 57 | IRQS_ONESHOT = 0x00000020, |
163ef309 TG |
58 | IRQS_REPLAY = 0x00000040, |
59 | IRQS_WAITING = 0x00000080, | |
2a0d6fb3 | 60 | IRQS_PENDING = 0x00000200, |
c531e836 | 61 | IRQS_SUSPENDED = 0x00000800, |
b2d3d61a | 62 | IRQS_TIMINGS = 0x00001000, |
bd062e76 TG |
63 | }; |
64 | ||
1ce6068d TG |
65 | #include "debug.h" |
66 | #include "settings.h" | |
67 | ||
a1ff541a | 68 | extern int __irq_set_trigger(struct irq_desc *desc, unsigned long flags); |
79ff1cda JL |
69 | extern void __disable_irq(struct irq_desc *desc); |
70 | extern void __enable_irq(struct irq_desc *desc); | |
0c5d1eb7 | 71 | |
4cde9c6b TG |
72 | #define IRQ_RESEND true |
73 | #define IRQ_NORESEND false | |
74 | ||
75 | #define IRQ_START_FORCE true | |
76 | #define IRQ_START_COND false | |
77 | ||
c942cee4 | 78 | extern int irq_activate(struct irq_desc *desc); |
1beaeacd | 79 | extern int irq_activate_and_startup(struct irq_desc *desc, bool resend); |
4cde9c6b TG |
80 | extern int irq_startup(struct irq_desc *desc, bool resend, bool force); |
81 | ||
46999238 | 82 | extern void irq_shutdown(struct irq_desc *desc); |
87923470 TG |
83 | extern void irq_enable(struct irq_desc *desc); |
84 | extern void irq_disable(struct irq_desc *desc); | |
31d9d9b6 MZ |
85 | extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu); |
86 | extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu); | |
d4d5e089 TG |
87 | extern void mask_irq(struct irq_desc *desc); |
88 | extern void unmask_irq(struct irq_desc *desc); | |
328a4978 | 89 | extern void unmask_threaded_irq(struct irq_desc *desc); |
46999238 | 90 | |
f63b6a05 TG |
91 | #ifdef CONFIG_SPARSE_IRQ |
92 | static inline void irq_mark_irq(unsigned int irq) { } | |
93 | #else | |
94 | extern void irq_mark_irq(unsigned int irq); | |
95 | #endif | |
96 | ||
85ac16d0 | 97 | extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr); |
0fa0ebbf | 98 | |
edd14cfe | 99 | irqreturn_t __handle_irq_event_percpu(struct irq_desc *desc, unsigned int *flags); |
71f64340 | 100 | irqreturn_t handle_irq_event_percpu(struct irq_desc *desc); |
4912609f TG |
101 | irqreturn_t handle_irq_event(struct irq_desc *desc); |
102 | ||
e144710b | 103 | /* Resending of interrupts :*/ |
0798abeb | 104 | void check_irq_resend(struct irq_desc *desc); |
fe200ae4 | 105 | bool irq_wait_for_poll(struct irq_desc *desc); |
a92444c6 | 106 | void __irq_wake_thread(struct irq_desc *desc, struct irqaction *action); |
e144710b | 107 | |
1da177e4 | 108 | #ifdef CONFIG_PROC_FS |
2c6927a3 | 109 | extern void register_irq_proc(unsigned int irq, struct irq_desc *desc); |
13bfe99e | 110 | extern void unregister_irq_proc(unsigned int irq, struct irq_desc *desc); |
1da177e4 LT |
111 | extern void register_handler_proc(unsigned int irq, struct irqaction *action); |
112 | extern void unregister_handler_proc(unsigned int irq, struct irqaction *action); | |
113 | #else | |
2c6927a3 | 114 | static inline void register_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
13bfe99e | 115 | static inline void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
1da177e4 LT |
116 | static inline void register_handler_proc(unsigned int irq, |
117 | struct irqaction *action) { } | |
118 | static inline void unregister_handler_proc(unsigned int irq, | |
119 | struct irqaction *action) { } | |
120 | #endif | |
121 | ||
9c255583 TG |
122 | extern bool irq_can_set_affinity_usr(unsigned int irq); |
123 | ||
cba4235e | 124 | extern int irq_select_affinity_usr(unsigned int irq); |
f6d87f4b | 125 | |
591d2fb0 | 126 | extern void irq_set_thread_affinity(struct irq_desc *desc); |
57b150cc | 127 | |
818b0f3b JL |
128 | extern int irq_do_set_affinity(struct irq_data *data, |
129 | const struct cpumask *dest, bool force); | |
130 | ||
43564bd9 TG |
131 | #ifdef CONFIG_SMP |
132 | extern int irq_setup_affinity(struct irq_desc *desc); | |
133 | #else | |
134 | static inline int irq_setup_affinity(struct irq_desc *desc) { return 0; } | |
135 | #endif | |
136 | ||
70aedd24 | 137 | /* Inline functions for support of irq chips on slow busses */ |
3876ec9e | 138 | static inline void chip_bus_lock(struct irq_desc *desc) |
70aedd24 | 139 | { |
3876ec9e TG |
140 | if (unlikely(desc->irq_data.chip->irq_bus_lock)) |
141 | desc->irq_data.chip->irq_bus_lock(&desc->irq_data); | |
70aedd24 TG |
142 | } |
143 | ||
3876ec9e | 144 | static inline void chip_bus_sync_unlock(struct irq_desc *desc) |
70aedd24 | 145 | { |
3876ec9e TG |
146 | if (unlikely(desc->irq_data.chip->irq_bus_sync_unlock)) |
147 | desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data); | |
70aedd24 TG |
148 | } |
149 | ||
31d9d9b6 MZ |
150 | #define _IRQ_DESC_CHECK (1 << 0) |
151 | #define _IRQ_DESC_PERCPU (1 << 1) | |
152 | ||
153 | #define IRQ_GET_DESC_CHECK_GLOBAL (_IRQ_DESC_CHECK) | |
154 | #define IRQ_GET_DESC_CHECK_PERCPU (_IRQ_DESC_CHECK | _IRQ_DESC_PERCPU) | |
155 | ||
f944b5a7 | 156 | #define for_each_action_of_desc(desc, act) \ |
163616cf | 157 | for (act = desc->action; act; act = act->next) |
f944b5a7 | 158 | |
d5eb4ad2 | 159 | struct irq_desc * |
31d9d9b6 MZ |
160 | __irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, |
161 | unsigned int check); | |
d5eb4ad2 TG |
162 | void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus); |
163 | ||
164 | static inline struct irq_desc * | |
31d9d9b6 | 165 | irq_get_desc_buslock(unsigned int irq, unsigned long *flags, unsigned int check) |
d5eb4ad2 | 166 | { |
31d9d9b6 | 167 | return __irq_get_desc_lock(irq, flags, true, check); |
d5eb4ad2 TG |
168 | } |
169 | ||
170 | static inline void | |
171 | irq_put_desc_busunlock(struct irq_desc *desc, unsigned long flags) | |
172 | { | |
173 | __irq_put_desc_unlock(desc, flags, true); | |
174 | } | |
175 | ||
176 | static inline struct irq_desc * | |
31d9d9b6 | 177 | irq_get_desc_lock(unsigned int irq, unsigned long *flags, unsigned int check) |
d5eb4ad2 | 178 | { |
31d9d9b6 | 179 | return __irq_get_desc_lock(irq, flags, false, check); |
d5eb4ad2 TG |
180 | } |
181 | ||
182 | static inline void | |
183 | irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags) | |
184 | { | |
185 | __irq_put_desc_unlock(desc, flags, false); | |
186 | } | |
187 | ||
b354286e BF |
188 | #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors) |
189 | ||
087cdfb6 TG |
190 | static inline unsigned int irqd_get(struct irq_data *d) |
191 | { | |
192 | return __irqd_to_state(d); | |
193 | } | |
194 | ||
f230b6d5 TG |
195 | /* |
196 | * Manipulation functions for irq_data.state | |
197 | */ | |
198 | static inline void irqd_set_move_pending(struct irq_data *d) | |
199 | { | |
0d0b4c86 | 200 | __irqd_to_state(d) |= IRQD_SETAFFINITY_PENDING; |
f230b6d5 TG |
201 | } |
202 | ||
203 | static inline void irqd_clr_move_pending(struct irq_data *d) | |
204 | { | |
0d0b4c86 | 205 | __irqd_to_state(d) &= ~IRQD_SETAFFINITY_PENDING; |
f230b6d5 | 206 | } |
a005677b | 207 | |
54fdf6a0 TG |
208 | static inline void irqd_set_managed_shutdown(struct irq_data *d) |
209 | { | |
210 | __irqd_to_state(d) |= IRQD_MANAGED_SHUTDOWN; | |
211 | } | |
212 | ||
213 | static inline void irqd_clr_managed_shutdown(struct irq_data *d) | |
214 | { | |
215 | __irqd_to_state(d) &= ~IRQD_MANAGED_SHUTDOWN; | |
216 | } | |
217 | ||
a005677b TG |
218 | static inline void irqd_clear(struct irq_data *d, unsigned int mask) |
219 | { | |
0d0b4c86 | 220 | __irqd_to_state(d) &= ~mask; |
a005677b TG |
221 | } |
222 | ||
223 | static inline void irqd_set(struct irq_data *d, unsigned int mask) | |
224 | { | |
0d0b4c86 | 225 | __irqd_to_state(d) |= mask; |
a005677b TG |
226 | } |
227 | ||
2bdd1055 TG |
228 | static inline bool irqd_has_set(struct irq_data *d, unsigned int mask) |
229 | { | |
0d0b4c86 | 230 | return __irqd_to_state(d) & mask; |
2bdd1055 | 231 | } |
8f945a33 | 232 | |
a696712c JG |
233 | static inline void irq_state_set_disabled(struct irq_desc *desc) |
234 | { | |
235 | irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED); | |
236 | } | |
237 | ||
238 | static inline void irq_state_set_masked(struct irq_desc *desc) | |
239 | { | |
240 | irqd_set(&desc->irq_data, IRQD_IRQ_MASKED); | |
241 | } | |
242 | ||
b354286e BF |
243 | #undef __irqd_to_state |
244 | ||
b51bf95c | 245 | static inline void kstat_incr_irqs_this_cpu(struct irq_desc *desc) |
8f945a33 TG |
246 | { |
247 | __this_cpu_inc(*desc->kstat_irqs); | |
248 | __this_cpu_inc(kstat.irqs_sum); | |
249 | } | |
cab303be | 250 | |
6783011b JL |
251 | static inline int irq_desc_get_node(struct irq_desc *desc) |
252 | { | |
449e9cae | 253 | return irq_common_data_get_node(&desc->irq_common_data); |
6783011b JL |
254 | } |
255 | ||
4717f133 GS |
256 | static inline int irq_desc_is_chained(struct irq_desc *desc) |
257 | { | |
258 | return (desc->action && desc->action == &chained_action); | |
259 | } | |
260 | ||
cab303be | 261 | #ifdef CONFIG_PM_SLEEP |
9ce7a258 | 262 | bool irq_pm_check_wakeup(struct irq_desc *desc); |
cab303be TG |
263 | void irq_pm_install_action(struct irq_desc *desc, struct irqaction *action); |
264 | void irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action); | |
265 | #else | |
9ce7a258 | 266 | static inline bool irq_pm_check_wakeup(struct irq_desc *desc) { return false; } |
cab303be TG |
267 | static inline void |
268 | irq_pm_install_action(struct irq_desc *desc, struct irqaction *action) { } | |
269 | static inline void | |
270 | irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action) { } | |
271 | #endif | |
f1602039 | 272 | |
b2d3d61a DL |
273 | #ifdef CONFIG_IRQ_TIMINGS |
274 | ||
275 | #define IRQ_TIMINGS_SHIFT 5 | |
276 | #define IRQ_TIMINGS_SIZE (1 << IRQ_TIMINGS_SHIFT) | |
277 | #define IRQ_TIMINGS_MASK (IRQ_TIMINGS_SIZE - 1) | |
278 | ||
279 | /** | |
280 | * struct irq_timings - irq timings storing structure | |
281 | * @values: a circular buffer of u64 encoded <timestamp,irq> values | |
282 | * @count: the number of elements in the array | |
283 | */ | |
284 | struct irq_timings { | |
285 | u64 values[IRQ_TIMINGS_SIZE]; | |
286 | int count; | |
287 | }; | |
288 | ||
289 | DECLARE_PER_CPU(struct irq_timings, irq_timings); | |
290 | ||
e1c92149 DL |
291 | extern void irq_timings_free(int irq); |
292 | extern int irq_timings_alloc(int irq); | |
293 | ||
b2d3d61a DL |
294 | static inline void irq_remove_timings(struct irq_desc *desc) |
295 | { | |
296 | desc->istate &= ~IRQS_TIMINGS; | |
e1c92149 DL |
297 | |
298 | irq_timings_free(irq_desc_get_irq(desc)); | |
b2d3d61a DL |
299 | } |
300 | ||
301 | static inline void irq_setup_timings(struct irq_desc *desc, struct irqaction *act) | |
302 | { | |
e1c92149 DL |
303 | int irq = irq_desc_get_irq(desc); |
304 | int ret; | |
305 | ||
b2d3d61a DL |
306 | /* |
307 | * We don't need the measurement because the idle code already | |
308 | * knows the next expiry event. | |
309 | */ | |
310 | if (act->flags & __IRQF_TIMER) | |
311 | return; | |
312 | ||
e1c92149 DL |
313 | /* |
314 | * In case the timing allocation fails, we just want to warn, | |
315 | * not fail, so letting the system boot anyway. | |
316 | */ | |
317 | ret = irq_timings_alloc(irq); | |
318 | if (ret) { | |
319 | pr_warn("Failed to allocate irq timing stats for irq%d (%d)", | |
320 | irq, ret); | |
321 | return; | |
322 | } | |
323 | ||
b2d3d61a DL |
324 | desc->istate |= IRQS_TIMINGS; |
325 | } | |
326 | ||
327 | extern void irq_timings_enable(void); | |
328 | extern void irq_timings_disable(void); | |
329 | ||
330 | DECLARE_STATIC_KEY_FALSE(irq_timing_enabled); | |
331 | ||
332 | /* | |
333 | * The interrupt number and the timestamp are encoded into a single | |
334 | * u64 variable to optimize the size. | |
335 | * 48 bit time stamp and 16 bit IRQ number is way sufficient. | |
336 | * Who cares an IRQ after 78 hours of idle time? | |
337 | */ | |
338 | static inline u64 irq_timing_encode(u64 timestamp, int irq) | |
339 | { | |
340 | return (timestamp << 16) | irq; | |
341 | } | |
342 | ||
343 | static inline int irq_timing_decode(u64 value, u64 *timestamp) | |
344 | { | |
345 | *timestamp = value >> 16; | |
346 | return value & U16_MAX; | |
347 | } | |
348 | ||
349 | /* | |
350 | * The function record_irq_time is only called in one place in the | |
351 | * interrupts handler. We want this function always inline so the code | |
352 | * inside is embedded in the function and the static key branching | |
353 | * code can act at the higher level. Without the explicit | |
354 | * __always_inline we can end up with a function call and a small | |
355 | * overhead in the hotpath for nothing. | |
356 | */ | |
357 | static __always_inline void record_irq_time(struct irq_desc *desc) | |
358 | { | |
359 | if (!static_branch_likely(&irq_timing_enabled)) | |
360 | return; | |
361 | ||
362 | if (desc->istate & IRQS_TIMINGS) { | |
363 | struct irq_timings *timings = this_cpu_ptr(&irq_timings); | |
364 | ||
365 | timings->values[timings->count & IRQ_TIMINGS_MASK] = | |
366 | irq_timing_encode(local_clock(), | |
367 | irq_desc_get_irq(desc)); | |
368 | ||
369 | timings->count++; | |
370 | } | |
371 | } | |
372 | #else | |
373 | static inline void irq_remove_timings(struct irq_desc *desc) {} | |
374 | static inline void irq_setup_timings(struct irq_desc *desc, | |
375 | struct irqaction *act) {}; | |
376 | static inline void record_irq_time(struct irq_desc *desc) {} | |
377 | #endif /* CONFIG_IRQ_TIMINGS */ | |
378 | ||
379 | ||
f1602039 BG |
380 | #ifdef CONFIG_GENERIC_IRQ_CHIP |
381 | void irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, | |
382 | int num_ct, unsigned int irq_base, | |
383 | void __iomem *reg_base, irq_flow_handler_t handler); | |
384 | #else | |
385 | static inline void | |
386 | irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, | |
387 | int num_ct, unsigned int irq_base, | |
388 | void __iomem *reg_base, irq_flow_handler_t handler) { } | |
389 | #endif /* CONFIG_GENERIC_IRQ_CHIP */ | |
087cdfb6 | 390 | |
137221df CH |
391 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
392 | static inline bool irq_can_move_pcntxt(struct irq_data *data) | |
393 | { | |
394 | return irqd_can_move_in_process_context(data); | |
395 | } | |
396 | static inline bool irq_move_pending(struct irq_data *data) | |
397 | { | |
398 | return irqd_is_setaffinity_pending(data); | |
399 | } | |
400 | static inline void | |
401 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
402 | { | |
403 | cpumask_copy(desc->pending_mask, mask); | |
404 | } | |
405 | static inline void | |
406 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
407 | { | |
408 | cpumask_copy(mask, desc->pending_mask); | |
409 | } | |
f0383c24 TG |
410 | static inline struct cpumask *irq_desc_get_pending_mask(struct irq_desc *desc) |
411 | { | |
412 | return desc->pending_mask; | |
413 | } | |
36d84fb4 | 414 | bool irq_fixup_move_pending(struct irq_desc *desc, bool force_clear); |
137221df CH |
415 | #else /* CONFIG_GENERIC_PENDING_IRQ */ |
416 | static inline bool irq_can_move_pcntxt(struct irq_data *data) | |
417 | { | |
418 | return true; | |
419 | } | |
420 | static inline bool irq_move_pending(struct irq_data *data) | |
421 | { | |
422 | return false; | |
423 | } | |
424 | static inline void | |
425 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
426 | { | |
427 | } | |
428 | static inline void | |
429 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
430 | { | |
431 | } | |
f0383c24 TG |
432 | static inline struct cpumask *irq_desc_get_pending_mask(struct irq_desc *desc) |
433 | { | |
434 | return NULL; | |
435 | } | |
36d84fb4 TG |
436 | static inline bool irq_fixup_move_pending(struct irq_desc *desc, bool fclear) |
437 | { | |
438 | return false; | |
439 | } | |
f0383c24 | 440 | #endif /* !CONFIG_GENERIC_PENDING_IRQ */ |
137221df | 441 | |
457f6d35 | 442 | #if !defined(CONFIG_IRQ_DOMAIN) || !defined(CONFIG_IRQ_DOMAIN_HIERARCHY) |
702cb0a0 | 443 | static inline int irq_domain_activate_irq(struct irq_data *data, bool reserve) |
457f6d35 TG |
444 | { |
445 | irqd_set_activated(data); | |
bb9b428a | 446 | return 0; |
457f6d35 TG |
447 | } |
448 | static inline void irq_domain_deactivate_irq(struct irq_data *data) | |
449 | { | |
450 | irqd_clr_activated(data); | |
451 | } | |
452 | #endif | |
453 | ||
087cdfb6 | 454 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
c2ce34c0 TG |
455 | #include <linux/debugfs.h> |
456 | ||
087cdfb6 | 457 | void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc); |
c2ce34c0 TG |
458 | static inline void irq_remove_debugfs_entry(struct irq_desc *desc) |
459 | { | |
460 | debugfs_remove(desc->debugfs_file); | |
07557ccb | 461 | kfree(desc->dev_name); |
c2ce34c0 | 462 | } |
07557ccb | 463 | void irq_debugfs_copy_devname(int irq, struct device *dev); |
087cdfb6 TG |
464 | # ifdef CONFIG_IRQ_DOMAIN |
465 | void irq_domain_debugfs_init(struct dentry *root); | |
466 | # else | |
e5682b4e SO |
467 | static inline void irq_domain_debugfs_init(struct dentry *root) |
468 | { | |
469 | } | |
087cdfb6 TG |
470 | # endif |
471 | #else /* CONFIG_GENERIC_IRQ_DEBUGFS */ | |
472 | static inline void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *d) | |
473 | { | |
474 | } | |
475 | static inline void irq_remove_debugfs_entry(struct irq_desc *d) | |
476 | { | |
477 | } | |
07557ccb TG |
478 | static inline void irq_debugfs_copy_devname(int irq, struct device *dev) |
479 | { | |
480 | } | |
087cdfb6 | 481 | #endif /* CONFIG_GENERIC_IRQ_DEBUGFS */ |