Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /* |
3 | * IRQ subsystem internal functions and variables: | |
dbec07ba TG |
4 | * |
5 | * Do not ever include this file from anything else than | |
6 | * kernel/irq/. Do not even think about using any information outside | |
7 | * of this file for your non core code. | |
1da177e4 | 8 | */ |
e144710b | 9 | #include <linux/irqdesc.h> |
8f945a33 | 10 | #include <linux/kernel_stat.h> |
be45beb2 | 11 | #include <linux/pm_runtime.h> |
b2d3d61a | 12 | #include <linux/sched/clock.h> |
1da177e4 | 13 | |
c1ee6264 TG |
14 | #ifdef CONFIG_SPARSE_IRQ |
15 | # define IRQ_BITMAP_BITS (NR_IRQS + 8196) | |
16 | #else | |
17 | # define IRQ_BITMAP_BITS NR_IRQS | |
18 | #endif | |
19 | ||
dbec07ba TG |
20 | #define istate core_internal_state__do_not_mess_with_it |
21 | ||
2329abfa | 22 | extern bool noirqdebug; |
1da177e4 | 23 | |
e509bd7d MW |
24 | extern struct irqaction chained_action; |
25 | ||
1535dfac TG |
26 | /* |
27 | * Bits used by threaded handlers: | |
28 | * IRQTF_RUNTHREAD - signals that the interrupt handler thread should run | |
1535dfac TG |
29 | * IRQTF_WARNED - warning "IRQ_WAKE_THREAD w/o thread_fn" has been printed |
30 | * IRQTF_AFFINITY - irq thread is requested to adjust affinity | |
8d32a307 | 31 | * IRQTF_FORCED_THREAD - irq action is force threaded |
8707898e | 32 | * IRQTF_READY - signals that irq thread is ready |
1535dfac TG |
33 | */ |
34 | enum { | |
35 | IRQTF_RUNTHREAD, | |
1535dfac TG |
36 | IRQTF_WARNED, |
37 | IRQTF_AFFINITY, | |
8d32a307 | 38 | IRQTF_FORCED_THREAD, |
8707898e | 39 | IRQTF_READY, |
1535dfac TG |
40 | }; |
41 | ||
bd062e76 | 42 | /* |
a257954b | 43 | * Bit masks for desc->core_internal_state__do_not_mess_with_it |
bd062e76 TG |
44 | * |
45 | * IRQS_AUTODETECT - autodetection in progress | |
7acdd53e TG |
46 | * IRQS_SPURIOUS_DISABLED - was disabled due to spurious interrupt |
47 | * detection | |
6954b75b | 48 | * IRQS_POLL_INPROGRESS - polling in progress |
3d67baec | 49 | * IRQS_ONESHOT - irq is not unmasked in primary handler |
163ef309 TG |
50 | * IRQS_REPLAY - irq is replayed |
51 | * IRQS_WAITING - irq is waiting | |
2a0d6fb3 | 52 | * IRQS_PENDING - irq is pending and replayed later |
c531e836 | 53 | * IRQS_SUSPENDED - irq is suspended |
b525903c | 54 | * IRQS_NMI - irq line is used to deliver NMIs |
9049e1ca | 55 | * IRQS_SYSFS - descriptor has been added to sysfs |
bd062e76 TG |
56 | */ |
57 | enum { | |
58 | IRQS_AUTODETECT = 0x00000001, | |
7acdd53e | 59 | IRQS_SPURIOUS_DISABLED = 0x00000002, |
6954b75b | 60 | IRQS_POLL_INPROGRESS = 0x00000008, |
3d67baec | 61 | IRQS_ONESHOT = 0x00000020, |
163ef309 TG |
62 | IRQS_REPLAY = 0x00000040, |
63 | IRQS_WAITING = 0x00000080, | |
2a0d6fb3 | 64 | IRQS_PENDING = 0x00000200, |
c531e836 | 65 | IRQS_SUSPENDED = 0x00000800, |
b2d3d61a | 66 | IRQS_TIMINGS = 0x00001000, |
b525903c | 67 | IRQS_NMI = 0x00002000, |
9049e1ca | 68 | IRQS_SYSFS = 0x00004000, |
bd062e76 TG |
69 | }; |
70 | ||
1ce6068d TG |
71 | #include "debug.h" |
72 | #include "settings.h" | |
73 | ||
a1ff541a | 74 | extern int __irq_set_trigger(struct irq_desc *desc, unsigned long flags); |
79ff1cda JL |
75 | extern void __disable_irq(struct irq_desc *desc); |
76 | extern void __enable_irq(struct irq_desc *desc); | |
0c5d1eb7 | 77 | |
4cde9c6b TG |
78 | #define IRQ_RESEND true |
79 | #define IRQ_NORESEND false | |
80 | ||
81 | #define IRQ_START_FORCE true | |
82 | #define IRQ_START_COND false | |
83 | ||
c942cee4 | 84 | extern int irq_activate(struct irq_desc *desc); |
1beaeacd | 85 | extern int irq_activate_and_startup(struct irq_desc *desc, bool resend); |
4cde9c6b TG |
86 | extern int irq_startup(struct irq_desc *desc, bool resend, bool force); |
87 | ||
46999238 | 88 | extern void irq_shutdown(struct irq_desc *desc); |
4001d8e8 | 89 | extern void irq_shutdown_and_deactivate(struct irq_desc *desc); |
87923470 TG |
90 | extern void irq_enable(struct irq_desc *desc); |
91 | extern void irq_disable(struct irq_desc *desc); | |
31d9d9b6 MZ |
92 | extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu); |
93 | extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu); | |
d4d5e089 TG |
94 | extern void mask_irq(struct irq_desc *desc); |
95 | extern void unmask_irq(struct irq_desc *desc); | |
328a4978 | 96 | extern void unmask_threaded_irq(struct irq_desc *desc); |
46999238 | 97 | |
f63b6a05 TG |
98 | #ifdef CONFIG_SPARSE_IRQ |
99 | static inline void irq_mark_irq(unsigned int irq) { } | |
100 | #else | |
101 | extern void irq_mark_irq(unsigned int irq); | |
102 | #endif | |
103 | ||
62e04686 TG |
104 | extern int __irq_get_irqchip_state(struct irq_data *data, |
105 | enum irqchip_irq_state which, | |
106 | bool *state); | |
107 | ||
85ac16d0 | 108 | extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr); |
0fa0ebbf | 109 | |
5320eb42 | 110 | irqreturn_t __handle_irq_event_percpu(struct irq_desc *desc); |
71f64340 | 111 | irqreturn_t handle_irq_event_percpu(struct irq_desc *desc); |
4912609f TG |
112 | irqreturn_t handle_irq_event(struct irq_desc *desc); |
113 | ||
e144710b | 114 | /* Resending of interrupts :*/ |
acd26bcf | 115 | int check_irq_resend(struct irq_desc *desc, bool inject); |
fe200ae4 | 116 | bool irq_wait_for_poll(struct irq_desc *desc); |
a92444c6 | 117 | void __irq_wake_thread(struct irq_desc *desc, struct irqaction *action); |
e144710b | 118 | |
1da177e4 | 119 | #ifdef CONFIG_PROC_FS |
2c6927a3 | 120 | extern void register_irq_proc(unsigned int irq, struct irq_desc *desc); |
13bfe99e | 121 | extern void unregister_irq_proc(unsigned int irq, struct irq_desc *desc); |
1da177e4 LT |
122 | extern void register_handler_proc(unsigned int irq, struct irqaction *action); |
123 | extern void unregister_handler_proc(unsigned int irq, struct irqaction *action); | |
124 | #else | |
2c6927a3 | 125 | static inline void register_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
13bfe99e | 126 | static inline void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
1da177e4 LT |
127 | static inline void register_handler_proc(unsigned int irq, |
128 | struct irqaction *action) { } | |
129 | static inline void unregister_handler_proc(unsigned int irq, | |
130 | struct irqaction *action) { } | |
131 | #endif | |
132 | ||
9c255583 TG |
133 | extern bool irq_can_set_affinity_usr(unsigned int irq); |
134 | ||
591d2fb0 | 135 | extern void irq_set_thread_affinity(struct irq_desc *desc); |
57b150cc | 136 | |
818b0f3b JL |
137 | extern int irq_do_set_affinity(struct irq_data *data, |
138 | const struct cpumask *dest, bool force); | |
139 | ||
43564bd9 TG |
140 | #ifdef CONFIG_SMP |
141 | extern int irq_setup_affinity(struct irq_desc *desc); | |
142 | #else | |
143 | static inline int irq_setup_affinity(struct irq_desc *desc) { return 0; } | |
144 | #endif | |
145 | ||
70aedd24 | 146 | /* Inline functions for support of irq chips on slow busses */ |
3876ec9e | 147 | static inline void chip_bus_lock(struct irq_desc *desc) |
70aedd24 | 148 | { |
3876ec9e TG |
149 | if (unlikely(desc->irq_data.chip->irq_bus_lock)) |
150 | desc->irq_data.chip->irq_bus_lock(&desc->irq_data); | |
70aedd24 TG |
151 | } |
152 | ||
3876ec9e | 153 | static inline void chip_bus_sync_unlock(struct irq_desc *desc) |
70aedd24 | 154 | { |
3876ec9e TG |
155 | if (unlikely(desc->irq_data.chip->irq_bus_sync_unlock)) |
156 | desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data); | |
70aedd24 TG |
157 | } |
158 | ||
31d9d9b6 MZ |
159 | #define _IRQ_DESC_CHECK (1 << 0) |
160 | #define _IRQ_DESC_PERCPU (1 << 1) | |
161 | ||
162 | #define IRQ_GET_DESC_CHECK_GLOBAL (_IRQ_DESC_CHECK) | |
163 | #define IRQ_GET_DESC_CHECK_PERCPU (_IRQ_DESC_CHECK | _IRQ_DESC_PERCPU) | |
164 | ||
f944b5a7 | 165 | #define for_each_action_of_desc(desc, act) \ |
163616cf | 166 | for (act = desc->action; act; act = act->next) |
f944b5a7 | 167 | |
d5eb4ad2 | 168 | struct irq_desc * |
31d9d9b6 MZ |
169 | __irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, |
170 | unsigned int check); | |
d5eb4ad2 TG |
171 | void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus); |
172 | ||
173 | static inline struct irq_desc * | |
31d9d9b6 | 174 | irq_get_desc_buslock(unsigned int irq, unsigned long *flags, unsigned int check) |
d5eb4ad2 | 175 | { |
31d9d9b6 | 176 | return __irq_get_desc_lock(irq, flags, true, check); |
d5eb4ad2 TG |
177 | } |
178 | ||
179 | static inline void | |
180 | irq_put_desc_busunlock(struct irq_desc *desc, unsigned long flags) | |
181 | { | |
182 | __irq_put_desc_unlock(desc, flags, true); | |
183 | } | |
184 | ||
185 | static inline struct irq_desc * | |
31d9d9b6 | 186 | irq_get_desc_lock(unsigned int irq, unsigned long *flags, unsigned int check) |
d5eb4ad2 | 187 | { |
31d9d9b6 | 188 | return __irq_get_desc_lock(irq, flags, false, check); |
d5eb4ad2 TG |
189 | } |
190 | ||
191 | static inline void | |
192 | irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags) | |
193 | { | |
194 | __irq_put_desc_unlock(desc, flags, false); | |
195 | } | |
196 | ||
b354286e BF |
197 | #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors) |
198 | ||
087cdfb6 TG |
199 | static inline unsigned int irqd_get(struct irq_data *d) |
200 | { | |
201 | return __irqd_to_state(d); | |
202 | } | |
203 | ||
f230b6d5 TG |
204 | /* |
205 | * Manipulation functions for irq_data.state | |
206 | */ | |
207 | static inline void irqd_set_move_pending(struct irq_data *d) | |
208 | { | |
0d0b4c86 | 209 | __irqd_to_state(d) |= IRQD_SETAFFINITY_PENDING; |
f230b6d5 TG |
210 | } |
211 | ||
212 | static inline void irqd_clr_move_pending(struct irq_data *d) | |
213 | { | |
0d0b4c86 | 214 | __irqd_to_state(d) &= ~IRQD_SETAFFINITY_PENDING; |
f230b6d5 | 215 | } |
a005677b | 216 | |
54fdf6a0 TG |
217 | static inline void irqd_set_managed_shutdown(struct irq_data *d) |
218 | { | |
219 | __irqd_to_state(d) |= IRQD_MANAGED_SHUTDOWN; | |
220 | } | |
221 | ||
222 | static inline void irqd_clr_managed_shutdown(struct irq_data *d) | |
223 | { | |
224 | __irqd_to_state(d) &= ~IRQD_MANAGED_SHUTDOWN; | |
225 | } | |
226 | ||
a005677b TG |
227 | static inline void irqd_clear(struct irq_data *d, unsigned int mask) |
228 | { | |
0d0b4c86 | 229 | __irqd_to_state(d) &= ~mask; |
a005677b TG |
230 | } |
231 | ||
232 | static inline void irqd_set(struct irq_data *d, unsigned int mask) | |
233 | { | |
0d0b4c86 | 234 | __irqd_to_state(d) |= mask; |
a005677b TG |
235 | } |
236 | ||
2bdd1055 TG |
237 | static inline bool irqd_has_set(struct irq_data *d, unsigned int mask) |
238 | { | |
0d0b4c86 | 239 | return __irqd_to_state(d) & mask; |
2bdd1055 | 240 | } |
8f945a33 | 241 | |
a696712c JG |
242 | static inline void irq_state_set_disabled(struct irq_desc *desc) |
243 | { | |
244 | irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED); | |
245 | } | |
246 | ||
247 | static inline void irq_state_set_masked(struct irq_desc *desc) | |
248 | { | |
249 | irqd_set(&desc->irq_data, IRQD_IRQ_MASKED); | |
250 | } | |
251 | ||
b354286e BF |
252 | #undef __irqd_to_state |
253 | ||
1136b072 | 254 | static inline void __kstat_incr_irqs_this_cpu(struct irq_desc *desc) |
8f945a33 TG |
255 | { |
256 | __this_cpu_inc(*desc->kstat_irqs); | |
257 | __this_cpu_inc(kstat.irqs_sum); | |
258 | } | |
cab303be | 259 | |
1136b072 TG |
260 | static inline void kstat_incr_irqs_this_cpu(struct irq_desc *desc) |
261 | { | |
262 | __kstat_incr_irqs_this_cpu(desc); | |
263 | desc->tot_count++; | |
264 | } | |
265 | ||
6783011b JL |
266 | static inline int irq_desc_get_node(struct irq_desc *desc) |
267 | { | |
449e9cae | 268 | return irq_common_data_get_node(&desc->irq_common_data); |
6783011b JL |
269 | } |
270 | ||
4717f133 GS |
271 | static inline int irq_desc_is_chained(struct irq_desc *desc) |
272 | { | |
273 | return (desc->action && desc->action == &chained_action); | |
274 | } | |
275 | ||
cab303be | 276 | #ifdef CONFIG_PM_SLEEP |
9ce7a258 | 277 | bool irq_pm_check_wakeup(struct irq_desc *desc); |
cab303be TG |
278 | void irq_pm_install_action(struct irq_desc *desc, struct irqaction *action); |
279 | void irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action); | |
280 | #else | |
9ce7a258 | 281 | static inline bool irq_pm_check_wakeup(struct irq_desc *desc) { return false; } |
cab303be TG |
282 | static inline void |
283 | irq_pm_install_action(struct irq_desc *desc, struct irqaction *action) { } | |
284 | static inline void | |
285 | irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action) { } | |
286 | #endif | |
f1602039 | 287 | |
b2d3d61a DL |
288 | #ifdef CONFIG_IRQ_TIMINGS |
289 | ||
290 | #define IRQ_TIMINGS_SHIFT 5 | |
291 | #define IRQ_TIMINGS_SIZE (1 << IRQ_TIMINGS_SHIFT) | |
292 | #define IRQ_TIMINGS_MASK (IRQ_TIMINGS_SIZE - 1) | |
293 | ||
294 | /** | |
295 | * struct irq_timings - irq timings storing structure | |
296 | * @values: a circular buffer of u64 encoded <timestamp,irq> values | |
297 | * @count: the number of elements in the array | |
298 | */ | |
299 | struct irq_timings { | |
300 | u64 values[IRQ_TIMINGS_SIZE]; | |
301 | int count; | |
302 | }; | |
303 | ||
304 | DECLARE_PER_CPU(struct irq_timings, irq_timings); | |
305 | ||
e1c92149 DL |
306 | extern void irq_timings_free(int irq); |
307 | extern int irq_timings_alloc(int irq); | |
308 | ||
b2d3d61a DL |
309 | static inline void irq_remove_timings(struct irq_desc *desc) |
310 | { | |
311 | desc->istate &= ~IRQS_TIMINGS; | |
e1c92149 DL |
312 | |
313 | irq_timings_free(irq_desc_get_irq(desc)); | |
b2d3d61a DL |
314 | } |
315 | ||
316 | static inline void irq_setup_timings(struct irq_desc *desc, struct irqaction *act) | |
317 | { | |
e1c92149 DL |
318 | int irq = irq_desc_get_irq(desc); |
319 | int ret; | |
320 | ||
b2d3d61a DL |
321 | /* |
322 | * We don't need the measurement because the idle code already | |
323 | * knows the next expiry event. | |
324 | */ | |
325 | if (act->flags & __IRQF_TIMER) | |
326 | return; | |
327 | ||
e1c92149 DL |
328 | /* |
329 | * In case the timing allocation fails, we just want to warn, | |
330 | * not fail, so letting the system boot anyway. | |
331 | */ | |
332 | ret = irq_timings_alloc(irq); | |
333 | if (ret) { | |
334 | pr_warn("Failed to allocate irq timing stats for irq%d (%d)", | |
335 | irq, ret); | |
336 | return; | |
337 | } | |
338 | ||
b2d3d61a DL |
339 | desc->istate |= IRQS_TIMINGS; |
340 | } | |
341 | ||
342 | extern void irq_timings_enable(void); | |
343 | extern void irq_timings_disable(void); | |
344 | ||
345 | DECLARE_STATIC_KEY_FALSE(irq_timing_enabled); | |
346 | ||
347 | /* | |
348 | * The interrupt number and the timestamp are encoded into a single | |
349 | * u64 variable to optimize the size. | |
350 | * 48 bit time stamp and 16 bit IRQ number is way sufficient. | |
351 | * Who cares an IRQ after 78 hours of idle time? | |
352 | */ | |
353 | static inline u64 irq_timing_encode(u64 timestamp, int irq) | |
354 | { | |
355 | return (timestamp << 16) | irq; | |
356 | } | |
357 | ||
358 | static inline int irq_timing_decode(u64 value, u64 *timestamp) | |
359 | { | |
360 | *timestamp = value >> 16; | |
361 | return value & U16_MAX; | |
362 | } | |
363 | ||
df025e47 DL |
364 | static __always_inline void irq_timings_push(u64 ts, int irq) |
365 | { | |
366 | struct irq_timings *timings = this_cpu_ptr(&irq_timings); | |
367 | ||
368 | timings->values[timings->count & IRQ_TIMINGS_MASK] = | |
369 | irq_timing_encode(ts, irq); | |
370 | ||
371 | timings->count++; | |
372 | } | |
373 | ||
b2d3d61a DL |
374 | /* |
375 | * The function record_irq_time is only called in one place in the | |
376 | * interrupts handler. We want this function always inline so the code | |
377 | * inside is embedded in the function and the static key branching | |
378 | * code can act at the higher level. Without the explicit | |
379 | * __always_inline we can end up with a function call and a small | |
380 | * overhead in the hotpath for nothing. | |
381 | */ | |
382 | static __always_inline void record_irq_time(struct irq_desc *desc) | |
383 | { | |
384 | if (!static_branch_likely(&irq_timing_enabled)) | |
385 | return; | |
386 | ||
df025e47 DL |
387 | if (desc->istate & IRQS_TIMINGS) |
388 | irq_timings_push(local_clock(), irq_desc_get_irq(desc)); | |
b2d3d61a DL |
389 | } |
390 | #else | |
391 | static inline void irq_remove_timings(struct irq_desc *desc) {} | |
392 | static inline void irq_setup_timings(struct irq_desc *desc, | |
393 | struct irqaction *act) {}; | |
394 | static inline void record_irq_time(struct irq_desc *desc) {} | |
395 | #endif /* CONFIG_IRQ_TIMINGS */ | |
396 | ||
397 | ||
f1602039 BG |
398 | #ifdef CONFIG_GENERIC_IRQ_CHIP |
399 | void irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, | |
400 | int num_ct, unsigned int irq_base, | |
401 | void __iomem *reg_base, irq_flow_handler_t handler); | |
402 | #else | |
403 | static inline void | |
404 | irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, | |
405 | int num_ct, unsigned int irq_base, | |
406 | void __iomem *reg_base, irq_flow_handler_t handler) { } | |
407 | #endif /* CONFIG_GENERIC_IRQ_CHIP */ | |
087cdfb6 | 408 | |
137221df CH |
409 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
410 | static inline bool irq_can_move_pcntxt(struct irq_data *data) | |
411 | { | |
412 | return irqd_can_move_in_process_context(data); | |
413 | } | |
414 | static inline bool irq_move_pending(struct irq_data *data) | |
415 | { | |
416 | return irqd_is_setaffinity_pending(data); | |
417 | } | |
418 | static inline void | |
419 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
420 | { | |
421 | cpumask_copy(desc->pending_mask, mask); | |
422 | } | |
423 | static inline void | |
424 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
425 | { | |
426 | cpumask_copy(mask, desc->pending_mask); | |
427 | } | |
f0383c24 TG |
428 | static inline struct cpumask *irq_desc_get_pending_mask(struct irq_desc *desc) |
429 | { | |
430 | return desc->pending_mask; | |
431 | } | |
c16816ac TG |
432 | static inline bool handle_enforce_irqctx(struct irq_data *data) |
433 | { | |
434 | return irqd_is_handle_enforce_irqctx(data); | |
435 | } | |
36d84fb4 | 436 | bool irq_fixup_move_pending(struct irq_desc *desc, bool force_clear); |
137221df CH |
437 | #else /* CONFIG_GENERIC_PENDING_IRQ */ |
438 | static inline bool irq_can_move_pcntxt(struct irq_data *data) | |
439 | { | |
440 | return true; | |
441 | } | |
442 | static inline bool irq_move_pending(struct irq_data *data) | |
443 | { | |
444 | return false; | |
445 | } | |
446 | static inline void | |
447 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
448 | { | |
449 | } | |
450 | static inline void | |
451 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
452 | { | |
453 | } | |
f0383c24 TG |
454 | static inline struct cpumask *irq_desc_get_pending_mask(struct irq_desc *desc) |
455 | { | |
456 | return NULL; | |
457 | } | |
36d84fb4 TG |
458 | static inline bool irq_fixup_move_pending(struct irq_desc *desc, bool fclear) |
459 | { | |
460 | return false; | |
461 | } | |
c16816ac TG |
462 | static inline bool handle_enforce_irqctx(struct irq_data *data) |
463 | { | |
464 | return false; | |
465 | } | |
f0383c24 | 466 | #endif /* !CONFIG_GENERIC_PENDING_IRQ */ |
137221df | 467 | |
457f6d35 | 468 | #if !defined(CONFIG_IRQ_DOMAIN) || !defined(CONFIG_IRQ_DOMAIN_HIERARCHY) |
702cb0a0 | 469 | static inline int irq_domain_activate_irq(struct irq_data *data, bool reserve) |
457f6d35 TG |
470 | { |
471 | irqd_set_activated(data); | |
bb9b428a | 472 | return 0; |
457f6d35 TG |
473 | } |
474 | static inline void irq_domain_deactivate_irq(struct irq_data *data) | |
475 | { | |
476 | irqd_clr_activated(data); | |
477 | } | |
478 | #endif | |
479 | ||
13b90cad TG |
480 | static inline struct irq_data *irqd_get_parent_data(struct irq_data *irqd) |
481 | { | |
482 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
483 | return irqd->parent_data; | |
484 | #else | |
485 | return NULL; | |
486 | #endif | |
487 | } | |
488 | ||
087cdfb6 | 489 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
c2ce34c0 TG |
490 | #include <linux/debugfs.h> |
491 | ||
087cdfb6 | 492 | void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc); |
c2ce34c0 TG |
493 | static inline void irq_remove_debugfs_entry(struct irq_desc *desc) |
494 | { | |
495 | debugfs_remove(desc->debugfs_file); | |
07557ccb | 496 | kfree(desc->dev_name); |
c2ce34c0 | 497 | } |
07557ccb | 498 | void irq_debugfs_copy_devname(int irq, struct device *dev); |
087cdfb6 TG |
499 | # ifdef CONFIG_IRQ_DOMAIN |
500 | void irq_domain_debugfs_init(struct dentry *root); | |
501 | # else | |
e5682b4e SO |
502 | static inline void irq_domain_debugfs_init(struct dentry *root) |
503 | { | |
504 | } | |
087cdfb6 TG |
505 | # endif |
506 | #else /* CONFIG_GENERIC_IRQ_DEBUGFS */ | |
507 | static inline void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *d) | |
508 | { | |
509 | } | |
510 | static inline void irq_remove_debugfs_entry(struct irq_desc *d) | |
511 | { | |
512 | } | |
07557ccb TG |
513 | static inline void irq_debugfs_copy_devname(int irq, struct device *dev) |
514 | { | |
515 | } | |
087cdfb6 | 516 | #endif /* CONFIG_GENERIC_IRQ_DEBUGFS */ |