Commit | Line | Data |
---|---|---|
dd87eb3a TG |
1 | /* |
2 | * linux/kernel/irq/chip.c | |
3 | * | |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
6 | * | |
7 | * This file contains the core interrupt handling code, for irq-chip | |
8 | * based architectures. | |
9 | * | |
10 | * Detailed information is available in Documentation/DocBook/genericirq | |
11 | */ | |
12 | ||
13 | #include <linux/irq.h> | |
7fe3730d | 14 | #include <linux/msi.h> |
dd87eb3a TG |
15 | #include <linux/module.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
3a16d713 EB |
21 | /** |
22 | * dynamic_irq_init - initialize a dynamically allocated irq | |
23 | * @irq: irq number to initialize | |
24 | */ | |
25 | void dynamic_irq_init(unsigned int irq) | |
26 | { | |
0b8f1efa | 27 | struct irq_desc *desc; |
3a16d713 EB |
28 | unsigned long flags; |
29 | ||
0b8f1efa | 30 | desc = irq_to_desc(irq); |
7d94f7ca | 31 | if (!desc) { |
261c40c1 | 32 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); |
3a16d713 EB |
33 | return; |
34 | } | |
35 | ||
36 | /* Ensure we don't have left over values from a previous use of this irq */ | |
239007b8 | 37 | raw_spin_lock_irqsave(&desc->lock, flags); |
3a16d713 EB |
38 | desc->status = IRQ_DISABLED; |
39 | desc->chip = &no_irq_chip; | |
40 | desc->handle_irq = handle_bad_irq; | |
41 | desc->depth = 1; | |
5b912c10 | 42 | desc->msi_desc = NULL; |
3a16d713 EB |
43 | desc->handler_data = NULL; |
44 | desc->chip_data = NULL; | |
45 | desc->action = NULL; | |
46 | desc->irq_count = 0; | |
47 | desc->irqs_unhandled = 0; | |
48 | #ifdef CONFIG_SMP | |
7f7ace0c MT |
49 | cpumask_setall(desc->affinity); |
50 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
51 | cpumask_clear(desc->pending_mask); | |
52 | #endif | |
3a16d713 | 53 | #endif |
239007b8 | 54 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3a16d713 EB |
55 | } |
56 | ||
57 | /** | |
58 | * dynamic_irq_cleanup - cleanup a dynamically allocated irq | |
59 | * @irq: irq number to initialize | |
60 | */ | |
61 | void dynamic_irq_cleanup(unsigned int irq) | |
62 | { | |
d3c60047 | 63 | struct irq_desc *desc = irq_to_desc(irq); |
3a16d713 EB |
64 | unsigned long flags; |
65 | ||
7d94f7ca | 66 | if (!desc) { |
261c40c1 | 67 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); |
3a16d713 EB |
68 | return; |
69 | } | |
70 | ||
239007b8 | 71 | raw_spin_lock_irqsave(&desc->lock, flags); |
1f80025e | 72 | if (desc->action) { |
239007b8 | 73 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
261c40c1 | 74 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", |
1f80025e | 75 | irq); |
1f80025e EB |
76 | return; |
77 | } | |
5b912c10 EB |
78 | desc->msi_desc = NULL; |
79 | desc->handler_data = NULL; | |
80 | desc->chip_data = NULL; | |
3a16d713 EB |
81 | desc->handle_irq = handle_bad_irq; |
82 | desc->chip = &no_irq_chip; | |
b6f3b780 | 83 | desc->name = NULL; |
0f3c2a89 | 84 | clear_kstat_irqs(desc); |
239007b8 | 85 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3a16d713 EB |
86 | } |
87 | ||
88 | ||
dd87eb3a TG |
89 | /** |
90 | * set_irq_chip - set the irq chip for an irq | |
91 | * @irq: irq number | |
92 | * @chip: pointer to irq chip description structure | |
93 | */ | |
94 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | |
95 | { | |
d3c60047 | 96 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
97 | unsigned long flags; |
98 | ||
7d94f7ca | 99 | if (!desc) { |
261c40c1 | 100 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
dd87eb3a TG |
101 | return -EINVAL; |
102 | } | |
103 | ||
104 | if (!chip) | |
105 | chip = &no_irq_chip; | |
106 | ||
239007b8 | 107 | raw_spin_lock_irqsave(&desc->lock, flags); |
dd87eb3a TG |
108 | irq_chip_set_defaults(chip); |
109 | desc->chip = chip; | |
239007b8 | 110 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
dd87eb3a TG |
111 | |
112 | return 0; | |
113 | } | |
114 | EXPORT_SYMBOL(set_irq_chip); | |
115 | ||
116 | /** | |
0c5d1eb7 | 117 | * set_irq_type - set the irq trigger type for an irq |
dd87eb3a | 118 | * @irq: irq number |
0c5d1eb7 | 119 | * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h |
dd87eb3a TG |
120 | */ |
121 | int set_irq_type(unsigned int irq, unsigned int type) | |
122 | { | |
d3c60047 | 123 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
124 | unsigned long flags; |
125 | int ret = -ENXIO; | |
126 | ||
7d94f7ca | 127 | if (!desc) { |
dd87eb3a TG |
128 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
129 | return -ENODEV; | |
130 | } | |
131 | ||
f2b662da | 132 | type &= IRQ_TYPE_SENSE_MASK; |
0c5d1eb7 DB |
133 | if (type == IRQ_TYPE_NONE) |
134 | return 0; | |
135 | ||
239007b8 | 136 | raw_spin_lock_irqsave(&desc->lock, flags); |
0b3682ba | 137 | ret = __irq_set_trigger(desc, irq, type); |
239007b8 | 138 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
dd87eb3a TG |
139 | return ret; |
140 | } | |
141 | EXPORT_SYMBOL(set_irq_type); | |
142 | ||
143 | /** | |
144 | * set_irq_data - set irq type data for an irq | |
145 | * @irq: Interrupt number | |
146 | * @data: Pointer to interrupt specific data | |
147 | * | |
148 | * Set the hardware irq controller data for an irq | |
149 | */ | |
150 | int set_irq_data(unsigned int irq, void *data) | |
151 | { | |
d3c60047 | 152 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
153 | unsigned long flags; |
154 | ||
7d94f7ca | 155 | if (!desc) { |
dd87eb3a TG |
156 | printk(KERN_ERR |
157 | "Trying to install controller data for IRQ%d\n", irq); | |
158 | return -EINVAL; | |
159 | } | |
160 | ||
239007b8 | 161 | raw_spin_lock_irqsave(&desc->lock, flags); |
dd87eb3a | 162 | desc->handler_data = data; |
239007b8 | 163 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
dd87eb3a TG |
164 | return 0; |
165 | } | |
166 | EXPORT_SYMBOL(set_irq_data); | |
167 | ||
5b912c10 | 168 | /** |
24b26d42 | 169 | * set_irq_msi - set MSI descriptor data for an irq |
5b912c10 | 170 | * @irq: Interrupt number |
472900b8 | 171 | * @entry: Pointer to MSI descriptor data |
5b912c10 | 172 | * |
24b26d42 | 173 | * Set the MSI descriptor entry for an irq |
5b912c10 EB |
174 | */ |
175 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | |
176 | { | |
d3c60047 | 177 | struct irq_desc *desc = irq_to_desc(irq); |
5b912c10 EB |
178 | unsigned long flags; |
179 | ||
7d94f7ca | 180 | if (!desc) { |
5b912c10 EB |
181 | printk(KERN_ERR |
182 | "Trying to install msi data for IRQ%d\n", irq); | |
183 | return -EINVAL; | |
184 | } | |
7d94f7ca | 185 | |
239007b8 | 186 | raw_spin_lock_irqsave(&desc->lock, flags); |
5b912c10 | 187 | desc->msi_desc = entry; |
7fe3730d ME |
188 | if (entry) |
189 | entry->irq = irq; | |
239007b8 | 190 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
5b912c10 EB |
191 | return 0; |
192 | } | |
193 | ||
dd87eb3a TG |
194 | /** |
195 | * set_irq_chip_data - set irq chip data for an irq | |
196 | * @irq: Interrupt number | |
197 | * @data: Pointer to chip specific data | |
198 | * | |
199 | * Set the hardware irq chip data for an irq | |
200 | */ | |
201 | int set_irq_chip_data(unsigned int irq, void *data) | |
202 | { | |
d3c60047 | 203 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
204 | unsigned long flags; |
205 | ||
7d94f7ca YL |
206 | if (!desc) { |
207 | printk(KERN_ERR | |
208 | "Trying to install chip data for IRQ%d\n", irq); | |
209 | return -EINVAL; | |
210 | } | |
211 | ||
212 | if (!desc->chip) { | |
dd87eb3a TG |
213 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); |
214 | return -EINVAL; | |
215 | } | |
216 | ||
239007b8 | 217 | raw_spin_lock_irqsave(&desc->lock, flags); |
dd87eb3a | 218 | desc->chip_data = data; |
239007b8 | 219 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
dd87eb3a TG |
220 | |
221 | return 0; | |
222 | } | |
223 | EXPORT_SYMBOL(set_irq_chip_data); | |
224 | ||
399b5da2 TG |
225 | /** |
226 | * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq | |
227 | * | |
228 | * @irq: Interrupt number | |
229 | * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag | |
230 | * | |
231 | * The IRQ_NESTED_THREAD flag indicates that on | |
232 | * request_threaded_irq() no separate interrupt thread should be | |
233 | * created for the irq as the handler are called nested in the | |
234 | * context of a demultiplexing interrupt handler thread. | |
235 | */ | |
236 | void set_irq_nested_thread(unsigned int irq, int nest) | |
237 | { | |
238 | struct irq_desc *desc = irq_to_desc(irq); | |
239 | unsigned long flags; | |
240 | ||
241 | if (!desc) | |
242 | return; | |
243 | ||
239007b8 | 244 | raw_spin_lock_irqsave(&desc->lock, flags); |
399b5da2 TG |
245 | if (nest) |
246 | desc->status |= IRQ_NESTED_THREAD; | |
247 | else | |
248 | desc->status &= ~IRQ_NESTED_THREAD; | |
239007b8 | 249 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
399b5da2 TG |
250 | } |
251 | EXPORT_SYMBOL_GPL(set_irq_nested_thread); | |
252 | ||
dd87eb3a TG |
253 | /* |
254 | * default enable function | |
255 | */ | |
256 | static void default_enable(unsigned int irq) | |
257 | { | |
d3c60047 | 258 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
259 | |
260 | desc->chip->unmask(irq); | |
261 | desc->status &= ~IRQ_MASKED; | |
262 | } | |
263 | ||
264 | /* | |
265 | * default disable function | |
266 | */ | |
267 | static void default_disable(unsigned int irq) | |
268 | { | |
dd87eb3a TG |
269 | } |
270 | ||
271 | /* | |
272 | * default startup function | |
273 | */ | |
274 | static unsigned int default_startup(unsigned int irq) | |
275 | { | |
d3c60047 | 276 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 277 | |
08678b08 | 278 | desc->chip->enable(irq); |
dd87eb3a TG |
279 | return 0; |
280 | } | |
281 | ||
89d694b9 TG |
282 | /* |
283 | * default shutdown function | |
284 | */ | |
285 | static void default_shutdown(unsigned int irq) | |
286 | { | |
d3c60047 | 287 | struct irq_desc *desc = irq_to_desc(irq); |
89d694b9 TG |
288 | |
289 | desc->chip->mask(irq); | |
290 | desc->status |= IRQ_MASKED; | |
291 | } | |
292 | ||
dd87eb3a TG |
293 | /* |
294 | * Fixup enable/disable function pointers | |
295 | */ | |
296 | void irq_chip_set_defaults(struct irq_chip *chip) | |
297 | { | |
298 | if (!chip->enable) | |
299 | chip->enable = default_enable; | |
300 | if (!chip->disable) | |
301 | chip->disable = default_disable; | |
302 | if (!chip->startup) | |
303 | chip->startup = default_startup; | |
89d694b9 TG |
304 | /* |
305 | * We use chip->disable, when the user provided its own. When | |
306 | * we have default_disable set for chip->disable, then we need | |
307 | * to use default_shutdown, otherwise the irq line is not | |
308 | * disabled on free_irq(): | |
309 | */ | |
dd87eb3a | 310 | if (!chip->shutdown) |
89d694b9 TG |
311 | chip->shutdown = chip->disable != default_disable ? |
312 | chip->disable : default_shutdown; | |
dd87eb3a TG |
313 | if (!chip->name) |
314 | chip->name = chip->typename; | |
b86432b4 ZY |
315 | if (!chip->end) |
316 | chip->end = dummy_irq_chip.end; | |
dd87eb3a TG |
317 | } |
318 | ||
319 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | |
320 | { | |
321 | if (desc->chip->mask_ack) | |
322 | desc->chip->mask_ack(irq); | |
323 | else { | |
324 | desc->chip->mask(irq); | |
efdc64f0 WC |
325 | if (desc->chip->ack) |
326 | desc->chip->ack(irq); | |
dd87eb3a TG |
327 | } |
328 | } | |
329 | ||
399b5da2 TG |
330 | /* |
331 | * handle_nested_irq - Handle a nested irq from a irq thread | |
332 | * @irq: the interrupt number | |
333 | * | |
334 | * Handle interrupts which are nested into a threaded interrupt | |
335 | * handler. The handler function is called inside the calling | |
336 | * threads context. | |
337 | */ | |
338 | void handle_nested_irq(unsigned int irq) | |
339 | { | |
340 | struct irq_desc *desc = irq_to_desc(irq); | |
341 | struct irqaction *action; | |
342 | irqreturn_t action_ret; | |
343 | ||
344 | might_sleep(); | |
345 | ||
239007b8 | 346 | raw_spin_lock_irq(&desc->lock); |
399b5da2 TG |
347 | |
348 | kstat_incr_irqs_this_cpu(irq, desc); | |
349 | ||
350 | action = desc->action; | |
351 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | |
352 | goto out_unlock; | |
353 | ||
354 | desc->status |= IRQ_INPROGRESS; | |
239007b8 | 355 | raw_spin_unlock_irq(&desc->lock); |
399b5da2 TG |
356 | |
357 | action_ret = action->thread_fn(action->irq, action->dev_id); | |
358 | if (!noirqdebug) | |
359 | note_interrupt(irq, desc, action_ret); | |
360 | ||
239007b8 | 361 | raw_spin_lock_irq(&desc->lock); |
399b5da2 TG |
362 | desc->status &= ~IRQ_INPROGRESS; |
363 | ||
364 | out_unlock: | |
239007b8 | 365 | raw_spin_unlock_irq(&desc->lock); |
399b5da2 TG |
366 | } |
367 | EXPORT_SYMBOL_GPL(handle_nested_irq); | |
368 | ||
dd87eb3a TG |
369 | /** |
370 | * handle_simple_irq - Simple and software-decoded IRQs. | |
371 | * @irq: the interrupt number | |
372 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
373 | * |
374 | * Simple interrupts are either sent from a demultiplexing interrupt | |
375 | * handler or come from hardware, where no interrupt hardware control | |
376 | * is necessary. | |
377 | * | |
378 | * Note: The caller is expected to handle the ack, clear, mask and | |
379 | * unmask issues if necessary. | |
380 | */ | |
7ad5b3a5 | 381 | void |
7d12e780 | 382 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
383 | { |
384 | struct irqaction *action; | |
385 | irqreturn_t action_ret; | |
dd87eb3a | 386 | |
239007b8 | 387 | raw_spin_lock(&desc->lock); |
dd87eb3a TG |
388 | |
389 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
390 | goto out_unlock; | |
971e5b35 | 391 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 392 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
393 | |
394 | action = desc->action; | |
971e5b35 | 395 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
dd87eb3a TG |
396 | goto out_unlock; |
397 | ||
398 | desc->status |= IRQ_INPROGRESS; | |
239007b8 | 399 | raw_spin_unlock(&desc->lock); |
dd87eb3a | 400 | |
7d12e780 | 401 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 402 | if (!noirqdebug) |
7d12e780 | 403 | note_interrupt(irq, desc, action_ret); |
dd87eb3a | 404 | |
239007b8 | 405 | raw_spin_lock(&desc->lock); |
dd87eb3a TG |
406 | desc->status &= ~IRQ_INPROGRESS; |
407 | out_unlock: | |
239007b8 | 408 | raw_spin_unlock(&desc->lock); |
dd87eb3a TG |
409 | } |
410 | ||
411 | /** | |
412 | * handle_level_irq - Level type irq handler | |
413 | * @irq: the interrupt number | |
414 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
415 | * |
416 | * Level type interrupts are active as long as the hardware line has | |
417 | * the active level. This may require to mask the interrupt and unmask | |
418 | * it after the associated handler has acknowledged the device, so the | |
419 | * interrupt line is back to inactive. | |
420 | */ | |
7ad5b3a5 | 421 | void |
7d12e780 | 422 | handle_level_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 423 | { |
dd87eb3a TG |
424 | struct irqaction *action; |
425 | irqreturn_t action_ret; | |
426 | ||
239007b8 | 427 | raw_spin_lock(&desc->lock); |
dd87eb3a TG |
428 | mask_ack_irq(desc, irq); |
429 | ||
430 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
86998aa6 | 431 | goto out_unlock; |
dd87eb3a | 432 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 433 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
434 | |
435 | /* | |
436 | * If its disabled or no action available | |
437 | * keep it masked and get out of here | |
438 | */ | |
439 | action = desc->action; | |
49663421 | 440 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
86998aa6 | 441 | goto out_unlock; |
dd87eb3a TG |
442 | |
443 | desc->status |= IRQ_INPROGRESS; | |
239007b8 | 444 | raw_spin_unlock(&desc->lock); |
dd87eb3a | 445 | |
7d12e780 | 446 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 447 | if (!noirqdebug) |
7d12e780 | 448 | note_interrupt(irq, desc, action_ret); |
dd87eb3a | 449 | |
239007b8 | 450 | raw_spin_lock(&desc->lock); |
dd87eb3a | 451 | desc->status &= ~IRQ_INPROGRESS; |
b25c340c TG |
452 | |
453 | if (unlikely(desc->status & IRQ_ONESHOT)) | |
454 | desc->status |= IRQ_MASKED; | |
455 | else if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | |
dd87eb3a | 456 | desc->chip->unmask(irq); |
86998aa6 | 457 | out_unlock: |
239007b8 | 458 | raw_spin_unlock(&desc->lock); |
dd87eb3a | 459 | } |
14819ea1 | 460 | EXPORT_SYMBOL_GPL(handle_level_irq); |
dd87eb3a TG |
461 | |
462 | /** | |
47c2a3aa | 463 | * handle_fasteoi_irq - irq handler for transparent controllers |
dd87eb3a TG |
464 | * @irq: the interrupt number |
465 | * @desc: the interrupt description structure for this irq | |
dd87eb3a | 466 | * |
47c2a3aa | 467 | * Only a single callback will be issued to the chip: an ->eoi() |
dd87eb3a TG |
468 | * call when the interrupt has been serviced. This enables support |
469 | * for modern forms of interrupt handlers, which handle the flow | |
470 | * details in hardware, transparently. | |
471 | */ | |
7ad5b3a5 | 472 | void |
7d12e780 | 473 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 474 | { |
dd87eb3a TG |
475 | struct irqaction *action; |
476 | irqreturn_t action_ret; | |
477 | ||
239007b8 | 478 | raw_spin_lock(&desc->lock); |
dd87eb3a TG |
479 | |
480 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
481 | goto out; | |
482 | ||
483 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
d6c88a50 | 484 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
485 | |
486 | /* | |
487 | * If its disabled or no action available | |
76d21601 | 488 | * then mask it and get out of here: |
dd87eb3a TG |
489 | */ |
490 | action = desc->action; | |
98bb244b BH |
491 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
492 | desc->status |= IRQ_PENDING; | |
76d21601 IM |
493 | if (desc->chip->mask) |
494 | desc->chip->mask(irq); | |
dd87eb3a | 495 | goto out; |
98bb244b | 496 | } |
dd87eb3a TG |
497 | |
498 | desc->status |= IRQ_INPROGRESS; | |
98bb244b | 499 | desc->status &= ~IRQ_PENDING; |
239007b8 | 500 | raw_spin_unlock(&desc->lock); |
dd87eb3a | 501 | |
7d12e780 | 502 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 503 | if (!noirqdebug) |
7d12e780 | 504 | note_interrupt(irq, desc, action_ret); |
dd87eb3a | 505 | |
239007b8 | 506 | raw_spin_lock(&desc->lock); |
dd87eb3a TG |
507 | desc->status &= ~IRQ_INPROGRESS; |
508 | out: | |
47c2a3aa | 509 | desc->chip->eoi(irq); |
dd87eb3a | 510 | |
239007b8 | 511 | raw_spin_unlock(&desc->lock); |
dd87eb3a TG |
512 | } |
513 | ||
514 | /** | |
515 | * handle_edge_irq - edge type IRQ handler | |
516 | * @irq: the interrupt number | |
517 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
518 | * |
519 | * Interrupt occures on the falling and/or rising edge of a hardware | |
520 | * signal. The occurence is latched into the irq controller hardware | |
521 | * and must be acked in order to be reenabled. After the ack another | |
522 | * interrupt can happen on the same source even before the first one | |
523 | * is handled by the assosiacted event handler. If this happens it | |
524 | * might be necessary to disable (mask) the interrupt depending on the | |
525 | * controller hardware. This requires to reenable the interrupt inside | |
526 | * of the loop which handles the interrupts which have arrived while | |
527 | * the handler was running. If all pending interrupts are handled, the | |
528 | * loop is left. | |
529 | */ | |
7ad5b3a5 | 530 | void |
7d12e780 | 531 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 532 | { |
239007b8 | 533 | raw_spin_lock(&desc->lock); |
dd87eb3a TG |
534 | |
535 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
536 | ||
537 | /* | |
538 | * If we're currently running this IRQ, or its disabled, | |
539 | * we shouldn't process the IRQ. Mark it pending, handle | |
540 | * the necessary masking and go out | |
541 | */ | |
542 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | |
543 | !desc->action)) { | |
544 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | |
545 | mask_ack_irq(desc, irq); | |
546 | goto out_unlock; | |
547 | } | |
d6c88a50 | 548 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
549 | |
550 | /* Start handling the irq */ | |
4dbc9ca2 TG |
551 | if (desc->chip->ack) |
552 | desc->chip->ack(irq); | |
dd87eb3a TG |
553 | |
554 | /* Mark the IRQ currently in progress.*/ | |
555 | desc->status |= IRQ_INPROGRESS; | |
556 | ||
557 | do { | |
558 | struct irqaction *action = desc->action; | |
559 | irqreturn_t action_ret; | |
560 | ||
561 | if (unlikely(!action)) { | |
562 | desc->chip->mask(irq); | |
563 | goto out_unlock; | |
564 | } | |
565 | ||
566 | /* | |
567 | * When another irq arrived while we were handling | |
568 | * one, we could have masked the irq. | |
569 | * Renable it, if it was not disabled in meantime. | |
570 | */ | |
571 | if (unlikely((desc->status & | |
572 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | |
573 | (IRQ_PENDING | IRQ_MASKED))) { | |
574 | desc->chip->unmask(irq); | |
575 | desc->status &= ~IRQ_MASKED; | |
576 | } | |
577 | ||
578 | desc->status &= ~IRQ_PENDING; | |
239007b8 | 579 | raw_spin_unlock(&desc->lock); |
7d12e780 | 580 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 581 | if (!noirqdebug) |
7d12e780 | 582 | note_interrupt(irq, desc, action_ret); |
239007b8 | 583 | raw_spin_lock(&desc->lock); |
dd87eb3a TG |
584 | |
585 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | |
586 | ||
587 | desc->status &= ~IRQ_INPROGRESS; | |
588 | out_unlock: | |
239007b8 | 589 | raw_spin_unlock(&desc->lock); |
dd87eb3a TG |
590 | } |
591 | ||
dd87eb3a | 592 | /** |
24b26d42 | 593 | * handle_percpu_irq - Per CPU local irq handler |
dd87eb3a TG |
594 | * @irq: the interrupt number |
595 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
596 | * |
597 | * Per CPU interrupts on SMP machines without locking requirements | |
598 | */ | |
7ad5b3a5 | 599 | void |
7d12e780 | 600 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
601 | { |
602 | irqreturn_t action_ret; | |
603 | ||
d6c88a50 | 604 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
605 | |
606 | if (desc->chip->ack) | |
607 | desc->chip->ack(irq); | |
608 | ||
7d12e780 | 609 | action_ret = handle_IRQ_event(irq, desc->action); |
dd87eb3a | 610 | if (!noirqdebug) |
7d12e780 | 611 | note_interrupt(irq, desc, action_ret); |
dd87eb3a | 612 | |
fcef5911 | 613 | if (desc->chip->eoi) |
dd87eb3a TG |
614 | desc->chip->eoi(irq); |
615 | } | |
616 | ||
dd87eb3a | 617 | void |
a460e745 IM |
618 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
619 | const char *name) | |
dd87eb3a | 620 | { |
d3c60047 | 621 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
622 | unsigned long flags; |
623 | ||
7d94f7ca | 624 | if (!desc) { |
dd87eb3a TG |
625 | printk(KERN_ERR |
626 | "Trying to install type control for IRQ%d\n", irq); | |
627 | return; | |
628 | } | |
629 | ||
dd87eb3a TG |
630 | if (!handle) |
631 | handle = handle_bad_irq; | |
9d7ac8be | 632 | else if (desc->chip == &no_irq_chip) { |
f8b5473f | 633 | printk(KERN_WARNING "Trying to install %sinterrupt handler " |
b039db8e | 634 | "for IRQ%d\n", is_chained ? "chained " : "", irq); |
f8b5473f TG |
635 | /* |
636 | * Some ARM implementations install a handler for really dumb | |
637 | * interrupt hardware without setting an irq_chip. This worked | |
638 | * with the ARM no_irq_chip but the check in setup_irq would | |
639 | * prevent us to setup the interrupt at all. Switch it to | |
640 | * dummy_irq_chip for easy transition. | |
641 | */ | |
642 | desc->chip = &dummy_irq_chip; | |
643 | } | |
dd87eb3a | 644 | |
70aedd24 | 645 | chip_bus_lock(irq, desc); |
239007b8 | 646 | raw_spin_lock_irqsave(&desc->lock, flags); |
dd87eb3a TG |
647 | |
648 | /* Uninstall? */ | |
649 | if (handle == handle_bad_irq) { | |
fcef5911 | 650 | if (desc->chip != &no_irq_chip) |
5575ddf7 | 651 | mask_ack_irq(desc, irq); |
dd87eb3a TG |
652 | desc->status |= IRQ_DISABLED; |
653 | desc->depth = 1; | |
654 | } | |
655 | desc->handle_irq = handle; | |
a460e745 | 656 | desc->name = name; |
dd87eb3a TG |
657 | |
658 | if (handle != handle_bad_irq && is_chained) { | |
659 | desc->status &= ~IRQ_DISABLED; | |
660 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | |
661 | desc->depth = 0; | |
7e6e178a | 662 | desc->chip->startup(irq); |
dd87eb3a | 663 | } |
239007b8 | 664 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
70aedd24 | 665 | chip_bus_sync_unlock(irq, desc); |
dd87eb3a | 666 | } |
14819ea1 | 667 | EXPORT_SYMBOL_GPL(__set_irq_handler); |
dd87eb3a TG |
668 | |
669 | void | |
670 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | |
57a58a94 | 671 | irq_flow_handler_t handle) |
dd87eb3a TG |
672 | { |
673 | set_irq_chip(irq, chip); | |
a460e745 | 674 | __set_irq_handler(irq, handle, 0, NULL); |
dd87eb3a TG |
675 | } |
676 | ||
a460e745 IM |
677 | void |
678 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | |
679 | irq_flow_handler_t handle, const char *name) | |
dd87eb3a | 680 | { |
a460e745 IM |
681 | set_irq_chip(irq, chip); |
682 | __set_irq_handler(irq, handle, 0, name); | |
dd87eb3a | 683 | } |
46f4f8f6 RB |
684 | |
685 | void __init set_irq_noprobe(unsigned int irq) | |
686 | { | |
d3c60047 | 687 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
688 | unsigned long flags; |
689 | ||
7d94f7ca | 690 | if (!desc) { |
46f4f8f6 | 691 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); |
46f4f8f6 RB |
692 | return; |
693 | } | |
694 | ||
239007b8 | 695 | raw_spin_lock_irqsave(&desc->lock, flags); |
46f4f8f6 | 696 | desc->status |= IRQ_NOPROBE; |
239007b8 | 697 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
46f4f8f6 RB |
698 | } |
699 | ||
700 | void __init set_irq_probe(unsigned int irq) | |
701 | { | |
d3c60047 | 702 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
703 | unsigned long flags; |
704 | ||
7d94f7ca | 705 | if (!desc) { |
46f4f8f6 | 706 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); |
46f4f8f6 RB |
707 | return; |
708 | } | |
709 | ||
239007b8 | 710 | raw_spin_lock_irqsave(&desc->lock, flags); |
46f4f8f6 | 711 | desc->status &= ~IRQ_NOPROBE; |
239007b8 | 712 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
46f4f8f6 | 713 | } |