Commit | Line | Data |
---|---|---|
dd87eb3a TG |
1 | /* |
2 | * linux/kernel/irq/chip.c | |
3 | * | |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
6 | * | |
7 | * This file contains the core interrupt handling code, for irq-chip | |
8 | * based architectures. | |
9 | * | |
10 | * Detailed information is available in Documentation/DocBook/genericirq | |
11 | */ | |
12 | ||
13 | #include <linux/irq.h> | |
7fe3730d | 14 | #include <linux/msi.h> |
dd87eb3a TG |
15 | #include <linux/module.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
3a16d713 EB |
21 | /** |
22 | * dynamic_irq_init - initialize a dynamically allocated irq | |
23 | * @irq: irq number to initialize | |
24 | */ | |
25 | void dynamic_irq_init(unsigned int irq) | |
26 | { | |
0b8f1efa | 27 | struct irq_desc *desc; |
3a16d713 EB |
28 | unsigned long flags; |
29 | ||
0b8f1efa | 30 | desc = irq_to_desc(irq); |
7d94f7ca | 31 | if (!desc) { |
261c40c1 | 32 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); |
3a16d713 EB |
33 | return; |
34 | } | |
35 | ||
36 | /* Ensure we don't have left over values from a previous use of this irq */ | |
3a16d713 EB |
37 | spin_lock_irqsave(&desc->lock, flags); |
38 | desc->status = IRQ_DISABLED; | |
39 | desc->chip = &no_irq_chip; | |
40 | desc->handle_irq = handle_bad_irq; | |
41 | desc->depth = 1; | |
5b912c10 | 42 | desc->msi_desc = NULL; |
3a16d713 EB |
43 | desc->handler_data = NULL; |
44 | desc->chip_data = NULL; | |
45 | desc->action = NULL; | |
46 | desc->irq_count = 0; | |
47 | desc->irqs_unhandled = 0; | |
48 | #ifdef CONFIG_SMP | |
0de26520 | 49 | cpumask_setall(&desc->affinity); |
3a16d713 EB |
50 | #endif |
51 | spin_unlock_irqrestore(&desc->lock, flags); | |
52 | } | |
53 | ||
54 | /** | |
55 | * dynamic_irq_cleanup - cleanup a dynamically allocated irq | |
56 | * @irq: irq number to initialize | |
57 | */ | |
58 | void dynamic_irq_cleanup(unsigned int irq) | |
59 | { | |
d3c60047 | 60 | struct irq_desc *desc = irq_to_desc(irq); |
3a16d713 EB |
61 | unsigned long flags; |
62 | ||
7d94f7ca | 63 | if (!desc) { |
261c40c1 | 64 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); |
3a16d713 EB |
65 | return; |
66 | } | |
67 | ||
3a16d713 | 68 | spin_lock_irqsave(&desc->lock, flags); |
1f80025e EB |
69 | if (desc->action) { |
70 | spin_unlock_irqrestore(&desc->lock, flags); | |
261c40c1 | 71 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", |
1f80025e | 72 | irq); |
1f80025e EB |
73 | return; |
74 | } | |
5b912c10 EB |
75 | desc->msi_desc = NULL; |
76 | desc->handler_data = NULL; | |
77 | desc->chip_data = NULL; | |
3a16d713 EB |
78 | desc->handle_irq = handle_bad_irq; |
79 | desc->chip = &no_irq_chip; | |
b6f3b780 | 80 | desc->name = NULL; |
3a16d713 EB |
81 | spin_unlock_irqrestore(&desc->lock, flags); |
82 | } | |
83 | ||
84 | ||
dd87eb3a TG |
85 | /** |
86 | * set_irq_chip - set the irq chip for an irq | |
87 | * @irq: irq number | |
88 | * @chip: pointer to irq chip description structure | |
89 | */ | |
90 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | |
91 | { | |
d3c60047 | 92 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
93 | unsigned long flags; |
94 | ||
7d94f7ca | 95 | if (!desc) { |
261c40c1 | 96 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
dd87eb3a TG |
97 | return -EINVAL; |
98 | } | |
99 | ||
100 | if (!chip) | |
101 | chip = &no_irq_chip; | |
102 | ||
dd87eb3a TG |
103 | spin_lock_irqsave(&desc->lock, flags); |
104 | irq_chip_set_defaults(chip); | |
105 | desc->chip = chip; | |
dd87eb3a TG |
106 | spin_unlock_irqrestore(&desc->lock, flags); |
107 | ||
108 | return 0; | |
109 | } | |
110 | EXPORT_SYMBOL(set_irq_chip); | |
111 | ||
112 | /** | |
0c5d1eb7 | 113 | * set_irq_type - set the irq trigger type for an irq |
dd87eb3a | 114 | * @irq: irq number |
0c5d1eb7 | 115 | * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h |
dd87eb3a TG |
116 | */ |
117 | int set_irq_type(unsigned int irq, unsigned int type) | |
118 | { | |
d3c60047 | 119 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
120 | unsigned long flags; |
121 | int ret = -ENXIO; | |
122 | ||
7d94f7ca | 123 | if (!desc) { |
dd87eb3a TG |
124 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
125 | return -ENODEV; | |
126 | } | |
127 | ||
f2b662da | 128 | type &= IRQ_TYPE_SENSE_MASK; |
0c5d1eb7 DB |
129 | if (type == IRQ_TYPE_NONE) |
130 | return 0; | |
131 | ||
132 | spin_lock_irqsave(&desc->lock, flags); | |
0b3682ba | 133 | ret = __irq_set_trigger(desc, irq, type); |
0c5d1eb7 | 134 | spin_unlock_irqrestore(&desc->lock, flags); |
dd87eb3a TG |
135 | return ret; |
136 | } | |
137 | EXPORT_SYMBOL(set_irq_type); | |
138 | ||
139 | /** | |
140 | * set_irq_data - set irq type data for an irq | |
141 | * @irq: Interrupt number | |
142 | * @data: Pointer to interrupt specific data | |
143 | * | |
144 | * Set the hardware irq controller data for an irq | |
145 | */ | |
146 | int set_irq_data(unsigned int irq, void *data) | |
147 | { | |
d3c60047 | 148 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
149 | unsigned long flags; |
150 | ||
7d94f7ca | 151 | if (!desc) { |
dd87eb3a TG |
152 | printk(KERN_ERR |
153 | "Trying to install controller data for IRQ%d\n", irq); | |
154 | return -EINVAL; | |
155 | } | |
156 | ||
dd87eb3a TG |
157 | spin_lock_irqsave(&desc->lock, flags); |
158 | desc->handler_data = data; | |
159 | spin_unlock_irqrestore(&desc->lock, flags); | |
160 | return 0; | |
161 | } | |
162 | EXPORT_SYMBOL(set_irq_data); | |
163 | ||
5b912c10 EB |
164 | /** |
165 | * set_irq_data - set irq type data for an irq | |
166 | * @irq: Interrupt number | |
472900b8 | 167 | * @entry: Pointer to MSI descriptor data |
5b912c10 EB |
168 | * |
169 | * Set the hardware irq controller data for an irq | |
170 | */ | |
171 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | |
172 | { | |
d3c60047 | 173 | struct irq_desc *desc = irq_to_desc(irq); |
5b912c10 EB |
174 | unsigned long flags; |
175 | ||
7d94f7ca | 176 | if (!desc) { |
5b912c10 EB |
177 | printk(KERN_ERR |
178 | "Trying to install msi data for IRQ%d\n", irq); | |
179 | return -EINVAL; | |
180 | } | |
7d94f7ca | 181 | |
5b912c10 EB |
182 | spin_lock_irqsave(&desc->lock, flags); |
183 | desc->msi_desc = entry; | |
7fe3730d ME |
184 | if (entry) |
185 | entry->irq = irq; | |
5b912c10 EB |
186 | spin_unlock_irqrestore(&desc->lock, flags); |
187 | return 0; | |
188 | } | |
189 | ||
dd87eb3a TG |
190 | /** |
191 | * set_irq_chip_data - set irq chip data for an irq | |
192 | * @irq: Interrupt number | |
193 | * @data: Pointer to chip specific data | |
194 | * | |
195 | * Set the hardware irq chip data for an irq | |
196 | */ | |
197 | int set_irq_chip_data(unsigned int irq, void *data) | |
198 | { | |
d3c60047 | 199 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
200 | unsigned long flags; |
201 | ||
7d94f7ca YL |
202 | if (!desc) { |
203 | printk(KERN_ERR | |
204 | "Trying to install chip data for IRQ%d\n", irq); | |
205 | return -EINVAL; | |
206 | } | |
207 | ||
208 | if (!desc->chip) { | |
dd87eb3a TG |
209 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); |
210 | return -EINVAL; | |
211 | } | |
212 | ||
213 | spin_lock_irqsave(&desc->lock, flags); | |
214 | desc->chip_data = data; | |
215 | spin_unlock_irqrestore(&desc->lock, flags); | |
216 | ||
217 | return 0; | |
218 | } | |
219 | EXPORT_SYMBOL(set_irq_chip_data); | |
220 | ||
221 | /* | |
222 | * default enable function | |
223 | */ | |
224 | static void default_enable(unsigned int irq) | |
225 | { | |
d3c60047 | 226 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
227 | |
228 | desc->chip->unmask(irq); | |
229 | desc->status &= ~IRQ_MASKED; | |
230 | } | |
231 | ||
232 | /* | |
233 | * default disable function | |
234 | */ | |
235 | static void default_disable(unsigned int irq) | |
236 | { | |
dd87eb3a TG |
237 | } |
238 | ||
239 | /* | |
240 | * default startup function | |
241 | */ | |
242 | static unsigned int default_startup(unsigned int irq) | |
243 | { | |
d3c60047 | 244 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 245 | |
08678b08 | 246 | desc->chip->enable(irq); |
dd87eb3a TG |
247 | return 0; |
248 | } | |
249 | ||
89d694b9 TG |
250 | /* |
251 | * default shutdown function | |
252 | */ | |
253 | static void default_shutdown(unsigned int irq) | |
254 | { | |
d3c60047 | 255 | struct irq_desc *desc = irq_to_desc(irq); |
89d694b9 TG |
256 | |
257 | desc->chip->mask(irq); | |
258 | desc->status |= IRQ_MASKED; | |
259 | } | |
260 | ||
dd87eb3a TG |
261 | /* |
262 | * Fixup enable/disable function pointers | |
263 | */ | |
264 | void irq_chip_set_defaults(struct irq_chip *chip) | |
265 | { | |
266 | if (!chip->enable) | |
267 | chip->enable = default_enable; | |
268 | if (!chip->disable) | |
269 | chip->disable = default_disable; | |
270 | if (!chip->startup) | |
271 | chip->startup = default_startup; | |
89d694b9 TG |
272 | /* |
273 | * We use chip->disable, when the user provided its own. When | |
274 | * we have default_disable set for chip->disable, then we need | |
275 | * to use default_shutdown, otherwise the irq line is not | |
276 | * disabled on free_irq(): | |
277 | */ | |
dd87eb3a | 278 | if (!chip->shutdown) |
89d694b9 TG |
279 | chip->shutdown = chip->disable != default_disable ? |
280 | chip->disable : default_shutdown; | |
dd87eb3a TG |
281 | if (!chip->name) |
282 | chip->name = chip->typename; | |
b86432b4 ZY |
283 | if (!chip->end) |
284 | chip->end = dummy_irq_chip.end; | |
dd87eb3a TG |
285 | } |
286 | ||
287 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | |
288 | { | |
289 | if (desc->chip->mask_ack) | |
290 | desc->chip->mask_ack(irq); | |
291 | else { | |
292 | desc->chip->mask(irq); | |
293 | desc->chip->ack(irq); | |
294 | } | |
295 | } | |
296 | ||
297 | /** | |
298 | * handle_simple_irq - Simple and software-decoded IRQs. | |
299 | * @irq: the interrupt number | |
300 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
301 | * |
302 | * Simple interrupts are either sent from a demultiplexing interrupt | |
303 | * handler or come from hardware, where no interrupt hardware control | |
304 | * is necessary. | |
305 | * | |
306 | * Note: The caller is expected to handle the ack, clear, mask and | |
307 | * unmask issues if necessary. | |
308 | */ | |
7ad5b3a5 | 309 | void |
7d12e780 | 310 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
311 | { |
312 | struct irqaction *action; | |
313 | irqreturn_t action_ret; | |
dd87eb3a TG |
314 | |
315 | spin_lock(&desc->lock); | |
316 | ||
317 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
318 | goto out_unlock; | |
971e5b35 | 319 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 320 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
321 | |
322 | action = desc->action; | |
971e5b35 | 323 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
dd87eb3a TG |
324 | goto out_unlock; |
325 | ||
326 | desc->status |= IRQ_INPROGRESS; | |
327 | spin_unlock(&desc->lock); | |
328 | ||
7d12e780 | 329 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 330 | if (!noirqdebug) |
7d12e780 | 331 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
332 | |
333 | spin_lock(&desc->lock); | |
334 | desc->status &= ~IRQ_INPROGRESS; | |
335 | out_unlock: | |
336 | spin_unlock(&desc->lock); | |
337 | } | |
338 | ||
339 | /** | |
340 | * handle_level_irq - Level type irq handler | |
341 | * @irq: the interrupt number | |
342 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
343 | * |
344 | * Level type interrupts are active as long as the hardware line has | |
345 | * the active level. This may require to mask the interrupt and unmask | |
346 | * it after the associated handler has acknowledged the device, so the | |
347 | * interrupt line is back to inactive. | |
348 | */ | |
7ad5b3a5 | 349 | void |
7d12e780 | 350 | handle_level_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 351 | { |
dd87eb3a TG |
352 | struct irqaction *action; |
353 | irqreturn_t action_ret; | |
354 | ||
355 | spin_lock(&desc->lock); | |
356 | mask_ack_irq(desc, irq); | |
48a1b10a | 357 | desc = irq_remap_to_desc(irq, desc); |
dd87eb3a TG |
358 | |
359 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
86998aa6 | 360 | goto out_unlock; |
dd87eb3a | 361 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 362 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
363 | |
364 | /* | |
365 | * If its disabled or no action available | |
366 | * keep it masked and get out of here | |
367 | */ | |
368 | action = desc->action; | |
49663421 | 369 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
86998aa6 | 370 | goto out_unlock; |
dd87eb3a TG |
371 | |
372 | desc->status |= IRQ_INPROGRESS; | |
373 | spin_unlock(&desc->lock); | |
374 | ||
7d12e780 | 375 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 376 | if (!noirqdebug) |
7d12e780 | 377 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
378 | |
379 | spin_lock(&desc->lock); | |
380 | desc->status &= ~IRQ_INPROGRESS; | |
dd87eb3a TG |
381 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
382 | desc->chip->unmask(irq); | |
86998aa6 | 383 | out_unlock: |
dd87eb3a TG |
384 | spin_unlock(&desc->lock); |
385 | } | |
14819ea1 | 386 | EXPORT_SYMBOL_GPL(handle_level_irq); |
dd87eb3a TG |
387 | |
388 | /** | |
47c2a3aa | 389 | * handle_fasteoi_irq - irq handler for transparent controllers |
dd87eb3a TG |
390 | * @irq: the interrupt number |
391 | * @desc: the interrupt description structure for this irq | |
dd87eb3a | 392 | * |
47c2a3aa | 393 | * Only a single callback will be issued to the chip: an ->eoi() |
dd87eb3a TG |
394 | * call when the interrupt has been serviced. This enables support |
395 | * for modern forms of interrupt handlers, which handle the flow | |
396 | * details in hardware, transparently. | |
397 | */ | |
7ad5b3a5 | 398 | void |
7d12e780 | 399 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 400 | { |
dd87eb3a TG |
401 | struct irqaction *action; |
402 | irqreturn_t action_ret; | |
403 | ||
404 | spin_lock(&desc->lock); | |
405 | ||
406 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
407 | goto out; | |
408 | ||
409 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
d6c88a50 | 410 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
411 | |
412 | /* | |
413 | * If its disabled or no action available | |
76d21601 | 414 | * then mask it and get out of here: |
dd87eb3a TG |
415 | */ |
416 | action = desc->action; | |
98bb244b BH |
417 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
418 | desc->status |= IRQ_PENDING; | |
76d21601 IM |
419 | if (desc->chip->mask) |
420 | desc->chip->mask(irq); | |
dd87eb3a | 421 | goto out; |
98bb244b | 422 | } |
dd87eb3a TG |
423 | |
424 | desc->status |= IRQ_INPROGRESS; | |
98bb244b | 425 | desc->status &= ~IRQ_PENDING; |
dd87eb3a TG |
426 | spin_unlock(&desc->lock); |
427 | ||
7d12e780 | 428 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 429 | if (!noirqdebug) |
7d12e780 | 430 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
431 | |
432 | spin_lock(&desc->lock); | |
433 | desc->status &= ~IRQ_INPROGRESS; | |
434 | out: | |
47c2a3aa | 435 | desc->chip->eoi(irq); |
48a1b10a | 436 | desc = irq_remap_to_desc(irq, desc); |
dd87eb3a TG |
437 | |
438 | spin_unlock(&desc->lock); | |
439 | } | |
440 | ||
441 | /** | |
442 | * handle_edge_irq - edge type IRQ handler | |
443 | * @irq: the interrupt number | |
444 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
445 | * |
446 | * Interrupt occures on the falling and/or rising edge of a hardware | |
447 | * signal. The occurence is latched into the irq controller hardware | |
448 | * and must be acked in order to be reenabled. After the ack another | |
449 | * interrupt can happen on the same source even before the first one | |
450 | * is handled by the assosiacted event handler. If this happens it | |
451 | * might be necessary to disable (mask) the interrupt depending on the | |
452 | * controller hardware. This requires to reenable the interrupt inside | |
453 | * of the loop which handles the interrupts which have arrived while | |
454 | * the handler was running. If all pending interrupts are handled, the | |
455 | * loop is left. | |
456 | */ | |
7ad5b3a5 | 457 | void |
7d12e780 | 458 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 459 | { |
dd87eb3a TG |
460 | spin_lock(&desc->lock); |
461 | ||
462 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
463 | ||
464 | /* | |
465 | * If we're currently running this IRQ, or its disabled, | |
466 | * we shouldn't process the IRQ. Mark it pending, handle | |
467 | * the necessary masking and go out | |
468 | */ | |
469 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | |
470 | !desc->action)) { | |
471 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | |
472 | mask_ack_irq(desc, irq); | |
48a1b10a | 473 | desc = irq_remap_to_desc(irq, desc); |
dd87eb3a TG |
474 | goto out_unlock; |
475 | } | |
d6c88a50 | 476 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
477 | |
478 | /* Start handling the irq */ | |
479 | desc->chip->ack(irq); | |
48a1b10a | 480 | desc = irq_remap_to_desc(irq, desc); |
dd87eb3a TG |
481 | |
482 | /* Mark the IRQ currently in progress.*/ | |
483 | desc->status |= IRQ_INPROGRESS; | |
484 | ||
485 | do { | |
486 | struct irqaction *action = desc->action; | |
487 | irqreturn_t action_ret; | |
488 | ||
489 | if (unlikely(!action)) { | |
490 | desc->chip->mask(irq); | |
491 | goto out_unlock; | |
492 | } | |
493 | ||
494 | /* | |
495 | * When another irq arrived while we were handling | |
496 | * one, we could have masked the irq. | |
497 | * Renable it, if it was not disabled in meantime. | |
498 | */ | |
499 | if (unlikely((desc->status & | |
500 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | |
501 | (IRQ_PENDING | IRQ_MASKED))) { | |
502 | desc->chip->unmask(irq); | |
503 | desc->status &= ~IRQ_MASKED; | |
504 | } | |
505 | ||
506 | desc->status &= ~IRQ_PENDING; | |
507 | spin_unlock(&desc->lock); | |
7d12e780 | 508 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 509 | if (!noirqdebug) |
7d12e780 | 510 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
511 | spin_lock(&desc->lock); |
512 | ||
513 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | |
514 | ||
515 | desc->status &= ~IRQ_INPROGRESS; | |
516 | out_unlock: | |
517 | spin_unlock(&desc->lock); | |
518 | } | |
519 | ||
dd87eb3a TG |
520 | /** |
521 | * handle_percpu_IRQ - Per CPU local irq handler | |
522 | * @irq: the interrupt number | |
523 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
524 | * |
525 | * Per CPU interrupts on SMP machines without locking requirements | |
526 | */ | |
7ad5b3a5 | 527 | void |
7d12e780 | 528 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
529 | { |
530 | irqreturn_t action_ret; | |
531 | ||
d6c88a50 | 532 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
533 | |
534 | if (desc->chip->ack) | |
535 | desc->chip->ack(irq); | |
536 | ||
7d12e780 | 537 | action_ret = handle_IRQ_event(irq, desc->action); |
dd87eb3a | 538 | if (!noirqdebug) |
7d12e780 | 539 | note_interrupt(irq, desc, action_ret); |
dd87eb3a | 540 | |
48a1b10a | 541 | if (desc->chip->eoi) { |
dd87eb3a | 542 | desc->chip->eoi(irq); |
48a1b10a YL |
543 | desc = irq_remap_to_desc(irq, desc); |
544 | } | |
dd87eb3a TG |
545 | } |
546 | ||
dd87eb3a | 547 | void |
a460e745 IM |
548 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
549 | const char *name) | |
dd87eb3a | 550 | { |
d3c60047 | 551 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
552 | unsigned long flags; |
553 | ||
7d94f7ca | 554 | if (!desc) { |
dd87eb3a TG |
555 | printk(KERN_ERR |
556 | "Trying to install type control for IRQ%d\n", irq); | |
557 | return; | |
558 | } | |
559 | ||
dd87eb3a TG |
560 | if (!handle) |
561 | handle = handle_bad_irq; | |
9d7ac8be | 562 | else if (desc->chip == &no_irq_chip) { |
f8b5473f | 563 | printk(KERN_WARNING "Trying to install %sinterrupt handler " |
b039db8e | 564 | "for IRQ%d\n", is_chained ? "chained " : "", irq); |
f8b5473f TG |
565 | /* |
566 | * Some ARM implementations install a handler for really dumb | |
567 | * interrupt hardware without setting an irq_chip. This worked | |
568 | * with the ARM no_irq_chip but the check in setup_irq would | |
569 | * prevent us to setup the interrupt at all. Switch it to | |
570 | * dummy_irq_chip for easy transition. | |
571 | */ | |
572 | desc->chip = &dummy_irq_chip; | |
573 | } | |
dd87eb3a TG |
574 | |
575 | spin_lock_irqsave(&desc->lock, flags); | |
576 | ||
577 | /* Uninstall? */ | |
578 | if (handle == handle_bad_irq) { | |
48a1b10a | 579 | if (desc->chip != &no_irq_chip) { |
5575ddf7 | 580 | mask_ack_irq(desc, irq); |
48a1b10a YL |
581 | desc = irq_remap_to_desc(irq, desc); |
582 | } | |
dd87eb3a TG |
583 | desc->status |= IRQ_DISABLED; |
584 | desc->depth = 1; | |
585 | } | |
586 | desc->handle_irq = handle; | |
a460e745 | 587 | desc->name = name; |
dd87eb3a TG |
588 | |
589 | if (handle != handle_bad_irq && is_chained) { | |
590 | desc->status &= ~IRQ_DISABLED; | |
591 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | |
592 | desc->depth = 0; | |
7e6e178a | 593 | desc->chip->startup(irq); |
dd87eb3a TG |
594 | } |
595 | spin_unlock_irqrestore(&desc->lock, flags); | |
596 | } | |
14819ea1 | 597 | EXPORT_SYMBOL_GPL(__set_irq_handler); |
dd87eb3a TG |
598 | |
599 | void | |
600 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | |
57a58a94 | 601 | irq_flow_handler_t handle) |
dd87eb3a TG |
602 | { |
603 | set_irq_chip(irq, chip); | |
a460e745 | 604 | __set_irq_handler(irq, handle, 0, NULL); |
dd87eb3a TG |
605 | } |
606 | ||
a460e745 IM |
607 | void |
608 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | |
609 | irq_flow_handler_t handle, const char *name) | |
dd87eb3a | 610 | { |
a460e745 IM |
611 | set_irq_chip(irq, chip); |
612 | __set_irq_handler(irq, handle, 0, name); | |
dd87eb3a | 613 | } |
46f4f8f6 RB |
614 | |
615 | void __init set_irq_noprobe(unsigned int irq) | |
616 | { | |
d3c60047 | 617 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
618 | unsigned long flags; |
619 | ||
7d94f7ca | 620 | if (!desc) { |
46f4f8f6 | 621 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); |
46f4f8f6 RB |
622 | return; |
623 | } | |
624 | ||
46f4f8f6 RB |
625 | spin_lock_irqsave(&desc->lock, flags); |
626 | desc->status |= IRQ_NOPROBE; | |
627 | spin_unlock_irqrestore(&desc->lock, flags); | |
628 | } | |
629 | ||
630 | void __init set_irq_probe(unsigned int irq) | |
631 | { | |
d3c60047 | 632 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
633 | unsigned long flags; |
634 | ||
7d94f7ca | 635 | if (!desc) { |
46f4f8f6 | 636 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); |
46f4f8f6 RB |
637 | return; |
638 | } | |
639 | ||
46f4f8f6 RB |
640 | spin_lock_irqsave(&desc->lock, flags); |
641 | desc->status &= ~IRQ_NOPROBE; | |
642 | spin_unlock_irqrestore(&desc->lock, flags); | |
643 | } |