Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
d9817ebe | 2 | menu "IRQ subsystem" |
d9817ebe | 3 | # Options selectable by the architecture code |
c68fd4f3 TG |
4 | |
5 | # Make sparse irq Kconfig switch below available | |
2ed86b16 | 6 | config MAY_HAVE_SPARSE_IRQ |
fd4afaf3 | 7 | bool |
d9817ebe | 8 | |
c940e01c TG |
9 | # Legacy support, required for itanic |
10 | config GENERIC_IRQ_LEGACY | |
11 | bool | |
12 | ||
c68fd4f3 | 13 | # Enable the generic irq autoprobe mechanism |
d9817ebe | 14 | config GENERIC_IRQ_PROBE |
fd4afaf3 | 15 | bool |
d9817ebe | 16 | |
c68fd4f3 | 17 | # Use the generic /proc/interrupts implementation |
c78b9b65 | 18 | config GENERIC_IRQ_SHOW |
fd4afaf3 | 19 | bool |
c78b9b65 | 20 | |
ab7798ff TG |
21 | # Print level/edge extra information |
22 | config GENERIC_IRQ_SHOW_LEVEL | |
23 | bool | |
24 | ||
0d3f5425 TG |
25 | # Supports effective affinity mask |
26 | config GENERIC_IRQ_EFFECTIVE_AFF_MASK | |
27 | bool | |
28 | ||
7b6ef126 TG |
29 | # Facility to allocate a hardware interrupt. This is legacy support |
30 | # and should not be used in new code. Use irq domains instead. | |
31 | config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ | |
32 | bool | |
33 | ||
c68fd4f3 | 34 | # Support for delayed migration from interrupt context |
d9817ebe | 35 | config GENERIC_PENDING_IRQ |
fd4afaf3 | 36 | bool |
d9817ebe | 37 | |
f1e0bb0a YY |
38 | # Support for generic irq migrating off cpu before the cpu is offline. |
39 | config GENERIC_IRQ_MIGRATION | |
40 | bool | |
41 | ||
c68fd4f3 | 42 | # Alpha specific irq affinity mechanism |
d9817ebe | 43 | config AUTO_IRQ_AFFINITY |
fd4afaf3 | 44 | bool |
d9817ebe | 45 | |
c68fd4f3 | 46 | # Tasklet based software resend for pending interrupts on enable_irq() |
d9817ebe | 47 | config HARDIRQS_SW_RESEND |
fd4afaf3 | 48 | bool |
d9817ebe | 49 | |
c68fd4f3 | 50 | # Preflow handler support for fasteoi (sparc64) |
78129576 | 51 | config IRQ_PREFLOW_FASTEOI |
fd4afaf3 | 52 | bool |
78129576 | 53 | |
0521c8fb TG |
54 | # Edge style eoi based handler (cell) |
55 | config IRQ_EDGE_EOI_HANDLER | |
56 | bool | |
57 | ||
c42321c7 TG |
58 | # Generic configurable interrupt chip implementation |
59 | config GENERIC_IRQ_CHIP | |
60 | bool | |
923fa4ea | 61 | select IRQ_DOMAIN |
c42321c7 | 62 | |
08a543ad GL |
63 | # Generic irq_domain hw <--> linux irq number translation |
64 | config IRQ_DOMAIN | |
65 | bool | |
66 | ||
b19af510 BG |
67 | # Support for simulated interrupts |
68 | config IRQ_SIM | |
69 | bool | |
70 | select IRQ_WORK | |
71 | ||
f8264e34 JL |
72 | # Support for hierarchical irq domains |
73 | config IRQ_DOMAIN_HIERARCHY | |
74 | bool | |
75 | select IRQ_DOMAIN | |
76 | ||
7703b08c DD |
77 | # Support for hierarchical fasteoi+edge and fasteoi+level handlers |
78 | config IRQ_FASTEOI_HIERARCHY_HANDLERS | |
79 | bool | |
80 | ||
379b6564 QY |
81 | # Generic IRQ IPI support |
82 | config GENERIC_IRQ_IPI | |
83 | bool | |
84 | ||
f3cf8bb0 JL |
85 | # Generic MSI interrupt support |
86 | config GENERIC_MSI_IRQ | |
87 | bool | |
88 | ||
89 | # Generic MSI hierarchical interrupt domain support | |
90 | config GENERIC_MSI_IRQ_DOMAIN | |
91 | bool | |
92 | select IRQ_DOMAIN_HIERARCHY | |
93 | select GENERIC_MSI_IRQ | |
94 | ||
aaebdf8d JG |
95 | config IRQ_MSI_IOMMU |
96 | bool | |
97 | ||
76ba59f8 MZ |
98 | config HANDLE_DOMAIN_IRQ |
99 | bool | |
100 | ||
b2d3d61a DL |
101 | config IRQ_TIMINGS |
102 | bool | |
103 | ||
2f75d9e1 TG |
104 | config GENERIC_IRQ_MATRIX_ALLOCATOR |
105 | bool | |
106 | ||
2b5175c4 TG |
107 | config GENERIC_IRQ_RESERVATION_MODE |
108 | bool | |
109 | ||
c68fd4f3 | 110 | # Support forced irq threading |
8d32a307 TG |
111 | config IRQ_FORCED_THREADING |
112 | bool | |
113 | ||
d9817ebe | 114 | config SPARSE_IRQ |
2ed86b16 | 115 | bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ |
d9817ebe TG |
116 | ---help--- |
117 | ||
118 | Sparse irq numbering is useful for distro kernels that want | |
119 | to define a high CONFIG_NR_CPUS value but still want to have | |
120 | low kernel memory footprint on smaller machines. | |
121 | ||
122 | ( Sparse irqs can also be beneficial on NUMA boxes, as they spread | |
123 | out the interrupt descriptors in a more NUMA-friendly way. ) | |
124 | ||
125 | If you don't know what to do here, say N. | |
126 | ||
087cdfb6 TG |
127 | config GENERIC_IRQ_DEBUGFS |
128 | bool "Expose irq internals in debugfs" | |
129 | depends on DEBUG_FS | |
130 | default n | |
131 | ---help--- | |
132 | ||
133 | Exposes internal state information through debugfs. Mostly for | |
134 | developers and debugging of hard to diagnose interrupt problems. | |
135 | ||
136 | If you don't know what to do here, say N. | |
137 | ||
d9817ebe | 138 | endmenu |
caacdbf4 PD |
139 | |
140 | config GENERIC_IRQ_MULTI_HANDLER | |
141 | bool | |
142 | help | |
143 | Allow to specify the low level IRQ handler at run time. |