Merge tag 'for-6.1/block-2022-10-03' of git://git.kernel.dk/linux
[linux-block.git] / kernel / dma / pool.c
CommitLineData
e860c299
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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 ARM Ltd.
4 * Copyright (C) 2020 Google LLC
5 */
d7e673ec 6#include <linux/cma.h>
2edc5bb3 7#include <linux/debugfs.h>
0b1abd1f 8#include <linux/dma-map-ops.h>
e860c299 9#include <linux/dma-direct.h>
e860c299
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10#include <linux/init.h>
11#include <linux/genalloc.h>
76a19940 12#include <linux/set_memory.h>
e860c299 13#include <linux/slab.h>
54adadf9 14#include <linux/workqueue.h>
e860c299 15
c84dc6e6 16static struct gen_pool *atomic_pool_dma __ro_after_init;
2edc5bb3 17static unsigned long pool_size_dma;
c84dc6e6 18static struct gen_pool *atomic_pool_dma32 __ro_after_init;
2edc5bb3 19static unsigned long pool_size_dma32;
c84dc6e6 20static struct gen_pool *atomic_pool_kernel __ro_after_init;
2edc5bb3 21static unsigned long pool_size_kernel;
e860c299 22
1d659236
DR
23/* Size can be defined by the coherent_pool command line */
24static size_t atomic_pool_size;
54adadf9
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25
26/* Dynamic background expansion when the atomic pool is near capacity */
27static struct work_struct atomic_pool_work;
e860c299
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28
29static int __init early_coherent_pool(char *p)
30{
31 atomic_pool_size = memparse(p, &p);
32 return 0;
33}
34early_param("coherent_pool", early_coherent_pool);
35
2edc5bb3
DR
36static void __init dma_atomic_pool_debugfs_init(void)
37{
38 struct dentry *root;
39
40 root = debugfs_create_dir("dma_pools", NULL);
2edc5bb3
DR
41 debugfs_create_ulong("pool_size_dma", 0400, root, &pool_size_dma);
42 debugfs_create_ulong("pool_size_dma32", 0400, root, &pool_size_dma32);
43 debugfs_create_ulong("pool_size_kernel", 0400, root, &pool_size_kernel);
44}
45
46static void dma_atomic_pool_size_add(gfp_t gfp, size_t size)
47{
48 if (gfp & __GFP_DMA)
49 pool_size_dma += size;
50 else if (gfp & __GFP_DMA32)
51 pool_size_dma32 += size;
52 else
53 pool_size_kernel += size;
54}
55
d7e673ec
NSJ
56static bool cma_in_zone(gfp_t gfp)
57{
58 unsigned long size;
59 phys_addr_t end;
60 struct cma *cma;
61
62 cma = dev_get_cma_area(NULL);
63 if (!cma)
64 return false;
65
66 size = cma_get_size(cma);
67 if (!size)
68 return false;
69
70 /* CMA can't cross zone boundaries, see cma_activate_area() */
71 end = cma_get_base(cma) + size - 1;
72 if (IS_ENABLED(CONFIG_ZONE_DMA) && (gfp & GFP_DMA))
73 return end <= DMA_BIT_MASK(zone_dma_bits);
74 if (IS_ENABLED(CONFIG_ZONE_DMA32) && (gfp & GFP_DMA32))
75 return end <= DMA_BIT_MASK(32);
76 return true;
77}
78
54adadf9
DR
79static int atomic_pool_expand(struct gen_pool *pool, size_t pool_size,
80 gfp_t gfp)
e860c299 81{
54adadf9 82 unsigned int order;
892fc9f6 83 struct page *page = NULL;
e860c299 84 void *addr;
54adadf9
DR
85 int ret = -ENOMEM;
86
87 /* Cannot allocate larger than MAX_ORDER-1 */
88 order = min(get_order(pool_size), MAX_ORDER-1);
89
90 do {
91 pool_size = 1 << (PAGE_SHIFT + order);
d7e673ec
NSJ
92 if (cma_in_zone(gfp))
93 page = dma_alloc_from_contiguous(NULL, 1 << order,
94 order, false);
95 if (!page)
96 page = alloc_pages(gfp, order);
54adadf9 97 } while (!page && order-- > 0);
e860c299
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98 if (!page)
99 goto out;
100
c84dc6e6 101 arch_dma_prep_coherent(page, pool_size);
e860c299 102
76a19940 103#ifdef CONFIG_DMA_DIRECT_REMAP
c84dc6e6 104 addr = dma_common_contiguous_remap(page, pool_size,
e860c299
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105 pgprot_dmacoherent(PAGE_KERNEL),
106 __builtin_return_address(0));
107 if (!addr)
54adadf9 108 goto free_page;
76a19940
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109#else
110 addr = page_to_virt(page);
111#endif
112 /*
113 * Memory in the atomic DMA pools must be unencrypted, the pools do not
2f5388a2 114 * shrink so no re-encryption occurs in dma_direct_free().
76a19940
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115 */
116 ret = set_memory_decrypted((unsigned long)page_to_virt(page),
117 1 << order);
118 if (ret)
119 goto remove_mapping;
54adadf9
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120 ret = gen_pool_add_virt(pool, (unsigned long)addr, page_to_phys(page),
121 pool_size, NUMA_NO_NODE);
e860c299 122 if (ret)
76a19940 123 goto encrypt_mapping;
e860c299 124
2edc5bb3 125 dma_atomic_pool_size_add(gfp, pool_size);
e860c299
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126 return 0;
127
76a19940
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128encrypt_mapping:
129 ret = set_memory_encrypted((unsigned long)page_to_virt(page),
130 1 << order);
131 if (WARN_ON_ONCE(ret)) {
132 /* Decrypt succeeded but encrypt failed, purposely leak */
133 goto out;
134 }
e860c299 135remove_mapping:
76a19940 136#ifdef CONFIG_DMA_DIRECT_REMAP
c84dc6e6 137 dma_common_free_remap(addr, pool_size);
76a19940
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138#endif
139free_page: __maybe_unused
d9765e41 140 __free_pages(page, order);
e860c299 141out:
54adadf9
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142 return ret;
143}
144
145static void atomic_pool_resize(struct gen_pool *pool, gfp_t gfp)
146{
147 if (pool && gen_pool_avail(pool) < atomic_pool_size)
148 atomic_pool_expand(pool, gen_pool_size(pool), gfp);
149}
150
151static void atomic_pool_work_fn(struct work_struct *work)
152{
153 if (IS_ENABLED(CONFIG_ZONE_DMA))
154 atomic_pool_resize(atomic_pool_dma,
155 GFP_KERNEL | GFP_DMA);
156 if (IS_ENABLED(CONFIG_ZONE_DMA32))
157 atomic_pool_resize(atomic_pool_dma32,
158 GFP_KERNEL | GFP_DMA32);
159 atomic_pool_resize(atomic_pool_kernel, GFP_KERNEL);
160}
161
162static __init struct gen_pool *__dma_atomic_pool_init(size_t pool_size,
163 gfp_t gfp)
164{
165 struct gen_pool *pool;
166 int ret;
167
168 pool = gen_pool_create(PAGE_SHIFT, NUMA_NO_NODE);
169 if (!pool)
170 return NULL;
171
172 gen_pool_set_algo(pool, gen_pool_first_fit_order_align, NULL);
173
174 ret = atomic_pool_expand(pool, pool_size, gfp);
175 if (ret) {
176 gen_pool_destroy(pool);
177 pr_err("DMA: failed to allocate %zu KiB %pGg pool for atomic allocation\n",
178 pool_size >> 10, &gfp);
179 return NULL;
180 }
181
182 pr_info("DMA: preallocated %zu KiB %pGg pool for atomic allocations\n",
183 gen_pool_size(pool) >> 10, &gfp);
184 return pool;
e860c299 185}
c84dc6e6
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186
187static int __init dma_atomic_pool_init(void)
188{
189 int ret = 0;
c84dc6e6 190
1d659236
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191 /*
192 * If coherent_pool was not used on the command line, default the pool
193 * sizes to 128KB per 1GB of memory, min 128KB, max MAX_ORDER-1.
194 */
195 if (!atomic_pool_size) {
3ee06a6d
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196 unsigned long pages = totalram_pages() / (SZ_1G / SZ_128K);
197 pages = min_t(unsigned long, pages, MAX_ORDER_NR_PAGES);
198 atomic_pool_size = max_t(size_t, pages << PAGE_SHIFT, SZ_128K);
1d659236 199 }
54adadf9
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200 INIT_WORK(&atomic_pool_work, atomic_pool_work_fn);
201
202 atomic_pool_kernel = __dma_atomic_pool_init(atomic_pool_size,
203 GFP_KERNEL);
204 if (!atomic_pool_kernel)
205 ret = -ENOMEM;
a674e48c 206 if (has_managed_dma()) {
54adadf9
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207 atomic_pool_dma = __dma_atomic_pool_init(atomic_pool_size,
208 GFP_KERNEL | GFP_DMA);
209 if (!atomic_pool_dma)
210 ret = -ENOMEM;
c84dc6e6
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211 }
212 if (IS_ENABLED(CONFIG_ZONE_DMA32)) {
54adadf9
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213 atomic_pool_dma32 = __dma_atomic_pool_init(atomic_pool_size,
214 GFP_KERNEL | GFP_DMA32);
215 if (!atomic_pool_dma32)
216 ret = -ENOMEM;
c84dc6e6 217 }
2edc5bb3
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218
219 dma_atomic_pool_debugfs_init();
c84dc6e6
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220 return ret;
221}
e860c299
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222postcore_initcall(dma_atomic_pool_init);
223
9420139f 224static inline struct gen_pool *dma_guess_pool(struct gen_pool *prev, gfp_t gfp)
e860c299 225{
9420139f
CH
226 if (prev == NULL) {
227 if (IS_ENABLED(CONFIG_ZONE_DMA32) && (gfp & GFP_DMA32))
228 return atomic_pool_dma32;
a674e48c 229 if (atomic_pool_dma && (gfp & GFP_DMA))
9420139f
CH
230 return atomic_pool_dma;
231 return atomic_pool_kernel;
232 }
233 if (prev == atomic_pool_kernel)
234 return atomic_pool_dma32 ? atomic_pool_dma32 : atomic_pool_dma;
235 if (prev == atomic_pool_dma32)
c84dc6e6 236 return atomic_pool_dma;
9420139f 237 return NULL;
c84dc6e6 238}
e860c299 239
9420139f
CH
240static struct page *__dma_alloc_from_pool(struct device *dev, size_t size,
241 struct gen_pool *pool, void **cpu_addr,
242 bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t))
48b67038 243{
9420139f
CH
244 unsigned long addr;
245 phys_addr_t phys;
48b67038 246
9420139f
CH
247 addr = gen_pool_alloc(pool, size);
248 if (!addr)
249 return NULL;
48b67038 250
9420139f
CH
251 phys = gen_pool_virt_to_phys(pool, addr);
252 if (phys_addr_ok && !phys_addr_ok(dev, phys, size)) {
253 gen_pool_free(pool, addr, size);
254 return NULL;
255 }
48b67038 256
9420139f
CH
257 if (gen_pool_avail(pool) < atomic_pool_size)
258 schedule_work(&atomic_pool_work);
48b67038 259
9420139f
CH
260 *cpu_addr = (void *)addr;
261 memset(*cpu_addr, 0, size);
262 return pfn_to_page(__phys_to_pfn(phys));
48b67038
NSJ
263}
264
9420139f
CH
265struct page *dma_alloc_from_pool(struct device *dev, size_t size,
266 void **cpu_addr, gfp_t gfp,
267 bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t))
e860c299 268{
81e9d894 269 struct gen_pool *pool = NULL;
9420139f 270 struct page *page;
81e9d894 271
9420139f
CH
272 while ((pool = dma_guess_pool(pool, gfp))) {
273 page = __dma_alloc_from_pool(dev, size, pool, cpu_addr,
274 phys_addr_ok);
275 if (page)
276 return page;
e860c299
DR
277 }
278
9420139f
CH
279 WARN(1, "Failed to get suitable pool for %s\n", dev_name(dev));
280 return NULL;
e860c299
DR
281}
282
c84dc6e6 283bool dma_free_from_pool(struct device *dev, void *start, size_t size)
e860c299 284{
81e9d894 285 struct gen_pool *pool = NULL;
c84dc6e6 286
9420139f
CH
287 while ((pool = dma_guess_pool(pool, 0))) {
288 if (!gen_pool_has_addr(pool, (unsigned long)start, size))
289 continue;
290 gen_pool_free(pool, (unsigned long)start, size);
291 return true;
81e9d894 292 }
9420139f
CH
293
294 return false;
e860c299 295}