Merge tag 'drm-fixes-for-v4.17-rc4' of git://people.freedesktop.org/~airlied/linux
[linux-2.6-block.git] / include / uapi / rdma / ib_user_verbs.h
CommitLineData
d50e14ab 1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
8a96b3f9
RD
2/*
3 * Copyright (c) 2005 Topspin Communications. All rights reserved.
33b9b3ee 4 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
91ecd4ae 5 * Copyright (c) 2005 PathScale, Inc. All rights reserved.
8bdb0e86 6 * Copyright (c) 2006 Mellanox Technologies. All rights reserved.
8a96b3f9
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7 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
8a96b3f9
RD
35 */
36
37#ifndef IB_USER_VERBS_H
38#define IB_USER_VERBS_H
39
40#include <linux/types.h>
41
42/*
43 * Increment this value if any changes that break userspace ABI
44 * compatibility are made.
45 */
ea88fd16 46#define IB_USER_VERBS_ABI_VERSION 6
400dbc96 47#define IB_USER_VERBS_CMD_THRESHOLD 50
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RD
48
49enum {
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50 IB_USER_VERBS_CMD_GET_CONTEXT,
51 IB_USER_VERBS_CMD_QUERY_DEVICE,
52 IB_USER_VERBS_CMD_QUERY_PORT,
8a96b3f9
RD
53 IB_USER_VERBS_CMD_ALLOC_PD,
54 IB_USER_VERBS_CMD_DEALLOC_PD,
55 IB_USER_VERBS_CMD_CREATE_AH,
56 IB_USER_VERBS_CMD_MODIFY_AH,
57 IB_USER_VERBS_CMD_QUERY_AH,
58 IB_USER_VERBS_CMD_DESTROY_AH,
59 IB_USER_VERBS_CMD_REG_MR,
60 IB_USER_VERBS_CMD_REG_SMR,
61 IB_USER_VERBS_CMD_REREG_MR,
62 IB_USER_VERBS_CMD_QUERY_MR,
63 IB_USER_VERBS_CMD_DEREG_MR,
64 IB_USER_VERBS_CMD_ALLOC_MW,
65 IB_USER_VERBS_CMD_BIND_MW,
66 IB_USER_VERBS_CMD_DEALLOC_MW,
6b73597e 67 IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,
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RD
68 IB_USER_VERBS_CMD_CREATE_CQ,
69 IB_USER_VERBS_CMD_RESIZE_CQ,
70 IB_USER_VERBS_CMD_DESTROY_CQ,
71 IB_USER_VERBS_CMD_POLL_CQ,
72 IB_USER_VERBS_CMD_PEEK_CQ,
73 IB_USER_VERBS_CMD_REQ_NOTIFY_CQ,
74 IB_USER_VERBS_CMD_CREATE_QP,
75 IB_USER_VERBS_CMD_QUERY_QP,
76 IB_USER_VERBS_CMD_MODIFY_QP,
77 IB_USER_VERBS_CMD_DESTROY_QP,
78 IB_USER_VERBS_CMD_POST_SEND,
79 IB_USER_VERBS_CMD_POST_RECV,
80 IB_USER_VERBS_CMD_ATTACH_MCAST,
f520ba5a
RD
81 IB_USER_VERBS_CMD_DETACH_MCAST,
82 IB_USER_VERBS_CMD_CREATE_SRQ,
83 IB_USER_VERBS_CMD_MODIFY_SRQ,
84 IB_USER_VERBS_CMD_QUERY_SRQ,
85 IB_USER_VERBS_CMD_DESTROY_SRQ,
53d0bd1e
SH
86 IB_USER_VERBS_CMD_POST_SRQ_RECV,
87 IB_USER_VERBS_CMD_OPEN_XRCD,
8541f8de 88 IB_USER_VERBS_CMD_CLOSE_XRCD,
42849b26 89 IB_USER_VERBS_CMD_CREATE_XSRQ,
436f2ad0 90 IB_USER_VERBS_CMD_OPEN_QP,
f21519b2
YD
91};
92
f21519b2 93enum {
02d1aa7a 94 IB_USER_VERBS_EX_CMD_QUERY_DEVICE = IB_USER_VERBS_CMD_QUERY_DEVICE,
565197dd 95 IB_USER_VERBS_EX_CMD_CREATE_CQ = IB_USER_VERBS_CMD_CREATE_CQ,
6d8a7497 96 IB_USER_VERBS_EX_CMD_CREATE_QP = IB_USER_VERBS_CMD_CREATE_QP,
189aba99 97 IB_USER_VERBS_EX_CMD_MODIFY_QP = IB_USER_VERBS_CMD_MODIFY_QP,
f21519b2 98 IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,
5a77abf9 99 IB_USER_VERBS_EX_CMD_DESTROY_FLOW,
f213c052
YH
100 IB_USER_VERBS_EX_CMD_CREATE_WQ,
101 IB_USER_VERBS_EX_CMD_MODIFY_WQ,
102 IB_USER_VERBS_EX_CMD_DESTROY_WQ,
de019a94 103 IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL,
869ddcf8
YC
104 IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL,
105 IB_USER_VERBS_EX_CMD_MODIFY_CQ
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RD
106};
107
108/*
109 * Make sure that all structs defined in this file remain laid out so
110 * that they pack the same way on 32-bit and 64-bit architectures (to
111 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
91ecd4ae
RD
112 * Specifically:
113 * - Do not use pointer types -- pass pointers in __u64 instead.
114 * - Make sure that any structure larger than 4 bytes is padded to a
115 * multiple of 8 bytes. Otherwise the structure size will be
116 * different between 32-bit and 64-bit architectures.
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RD
117 */
118
119struct ib_uverbs_async_event_desc {
26b99066 120 __aligned_u64 element;
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RD
121 __u32 event_type; /* enum ib_event_type */
122 __u32 reserved;
123};
124
125struct ib_uverbs_comp_event_desc {
26b99066 126 __aligned_u64 cq_handle;
8a96b3f9
RD
127};
128
18bd9072
YC
129struct ib_uverbs_cq_moderation_caps {
130 __u16 max_cq_moderation_count;
131 __u16 max_cq_moderation_period;
132 __u32 reserved;
133};
134
8a96b3f9
RD
135/*
136 * All commands from userspace should start with a __u32 command field
137 * followed by __u16 in_words and out_words fields (which give the
138 * length of the command block and response buffer if any in 32-bit
139 * words). The kernel driver will read these fields first and read
140 * the rest of the command struct based on these value.
141 */
142
f21519b2 143#define IB_USER_VERBS_CMD_COMMAND_MASK 0xff
372e15c5 144#define IB_USER_VERBS_CMD_FLAG_EXTENDED 0x80000000u
f21519b2 145
8a96b3f9
RD
146struct ib_uverbs_cmd_hdr {
147 __u32 command;
148 __u16 in_words;
149 __u16 out_words;
150};
151
f21519b2 152struct ib_uverbs_ex_cmd_hdr {
26b99066 153 __aligned_u64 response;
400dbc96
II
154 __u16 provider_in_words;
155 __u16 provider_out_words;
156 __u32 cmd_hdr_reserved;
157};
158
8a96b3f9 159struct ib_uverbs_get_context {
26b99066
JG
160 __aligned_u64 response;
161 __aligned_u64 driver_data[0];
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RD
162};
163
164struct ib_uverbs_get_context_resp {
165 __u32 async_fd;
6b73597e 166 __u32 num_comp_vectors;
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RD
167};
168
169struct ib_uverbs_query_device {
26b99066
JG
170 __aligned_u64 response;
171 __aligned_u64 driver_data[0];
8a96b3f9
RD
172};
173
174struct ib_uverbs_query_device_resp {
26b99066 175 __aligned_u64 fw_ver;
97f52eb4
SH
176 __be64 node_guid;
177 __be64 sys_image_guid;
26b99066
JG
178 __aligned_u64 max_mr_size;
179 __aligned_u64 page_size_cap;
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RD
180 __u32 vendor_id;
181 __u32 vendor_part_id;
182 __u32 hw_ver;
183 __u32 max_qp;
184 __u32 max_qp_wr;
185 __u32 device_cap_flags;
186 __u32 max_sge;
187 __u32 max_sge_rd;
188 __u32 max_cq;
189 __u32 max_cqe;
190 __u32 max_mr;
191 __u32 max_pd;
192 __u32 max_qp_rd_atom;
193 __u32 max_ee_rd_atom;
194 __u32 max_res_rd_atom;
195 __u32 max_qp_init_rd_atom;
196 __u32 max_ee_init_rd_atom;
197 __u32 atomic_cap;
198 __u32 max_ee;
199 __u32 max_rdd;
200 __u32 max_mw;
201 __u32 max_raw_ipv6_qp;
202 __u32 max_raw_ethy_qp;
203 __u32 max_mcast_grp;
204 __u32 max_mcast_qp_attach;
205 __u32 max_total_mcast_qp_attach;
206 __u32 max_ah;
207 __u32 max_fmr;
208 __u32 max_map_per_fmr;
209 __u32 max_srq;
210 __u32 max_srq_wr;
211 __u32 max_srq_sge;
212 __u16 max_pkeys;
213 __u8 local_ca_ack_delay;
214 __u8 phys_port_cnt;
215 __u8 reserved[4];
216};
217
02d1aa7a
EC
218struct ib_uverbs_ex_query_device {
219 __u32 comp_mask;
220 __u32 reserved;
221};
222
f4056bfd 223struct ib_uverbs_odp_caps {
26b99066 224 __aligned_u64 general_caps;
f4056bfd
HE
225 struct {
226 __u32 rc_odp_caps;
227 __u32 uc_odp_caps;
228 __u32 ud_odp_caps;
229 } per_transport_caps;
230 __u32 reserved;
231};
232
47adf2f4
YH
233struct ib_uverbs_rss_caps {
234 /* Corresponding bit will be set if qp type from
235 * 'enum ib_qp_type' is supported, e.g.
236 * supported_qpts |= 1 << IB_QPT_UD
237 */
238 __u32 supported_qpts;
239 __u32 max_rwq_indirection_tables;
240 __u32 max_rwq_indirection_table_size;
241 __u32 reserved;
242};
243
8d50505a
AK
244struct ib_uverbs_tm_caps {
245 /* Max size of rendezvous request message */
246 __u32 max_rndv_hdr_size;
247 /* Max number of entries in tag matching list */
248 __u32 max_num_tags;
249 /* TM flags */
250 __u32 flags;
251 /* Max number of outstanding list operations */
252 __u32 max_ops;
253 /* Max number of SGE in tag matching entry */
254 __u32 max_sge;
255 __u32 reserved;
256};
257
02d1aa7a
EC
258struct ib_uverbs_ex_query_device_resp {
259 struct ib_uverbs_query_device_resp base;
260 __u32 comp_mask;
261 __u32 response_length;
f4056bfd 262 struct ib_uverbs_odp_caps odp_caps;
26b99066
JG
263 __aligned_u64 timestamp_mask;
264 __aligned_u64 hca_core_clock; /* in KHZ */
265 __aligned_u64 device_cap_flags_ex;
47adf2f4
YH
266 struct ib_uverbs_rss_caps rss_caps;
267 __u32 max_wq_type_rq;
5f23d426 268 __u32 raw_packet_caps;
78b1beb0 269 struct ib_uverbs_tm_caps tm_caps;
18bd9072 270 struct ib_uverbs_cq_moderation_caps cq_moderation_caps;
d41c1208 271 __aligned_u64 max_dm_size;
02d1aa7a
EC
272};
273
8a96b3f9 274struct ib_uverbs_query_port {
26b99066 275 __aligned_u64 response;
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RD
276 __u8 port_num;
277 __u8 reserved[7];
26b99066 278 __aligned_u64 driver_data[0];
8a96b3f9
RD
279};
280
281struct ib_uverbs_query_port_resp {
282 __u32 port_cap_flags;
283 __u32 max_msg_sz;
284 __u32 bad_pkey_cntr;
285 __u32 qkey_viol_cntr;
286 __u32 gid_tbl_len;
287 __u16 pkey_tbl_len;
288 __u16 lid;
289 __u16 sm_lid;
290 __u8 state;
291 __u8 max_mtu;
292 __u8 active_mtu;
293 __u8 lmc;
294 __u8 max_vl_num;
295 __u8 sm_sl;
296 __u8 subnet_timeout;
297 __u8 init_type_reply;
298 __u8 active_width;
299 __u8 active_speed;
300 __u8 phys_state;
2420b60b
EC
301 __u8 link_layer;
302 __u8 reserved[2];
8a96b3f9
RD
303};
304
8a96b3f9 305struct ib_uverbs_alloc_pd {
26b99066
JG
306 __aligned_u64 response;
307 __aligned_u64 driver_data[0];
8a96b3f9
RD
308};
309
310struct ib_uverbs_alloc_pd_resp {
311 __u32 pd_handle;
312};
313
314struct ib_uverbs_dealloc_pd {
315 __u32 pd_handle;
316};
317
53d0bd1e 318struct ib_uverbs_open_xrcd {
26b99066 319 __aligned_u64 response;
53d0bd1e
SH
320 __u32 fd;
321 __u32 oflags;
26b99066 322 __aligned_u64 driver_data[0];
53d0bd1e
SH
323};
324
325struct ib_uverbs_open_xrcd_resp {
326 __u32 xrcd_handle;
327};
328
329struct ib_uverbs_close_xrcd {
330 __u32 xrcd_handle;
331};
332
8a96b3f9 333struct ib_uverbs_reg_mr {
26b99066
JG
334 __aligned_u64 response;
335 __aligned_u64 start;
336 __aligned_u64 length;
337 __aligned_u64 hca_va;
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RD
338 __u32 pd_handle;
339 __u32 access_flags;
26b99066 340 __aligned_u64 driver_data[0];
8a96b3f9
RD
341};
342
343struct ib_uverbs_reg_mr_resp {
344 __u32 mr_handle;
345 __u32 lkey;
346 __u32 rkey;
347};
348
7e6edb9b 349struct ib_uverbs_rereg_mr {
26b99066 350 __aligned_u64 response;
7e6edb9b
MB
351 __u32 mr_handle;
352 __u32 flags;
26b99066
JG
353 __aligned_u64 start;
354 __aligned_u64 length;
355 __aligned_u64 hca_va;
7e6edb9b
MB
356 __u32 pd_handle;
357 __u32 access_flags;
358};
359
360struct ib_uverbs_rereg_mr_resp {
361 __u32 lkey;
362 __u32 rkey;
363};
364
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RD
365struct ib_uverbs_dereg_mr {
366 __u32 mr_handle;
367};
368
6b52a12b 369struct ib_uverbs_alloc_mw {
26b99066 370 __aligned_u64 response;
6b52a12b
SM
371 __u32 pd_handle;
372 __u8 mw_type;
373 __u8 reserved[3];
374};
375
376struct ib_uverbs_alloc_mw_resp {
377 __u32 mw_handle;
378 __u32 rkey;
379};
380
381struct ib_uverbs_dealloc_mw {
382 __u32 mw_handle;
383};
384
6b73597e 385struct ib_uverbs_create_comp_channel {
26b99066 386 __aligned_u64 response;
6b73597e
RD
387};
388
389struct ib_uverbs_create_comp_channel_resp {
390 __u32 fd;
391};
392
8a96b3f9 393struct ib_uverbs_create_cq {
26b99066
JG
394 __aligned_u64 response;
395 __aligned_u64 user_handle;
8a96b3f9 396 __u32 cqe;
6b73597e
RD
397 __u32 comp_vector;
398 __s32 comp_channel;
399 __u32 reserved;
26b99066 400 __aligned_u64 driver_data[0];
8a96b3f9
RD
401};
402
beb801ac
JG
403enum ib_uverbs_ex_create_cq_flags {
404 IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
405 IB_UVERBS_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
406};
407
565197dd 408struct ib_uverbs_ex_create_cq {
26b99066 409 __aligned_u64 user_handle;
565197dd
MB
410 __u32 cqe;
411 __u32 comp_vector;
412 __s32 comp_channel;
413 __u32 comp_mask;
beb801ac 414 __u32 flags; /* bitmask of ib_uverbs_ex_create_cq_flags */
565197dd
MB
415 __u32 reserved;
416};
417
8a96b3f9
RD
418struct ib_uverbs_create_cq_resp {
419 __u32 cq_handle;
420 __u32 cqe;
421};
422
565197dd
MB
423struct ib_uverbs_ex_create_cq_resp {
424 struct ib_uverbs_create_cq_resp base;
425 __u32 comp_mask;
426 __u32 response_length;
427};
428
33b9b3ee 429struct ib_uverbs_resize_cq {
26b99066 430 __aligned_u64 response;
33b9b3ee
RD
431 __u32 cq_handle;
432 __u32 cqe;
26b99066 433 __aligned_u64 driver_data[0];
33b9b3ee
RD
434};
435
436struct ib_uverbs_resize_cq_resp {
437 __u32 cqe;
64f817ba 438 __u32 reserved;
26b99066 439 __aligned_u64 driver_data[0];
33b9b3ee
RD
440};
441
91ecd4ae 442struct ib_uverbs_poll_cq {
26b99066 443 __aligned_u64 response;
91ecd4ae
RD
444 __u32 cq_handle;
445 __u32 ne;
446};
447
448struct ib_uverbs_wc {
26b99066 449 __aligned_u64 wr_id;
91ecd4ae
RD
450 __u32 status;
451 __u32 opcode;
452 __u32 vendor_err;
453 __u32 byte_len;
00f7ec36 454 union {
c966ea12 455 __be32 imm_data;
00f7ec36
SW
456 __u32 invalidate_rkey;
457 } ex;
91ecd4ae
RD
458 __u32 qp_num;
459 __u32 src_qp;
460 __u32 wc_flags;
461 __u16 pkey_index;
462 __u16 slid;
463 __u8 sl;
464 __u8 dlid_path_bits;
465 __u8 port_num;
466 __u8 reserved;
467};
468
469struct ib_uverbs_poll_cq_resp {
470 __u32 count;
471 __u32 reserved;
472 struct ib_uverbs_wc wc[0];
473};
474
475struct ib_uverbs_req_notify_cq {
476 __u32 cq_handle;
477 __u32 solicited_only;
478};
479
8a96b3f9 480struct ib_uverbs_destroy_cq {
26b99066 481 __aligned_u64 response;
8a96b3f9 482 __u32 cq_handle;
63aaf647
RD
483 __u32 reserved;
484};
485
486struct ib_uverbs_destroy_cq_resp {
487 __u32 comp_events_reported;
488 __u32 async_events_reported;
8a96b3f9
RD
489};
490
6a9af2e1
SH
491struct ib_uverbs_global_route {
492 __u8 dgid[16];
493 __u32 flow_label;
494 __u8 sgid_index;
495 __u8 hop_limit;
496 __u8 traffic_class;
497 __u8 reserved;
498};
499
500struct ib_uverbs_ah_attr {
501 struct ib_uverbs_global_route grh;
502 __u16 dlid;
503 __u8 sl;
504 __u8 src_path_bits;
505 __u8 static_rate;
506 __u8 is_global;
507 __u8 port_num;
508 __u8 reserved;
509};
510
511struct ib_uverbs_qp_attr {
512 __u32 qp_attr_mask;
513 __u32 qp_state;
514 __u32 cur_qp_state;
515 __u32 path_mtu;
516 __u32 path_mig_state;
517 __u32 qkey;
518 __u32 rq_psn;
519 __u32 sq_psn;
520 __u32 dest_qp_num;
521 __u32 qp_access_flags;
522
523 struct ib_uverbs_ah_attr ah_attr;
524 struct ib_uverbs_ah_attr alt_ah_attr;
525
526 /* ib_qp_cap */
527 __u32 max_send_wr;
528 __u32 max_recv_wr;
529 __u32 max_send_sge;
530 __u32 max_recv_sge;
531 __u32 max_inline_data;
532
533 __u16 pkey_index;
534 __u16 alt_pkey_index;
535 __u8 en_sqd_async_notify;
536 __u8 sq_draining;
537 __u8 max_rd_atomic;
538 __u8 max_dest_rd_atomic;
539 __u8 min_rnr_timer;
540 __u8 port_num;
541 __u8 timeout;
542 __u8 retry_cnt;
543 __u8 rnr_retry;
544 __u8 alt_port_num;
545 __u8 alt_timeout;
546 __u8 reserved[5];
547};
548
8a96b3f9 549struct ib_uverbs_create_qp {
26b99066
JG
550 __aligned_u64 response;
551 __aligned_u64 user_handle;
8a96b3f9
RD
552 __u32 pd_handle;
553 __u32 send_cq_handle;
554 __u32 recv_cq_handle;
555 __u32 srq_handle;
556 __u32 max_send_wr;
557 __u32 max_recv_wr;
558 __u32 max_send_sge;
559 __u32 max_recv_sge;
560 __u32 max_inline_data;
561 __u8 sq_sig_all;
562 __u8 qp_type;
563 __u8 is_srq;
564 __u8 reserved;
26b99066 565 __aligned_u64 driver_data[0];
8a96b3f9
RD
566};
567
c70285f8
YH
568enum ib_uverbs_create_qp_mask {
569 IB_UVERBS_CREATE_QP_MASK_IND_TABLE = 1UL << 0,
570};
571
572enum {
573 IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,
574};
575
189aba99 576enum {
646ebd41
LR
577 /*
578 * This value is equal to IB_QP_DEST_QPN.
579 */
580 IB_USER_LEGACY_LAST_QP_ATTR_MASK = 1ULL << 20,
189aba99
BW
581};
582
583enum {
646ebd41
LR
584 /*
585 * This value is equal to IB_QP_RATE_LIMIT.
586 */
587 IB_USER_LAST_QP_ATTR_MASK = 1ULL << 25,
189aba99
BW
588};
589
6d8a7497 590struct ib_uverbs_ex_create_qp {
26b99066 591 __aligned_u64 user_handle;
6d8a7497
EBE
592 __u32 pd_handle;
593 __u32 send_cq_handle;
594 __u32 recv_cq_handle;
595 __u32 srq_handle;
596 __u32 max_send_wr;
597 __u32 max_recv_wr;
598 __u32 max_send_sge;
599 __u32 max_recv_sge;
600 __u32 max_inline_data;
601 __u8 sq_sig_all;
602 __u8 qp_type;
603 __u8 is_srq;
604 __u8 reserved;
605 __u32 comp_mask;
606 __u32 create_flags;
c70285f8 607 __u32 rwq_ind_tbl_handle;
2dee0e54 608 __u32 source_qpn;
6d8a7497
EBE
609};
610
42849b26 611struct ib_uverbs_open_qp {
26b99066
JG
612 __aligned_u64 response;
613 __aligned_u64 user_handle;
42849b26
SH
614 __u32 pd_handle;
615 __u32 qpn;
616 __u8 qp_type;
617 __u8 reserved[7];
26b99066 618 __aligned_u64 driver_data[0];
42849b26
SH
619};
620
621/* also used for open response */
8a96b3f9
RD
622struct ib_uverbs_create_qp_resp {
623 __u32 qp_handle;
624 __u32 qpn;
77369ed3
JM
625 __u32 max_send_wr;
626 __u32 max_recv_wr;
627 __u32 max_send_sge;
628 __u32 max_recv_sge;
629 __u32 max_inline_data;
4d9781c5 630 __u32 reserved;
8a96b3f9
RD
631};
632
6d8a7497
EBE
633struct ib_uverbs_ex_create_qp_resp {
634 struct ib_uverbs_create_qp_resp base;
635 __u32 comp_mask;
636 __u32 response_length;
637};
638
8a96b3f9
RD
639/*
640 * This struct needs to remain a multiple of 8 bytes to keep the
641 * alignment of the modify QP parameters.
642 */
643struct ib_uverbs_qp_dest {
644 __u8 dgid[16];
645 __u32 flow_label;
646 __u16 dlid;
647 __u16 reserved;
648 __u8 sgid_index;
649 __u8 hop_limit;
650 __u8 traffic_class;
651 __u8 sl;
652 __u8 src_path_bits;
653 __u8 static_rate;
654 __u8 is_global;
655 __u8 port_num;
656};
657
7ccc9a24 658struct ib_uverbs_query_qp {
26b99066 659 __aligned_u64 response;
7ccc9a24
DB
660 __u32 qp_handle;
661 __u32 attr_mask;
26b99066 662 __aligned_u64 driver_data[0];
7ccc9a24
DB
663};
664
665struct ib_uverbs_query_qp_resp {
666 struct ib_uverbs_qp_dest dest;
667 struct ib_uverbs_qp_dest alt_dest;
668 __u32 max_send_wr;
669 __u32 max_recv_wr;
670 __u32 max_send_sge;
671 __u32 max_recv_sge;
672 __u32 max_inline_data;
673 __u32 qkey;
674 __u32 rq_psn;
675 __u32 sq_psn;
676 __u32 dest_qp_num;
677 __u32 qp_access_flags;
678 __u16 pkey_index;
679 __u16 alt_pkey_index;
680 __u8 qp_state;
681 __u8 cur_qp_state;
682 __u8 path_mtu;
683 __u8 path_mig_state;
0b26c88f 684 __u8 sq_draining;
7ccc9a24
DB
685 __u8 max_rd_atomic;
686 __u8 max_dest_rd_atomic;
687 __u8 min_rnr_timer;
688 __u8 port_num;
689 __u8 timeout;
690 __u8 retry_cnt;
691 __u8 rnr_retry;
692 __u8 alt_port_num;
693 __u8 alt_timeout;
694 __u8 sq_sig_all;
695 __u8 reserved[5];
26b99066 696 __aligned_u64 driver_data[0];
7ccc9a24
DB
697};
698
8a96b3f9
RD
699struct ib_uverbs_modify_qp {
700 struct ib_uverbs_qp_dest dest;
701 struct ib_uverbs_qp_dest alt_dest;
702 __u32 qp_handle;
703 __u32 attr_mask;
704 __u32 qkey;
705 __u32 rq_psn;
706 __u32 sq_psn;
707 __u32 dest_qp_num;
708 __u32 qp_access_flags;
709 __u16 pkey_index;
710 __u16 alt_pkey_index;
711 __u8 qp_state;
712 __u8 cur_qp_state;
713 __u8 path_mtu;
714 __u8 path_mig_state;
715 __u8 en_sqd_async_notify;
716 __u8 max_rd_atomic;
717 __u8 max_dest_rd_atomic;
718 __u8 min_rnr_timer;
719 __u8 port_num;
720 __u8 timeout;
721 __u8 retry_cnt;
722 __u8 rnr_retry;
723 __u8 alt_port_num;
724 __u8 alt_timeout;
725 __u8 reserved[2];
26b99066 726 __aligned_u64 driver_data[0];
8a96b3f9
RD
727};
728
189aba99
BW
729struct ib_uverbs_ex_modify_qp {
730 struct ib_uverbs_modify_qp base;
731 __u32 rate_limit;
732 __u32 reserved;
733};
734
8a96b3f9
RD
735struct ib_uverbs_modify_qp_resp {
736};
737
189aba99
BW
738struct ib_uverbs_ex_modify_qp_resp {
739 __u32 comp_mask;
740 __u32 response_length;
741};
742
8a96b3f9 743struct ib_uverbs_destroy_qp {
26b99066 744 __aligned_u64 response;
8a96b3f9 745 __u32 qp_handle;
63aaf647
RD
746 __u32 reserved;
747};
748
749struct ib_uverbs_destroy_qp_resp {
750 __u32 events_reported;
8a96b3f9
RD
751};
752
91ecd4ae
RD
753/*
754 * The ib_uverbs_sge structure isn't used anywhere, since we assume
755 * the ib_sge structure is packed the same way on 32-bit and 64-bit
756 * architectures in both kernel and user space. It's just here to
757 * document the ABI.
758 */
759struct ib_uverbs_sge {
26b99066 760 __aligned_u64 addr;
91ecd4ae
RD
761 __u32 length;
762 __u32 lkey;
763};
764
765struct ib_uverbs_send_wr {
26b99066 766 __aligned_u64 wr_id;
91ecd4ae
RD
767 __u32 num_sge;
768 __u32 opcode;
769 __u32 send_flags;
0f39cf3d 770 union {
c966ea12 771 __be32 imm_data;
0f39cf3d
RD
772 __u32 invalidate_rkey;
773 } ex;
91ecd4ae
RD
774 union {
775 struct {
26b99066 776 __aligned_u64 remote_addr;
91ecd4ae
RD
777 __u32 rkey;
778 __u32 reserved;
779 } rdma;
780 struct {
26b99066
JG
781 __aligned_u64 remote_addr;
782 __aligned_u64 compare_add;
783 __aligned_u64 swap;
91ecd4ae
RD
784 __u32 rkey;
785 __u32 reserved;
786 } atomic;
787 struct {
788 __u32 ah;
789 __u32 remote_qpn;
790 __u32 remote_qkey;
791 __u32 reserved;
792 } ud;
793 } wr;
794};
795
796struct ib_uverbs_post_send {
26b99066 797 __aligned_u64 response;
91ecd4ae
RD
798 __u32 qp_handle;
799 __u32 wr_count;
800 __u32 sge_count;
801 __u32 wqe_size;
802 struct ib_uverbs_send_wr send_wr[0];
803};
804
805struct ib_uverbs_post_send_resp {
806 __u32 bad_wr;
807};
808
809struct ib_uverbs_recv_wr {
26b99066 810 __aligned_u64 wr_id;
91ecd4ae
RD
811 __u32 num_sge;
812 __u32 reserved;
813};
814
815struct ib_uverbs_post_recv {
26b99066 816 __aligned_u64 response;
91ecd4ae
RD
817 __u32 qp_handle;
818 __u32 wr_count;
819 __u32 sge_count;
820 __u32 wqe_size;
821 struct ib_uverbs_recv_wr recv_wr[0];
822};
823
824struct ib_uverbs_post_recv_resp {
825 __u32 bad_wr;
826};
827
828struct ib_uverbs_post_srq_recv {
26b99066 829 __aligned_u64 response;
91ecd4ae
RD
830 __u32 srq_handle;
831 __u32 wr_count;
832 __u32 sge_count;
833 __u32 wqe_size;
834 struct ib_uverbs_recv_wr recv[0];
835};
836
837struct ib_uverbs_post_srq_recv_resp {
838 __u32 bad_wr;
839};
840
91ecd4ae 841struct ib_uverbs_create_ah {
26b99066
JG
842 __aligned_u64 response;
843 __aligned_u64 user_handle;
91ecd4ae
RD
844 __u32 pd_handle;
845 __u32 reserved;
846 struct ib_uverbs_ah_attr attr;
847};
848
849struct ib_uverbs_create_ah_resp {
850 __u32 ah_handle;
851};
852
853struct ib_uverbs_destroy_ah {
854 __u32 ah_handle;
855};
856
8a96b3f9
RD
857struct ib_uverbs_attach_mcast {
858 __u8 gid[16];
859 __u32 qp_handle;
860 __u16 mlid;
861 __u16 reserved;
26b99066 862 __aligned_u64 driver_data[0];
8a96b3f9
RD
863};
864
865struct ib_uverbs_detach_mcast {
866 __u8 gid[16];
867 __u32 qp_handle;
868 __u16 mlid;
869 __u16 reserved;
26b99066 870 __aligned_u64 driver_data[0];
436f2ad0
HHZ
871};
872
58913efb
YD
873struct ib_uverbs_flow_spec_hdr {
874 __u32 type;
875 __u16 size;
876 __u16 reserved;
877 /* followed by flow_spec */
26b99066 878 __aligned_u64 flow_spec_data[0];
58913efb
YD
879};
880
b68c9560 881struct ib_uverbs_flow_eth_filter {
436f2ad0
HHZ
882 __u8 dst_mac[6];
883 __u8 src_mac[6];
884 __be16 ether_type;
885 __be16 vlan_tag;
886};
887
b68c9560 888struct ib_uverbs_flow_spec_eth {
58913efb
YD
889 union {
890 struct ib_uverbs_flow_spec_hdr hdr;
891 struct {
892 __u32 type;
893 __u16 size;
894 __u16 reserved;
895 };
896 };
b68c9560
YD
897 struct ib_uverbs_flow_eth_filter val;
898 struct ib_uverbs_flow_eth_filter mask;
436f2ad0
HHZ
899};
900
b68c9560 901struct ib_uverbs_flow_ipv4_filter {
436f2ad0
HHZ
902 __be32 src_ip;
903 __be32 dst_ip;
989a3a8f
MG
904 __u8 proto;
905 __u8 tos;
906 __u8 ttl;
907 __u8 flags;
436f2ad0
HHZ
908};
909
b68c9560 910struct ib_uverbs_flow_spec_ipv4 {
58913efb
YD
911 union {
912 struct ib_uverbs_flow_spec_hdr hdr;
913 struct {
914 __u32 type;
915 __u16 size;
916 __u16 reserved;
917 };
918 };
b68c9560
YD
919 struct ib_uverbs_flow_ipv4_filter val;
920 struct ib_uverbs_flow_ipv4_filter mask;
436f2ad0
HHZ
921};
922
b68c9560 923struct ib_uverbs_flow_tcp_udp_filter {
436f2ad0
HHZ
924 __be16 dst_port;
925 __be16 src_port;
926};
927
b68c9560 928struct ib_uverbs_flow_spec_tcp_udp {
58913efb
YD
929 union {
930 struct ib_uverbs_flow_spec_hdr hdr;
931 struct {
932 __u32 type;
933 __u16 size;
934 __u16 reserved;
935 };
936 };
b68c9560
YD
937 struct ib_uverbs_flow_tcp_udp_filter val;
938 struct ib_uverbs_flow_tcp_udp_filter mask;
436f2ad0
HHZ
939};
940
4c2aae71 941struct ib_uverbs_flow_ipv6_filter {
a72c6a2b
MG
942 __u8 src_ip[16];
943 __u8 dst_ip[16];
944 __be32 flow_label;
945 __u8 next_hdr;
946 __u8 traffic_class;
947 __u8 hop_limit;
948 __u8 reserved;
4c2aae71
MG
949};
950
951struct ib_uverbs_flow_spec_ipv6 {
952 union {
953 struct ib_uverbs_flow_spec_hdr hdr;
954 struct {
955 __u32 type;
956 __u16 size;
957 __u16 reserved;
958 };
959 };
960 struct ib_uverbs_flow_ipv6_filter val;
961 struct ib_uverbs_flow_ipv6_filter mask;
962};
963
94e03f11
MR
964struct ib_uverbs_flow_spec_action_tag {
965 union {
966 struct ib_uverbs_flow_spec_hdr hdr;
967 struct {
968 __u32 type;
969 __u16 size;
970 __u16 reserved;
971 };
972 };
973 __u32 tag_id;
974 __u32 reserved1;
975};
976
483a3966
SS
977struct ib_uverbs_flow_spec_action_drop {
978 union {
979 struct ib_uverbs_flow_spec_hdr hdr;
980 struct {
981 __u32 type;
982 __u16 size;
983 __u16 reserved;
984 };
985 };
986};
987
9b828441
MB
988struct ib_uverbs_flow_spec_action_handle {
989 union {
990 struct ib_uverbs_flow_spec_hdr hdr;
991 struct {
992 __u32 type;
993 __u16 size;
994 __u16 reserved;
995 };
996 };
997 __u32 handle;
998 __u32 reserved1;
999};
1000
a0cb4c75
MR
1001struct ib_uverbs_flow_tunnel_filter {
1002 __be32 tunnel_id;
1003};
1004
1005struct ib_uverbs_flow_spec_tunnel {
1006 union {
1007 struct ib_uverbs_flow_spec_hdr hdr;
1008 struct {
1009 __u32 type;
1010 __u16 size;
1011 __u16 reserved;
1012 };
1013 };
1014 struct ib_uverbs_flow_tunnel_filter val;
1015 struct ib_uverbs_flow_tunnel_filter mask;
1016};
1017
56ab0b38
MB
1018struct ib_uverbs_flow_spec_esp_filter {
1019 __u32 spi;
1020 __u32 seq;
1021};
1022
1023struct ib_uverbs_flow_spec_esp {
1024 union {
1025 struct ib_uverbs_flow_spec_hdr hdr;
1026 struct {
1027 __u32 type;
1028 __u16 size;
1029 __u16 reserved;
1030 };
1031 };
1032 struct ib_uverbs_flow_spec_esp_filter val;
1033 struct ib_uverbs_flow_spec_esp_filter mask;
1034};
1035
d82693da 1036struct ib_uverbs_flow_attr {
436f2ad0
HHZ
1037 __u32 type;
1038 __u16 size;
1039 __u16 priority;
1040 __u8 num_of_specs;
1041 __u8 reserved[2];
1042 __u8 port;
1043 __u32 flags;
1044 /* Following are the optional layers according to user request
1045 * struct ib_flow_spec_xxx
1046 * struct ib_flow_spec_yyy
1047 */
58913efb 1048 struct ib_uverbs_flow_spec_hdr flow_specs[0];
436f2ad0
HHZ
1049};
1050
1051struct ib_uverbs_create_flow {
1052 __u32 comp_mask;
436f2ad0 1053 __u32 qp_handle;
d82693da 1054 struct ib_uverbs_flow_attr flow_attr;
436f2ad0
HHZ
1055};
1056
1057struct ib_uverbs_create_flow_resp {
1058 __u32 comp_mask;
1059 __u32 flow_handle;
1060};
1061
1062struct ib_uverbs_destroy_flow {
1063 __u32 comp_mask;
1064 __u32 flow_handle;
8a96b3f9
RD
1065};
1066
f520ba5a 1067struct ib_uverbs_create_srq {
26b99066
JG
1068 __aligned_u64 response;
1069 __aligned_u64 user_handle;
f520ba5a
RD
1070 __u32 pd_handle;
1071 __u32 max_wr;
1072 __u32 max_sge;
1073 __u32 srq_limit;
26b99066 1074 __aligned_u64 driver_data[0];
f520ba5a
RD
1075};
1076
8541f8de 1077struct ib_uverbs_create_xsrq {
26b99066
JG
1078 __aligned_u64 response;
1079 __aligned_u64 user_handle;
8541f8de
SH
1080 __u32 srq_type;
1081 __u32 pd_handle;
1082 __u32 max_wr;
1083 __u32 max_sge;
1084 __u32 srq_limit;
9382d4e1 1085 __u32 max_num_tags;
8541f8de
SH
1086 __u32 xrcd_handle;
1087 __u32 cq_handle;
26b99066 1088 __aligned_u64 driver_data[0];
8541f8de
SH
1089};
1090
f520ba5a
RD
1091struct ib_uverbs_create_srq_resp {
1092 __u32 srq_handle;
ea88fd16
DB
1093 __u32 max_wr;
1094 __u32 max_sge;
8541f8de 1095 __u32 srqn;
f520ba5a
RD
1096};
1097
1098struct ib_uverbs_modify_srq {
1099 __u32 srq_handle;
1100 __u32 attr_mask;
1101 __u32 max_wr;
f520ba5a 1102 __u32 srq_limit;
26b99066 1103 __aligned_u64 driver_data[0];
f520ba5a
RD
1104};
1105
8bdb0e86 1106struct ib_uverbs_query_srq {
26b99066 1107 __aligned_u64 response;
8bdb0e86
DB
1108 __u32 srq_handle;
1109 __u32 reserved;
26b99066 1110 __aligned_u64 driver_data[0];
8bdb0e86
DB
1111};
1112
1113struct ib_uverbs_query_srq_resp {
1114 __u32 max_wr;
1115 __u32 max_sge;
1116 __u32 srq_limit;
1117 __u32 reserved;
1118};
1119
f520ba5a 1120struct ib_uverbs_destroy_srq {
26b99066 1121 __aligned_u64 response;
f520ba5a 1122 __u32 srq_handle;
63aaf647
RD
1123 __u32 reserved;
1124};
1125
1126struct ib_uverbs_destroy_srq_resp {
1127 __u32 events_reported;
f520ba5a
RD
1128};
1129
f213c052
YH
1130struct ib_uverbs_ex_create_wq {
1131 __u32 comp_mask;
1132 __u32 wq_type;
26b99066 1133 __aligned_u64 user_handle;
f213c052
YH
1134 __u32 pd_handle;
1135 __u32 cq_handle;
1136 __u32 max_wr;
1137 __u32 max_sge;
af1cb95d
NO
1138 __u32 create_flags; /* Use enum ib_wq_flags */
1139 __u32 reserved;
f213c052
YH
1140};
1141
1142struct ib_uverbs_ex_create_wq_resp {
1143 __u32 comp_mask;
1144 __u32 response_length;
1145 __u32 wq_handle;
1146 __u32 max_wr;
1147 __u32 max_sge;
1148 __u32 wqn;
1149};
1150
1151struct ib_uverbs_ex_destroy_wq {
1152 __u32 comp_mask;
1153 __u32 wq_handle;
1154};
1155
1156struct ib_uverbs_ex_destroy_wq_resp {
1157 __u32 comp_mask;
1158 __u32 response_length;
1159 __u32 events_reported;
1160 __u32 reserved;
1161};
1162
1163struct ib_uverbs_ex_modify_wq {
1164 __u32 attr_mask;
1165 __u32 wq_handle;
1166 __u32 wq_state;
1167 __u32 curr_wq_state;
af1cb95d
NO
1168 __u32 flags; /* Use enum ib_wq_flags */
1169 __u32 flags_mask; /* Use enum ib_wq_flags */
f213c052
YH
1170};
1171
de019a94
YH
1172/* Prevent memory allocation rather than max expected size */
1173#define IB_USER_VERBS_MAX_LOG_IND_TBL_SIZE 0x0d
1174struct ib_uverbs_ex_create_rwq_ind_table {
1175 __u32 comp_mask;
1176 __u32 log_ind_tbl_size;
1177 /* Following are the wq handles according to log_ind_tbl_size
1178 * wq_handle1
1179 * wq_handle2
1180 */
1181 __u32 wq_handles[0];
1182};
1183
1184struct ib_uverbs_ex_create_rwq_ind_table_resp {
1185 __u32 comp_mask;
1186 __u32 response_length;
1187 __u32 ind_tbl_handle;
1188 __u32 ind_tbl_num;
1189};
1190
1191struct ib_uverbs_ex_destroy_rwq_ind_table {
1192 __u32 comp_mask;
1193 __u32 ind_tbl_handle;
1194};
1195
869ddcf8
YC
1196struct ib_uverbs_cq_moderation {
1197 __u16 cq_count;
1198 __u16 cq_period;
1199};
1200
1201struct ib_uverbs_ex_modify_cq {
1202 __u32 cq_handle;
1203 __u32 attr_mask;
1204 struct ib_uverbs_cq_moderation attr;
1205 __u32 reserved;
1206};
1207
ea6819e1
ND
1208#define IB_DEVICE_NAME_MAX 64
1209
8a96b3f9 1210#endif /* IB_USER_VERBS_H */