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Merge tag 'input-for-v5.20-rc0' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-block.git] / include / uapi / linux / v4l2-controls.h
CommitLineData
e2be04c7 1/* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
8e19b347
HV		 2/*
3 * Video for Linux Two controls header file
4 *
5 * Copyright (C) 1999-2012 the contributors
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Alternatively you can redistribute this file under the terms of the
18 * BSD license as stated below:
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in
27 * the documentation and/or other materials provided with the
28 * distribution.
29 * 3. The names of its contributors may not be used to endorse or promote
30 * products derived from this software without specific prior written
31 * permission.
32 *
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
36 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
37 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
38 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
39 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
40 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
41 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
42 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
43 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 *
45 * The contents of this header was split off from videodev2.h. All control
46 * definitions should be added to this header, which is included by
47 * videodev2.h.
48 */
49
50#ifndef __LINUX_V4L2_CONTROLS_H
51#define __LINUX_V4L2_CONTROLS_H
52
ce67eaca 53#include <linux/const.h>
df18bfd3
AB		 54#include <linux/types.h>
55
8e19b347
HV		 56/* Control classes */
57#define V4L2_CTRL_CLASS_USER 0x00980000 /* Old-style 'user' controls */
35aaa6e6 58#define V4L2_CTRL_CLASS_CODEC 0x00990000 /* Stateful codec controls */
8e19b347 59#define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */
5a1d3e9f 60#define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator controls */
8e19b347
HV		 61#define V4L2_CTRL_CLASS_FLASH 0x009c0000 /* Camera flash controls */
62#define V4L2_CTRL_CLASS_JPEG 0x009d0000 /* JPEG-compression controls */
63#define V4L2_CTRL_CLASS_IMAGE_SOURCE 0x009e0000 /* Image source controls */
64#define V4L2_CTRL_CLASS_IMAGE_PROC 0x009f0000 /* Image processing controls */
65#define V4L2_CTRL_CLASS_DV 0x00a00000 /* Digital Video controls */
5a1d3e9f 66#define V4L2_CTRL_CLASS_FM_RX 0x00a10000 /* FM Receiver controls */
80807fad 67#define V4L2_CTRL_CLASS_RF_TUNER 0x00a20000 /* RF tuner controls */
a77b4fc0 68#define V4L2_CTRL_CLASS_DETECT 0x00a30000 /* Detection controls */
008d2bd6 69#define V4L2_CTRL_CLASS_CODEC_STATELESS 0x00a40000 /* Stateless codecs controls */
f31b9ffd 70#define V4L2_CTRL_CLASS_COLORIMETRY 0x00a50000 /* Colorimetry controls */
8e19b347
HV		 71
72/* User-class control IDs */
73
74#define V4L2_CID_BASE (V4L2_CTRL_CLASS_USER | 0x900)
6e6a8b5a
MCC		 75#define V4L2_CID_USER_BASE V4L2_CID_BASE
76#define V4L2_CID_USER_CLASS (V4L2_CTRL_CLASS_USER | 1)
8e19b347
HV		 77#define V4L2_CID_BRIGHTNESS (V4L2_CID_BASE+0)
78#define V4L2_CID_CONTRAST (V4L2_CID_BASE+1)
79#define V4L2_CID_SATURATION (V4L2_CID_BASE+2)
80#define V4L2_CID_HUE (V4L2_CID_BASE+3)
81#define V4L2_CID_AUDIO_VOLUME (V4L2_CID_BASE+5)
82#define V4L2_CID_AUDIO_BALANCE (V4L2_CID_BASE+6)
83#define V4L2_CID_AUDIO_BASS (V4L2_CID_BASE+7)
84#define V4L2_CID_AUDIO_TREBLE (V4L2_CID_BASE+8)
85#define V4L2_CID_AUDIO_MUTE (V4L2_CID_BASE+9)
86#define V4L2_CID_AUDIO_LOUDNESS (V4L2_CID_BASE+10)
87#define V4L2_CID_BLACK_LEVEL (V4L2_CID_BASE+11) /* Deprecated */
88#define V4L2_CID_AUTO_WHITE_BALANCE (V4L2_CID_BASE+12)
89#define V4L2_CID_DO_WHITE_BALANCE (V4L2_CID_BASE+13)
90#define V4L2_CID_RED_BALANCE (V4L2_CID_BASE+14)
91#define V4L2_CID_BLUE_BALANCE (V4L2_CID_BASE+15)
92#define V4L2_CID_GAMMA (V4L2_CID_BASE+16)
93#define V4L2_CID_WHITENESS (V4L2_CID_GAMMA) /* Deprecated */
94#define V4L2_CID_EXPOSURE (V4L2_CID_BASE+17)
95#define V4L2_CID_AUTOGAIN (V4L2_CID_BASE+18)
96#define V4L2_CID_GAIN (V4L2_CID_BASE+19)
97#define V4L2_CID_HFLIP (V4L2_CID_BASE+20)
98#define V4L2_CID_VFLIP (V4L2_CID_BASE+21)
99
8e19b347
HV		 100#define V4L2_CID_POWER_LINE_FREQUENCY (V4L2_CID_BASE+24)
101enum v4l2_power_line_frequency {
102 V4L2_CID_POWER_LINE_FREQUENCY_DISABLED = 0,
103 V4L2_CID_POWER_LINE_FREQUENCY_50HZ = 1,
104 V4L2_CID_POWER_LINE_FREQUENCY_60HZ = 2,
105 V4L2_CID_POWER_LINE_FREQUENCY_AUTO = 3,
106};
107#define V4L2_CID_HUE_AUTO (V4L2_CID_BASE+25)
108#define V4L2_CID_WHITE_BALANCE_TEMPERATURE (V4L2_CID_BASE+26)
109#define V4L2_CID_SHARPNESS (V4L2_CID_BASE+27)
6e6a8b5a 110#define V4L2_CID_BACKLIGHT_COMPENSATION (V4L2_CID_BASE+28)
8e19b347
HV		 111#define V4L2_CID_CHROMA_AGC (V4L2_CID_BASE+29)
112#define V4L2_CID_COLOR_KILLER (V4L2_CID_BASE+30)
113#define V4L2_CID_COLORFX (V4L2_CID_BASE+31)
114enum v4l2_colorfx {
115 V4L2_COLORFX_NONE = 0,
116 V4L2_COLORFX_BW = 1,
117 V4L2_COLORFX_SEPIA = 2,
118 V4L2_COLORFX_NEGATIVE = 3,
119 V4L2_COLORFX_EMBOSS = 4,
120 V4L2_COLORFX_SKETCH = 5,
121 V4L2_COLORFX_SKY_BLUE = 6,
122 V4L2_COLORFX_GRASS_GREEN = 7,
123 V4L2_COLORFX_SKIN_WHITEN = 8,
124 V4L2_COLORFX_VIVID = 9,
125 V4L2_COLORFX_AQUA = 10,
126 V4L2_COLORFX_ART_FREEZE = 11,
127 V4L2_COLORFX_SILHOUETTE = 12,
128 V4L2_COLORFX_SOLARIZATION = 13,
129 V4L2_COLORFX_ANTIQUE = 14,
130 V4L2_COLORFX_SET_CBCR = 15,
ef9f18a9 131 V4L2_COLORFX_SET_RGB = 16,
8e19b347
HV		 132};
133#define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32)
134#define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33)
135
136#define V4L2_CID_ROTATE (V4L2_CID_BASE+34)
137#define V4L2_CID_BG_COLOR (V4L2_CID_BASE+35)
138
139#define V4L2_CID_CHROMA_GAIN (V4L2_CID_BASE+36)
140
141#define V4L2_CID_ILLUMINATORS_1 (V4L2_CID_BASE+37)
142#define V4L2_CID_ILLUMINATORS_2 (V4L2_CID_BASE+38)
143
144#define V4L2_CID_MIN_BUFFERS_FOR_CAPTURE (V4L2_CID_BASE+39)
145#define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT (V4L2_CID_BASE+40)
146
147#define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41)
148#define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42)
ef9f18a9 149#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43)
8e19b347
HV		 150
151/* last CID + 1 */
ef9f18a9 152#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44)
8e19b347 153
ed986d1f
HV		 154/* USER-class private control IDs */
155
156/* The base for the meye driver controls. See linux/meye.h for the list
157 * of controls. We reserve 16 controls for this driver. */
158#define V4L2_CID_USER_MEYE_BASE (V4L2_CID_USER_BASE + 0x1000)
8e19b347 159
01df530c
HV		 160/* The base for the bttv driver controls.
161 * We reserve 32 controls for this driver. */
162#define V4L2_CID_USER_BTTV_BASE (V4L2_CID_USER_BASE + 0x1010)
163
164
192f1e78 165/* The base for the s2255 driver controls.
2cb5972d
HV		 166 * We reserve 16 controls for this driver. */
167#define V4L2_CID_USER_S2255_BASE (V4L2_CID_USER_BASE + 0x1030)
192f1e78 168
d647f0b7
MCC		 169/*
170 * The base for the si476x driver controls. See include/media/drv-intf/si476x.h
171 * for the list of controls. Total of 16 controls is reserved for this driver
172 */
2cb5972d 173#define V4L2_CID_USER_SI476X_BASE (V4L2_CID_USER_BASE + 0x1040)
33a80fc2 174
45719127
AT		 175/* The base for the TI VPE driver controls. Total of 16 controls is reserved for
176 * this driver */
177#define V4L2_CID_USER_TI_VPE_BASE (V4L2_CID_USER_BASE + 0x1050)
178
718bde1a
HV		 179/* The base for the saa7134 driver controls.
180 * We reserve 16 controls for this driver. */
181#define V4L2_CID_USER_SAA7134_BASE (V4L2_CID_USER_BASE + 0x1060)
182
08b717c2
LPC		 183/* The base for the adv7180 driver controls.
184 * We reserve 16 controls for this driver. */
185#define V4L2_CID_USER_ADV7180_BASE (V4L2_CID_USER_BASE + 0x1070)
186
d32d9864
MR		 187/* The base for the tc358743 driver controls.
188 * We reserve 16 controls for this driver. */
189#define V4L2_CID_USER_TC358743_BASE (V4L2_CID_USER_BASE + 0x1080)
190
8d67ae25
RS		 191/* The base for the max217x driver controls.
192 * We reserve 32 controls for this driver
193 */
194#define V4L2_CID_USER_MAX217X_BASE (V4L2_CID_USER_BASE + 0x1090)
195
e1302912
SL		 196/* The base for the imx driver controls.
197 * We reserve 16 controls for this driver. */
421860b9 198#define V4L2_CID_USER_IMX_BASE (V4L2_CID_USER_BASE + 0x10b0)
e1302912 199
4e52889f
EH		 200/*
201 * The base for the atmel isc driver controls.
202 * We reserve 32 controls for this driver.
203 */
204#define V4L2_CID_USER_ATMEL_ISC_BASE (V4L2_CID_USER_BASE + 0x10c0)
205
b2d3bef1
EG		 206/*
207 * The base for the CODA driver controls.
208 * We reserve 16 controls for this driver.
209 */
210#define V4L2_CID_USER_CODA_BASE (V4L2_CID_USER_BASE + 0x10e0)
cd9f145d
SA		 211/*
212 * The base for MIPI CCS driver controls.
213 * We reserve 128 controls for this driver.
214 */
215#define V4L2_CID_USER_CCS_BASE (V4L2_CID_USER_BASE + 0x10f0)
7aea2c0b
MT		 216/*
217 * The base for Allegro driver controls.
218 * We reserve 16 controls for this driver.
219 */
220#define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170)
b2d3bef1 221
51ef2be5
MV		 222/*
223 * The base for the isl7998x driver controls.
224 * We reserve 16 controls for this driver.
225 */
226#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180)
227
8e19b347 228/* MPEG-class control IDs */
bc9028e1
AK		 229/* The MPEG controls are applicable to all codec controls
230 * and the 'MPEG' part of the define is historical */
8e19b347 231
35aaa6e6
EG		 232#define V4L2_CID_CODEC_BASE (V4L2_CTRL_CLASS_CODEC | 0x900)
233#define V4L2_CID_CODEC_CLASS (V4L2_CTRL_CLASS_CODEC | 1)
8e19b347
HV		 234
235/* MPEG streams, specific to multiplexed streams */
35aaa6e6 236#define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_CODEC_BASE+0)
8e19b347
HV		 237enum v4l2_mpeg_stream_type {
238 V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */
239 V4L2_MPEG_STREAM_TYPE_MPEG2_TS = 1, /* MPEG-2 transport stream */
240 V4L2_MPEG_STREAM_TYPE_MPEG1_SS = 2, /* MPEG-1 system stream */
241 V4L2_MPEG_STREAM_TYPE_MPEG2_DVD = 3, /* MPEG-2 DVD-compatible stream */
242 V4L2_MPEG_STREAM_TYPE_MPEG1_VCD = 4, /* MPEG-1 VCD-compatible stream */
243 V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD = 5, /* MPEG-2 SVCD-compatible stream */
244};
35aaa6e6
EG		 245#define V4L2_CID_MPEG_STREAM_PID_PMT (V4L2_CID_CODEC_BASE+1)
246#define V4L2_CID_MPEG_STREAM_PID_AUDIO (V4L2_CID_CODEC_BASE+2)
247#define V4L2_CID_MPEG_STREAM_PID_VIDEO (V4L2_CID_CODEC_BASE+3)
248#define V4L2_CID_MPEG_STREAM_PID_PCR (V4L2_CID_CODEC_BASE+4)
249#define V4L2_CID_MPEG_STREAM_PES_ID_AUDIO (V4L2_CID_CODEC_BASE+5)
250#define V4L2_CID_MPEG_STREAM_PES_ID_VIDEO (V4L2_CID_CODEC_BASE+6)
251#define V4L2_CID_MPEG_STREAM_VBI_FMT (V4L2_CID_CODEC_BASE+7)
8e19b347
HV		 252enum v4l2_mpeg_stream_vbi_fmt {
253 V4L2_MPEG_STREAM_VBI_FMT_NONE = 0, /* No VBI in the MPEG stream */
254 V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */
255};
256
257/* MPEG audio controls specific to multiplexed streams */
35aaa6e6 258#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_CODEC_BASE+100)
8e19b347
HV		 259enum v4l2_mpeg_audio_sampling_freq {
260 V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0,
261 V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000 = 1,
262 V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000 = 2,
263};
35aaa6e6 264#define V4L2_CID_MPEG_AUDIO_ENCODING (V4L2_CID_CODEC_BASE+101)
8e19b347
HV		 265enum v4l2_mpeg_audio_encoding {
266 V4L2_MPEG_AUDIO_ENCODING_LAYER_1 = 0,
267 V4L2_MPEG_AUDIO_ENCODING_LAYER_2 = 1,
268 V4L2_MPEG_AUDIO_ENCODING_LAYER_3 = 2,
269 V4L2_MPEG_AUDIO_ENCODING_AAC = 3,
270 V4L2_MPEG_AUDIO_ENCODING_AC3 = 4,
271};
35aaa6e6 272#define V4L2_CID_MPEG_AUDIO_L1_BITRATE (V4L2_CID_CODEC_BASE+102)
8e19b347
HV		 273enum v4l2_mpeg_audio_l1_bitrate {
274 V4L2_MPEG_AUDIO_L1_BITRATE_32K = 0,
275 V4L2_MPEG_AUDIO_L1_BITRATE_64K = 1,
276 V4L2_MPEG_AUDIO_L1_BITRATE_96K = 2,
277 V4L2_MPEG_AUDIO_L1_BITRATE_128K = 3,
278 V4L2_MPEG_AUDIO_L1_BITRATE_160K = 4,
279 V4L2_MPEG_AUDIO_L1_BITRATE_192K = 5,
280 V4L2_MPEG_AUDIO_L1_BITRATE_224K = 6,
281 V4L2_MPEG_AUDIO_L1_BITRATE_256K = 7,
282 V4L2_MPEG_AUDIO_L1_BITRATE_288K = 8,
283 V4L2_MPEG_AUDIO_L1_BITRATE_320K = 9,
284 V4L2_MPEG_AUDIO_L1_BITRATE_352K = 10,
285 V4L2_MPEG_AUDIO_L1_BITRATE_384K = 11,
286 V4L2_MPEG_AUDIO_L1_BITRATE_416K = 12,
287 V4L2_MPEG_AUDIO_L1_BITRATE_448K = 13,
288};
35aaa6e6 289#define V4L2_CID_MPEG_AUDIO_L2_BITRATE (V4L2_CID_CODEC_BASE+103)
8e19b347
HV		 290enum v4l2_mpeg_audio_l2_bitrate {
291 V4L2_MPEG_AUDIO_L2_BITRATE_32K = 0,
292 V4L2_MPEG_AUDIO_L2_BITRATE_48K = 1,
293 V4L2_MPEG_AUDIO_L2_BITRATE_56K = 2,
294 V4L2_MPEG_AUDIO_L2_BITRATE_64K = 3,
295 V4L2_MPEG_AUDIO_L2_BITRATE_80K = 4,
296 V4L2_MPEG_AUDIO_L2_BITRATE_96K = 5,
297 V4L2_MPEG_AUDIO_L2_BITRATE_112K = 6,
298 V4L2_MPEG_AUDIO_L2_BITRATE_128K = 7,
299 V4L2_MPEG_AUDIO_L2_BITRATE_160K = 8,
300 V4L2_MPEG_AUDIO_L2_BITRATE_192K = 9,
301 V4L2_MPEG_AUDIO_L2_BITRATE_224K = 10,
302 V4L2_MPEG_AUDIO_L2_BITRATE_256K = 11,
303 V4L2_MPEG_AUDIO_L2_BITRATE_320K = 12,
304 V4L2_MPEG_AUDIO_L2_BITRATE_384K = 13,
305};
35aaa6e6 306#define V4L2_CID_MPEG_AUDIO_L3_BITRATE (V4L2_CID_CODEC_BASE+104)
8e19b347
HV		 307enum v4l2_mpeg_audio_l3_bitrate {
308 V4L2_MPEG_AUDIO_L3_BITRATE_32K = 0,
309 V4L2_MPEG_AUDIO_L3_BITRATE_40K = 1,
310 V4L2_MPEG_AUDIO_L3_BITRATE_48K = 2,
311 V4L2_MPEG_AUDIO_L3_BITRATE_56K = 3,
312 V4L2_MPEG_AUDIO_L3_BITRATE_64K = 4,
313 V4L2_MPEG_AUDIO_L3_BITRATE_80K = 5,
314 V4L2_MPEG_AUDIO_L3_BITRATE_96K = 6,
315 V4L2_MPEG_AUDIO_L3_BITRATE_112K = 7,
316 V4L2_MPEG_AUDIO_L3_BITRATE_128K = 8,
317 V4L2_MPEG_AUDIO_L3_BITRATE_160K = 9,
318 V4L2_MPEG_AUDIO_L3_BITRATE_192K = 10,
319 V4L2_MPEG_AUDIO_L3_BITRATE_224K = 11,
320 V4L2_MPEG_AUDIO_L3_BITRATE_256K = 12,
321 V4L2_MPEG_AUDIO_L3_BITRATE_320K = 13,
322};
35aaa6e6 323#define V4L2_CID_MPEG_AUDIO_MODE (V4L2_CID_CODEC_BASE+105)
8e19b347
HV		 324enum v4l2_mpeg_audio_mode {
325 V4L2_MPEG_AUDIO_MODE_STEREO = 0,
326 V4L2_MPEG_AUDIO_MODE_JOINT_STEREO = 1,
327 V4L2_MPEG_AUDIO_MODE_DUAL = 2,
328 V4L2_MPEG_AUDIO_MODE_MONO = 3,
329};
35aaa6e6 330#define V4L2_CID_MPEG_AUDIO_MODE_EXTENSION (V4L2_CID_CODEC_BASE+106)
8e19b347
HV		 331enum v4l2_mpeg_audio_mode_extension {
332 V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4 = 0,
333 V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8 = 1,
334 V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12 = 2,
335 V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16 = 3,
336};
35aaa6e6 337#define V4L2_CID_MPEG_AUDIO_EMPHASIS (V4L2_CID_CODEC_BASE+107)
8e19b347
HV		 338enum v4l2_mpeg_audio_emphasis {
339 V4L2_MPEG_AUDIO_EMPHASIS_NONE = 0,
340 V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS = 1,
341 V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17 = 2,
342};
35aaa6e6 343#define V4L2_CID_MPEG_AUDIO_CRC (V4L2_CID_CODEC_BASE+108)
8e19b347
HV		 344enum v4l2_mpeg_audio_crc {
345 V4L2_MPEG_AUDIO_CRC_NONE = 0,
346 V4L2_MPEG_AUDIO_CRC_CRC16 = 1,
347};
35aaa6e6
EG		 348#define V4L2_CID_MPEG_AUDIO_MUTE (V4L2_CID_CODEC_BASE+109)
349#define V4L2_CID_MPEG_AUDIO_AAC_BITRATE (V4L2_CID_CODEC_BASE+110)
350#define V4L2_CID_MPEG_AUDIO_AC3_BITRATE (V4L2_CID_CODEC_BASE+111)
8e19b347
HV		 351enum v4l2_mpeg_audio_ac3_bitrate {
352 V4L2_MPEG_AUDIO_AC3_BITRATE_32K = 0,
353 V4L2_MPEG_AUDIO_AC3_BITRATE_40K = 1,
354 V4L2_MPEG_AUDIO_AC3_BITRATE_48K = 2,
355 V4L2_MPEG_AUDIO_AC3_BITRATE_56K = 3,
356 V4L2_MPEG_AUDIO_AC3_BITRATE_64K = 4,
357 V4L2_MPEG_AUDIO_AC3_BITRATE_80K = 5,
358 V4L2_MPEG_AUDIO_AC3_BITRATE_96K = 6,
359 V4L2_MPEG_AUDIO_AC3_BITRATE_112K = 7,
360 V4L2_MPEG_AUDIO_AC3_BITRATE_128K = 8,
361 V4L2_MPEG_AUDIO_AC3_BITRATE_160K = 9,
362 V4L2_MPEG_AUDIO_AC3_BITRATE_192K = 10,
363 V4L2_MPEG_AUDIO_AC3_BITRATE_224K = 11,
364 V4L2_MPEG_AUDIO_AC3_BITRATE_256K = 12,
365 V4L2_MPEG_AUDIO_AC3_BITRATE_320K = 13,
366 V4L2_MPEG_AUDIO_AC3_BITRATE_384K = 14,
367 V4L2_MPEG_AUDIO_AC3_BITRATE_448K = 15,
368 V4L2_MPEG_AUDIO_AC3_BITRATE_512K = 16,
369 V4L2_MPEG_AUDIO_AC3_BITRATE_576K = 17,
370 V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18,
371};
35aaa6e6 372#define V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK (V4L2_CID_CODEC_BASE+112)
8e19b347
HV		 373enum v4l2_mpeg_audio_dec_playback {
374 V4L2_MPEG_AUDIO_DEC_PLAYBACK_AUTO = 0,
375 V4L2_MPEG_AUDIO_DEC_PLAYBACK_STEREO = 1,
376 V4L2_MPEG_AUDIO_DEC_PLAYBACK_LEFT = 2,
377 V4L2_MPEG_AUDIO_DEC_PLAYBACK_RIGHT = 3,
378 V4L2_MPEG_AUDIO_DEC_PLAYBACK_MONO = 4,
379 V4L2_MPEG_AUDIO_DEC_PLAYBACK_SWAPPED_STEREO = 5,
380};
35aaa6e6 381#define V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK (V4L2_CID_CODEC_BASE+113)
8e19b347
HV		 382
383/* MPEG video controls specific to multiplexed streams */
35aaa6e6 384#define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_CODEC_BASE+200)
8e19b347
HV		 385enum v4l2_mpeg_video_encoding {
386 V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0,
387 V4L2_MPEG_VIDEO_ENCODING_MPEG_2 = 1,
388 V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC = 2,
389};
35aaa6e6 390#define V4L2_CID_MPEG_VIDEO_ASPECT (V4L2_CID_CODEC_BASE+201)
8e19b347
HV		 391enum v4l2_mpeg_video_aspect {
392 V4L2_MPEG_VIDEO_ASPECT_1x1 = 0,
393 V4L2_MPEG_VIDEO_ASPECT_4x3 = 1,
394 V4L2_MPEG_VIDEO_ASPECT_16x9 = 2,
395 V4L2_MPEG_VIDEO_ASPECT_221x100 = 3,
396};
35aaa6e6
EG		 397#define V4L2_CID_MPEG_VIDEO_B_FRAMES (V4L2_CID_CODEC_BASE+202)
398#define V4L2_CID_MPEG_VIDEO_GOP_SIZE (V4L2_CID_CODEC_BASE+203)
399#define V4L2_CID_MPEG_VIDEO_GOP_CLOSURE (V4L2_CID_CODEC_BASE+204)
400#define V4L2_CID_MPEG_VIDEO_PULLDOWN (V4L2_CID_CODEC_BASE+205)
401#define V4L2_CID_MPEG_VIDEO_BITRATE_MODE (V4L2_CID_CODEC_BASE+206)
8e19b347
HV		 402enum v4l2_mpeg_video_bitrate_mode {
403 V4L2_MPEG_VIDEO_BITRATE_MODE_VBR = 0,
404 V4L2_MPEG_VIDEO_BITRATE_MODE_CBR = 1,
4ad1b0d4 405 V4L2_MPEG_VIDEO_BITRATE_MODE_CQ = 2,
8e19b347 406};
35aaa6e6
EG		 407#define V4L2_CID_MPEG_VIDEO_BITRATE (V4L2_CID_CODEC_BASE+207)
408#define V4L2_CID_MPEG_VIDEO_BITRATE_PEAK (V4L2_CID_CODEC_BASE+208)
409#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_CODEC_BASE+209)
410#define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_CODEC_BASE+210)
411#define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_CODEC_BASE+211)
412#define V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE (V4L2_CID_CODEC_BASE+212)
413#define V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER (V4L2_CID_CODEC_BASE+213)
414#define V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB (V4L2_CID_CODEC_BASE+214)
415#define V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE (V4L2_CID_CODEC_BASE+215)
416#define V4L2_CID_MPEG_VIDEO_HEADER_MODE (V4L2_CID_CODEC_BASE+216)
8e19b347
HV		 417enum v4l2_mpeg_video_header_mode {
418 V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE = 0,
419 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME = 1,
420
421};
35aaa6e6
EG		 422#define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC (V4L2_CID_CODEC_BASE+217)
423#define V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE (V4L2_CID_CODEC_BASE+218)
424#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES (V4L2_CID_CODEC_BASE+219)
425#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB (V4L2_CID_CODEC_BASE+220)
426#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE (V4L2_CID_CODEC_BASE+221)
8e19b347
HV		 427enum v4l2_mpeg_video_multi_slice_mode {
428 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE = 0,
4914425e
HV		 429 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB = 1,
430 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES = 2,
431#ifndef __KERNEL__
432 /* Kept for backwards compatibility reasons. Stupid typo... */
8e19b347
HV		 433 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB = 1,
434 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES = 2,
4914425e 435#endif
8e19b347 436};
35aaa6e6
EG		 437#define V4L2_CID_MPEG_VIDEO_VBV_SIZE (V4L2_CID_CODEC_BASE+222)
438#define V4L2_CID_MPEG_VIDEO_DEC_PTS (V4L2_CID_CODEC_BASE+223)
439#define V4L2_CID_MPEG_VIDEO_DEC_FRAME (V4L2_CID_CODEC_BASE+224)
440#define V4L2_CID_MPEG_VIDEO_VBV_DELAY (V4L2_CID_CODEC_BASE+225)
441#define V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER (V4L2_CID_CODEC_BASE+226)
442#define V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE (V4L2_CID_CODEC_BASE+227)
443#define V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE (V4L2_CID_CODEC_BASE+228)
444#define V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME (V4L2_CID_CODEC_BASE+229)
6bde70da 445#define V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID (V4L2_CID_CODEC_BASE+230)
f2bf1bcb 446#define V4L2_CID_MPEG_VIDEO_AU_DELIMITER (V4L2_CID_CODEC_BASE+231)
f15c54cf
DA		 447#define V4L2_CID_MPEG_VIDEO_LTR_COUNT (V4L2_CID_CODEC_BASE+232)
448#define V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX (V4L2_CID_CODEC_BASE+233)
449#define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234)
b52051a4 450#define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235)
9d5adeec 451#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236)
fcbc4acf
DA		 452#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237)
453enum v4l2_mpeg_video_intra_refresh_period_type {
454 V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0,
455 V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1,
456};
8e19b347 457
5902bca9 458/* CIDs for the MPEG-2 Part 2 (H.262) codec */
35aaa6e6 459#define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270)
5902bca9
PZ		 460enum v4l2_mpeg_video_mpeg2_level {
461 V4L2_MPEG_VIDEO_MPEG2_LEVEL_LOW = 0,
462 V4L2_MPEG_VIDEO_MPEG2_LEVEL_MAIN = 1,
463 V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH_1440 = 2,
464 V4L2_MPEG_VIDEO_MPEG2_LEVEL_HIGH = 3,
465};
35aaa6e6 466#define V4L2_CID_MPEG_VIDEO_MPEG2_PROFILE (V4L2_CID_CODEC_BASE+271)
5902bca9
PZ		 467enum v4l2_mpeg_video_mpeg2_profile {
468 V4L2_MPEG_VIDEO_MPEG2_PROFILE_SIMPLE = 0,
469 V4L2_MPEG_VIDEO_MPEG2_PROFILE_MAIN = 1,
470 V4L2_MPEG_VIDEO_MPEG2_PROFILE_SNR_SCALABLE = 2,
471 V4L2_MPEG_VIDEO_MPEG2_PROFILE_SPATIALLY_SCALABLE = 3,
472 V4L2_MPEG_VIDEO_MPEG2_PROFILE_HIGH = 4,
473 V4L2_MPEG_VIDEO_MPEG2_PROFILE_MULTIVIEW = 5,
474};
475
2495f39c 476/* CIDs for the FWHT codec as used by the vicodec driver. */
35aaa6e6
EG		 477#define V4L2_CID_FWHT_I_FRAME_QP (V4L2_CID_CODEC_BASE + 290)
478#define V4L2_CID_FWHT_P_FRAME_QP (V4L2_CID_CODEC_BASE + 291)
479
480#define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (V4L2_CID_CODEC_BASE+300)
481#define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (V4L2_CID_CODEC_BASE+301)
482#define V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP (V4L2_CID_CODEC_BASE+302)
483#define V4L2_CID_MPEG_VIDEO_H263_MIN_QP (V4L2_CID_CODEC_BASE+303)
484#define V4L2_CID_MPEG_VIDEO_H263_MAX_QP (V4L2_CID_CODEC_BASE+304)
485#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP (V4L2_CID_CODEC_BASE+350)
486#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP (V4L2_CID_CODEC_BASE+351)
487#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP (V4L2_CID_CODEC_BASE+352)
488#define V4L2_CID_MPEG_VIDEO_H264_MIN_QP (V4L2_CID_CODEC_BASE+353)
489#define V4L2_CID_MPEG_VIDEO_H264_MAX_QP (V4L2_CID_CODEC_BASE+354)
490#define V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM (V4L2_CID_CODEC_BASE+355)
491#define V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE (V4L2_CID_CODEC_BASE+356)
492#define V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE (V4L2_CID_CODEC_BASE+357)
8e19b347
HV		 493enum v4l2_mpeg_video_h264_entropy_mode {
494 V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC = 0,
495 V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC = 1,
496};
35aaa6e6
EG		 497#define V4L2_CID_MPEG_VIDEO_H264_I_PERIOD (V4L2_CID_CODEC_BASE+358)
498#define V4L2_CID_MPEG_VIDEO_H264_LEVEL (V4L2_CID_CODEC_BASE+359)
8e19b347
HV		 499enum v4l2_mpeg_video_h264_level {
500 V4L2_MPEG_VIDEO_H264_LEVEL_1_0 = 0,
501 V4L2_MPEG_VIDEO_H264_LEVEL_1B = 1,
502 V4L2_MPEG_VIDEO_H264_LEVEL_1_1 = 2,
503 V4L2_MPEG_VIDEO_H264_LEVEL_1_2 = 3,
504 V4L2_MPEG_VIDEO_H264_LEVEL_1_3 = 4,
505 V4L2_MPEG_VIDEO_H264_LEVEL_2_0 = 5,
506 V4L2_MPEG_VIDEO_H264_LEVEL_2_1 = 6,
507 V4L2_MPEG_VIDEO_H264_LEVEL_2_2 = 7,
508 V4L2_MPEG_VIDEO_H264_LEVEL_3_0 = 8,
509 V4L2_MPEG_VIDEO_H264_LEVEL_3_1 = 9,
510 V4L2_MPEG_VIDEO_H264_LEVEL_3_2 = 10,
511 V4L2_MPEG_VIDEO_H264_LEVEL_4_0 = 11,
512 V4L2_MPEG_VIDEO_H264_LEVEL_4_1 = 12,
513 V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13,
514 V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14,
515 V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15,
1ca3cb46
MA		 516 V4L2_MPEG_VIDEO_H264_LEVEL_5_2 = 16,
517 V4L2_MPEG_VIDEO_H264_LEVEL_6_0 = 17,
518 V4L2_MPEG_VIDEO_H264_LEVEL_6_1 = 18,
519 V4L2_MPEG_VIDEO_H264_LEVEL_6_2 = 19,
8e19b347 520};
35aaa6e6
EG		 521#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_CODEC_BASE+360)
522#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_CODEC_BASE+361)
523#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE (V4L2_CID_CODEC_BASE+362)
8e19b347
HV		 524enum v4l2_mpeg_video_h264_loop_filter_mode {
525 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED = 0,
526 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED = 1,
527 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY = 2,
528};
35aaa6e6 529#define V4L2_CID_MPEG_VIDEO_H264_PROFILE (V4L2_CID_CODEC_BASE+363)
8e19b347
HV		 530enum v4l2_mpeg_video_h264_profile {
531 V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE = 0,
532 V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE = 1,
533 V4L2_MPEG_VIDEO_H264_PROFILE_MAIN = 2,
534 V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED = 3,
535 V4L2_MPEG_VIDEO_H264_PROFILE_HIGH = 4,
536 V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10 = 5,
537 V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422 = 6,
538 V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE = 7,
539 V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA = 8,
540 V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA = 9,
541 V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA = 10,
542 V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA = 11,
543 V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE = 12,
544 V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH = 13,
545 V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14,
546 V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15,
547 V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16,
1ca3cb46 548 V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH = 17,
8e19b347 549};
35aaa6e6
EG		 550#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_CODEC_BASE+364)
551#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_CODEC_BASE+365)
552#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE (V4L2_CID_CODEC_BASE+366)
553#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC (V4L2_CID_CODEC_BASE+367)
8e19b347
HV		 554enum v4l2_mpeg_video_h264_vui_sar_idc {
555 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED = 0,
556 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 = 1,
557 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 = 2,
558 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 = 3,
559 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 = 4,
560 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 = 5,
561 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 = 6,
562 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 = 7,
563 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 = 8,
564 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 = 9,
565 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 = 10,
566 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 = 11,
567 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 = 12,
568 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 = 13,
569 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 = 14,
570 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 = 15,
571 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 = 16,
572 V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED = 17,
573};
35aaa6e6
EG		 574#define V4L2_CID_MPEG_VIDEO_H264_SEI_FRAME_PACKING (V4L2_CID_CODEC_BASE+368)
575#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_CURRENT_FRAME_0 (V4L2_CID_CODEC_BASE+369)
576#define V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE (V4L2_CID_CODEC_BASE+370)
2e81dde9
AK		 577enum v4l2_mpeg_video_h264_sei_fp_arrangement_type {
578 V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_CHECKERBOARD = 0,
579 V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_COLUMN = 1,
580 V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_ROW = 2,
581 V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_SIDE_BY_SIDE = 3,
582 V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TOP_BOTTOM = 4,
583 V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TEMPORAL = 5,
584};
35aaa6e6
EG		 585#define V4L2_CID_MPEG_VIDEO_H264_FMO (V4L2_CID_CODEC_BASE+371)
586#define V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE (V4L2_CID_CODEC_BASE+372)
2e81dde9
AK		 587enum v4l2_mpeg_video_h264_fmo_map_type {
588 V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_INTERLEAVED_SLICES = 0,
589 V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_SCATTERED_SLICES = 1,
590 V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_FOREGROUND_WITH_LEFT_OVER = 2,
591 V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_BOX_OUT = 3,
592 V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_RASTER_SCAN = 4,
593 V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN = 5,
594 V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_EXPLICIT = 6,
595};
35aaa6e6
EG		 596#define V4L2_CID_MPEG_VIDEO_H264_FMO_SLICE_GROUP (V4L2_CID_CODEC_BASE+373)
597#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_DIRECTION (V4L2_CID_CODEC_BASE+374)
2e81dde9
AK		 598enum v4l2_mpeg_video_h264_fmo_change_dir {
599 V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_RIGHT = 0,
600 V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_LEFT = 1,
601};
35aaa6e6
EG		 602#define V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_RATE (V4L2_CID_CODEC_BASE+375)
603#define V4L2_CID_MPEG_VIDEO_H264_FMO_RUN_LENGTH (V4L2_CID_CODEC_BASE+376)
604#define V4L2_CID_MPEG_VIDEO_H264_ASO (V4L2_CID_CODEC_BASE+377)
605#define V4L2_CID_MPEG_VIDEO_H264_ASO_SLICE_ORDER (V4L2_CID_CODEC_BASE+378)
606#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING (V4L2_CID_CODEC_BASE+379)
607#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE (V4L2_CID_CODEC_BASE+380)
2e81dde9
AK		 608enum v4l2_mpeg_video_h264_hierarchical_coding_type {
609 V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B = 0,
610 V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P = 1,
611};
35aaa6e6
EG		 612#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER (V4L2_CID_CODEC_BASE+381)
613#define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP (V4L2_CID_CODEC_BASE+382)
614#define V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION (V4L2_CID_CODEC_BASE+383)
615#define V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET (V4L2_CID_CODEC_BASE+384)
616#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP (V4L2_CID_CODEC_BASE+385)
617#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP (V4L2_CID_CODEC_BASE+386)
618#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP (V4L2_CID_CODEC_BASE+387)
619#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP (V4L2_CID_CODEC_BASE+388)
99d0cbe4
DA		 620#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MIN_QP (V4L2_CID_CODEC_BASE+389)
621#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_MAX_QP (V4L2_CID_CODEC_BASE+390)
4ca134ee
DA		 622#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR (V4L2_CID_CODEC_BASE+391)
623#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR (V4L2_CID_CODEC_BASE+392)
624#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR (V4L2_CID_CODEC_BASE+393)
625#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR (V4L2_CID_CODEC_BASE+394)
626#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR (V4L2_CID_CODEC_BASE+395)
627#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR (V4L2_CID_CODEC_BASE+396)
628#define V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L6_BR (V4L2_CID_CODEC_BASE+397)
35aaa6e6
EG		 629#define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (V4L2_CID_CODEC_BASE+400)
630#define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (V4L2_CID_CODEC_BASE+401)
631#define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (V4L2_CID_CODEC_BASE+402)
632#define V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP (V4L2_CID_CODEC_BASE+403)
633#define V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP (V4L2_CID_CODEC_BASE+404)
634#define V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL (V4L2_CID_CODEC_BASE+405)
8e19b347
HV		 635enum v4l2_mpeg_video_mpeg4_level {
636 V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 = 0,
637 V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B = 1,
638 V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 = 2,
639 V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 = 3,
640 V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 = 4,
641 V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B = 5,
642 V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 = 6,
643 V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 = 7,
644};
35aaa6e6 645#define V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE (V4L2_CID_CODEC_BASE+406)
8e19b347
HV		 646enum v4l2_mpeg_video_mpeg4_profile {
647 V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE = 0,
648 V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE = 1,
649 V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE = 2,
650 V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE = 3,
651 V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY = 4,
652};
35aaa6e6 653#define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (V4L2_CID_CODEC_BASE+407)
8e19b347 654
bc9028e1
AK		 655/* Control IDs for VP8 streams
656 * Although VP8 is not part of MPEG we add these controls to the MPEG class
657 * as that class is already handling other video compression standards
658 */
35aaa6e6 659#define V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS (V4L2_CID_CODEC_BASE+500)
bc9028e1
AK		 660enum v4l2_vp8_num_partitions {
661 V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION = 0,
662 V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS = 1,
663 V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS = 2,
664 V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS = 3,
665};
35aaa6e6
EG		 666#define V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4 (V4L2_CID_CODEC_BASE+501)
667#define V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES (V4L2_CID_CODEC_BASE+502)
bc9028e1
AK		 668enum v4l2_vp8_num_ref_frames {
669 V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME = 0,
670 V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME = 1,
671 V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME = 2,
672};
35aaa6e6
EG		 673#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL (V4L2_CID_CODEC_BASE+503)
674#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS (V4L2_CID_CODEC_BASE+504)
675#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD (V4L2_CID_CODEC_BASE+505)
676#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL (V4L2_CID_CODEC_BASE+506)
bc9028e1
AK		 677enum v4l2_vp8_golden_frame_sel {
678 V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV = 0,
679 V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD = 1,
680};
35aaa6e6
EG		 681#define V4L2_CID_MPEG_VIDEO_VPX_MIN_QP (V4L2_CID_CODEC_BASE+507)
682#define V4L2_CID_MPEG_VIDEO_VPX_MAX_QP (V4L2_CID_CODEC_BASE+508)
683#define V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP (V4L2_CID_CODEC_BASE+509)
684#define V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (V4L2_CID_CODEC_BASE+510)
5520b946 685
35aaa6e6 686#define V4L2_CID_MPEG_VIDEO_VP8_PROFILE (V4L2_CID_CODEC_BASE+511)
5520b946
KW		 687enum v4l2_mpeg_video_vp8_profile {
688 V4L2_MPEG_VIDEO_VP8_PROFILE_0 = 0,
689 V4L2_MPEG_VIDEO_VP8_PROFILE_1 = 1,
690 V4L2_MPEG_VIDEO_VP8_PROFILE_2 = 2,
691 V4L2_MPEG_VIDEO_VP8_PROFILE_3 = 3,
692};
693/* Deprecated alias for compatibility reasons. */
694#define V4L2_CID_MPEG_VIDEO_VPX_PROFILE V4L2_CID_MPEG_VIDEO_VP8_PROFILE
35aaa6e6 695#define V4L2_CID_MPEG_VIDEO_VP9_PROFILE (V4L2_CID_CODEC_BASE+512)
2a75364d
KW		 696enum v4l2_mpeg_video_vp9_profile {
697 V4L2_MPEG_VIDEO_VP9_PROFILE_0 = 0,
698 V4L2_MPEG_VIDEO_VP9_PROFILE_1 = 1,
699 V4L2_MPEG_VIDEO_VP9_PROFILE_2 = 2,
700 V4L2_MPEG_VIDEO_VP9_PROFILE_3 = 3,
701};
35aaa6e6 702#define V4L2_CID_MPEG_VIDEO_VP9_LEVEL (V4L2_CID_CODEC_BASE+513)
5823833c
SV		 703enum v4l2_mpeg_video_vp9_level {
704 V4L2_MPEG_VIDEO_VP9_LEVEL_1_0 = 0,
705 V4L2_MPEG_VIDEO_VP9_LEVEL_1_1 = 1,
706 V4L2_MPEG_VIDEO_VP9_LEVEL_2_0 = 2,
707 V4L2_MPEG_VIDEO_VP9_LEVEL_2_1 = 3,
708 V4L2_MPEG_VIDEO_VP9_LEVEL_3_0 = 4,
709 V4L2_MPEG_VIDEO_VP9_LEVEL_3_1 = 5,
710 V4L2_MPEG_VIDEO_VP9_LEVEL_4_0 = 6,
711 V4L2_MPEG_VIDEO_VP9_LEVEL_4_1 = 7,
712 V4L2_MPEG_VIDEO_VP9_LEVEL_5_0 = 8,
713 V4L2_MPEG_VIDEO_VP9_LEVEL_5_1 = 9,
714 V4L2_MPEG_VIDEO_VP9_LEVEL_5_2 = 10,
715 V4L2_MPEG_VIDEO_VP9_LEVEL_6_0 = 11,
716 V4L2_MPEG_VIDEO_VP9_LEVEL_6_1 = 12,
717 V4L2_MPEG_VIDEO_VP9_LEVEL_6_2 = 13,
718};
bc9028e1 719
2c02837b
SM		 720/* CIDs for HEVC encoding. */
721
35aaa6e6
EG		 722#define V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (V4L2_CID_CODEC_BASE + 600)
723#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (V4L2_CID_CODEC_BASE + 601)
724#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (V4L2_CID_CODEC_BASE + 602)
725#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (V4L2_CID_CODEC_BASE + 603)
726#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (V4L2_CID_CODEC_BASE + 604)
727#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (V4L2_CID_CODEC_BASE + 605)
728#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE (V4L2_CID_CODEC_BASE + 606)
2c02837b
SM		 729enum v4l2_mpeg_video_hevc_hier_coding_type {
730 V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B = 0,
731 V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P = 1,
732};
35aaa6e6
EG		 733#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (V4L2_CID_CODEC_BASE + 607)
734#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP (V4L2_CID_CODEC_BASE + 608)
735#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_QP (V4L2_CID_CODEC_BASE + 609)
736#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_QP (V4L2_CID_CODEC_BASE + 610)
737#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_QP (V4L2_CID_CODEC_BASE + 611)
738#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_QP (V4L2_CID_CODEC_BASE + 612)
739#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_QP (V4L2_CID_CODEC_BASE + 613)
740#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_QP (V4L2_CID_CODEC_BASE + 614)
741#define V4L2_CID_MPEG_VIDEO_HEVC_PROFILE (V4L2_CID_CODEC_BASE + 615)
2c02837b
SM		 742enum v4l2_mpeg_video_hevc_profile {
743 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN = 0,
744 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE = 1,
745 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10 = 2,
746};
35aaa6e6 747#define V4L2_CID_MPEG_VIDEO_HEVC_LEVEL (V4L2_CID_CODEC_BASE + 616)
2c02837b
SM		 748enum v4l2_mpeg_video_hevc_level {
749 V4L2_MPEG_VIDEO_HEVC_LEVEL_1 = 0,
750 V4L2_MPEG_VIDEO_HEVC_LEVEL_2 = 1,
751 V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1 = 2,
752 V4L2_MPEG_VIDEO_HEVC_LEVEL_3 = 3,
753 V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1 = 4,
754 V4L2_MPEG_VIDEO_HEVC_LEVEL_4 = 5,
755 V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1 = 6,
756 V4L2_MPEG_VIDEO_HEVC_LEVEL_5 = 7,
757 V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1 = 8,
758 V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2 = 9,
759 V4L2_MPEG_VIDEO_HEVC_LEVEL_6 = 10,
760 V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1 = 11,
761 V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2 = 12,
762};
35aaa6e6
EG		 763#define V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (V4L2_CID_CODEC_BASE + 617)
764#define V4L2_CID_MPEG_VIDEO_HEVC_TIER (V4L2_CID_CODEC_BASE + 618)
2c02837b
SM		 765enum v4l2_mpeg_video_hevc_tier {
766 V4L2_MPEG_VIDEO_HEVC_TIER_MAIN = 0,
767 V4L2_MPEG_VIDEO_HEVC_TIER_HIGH = 1,
768};
35aaa6e6
EG		 769#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (V4L2_CID_CODEC_BASE + 619)
770#define V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE (V4L2_CID_CODEC_BASE + 620)
2c02837b
SM		 771enum v4l2_cid_mpeg_video_hevc_loop_filter_mode {
772 V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED = 0,
773 V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED = 1,
774 V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY = 2,
775};
35aaa6e6
EG		 776#define V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (V4L2_CID_CODEC_BASE + 621)
777#define V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (V4L2_CID_CODEC_BASE + 622)
778#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE (V4L2_CID_CODEC_BASE + 623)
2c02837b
SM		 779enum v4l2_cid_mpeg_video_hevc_refresh_type {
780 V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE = 0,
781 V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA = 1,
782 V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR = 2,
783};
35aaa6e6
EG		 784#define V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (V4L2_CID_CODEC_BASE + 624)
785#define V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (V4L2_CID_CODEC_BASE + 625)
786#define V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (V4L2_CID_CODEC_BASE + 626)
787#define V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (V4L2_CID_CODEC_BASE + 627)
788#define V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (V4L2_CID_CODEC_BASE + 628)
789#define V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (V4L2_CID_CODEC_BASE + 629)
790#define V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (V4L2_CID_CODEC_BASE + 630)
791#define V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (V4L2_CID_CODEC_BASE + 631)
792#define V4L2_CID_MPEG_VIDEO_HEVC_INTRA_PU_SPLIT (V4L2_CID_CODEC_BASE + 632)
793#define V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (V4L2_CID_CODEC_BASE + 633)
794#define V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (V4L2_CID_CODEC_BASE + 634)
795#define V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD (V4L2_CID_CODEC_BASE + 635)
2c02837b
SM		 796enum v4l2_cid_mpeg_video_hevc_size_of_length_field {
797 V4L2_MPEG_VIDEO_HEVC_SIZE_0 = 0,
798 V4L2_MPEG_VIDEO_HEVC_SIZE_1 = 1,
799 V4L2_MPEG_VIDEO_HEVC_SIZE_2 = 2,
800 V4L2_MPEG_VIDEO_HEVC_SIZE_4 = 3,
801};
35aaa6e6
EG		 802#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (V4L2_CID_CODEC_BASE + 636)
803#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (V4L2_CID_CODEC_BASE + 637)
804#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (V4L2_CID_CODEC_BASE + 638)
805#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (V4L2_CID_CODEC_BASE + 639)
806#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (V4L2_CID_CODEC_BASE + 640)
807#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (V4L2_CID_CODEC_BASE + 641)
808#define V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (V4L2_CID_CODEC_BASE + 642)
809#define V4L2_CID_MPEG_VIDEO_REF_NUMBER_FOR_PFRAMES (V4L2_CID_CODEC_BASE + 643)
810#define V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR (V4L2_CID_CODEC_BASE + 644)
811#define V4L2_CID_MPEG_VIDEO_CONSTANT_QUALITY (V4L2_CID_CODEC_BASE + 645)
812#define V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE (V4L2_CID_CODEC_BASE + 646)
44f5b2ff
SV		 813enum v4l2_mpeg_video_frame_skip_mode {
814 V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED = 0,
815 V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT = 1,
816 V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT = 2,
817};
2c02837b 818
99d0cbe4
DA		 819#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MIN_QP (V4L2_CID_CODEC_BASE + 647)
820#define V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_MAX_QP (V4L2_CID_CODEC_BASE + 648)
821#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MIN_QP (V4L2_CID_CODEC_BASE + 649)
822#define V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_MAX_QP (V4L2_CID_CODEC_BASE + 650)
823#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MIN_QP (V4L2_CID_CODEC_BASE + 651)
824#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP (V4L2_CID_CODEC_BASE + 652)
825
9f3d1056
SV		 826#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY (V4L2_CID_CODEC_BASE + 653)
827#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE (V4L2_CID_CODEC_BASE + 654)
828
8e19b347 829/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
35aaa6e6
EG		 830#define V4L2_CID_CODEC_CX2341X_BASE (V4L2_CTRL_CLASS_CODEC | 0x1000)
831#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_CODEC_CX2341X_BASE+0)
8e19b347
HV		 832enum v4l2_mpeg_cx2341x_video_spatial_filter_mode {
833 V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL = 0,
834 V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO = 1,
835};
35aaa6e6
EG		 836#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER (V4L2_CID_CODEC_CX2341X_BASE+1)
837#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE (V4L2_CID_CODEC_CX2341X_BASE+2)
8e19b347
HV		 838enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type {
839 V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF = 0,
840 V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR = 1,
841 V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT = 2,
842 V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE = 3,
843 V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE = 4,
844};
35aaa6e6 845#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE (V4L2_CID_CODEC_CX2341X_BASE+3)
8e19b347
HV		 846enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type {
847 V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF = 0,
848 V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR = 1,
849};
35aaa6e6 850#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE (V4L2_CID_CODEC_CX2341X_BASE+4)
8e19b347
HV		 851enum v4l2_mpeg_cx2341x_video_temporal_filter_mode {
852 V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL = 0,
853 V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO = 1,
854};
35aaa6e6
EG		 855#define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER (V4L2_CID_CODEC_CX2341X_BASE+5)
856#define V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE (V4L2_CID_CODEC_CX2341X_BASE+6)
8e19b347
HV		 857enum v4l2_mpeg_cx2341x_video_median_filter_type {
858 V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF = 0,
859 V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR = 1,
860 V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT = 2,
861 V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT = 3,
862 V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG = 4,
863};
35aaa6e6
EG		 864#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM (V4L2_CID_CODEC_CX2341X_BASE+7)
865#define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP (V4L2_CID_CODEC_CX2341X_BASE+8)
866#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM (V4L2_CID_CODEC_CX2341X_BASE+9)
867#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_CODEC_CX2341X_BASE+10)
868#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_CODEC_CX2341X_BASE+11)
8e19b347
HV		 869
870/* MPEG-class control IDs specific to the Samsung MFC 5.1 driver as defined by V4L2 */
35aaa6e6 871#define V4L2_CID_CODEC_MFC51_BASE (V4L2_CTRL_CLASS_CODEC | 0x1100)
8e19b347 872
35aaa6e6
EG		 873#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY (V4L2_CID_CODEC_MFC51_BASE+0)
874#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE (V4L2_CID_CODEC_MFC51_BASE+1)
875#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE (V4L2_CID_CODEC_MFC51_BASE+2)
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HV		 876enum v4l2_mpeg_mfc51_video_frame_skip_mode {
877 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED = 0,
878 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT = 1,
879 V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT = 2,
880};
35aaa6e6 881#define V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE (V4L2_CID_CODEC_MFC51_BASE+3)
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HV		 882enum v4l2_mpeg_mfc51_video_force_frame_type {
883 V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED = 0,
884 V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_I_FRAME = 1,
885 V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED = 2,
886};
35aaa6e6
EG		 887#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING (V4L2_CID_CODEC_MFC51_BASE+4)
888#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV (V4L2_CID_CODEC_MFC51_BASE+5)
889#define V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT (V4L2_CID_CODEC_MFC51_BASE+6)
890#define V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF (V4L2_CID_CODEC_MFC51_BASE+7)
891#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY (V4L2_CID_CODEC_MFC51_BASE+50)
892#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK (V4L2_CID_CODEC_MFC51_BASE+51)
893#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH (V4L2_CID_CODEC_MFC51_BASE+52)
894#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_CODEC_MFC51_BASE+53)
895#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_CODEC_MFC51_BASE+54)
8e19b347 896
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HV		 897/* Camera class control IDs */
898
6e6a8b5a
MCC		 899#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900)
900#define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1)
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HV		 901
902#define V4L2_CID_EXPOSURE_AUTO (V4L2_CID_CAMERA_CLASS_BASE+1)
903enum v4l2_exposure_auto_type {
904 V4L2_EXPOSURE_AUTO = 0,
905 V4L2_EXPOSURE_MANUAL = 1,
906 V4L2_EXPOSURE_SHUTTER_PRIORITY = 2,
907 V4L2_EXPOSURE_APERTURE_PRIORITY = 3
908};
909#define V4L2_CID_EXPOSURE_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+2)
910#define V4L2_CID_EXPOSURE_AUTO_PRIORITY (V4L2_CID_CAMERA_CLASS_BASE+3)
911
912#define V4L2_CID_PAN_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+4)
913#define V4L2_CID_TILT_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+5)
914#define V4L2_CID_PAN_RESET (V4L2_CID_CAMERA_CLASS_BASE+6)
915#define V4L2_CID_TILT_RESET (V4L2_CID_CAMERA_CLASS_BASE+7)
916
917#define V4L2_CID_PAN_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+8)
918#define V4L2_CID_TILT_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+9)
919
920#define V4L2_CID_FOCUS_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+10)
921#define V4L2_CID_FOCUS_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+11)
922#define V4L2_CID_FOCUS_AUTO (V4L2_CID_CAMERA_CLASS_BASE+12)
923
924#define V4L2_CID_ZOOM_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+13)
925#define V4L2_CID_ZOOM_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+14)
926#define V4L2_CID_ZOOM_CONTINUOUS (V4L2_CID_CAMERA_CLASS_BASE+15)
927
928#define V4L2_CID_PRIVACY (V4L2_CID_CAMERA_CLASS_BASE+16)
929
930#define V4L2_CID_IRIS_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+17)
931#define V4L2_CID_IRIS_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+18)
932
933#define V4L2_CID_AUTO_EXPOSURE_BIAS (V4L2_CID_CAMERA_CLASS_BASE+19)
934
935#define V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE (V4L2_CID_CAMERA_CLASS_BASE+20)
936enum v4l2_auto_n_preset_white_balance {
937 V4L2_WHITE_BALANCE_MANUAL = 0,
938 V4L2_WHITE_BALANCE_AUTO = 1,
939 V4L2_WHITE_BALANCE_INCANDESCENT = 2,
940 V4L2_WHITE_BALANCE_FLUORESCENT = 3,
941 V4L2_WHITE_BALANCE_FLUORESCENT_H = 4,
942 V4L2_WHITE_BALANCE_HORIZON = 5,
943 V4L2_WHITE_BALANCE_DAYLIGHT = 6,
944 V4L2_WHITE_BALANCE_FLASH = 7,
945 V4L2_WHITE_BALANCE_CLOUDY = 8,
946 V4L2_WHITE_BALANCE_SHADE = 9,
947};
948
949#define V4L2_CID_WIDE_DYNAMIC_RANGE (V4L2_CID_CAMERA_CLASS_BASE+21)
950#define V4L2_CID_IMAGE_STABILIZATION (V4L2_CID_CAMERA_CLASS_BASE+22)
951
952#define V4L2_CID_ISO_SENSITIVITY (V4L2_CID_CAMERA_CLASS_BASE+23)
953#define V4L2_CID_ISO_SENSITIVITY_AUTO (V4L2_CID_CAMERA_CLASS_BASE+24)
954enum v4l2_iso_sensitivity_auto_type {
955 V4L2_ISO_SENSITIVITY_MANUAL = 0,
956 V4L2_ISO_SENSITIVITY_AUTO = 1,
957};
958
959#define V4L2_CID_EXPOSURE_METERING (V4L2_CID_CAMERA_CLASS_BASE+25)
960enum v4l2_exposure_metering {
961 V4L2_EXPOSURE_METERING_AVERAGE = 0,
962 V4L2_EXPOSURE_METERING_CENTER_WEIGHTED = 1,
963 V4L2_EXPOSURE_METERING_SPOT = 2,
fc39f46b 964 V4L2_EXPOSURE_METERING_MATRIX = 3,
8e19b347
HV		 965};
966
967#define V4L2_CID_SCENE_MODE (V4L2_CID_CAMERA_CLASS_BASE+26)
968enum v4l2_scene_mode {
969 V4L2_SCENE_MODE_NONE = 0,
970 V4L2_SCENE_MODE_BACKLIGHT = 1,
971 V4L2_SCENE_MODE_BEACH_SNOW = 2,
972 V4L2_SCENE_MODE_CANDLE_LIGHT = 3,
973 V4L2_SCENE_MODE_DAWN_DUSK = 4,
974 V4L2_SCENE_MODE_FALL_COLORS = 5,
975 V4L2_SCENE_MODE_FIREWORKS = 6,
976 V4L2_SCENE_MODE_LANDSCAPE = 7,
977 V4L2_SCENE_MODE_NIGHT = 8,
978 V4L2_SCENE_MODE_PARTY_INDOOR = 9,
979 V4L2_SCENE_MODE_PORTRAIT = 10,
980 V4L2_SCENE_MODE_SPORTS = 11,
981 V4L2_SCENE_MODE_SUNSET = 12,
982 V4L2_SCENE_MODE_TEXT = 13,
983};
984
985#define V4L2_CID_3A_LOCK (V4L2_CID_CAMERA_CLASS_BASE+27)
986#define V4L2_LOCK_EXPOSURE (1 << 0)
987#define V4L2_LOCK_WHITE_BALANCE (1 << 1)
988#define V4L2_LOCK_FOCUS (1 << 2)
989
990#define V4L2_CID_AUTO_FOCUS_START (V4L2_CID_CAMERA_CLASS_BASE+28)
991#define V4L2_CID_AUTO_FOCUS_STOP (V4L2_CID_CAMERA_CLASS_BASE+29)
992#define V4L2_CID_AUTO_FOCUS_STATUS (V4L2_CID_CAMERA_CLASS_BASE+30)
993#define V4L2_AUTO_FOCUS_STATUS_IDLE (0 << 0)
994#define V4L2_AUTO_FOCUS_STATUS_BUSY (1 << 0)
995#define V4L2_AUTO_FOCUS_STATUS_REACHED (1 << 1)
996#define V4L2_AUTO_FOCUS_STATUS_FAILED (1 << 2)
997
998#define V4L2_CID_AUTO_FOCUS_RANGE (V4L2_CID_CAMERA_CLASS_BASE+31)
999enum v4l2_auto_focus_range {
1000 V4L2_AUTO_FOCUS_RANGE_AUTO = 0,
1001 V4L2_AUTO_FOCUS_RANGE_NORMAL = 1,
1002 V4L2_AUTO_FOCUS_RANGE_MACRO = 2,
1003 V4L2_AUTO_FOCUS_RANGE_INFINITY = 3,
1004};
1005
e3d6eb1c
VP		 1006#define V4L2_CID_PAN_SPEED (V4L2_CID_CAMERA_CLASS_BASE+32)
1007#define V4L2_CID_TILT_SPEED (V4L2_CID_CAMERA_CLASS_BASE+33)
8e19b347 1008
926645d4
JM		 1009#define V4L2_CID_CAMERA_ORIENTATION (V4L2_CID_CAMERA_CLASS_BASE+34)
1010#define V4L2_CAMERA_ORIENTATION_FRONT 0
1011#define V4L2_CAMERA_ORIENTATION_BACK 1
1012#define V4L2_CAMERA_ORIENTATION_EXTERNAL 2
1013
1014#define V4L2_CID_CAMERA_SENSOR_ROTATION (V4L2_CID_CAMERA_CLASS_BASE+35)
1015
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HV		 1016/* FM Modulator class control IDs */
1017
1018#define V4L2_CID_FM_TX_CLASS_BASE (V4L2_CTRL_CLASS_FM_TX | 0x900)
1019#define V4L2_CID_FM_TX_CLASS (V4L2_CTRL_CLASS_FM_TX | 1)
1020
1021#define V4L2_CID_RDS_TX_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 1)
1022#define V4L2_CID_RDS_TX_PI (V4L2_CID_FM_TX_CLASS_BASE + 2)
1023#define V4L2_CID_RDS_TX_PTY (V4L2_CID_FM_TX_CLASS_BASE + 3)
1024#define V4L2_CID_RDS_TX_PS_NAME (V4L2_CID_FM_TX_CLASS_BASE + 5)
1025#define V4L2_CID_RDS_TX_RADIO_TEXT (V4L2_CID_FM_TX_CLASS_BASE + 6)
811c5081
HV		 1026#define V4L2_CID_RDS_TX_MONO_STEREO (V4L2_CID_FM_TX_CLASS_BASE + 7)
1027#define V4L2_CID_RDS_TX_ARTIFICIAL_HEAD (V4L2_CID_FM_TX_CLASS_BASE + 8)
1028#define V4L2_CID_RDS_TX_COMPRESSED (V4L2_CID_FM_TX_CLASS_BASE + 9)
1029#define V4L2_CID_RDS_TX_DYNAMIC_PTY (V4L2_CID_FM_TX_CLASS_BASE + 10)
1030#define V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT (V4L2_CID_FM_TX_CLASS_BASE + 11)
1031#define V4L2_CID_RDS_TX_TRAFFIC_PROGRAM (V4L2_CID_FM_TX_CLASS_BASE + 12)
1032#define V4L2_CID_RDS_TX_MUSIC_SPEECH (V4L2_CID_FM_TX_CLASS_BASE + 13)
1033#define V4L2_CID_RDS_TX_ALT_FREQS_ENABLE (V4L2_CID_FM_TX_CLASS_BASE + 14)
1034#define V4L2_CID_RDS_TX_ALT_FREQS (V4L2_CID_FM_TX_CLASS_BASE + 15)
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HV		 1035
1036#define V4L2_CID_AUDIO_LIMITER_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 64)
1037#define V4L2_CID_AUDIO_LIMITER_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 65)
1038#define V4L2_CID_AUDIO_LIMITER_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 66)
1039
1040#define V4L2_CID_AUDIO_COMPRESSION_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 80)
1041#define V4L2_CID_AUDIO_COMPRESSION_GAIN (V4L2_CID_FM_TX_CLASS_BASE + 81)
1042#define V4L2_CID_AUDIO_COMPRESSION_THRESHOLD (V4L2_CID_FM_TX_CLASS_BASE + 82)
1043#define V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME (V4L2_CID_FM_TX_CLASS_BASE + 83)
1044#define V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 84)
1045
1046#define V4L2_CID_PILOT_TONE_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 96)
1047#define V4L2_CID_PILOT_TONE_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 97)
1048#define V4L2_CID_PILOT_TONE_FREQUENCY (V4L2_CID_FM_TX_CLASS_BASE + 98)
1049
1050#define V4L2_CID_TUNE_PREEMPHASIS (V4L2_CID_FM_TX_CLASS_BASE + 112)
1051enum v4l2_preemphasis {
1052 V4L2_PREEMPHASIS_DISABLED = 0,
1053 V4L2_PREEMPHASIS_50_uS = 1,
1054 V4L2_PREEMPHASIS_75_uS = 2,
1055};
1056#define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113)
1057#define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114)
1058
1059
1060/* Flash and privacy (indicator) light controls */
1061
1062#define V4L2_CID_FLASH_CLASS_BASE (V4L2_CTRL_CLASS_FLASH | 0x900)
1063#define V4L2_CID_FLASH_CLASS (V4L2_CTRL_CLASS_FLASH | 1)
1064
1065#define V4L2_CID_FLASH_LED_MODE (V4L2_CID_FLASH_CLASS_BASE + 1)
1066enum v4l2_flash_led_mode {
1067 V4L2_FLASH_LED_MODE_NONE,
1068 V4L2_FLASH_LED_MODE_FLASH,
1069 V4L2_FLASH_LED_MODE_TORCH,
1070};
1071
1072#define V4L2_CID_FLASH_STROBE_SOURCE (V4L2_CID_FLASH_CLASS_BASE + 2)
1073enum v4l2_flash_strobe_source {
1074 V4L2_FLASH_STROBE_SOURCE_SOFTWARE,
1075 V4L2_FLASH_STROBE_SOURCE_EXTERNAL,
1076};
1077
1078#define V4L2_CID_FLASH_STROBE (V4L2_CID_FLASH_CLASS_BASE + 3)
1079#define V4L2_CID_FLASH_STROBE_STOP (V4L2_CID_FLASH_CLASS_BASE + 4)
1080#define V4L2_CID_FLASH_STROBE_STATUS (V4L2_CID_FLASH_CLASS_BASE + 5)
1081
1082#define V4L2_CID_FLASH_TIMEOUT (V4L2_CID_FLASH_CLASS_BASE + 6)
1083#define V4L2_CID_FLASH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 7)
1084#define V4L2_CID_FLASH_TORCH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 8)
1085#define V4L2_CID_FLASH_INDICATOR_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 9)
1086
1087#define V4L2_CID_FLASH_FAULT (V4L2_CID_FLASH_CLASS_BASE + 10)
1088#define V4L2_FLASH_FAULT_OVER_VOLTAGE (1 << 0)
1089#define V4L2_FLASH_FAULT_TIMEOUT (1 << 1)
1090#define V4L2_FLASH_FAULT_OVER_TEMPERATURE (1 << 2)
1091#define V4L2_FLASH_FAULT_SHORT_CIRCUIT (1 << 3)
1092#define V4L2_FLASH_FAULT_OVER_CURRENT (1 << 4)
1093#define V4L2_FLASH_FAULT_INDICATOR (1 << 5)
935aa6b2
DJ		 1094#define V4L2_FLASH_FAULT_UNDER_VOLTAGE (1 << 6)
1095#define V4L2_FLASH_FAULT_INPUT_VOLTAGE (1 << 7)
1096#define V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE (1 << 8)
8e19b347
HV		 1097
1098#define V4L2_CID_FLASH_CHARGE (V4L2_CID_FLASH_CLASS_BASE + 11)
1099#define V4L2_CID_FLASH_READY (V4L2_CID_FLASH_CLASS_BASE + 12)
1100
1101
1102/* JPEG-class control IDs */
1103
1104#define V4L2_CID_JPEG_CLASS_BASE (V4L2_CTRL_CLASS_JPEG | 0x900)
1105#define V4L2_CID_JPEG_CLASS (V4L2_CTRL_CLASS_JPEG | 1)
1106
1107#define V4L2_CID_JPEG_CHROMA_SUBSAMPLING (V4L2_CID_JPEG_CLASS_BASE + 1)
1108enum v4l2_jpeg_chroma_subsampling {
1109 V4L2_JPEG_CHROMA_SUBSAMPLING_444 = 0,
1110 V4L2_JPEG_CHROMA_SUBSAMPLING_422 = 1,
1111 V4L2_JPEG_CHROMA_SUBSAMPLING_420 = 2,
1112 V4L2_JPEG_CHROMA_SUBSAMPLING_411 = 3,
1113 V4L2_JPEG_CHROMA_SUBSAMPLING_410 = 4,
1114 V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY = 5,
1115};
1116#define V4L2_CID_JPEG_RESTART_INTERVAL (V4L2_CID_JPEG_CLASS_BASE + 2)
1117#define V4L2_CID_JPEG_COMPRESSION_QUALITY (V4L2_CID_JPEG_CLASS_BASE + 3)
1118
1119#define V4L2_CID_JPEG_ACTIVE_MARKER (V4L2_CID_JPEG_CLASS_BASE + 4)
1120#define V4L2_JPEG_ACTIVE_MARKER_APP0 (1 << 0)
1121#define V4L2_JPEG_ACTIVE_MARKER_APP1 (1 << 1)
1122#define V4L2_JPEG_ACTIVE_MARKER_COM (1 << 16)
1123#define V4L2_JPEG_ACTIVE_MARKER_DQT (1 << 17)
1124#define V4L2_JPEG_ACTIVE_MARKER_DHT (1 << 18)
1125
28718152 1126
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HV		 1127/* Image source controls */
1128#define V4L2_CID_IMAGE_SOURCE_CLASS_BASE (V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
1129#define V4L2_CID_IMAGE_SOURCE_CLASS (V4L2_CTRL_CLASS_IMAGE_SOURCE | 1)
1130
1131#define V4L2_CID_VBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 1)
1132#define V4L2_CID_HBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 2)
1133#define V4L2_CID_ANALOGUE_GAIN (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 3)
0fc87864
SA		 1134#define V4L2_CID_TEST_PATTERN_RED (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 4)
1135#define V4L2_CID_TEST_PATTERN_GREENR (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 5)
1136#define V4L2_CID_TEST_PATTERN_BLUE (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 6)
1137#define V4L2_CID_TEST_PATTERN_GREENB (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 7)
61fd036d 1138#define V4L2_CID_UNIT_CELL_SIZE (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 8)
a9c80593 1139#define V4L2_CID_NOTIFY_GAINS (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 9)
8e19b347
HV		 1140
1141
1142/* Image processing controls */
1143
1144#define V4L2_CID_IMAGE_PROC_CLASS_BASE (V4L2_CTRL_CLASS_IMAGE_PROC | 0x900)
1145#define V4L2_CID_IMAGE_PROC_CLASS (V4L2_CTRL_CLASS_IMAGE_PROC | 1)
1146
1147#define V4L2_CID_LINK_FREQ (V4L2_CID_IMAGE_PROC_CLASS_BASE + 1)
1148#define V4L2_CID_PIXEL_RATE (V4L2_CID_IMAGE_PROC_CLASS_BASE + 2)
5ebef0fb 1149#define V4L2_CID_TEST_PATTERN (V4L2_CID_IMAGE_PROC_CLASS_BASE + 3)
446e4125 1150#define V4L2_CID_DEINTERLACING_MODE (V4L2_CID_IMAGE_PROC_CLASS_BASE + 4)
e72cb0e7 1151#define V4L2_CID_DIGITAL_GAIN (V4L2_CID_IMAGE_PROC_CLASS_BASE + 5)
28718152
HV		 1152
1153/* DV-class control IDs defined by V4L2 */
1154#define V4L2_CID_DV_CLASS_BASE (V4L2_CTRL_CLASS_DV | 0x900)
1155#define V4L2_CID_DV_CLASS (V4L2_CTRL_CLASS_DV | 1)
1156
1157#define V4L2_CID_DV_TX_HOTPLUG (V4L2_CID_DV_CLASS_BASE + 1)
1158#define V4L2_CID_DV_TX_RXSENSE (V4L2_CID_DV_CLASS_BASE + 2)
1159#define V4L2_CID_DV_TX_EDID_PRESENT (V4L2_CID_DV_CLASS_BASE + 3)
1160#define V4L2_CID_DV_TX_MODE (V4L2_CID_DV_CLASS_BASE + 4)
1161enum v4l2_dv_tx_mode {
1162 V4L2_DV_TX_MODE_DVI_D = 0,
1163 V4L2_DV_TX_MODE_HDMI = 1,
1164};
1165#define V4L2_CID_DV_TX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 5)
1166enum v4l2_dv_rgb_range {
1167 V4L2_DV_RGB_RANGE_AUTO = 0,
1168 V4L2_DV_RGB_RANGE_LIMITED = 1,
1169 V4L2_DV_RGB_RANGE_FULL = 2,
1170};
1171
45cc29af
HV		 1172#define V4L2_CID_DV_TX_IT_CONTENT_TYPE (V4L2_CID_DV_CLASS_BASE + 6)
1173enum v4l2_dv_it_content_type {
1174 V4L2_DV_IT_CONTENT_TYPE_GRAPHICS = 0,
1175 V4L2_DV_IT_CONTENT_TYPE_PHOTO = 1,
1176 V4L2_DV_IT_CONTENT_TYPE_CINEMA = 2,
1177 V4L2_DV_IT_CONTENT_TYPE_GAME = 3,
1178 V4L2_DV_IT_CONTENT_TYPE_NO_ITC = 4,
1179};
1180
28718152
HV		 1181#define V4L2_CID_DV_RX_POWER_PRESENT (V4L2_CID_DV_CLASS_BASE + 100)
1182#define V4L2_CID_DV_RX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 101)
45cc29af 1183#define V4L2_CID_DV_RX_IT_CONTENT_TYPE (V4L2_CID_DV_CLASS_BASE + 102)
28718152 1184
aec330a8
AS		 1185#define V4L2_CID_FM_RX_CLASS_BASE (V4L2_CTRL_CLASS_FM_RX | 0x900)
1186#define V4L2_CID_FM_RX_CLASS (V4L2_CTRL_CLASS_FM_RX | 1)
1187
1188#define V4L2_CID_TUNE_DEEMPHASIS (V4L2_CID_FM_RX_CLASS_BASE + 1)
1189enum v4l2_deemphasis {
1190 V4L2_DEEMPHASIS_DISABLED = V4L2_PREEMPHASIS_DISABLED,
1191 V4L2_DEEMPHASIS_50_uS = V4L2_PREEMPHASIS_50_uS,
1192 V4L2_DEEMPHASIS_75_uS = V4L2_PREEMPHASIS_75_uS,
1193};
1194
1195#define V4L2_CID_RDS_RECEPTION (V4L2_CID_FM_RX_CLASS_BASE + 2)
9570a148
HV		 1196#define V4L2_CID_RDS_RX_PTY (V4L2_CID_FM_RX_CLASS_BASE + 3)
1197#define V4L2_CID_RDS_RX_PS_NAME (V4L2_CID_FM_RX_CLASS_BASE + 4)
1198#define V4L2_CID_RDS_RX_RADIO_TEXT (V4L2_CID_FM_RX_CLASS_BASE + 5)
1199#define V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT (V4L2_CID_FM_RX_CLASS_BASE + 6)
1200#define V4L2_CID_RDS_RX_TRAFFIC_PROGRAM (V4L2_CID_FM_RX_CLASS_BASE + 7)
1201#define V4L2_CID_RDS_RX_MUSIC_SPEECH (V4L2_CID_FM_RX_CLASS_BASE + 8)
aec330a8 1202
80807fad
AP		 1203#define V4L2_CID_RF_TUNER_CLASS_BASE (V4L2_CTRL_CLASS_RF_TUNER | 0x900)
1204#define V4L2_CID_RF_TUNER_CLASS (V4L2_CTRL_CLASS_RF_TUNER | 1)
1205
835b87c7
AP		 1206#define V4L2_CID_RF_TUNER_BANDWIDTH_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 11)
1207#define V4L2_CID_RF_TUNER_BANDWIDTH (V4L2_CID_RF_TUNER_CLASS_BASE + 12)
41018cb8 1208#define V4L2_CID_RF_TUNER_RF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 32)
835b87c7
AP		 1209#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 41)
1210#define V4L2_CID_RF_TUNER_LNA_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 42)
1211#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 51)
1212#define V4L2_CID_RF_TUNER_MIXER_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 52)
1213#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 61)
1214#define V4L2_CID_RF_TUNER_IF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 62)
9aa4357e 1215#define V4L2_CID_RF_TUNER_PLL_LOCK (V4L2_CID_RF_TUNER_CLASS_BASE + 91)
80807fad 1216
a77b4fc0
HV		 1217
1218/* Detection-class control IDs defined by V4L2 */
1219#define V4L2_CID_DETECT_CLASS_BASE (V4L2_CTRL_CLASS_DETECT | 0x900)
1220#define V4L2_CID_DETECT_CLASS (V4L2_CTRL_CLASS_DETECT | 1)
1221
1222#define V4L2_CID_DETECT_MD_MODE (V4L2_CID_DETECT_CLASS_BASE + 1)
1223enum v4l2_detect_md_mode {
1224 V4L2_DETECT_MD_MODE_DISABLED = 0,
1225 V4L2_DETECT_MD_MODE_GLOBAL = 1,
1226 V4L2_DETECT_MD_MODE_THRESHOLD_GRID = 2,
1227 V4L2_DETECT_MD_MODE_REGION_GRID = 3,
1228};
1229#define V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD (V4L2_CID_DETECT_CLASS_BASE + 2)
1230#define V4L2_CID_DETECT_MD_THRESHOLD_GRID (V4L2_CID_DETECT_CLASS_BASE + 3)
1231#define V4L2_CID_DETECT_MD_REGION_GRID (V4L2_CID_DETECT_CLASS_BASE + 4)
1232
008d2bd6
EG		 1233
1234/* Stateless CODECs controls */
1235#define V4L2_CID_CODEC_STATELESS_BASE (V4L2_CTRL_CLASS_CODEC_STATELESS | 0x900)
1236#define V4L2_CID_CODEC_STATELESS_CLASS (V4L2_CTRL_CLASS_CODEC_STATELESS | 1)
1237
46a309d2
EG		 1238#define V4L2_CID_STATELESS_H264_DECODE_MODE (V4L2_CID_CODEC_STATELESS_BASE + 0)
1239/**
1240 * enum v4l2_stateless_h264_decode_mode - Decoding mode
1241 *
1242 * @V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED: indicates that decoding
1243 * is performed one slice at a time. In this mode,
1244 * V4L2_CID_STATELESS_H264_SLICE_PARAMS must contain the parsed slice
1245 * parameters and the OUTPUT buffer must contain a single slice.
1246 * V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF feature is used
1247 * in order to support multislice frames.
1248 * @V4L2_STATELESS_H264_DECODE_MODE_FRAME_BASED: indicates that
1249 * decoding is performed per frame. The OUTPUT buffer must contain
1250 * all slices and also both fields. This mode is typically supported
1251 * by device drivers that are able to parse the slice(s) header(s)
1252 * in hardware. When this mode is selected,
1253 * V4L2_CID_STATELESS_H264_SLICE_PARAMS is not used.
1254 */
1255enum v4l2_stateless_h264_decode_mode {
1256 V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED,
1257 V4L2_STATELESS_H264_DECODE_MODE_FRAME_BASED,
1258};
1259
1260#define V4L2_CID_STATELESS_H264_START_CODE (V4L2_CID_CODEC_STATELESS_BASE + 1)
1261/**
1262 * enum v4l2_stateless_h264_start_code - Start code
1263 *
1264 * @V4L2_STATELESS_H264_START_CODE_NONE: slices are passed
1265 * to the driver without any start code.
1266 * @V4L2_STATELESS_H264_START_CODE_ANNEX_B: slices are passed
1267 * to the driver with an Annex B start code prefix
1268 * (legal start codes can be 3-bytes 0x000001 or 4-bytes 0x00000001).
1269 * This mode is typically supported by device drivers that parse
1270 * the start code in hardware.
1271 */
1272enum v4l2_stateless_h264_start_code {
1273 V4L2_STATELESS_H264_START_CODE_NONE,
1274 V4L2_STATELESS_H264_START_CODE_ANNEX_B,
1275};
1276
1277#define V4L2_H264_SPS_CONSTRAINT_SET0_FLAG 0x01
1278#define V4L2_H264_SPS_CONSTRAINT_SET1_FLAG 0x02
1279#define V4L2_H264_SPS_CONSTRAINT_SET2_FLAG 0x04
1280#define V4L2_H264_SPS_CONSTRAINT_SET3_FLAG 0x08
1281#define V4L2_H264_SPS_CONSTRAINT_SET4_FLAG 0x10
1282#define V4L2_H264_SPS_CONSTRAINT_SET5_FLAG 0x20
1283
1284#define V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE 0x01
1285#define V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS 0x02
1286#define V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO 0x04
1287#define V4L2_H264_SPS_FLAG_GAPS_IN_FRAME_NUM_VALUE_ALLOWED 0x08
1288#define V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY 0x10
1289#define V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD 0x20
1290#define V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE 0x40
1291
1292#define V4L2_H264_SPS_HAS_CHROMA_FORMAT(sps) \
1293 ((sps)->profile_idc == 100 || (sps)->profile_idc == 110 || \
1294 (sps)->profile_idc == 122 || (sps)->profile_idc == 244 || \
1295 (sps)->profile_idc == 44 || (sps)->profile_idc == 83 || \
1296 (sps)->profile_idc == 86 || (sps)->profile_idc == 118 || \
1297 (sps)->profile_idc == 128 || (sps)->profile_idc == 138 || \
1298 (sps)->profile_idc == 139 || (sps)->profile_idc == 134 || \
1299 (sps)->profile_idc == 135)
1300
1301#define V4L2_CID_STATELESS_H264_SPS (V4L2_CID_CODEC_STATELESS_BASE + 2)
1302/**
1303 * struct v4l2_ctrl_h264_sps - H264 sequence parameter set
1304 *
1305 * All the members on this sequence parameter set structure match the
1306 * sequence parameter set syntax as specified by the H264 specification.
1307 *
1308 * @profile_idc: see H264 specification.
1309 * @constraint_set_flags: see H264 specification.
1310 * @level_idc: see H264 specification.
1311 * @seq_parameter_set_id: see H264 specification.
1312 * @chroma_format_idc: see H264 specification.
1313 * @bit_depth_luma_minus8: see H264 specification.
1314 * @bit_depth_chroma_minus8: see H264 specification.
1315 * @log2_max_frame_num_minus4: see H264 specification.
1316 * @pic_order_cnt_type: see H264 specification.
1317 * @log2_max_pic_order_cnt_lsb_minus4: see H264 specification.
1318 * @max_num_ref_frames: see H264 specification.
1319 * @num_ref_frames_in_pic_order_cnt_cycle: see H264 specification.
1320 * @offset_for_ref_frame: see H264 specification.
1321 * @offset_for_non_ref_pic: see H264 specification.
1322 * @offset_for_top_to_bottom_field: see H264 specification.
1323 * @pic_width_in_mbs_minus1: see H264 specification.
1324 * @pic_height_in_map_units_minus1: see H264 specification.
1325 * @flags: see V4L2_H264_SPS_FLAG_{}.
1326 */
1327struct v4l2_ctrl_h264_sps {
1328 __u8 profile_idc;
1329 __u8 constraint_set_flags;
1330 __u8 level_idc;
1331 __u8 seq_parameter_set_id;
1332 __u8 chroma_format_idc;
1333 __u8 bit_depth_luma_minus8;
1334 __u8 bit_depth_chroma_minus8;
1335 __u8 log2_max_frame_num_minus4;
1336 __u8 pic_order_cnt_type;
1337 __u8 log2_max_pic_order_cnt_lsb_minus4;
1338 __u8 max_num_ref_frames;
1339 __u8 num_ref_frames_in_pic_order_cnt_cycle;
1340 __s32 offset_for_ref_frame[255];
1341 __s32 offset_for_non_ref_pic;
1342 __s32 offset_for_top_to_bottom_field;
1343 __u16 pic_width_in_mbs_minus1;
1344 __u16 pic_height_in_map_units_minus1;
1345 __u32 flags;
1346};
1347
1348#define V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE 0x0001
1349#define V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT 0x0002
1350#define V4L2_H264_PPS_FLAG_WEIGHTED_PRED 0x0004
1351#define V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT 0x0008
1352#define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED 0x0010
1353#define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT 0x0020
1354#define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE 0x0040
1355#define V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT 0x0080
1356
1357#define V4L2_CID_STATELESS_H264_PPS (V4L2_CID_CODEC_STATELESS_BASE + 3)
1358/**
1359 * struct v4l2_ctrl_h264_pps - H264 picture parameter set
1360 *
1361 * Except where noted, all the members on this picture parameter set
bcbe55dc 1362 * structure match the picture parameter set syntax as specified
46a309d2
EG		 1363 * by the H264 specification.
1364 *
1365 * In particular, V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT flag
1366 * has a specific meaning. This flag should be set if a non-flat
1367 * scaling matrix applies to the picture. In this case, applications
1368 * are expected to use V4L2_CID_STATELESS_H264_SCALING_MATRIX,
1369 * to pass the values of the non-flat matrices.
1370 *
1371 * @pic_parameter_set_id: see H264 specification.
1372 * @seq_parameter_set_id: see H264 specification.
1373 * @num_slice_groups_minus1: see H264 specification.
1374 * @num_ref_idx_l0_default_active_minus1: see H264 specification.
1375 * @num_ref_idx_l1_default_active_minus1: see H264 specification.
1376 * @weighted_bipred_idc: see H264 specification.
1377 * @pic_init_qp_minus26: see H264 specification.
1378 * @pic_init_qs_minus26: see H264 specification.
1379 * @chroma_qp_index_offset: see H264 specification.
1380 * @second_chroma_qp_index_offset: see H264 specification.
1381 * @flags: see V4L2_H264_PPS_FLAG_{}.
1382 */
1383struct v4l2_ctrl_h264_pps {
1384 __u8 pic_parameter_set_id;
1385 __u8 seq_parameter_set_id;
1386 __u8 num_slice_groups_minus1;
1387 __u8 num_ref_idx_l0_default_active_minus1;
1388 __u8 num_ref_idx_l1_default_active_minus1;
1389 __u8 weighted_bipred_idc;
1390 __s8 pic_init_qp_minus26;
1391 __s8 pic_init_qs_minus26;
1392 __s8 chroma_qp_index_offset;
1393 __s8 second_chroma_qp_index_offset;
1394 __u16 flags;
1395};
1396
1397#define V4L2_CID_STATELESS_H264_SCALING_MATRIX (V4L2_CID_CODEC_STATELESS_BASE + 4)
1398/**
1399 * struct v4l2_ctrl_h264_scaling_matrix - H264 scaling matrices
1400 *
1401 * @scaling_list_4x4: scaling matrix after applying the inverse
1402 * scanning process. Expected list order is Intra Y, Intra Cb,
1403 * Intra Cr, Inter Y, Inter Cb, Inter Cr. The values on each
1404 * scaling list are expected in raster scan order.
1405 * @scaling_list_8x8: scaling matrix after applying the inverse
1406 * scanning process. Expected list order is Intra Y, Inter Y,
1407 * Intra Cb, Inter Cb, Intra Cr, Inter Cr. The values on each
1408 * scaling list are expected in raster scan order.
1409 *
1410 * Note that the list order is different for the 4x4 and 8x8
1411 * matrices as per the H264 specification, see table 7-2 "Assignment
1412 * of mnemonic names to scaling list indices and specification of
1413 * fall-back rule".
1414 */
1415struct v4l2_ctrl_h264_scaling_matrix {
1416 __u8 scaling_list_4x4[6][16];
1417 __u8 scaling_list_8x8[6][64];
1418};
1419
1420struct v4l2_h264_weight_factors {
1421 __s16 luma_weight[32];
1422 __s16 luma_offset[32];
1423 __s16 chroma_weight[32][2];
1424 __s16 chroma_offset[32][2];
1425};
1426
1427#define V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice) \
1428 ((((pps)->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) && \
1429 ((slice)->slice_type == V4L2_H264_SLICE_TYPE_P || \
1430 (slice)->slice_type == V4L2_H264_SLICE_TYPE_SP)) || \
1431 ((pps)->weighted_bipred_idc == 1 && \
1432 (slice)->slice_type == V4L2_H264_SLICE_TYPE_B))
1433
1434#define V4L2_CID_STATELESS_H264_PRED_WEIGHTS (V4L2_CID_CODEC_STATELESS_BASE + 5)
1435/**
1436 * struct v4l2_ctrl_h264_pred_weights - Prediction weight table
1437 *
1438 * Prediction weight table, which matches the syntax specified
1439 * by the H264 specification.
1440 *
1441 * @luma_log2_weight_denom: see H264 specification.
1442 * @chroma_log2_weight_denom: see H264 specification.
1443 * @weight_factors: luma and chroma weight factors.
1444 */
1445struct v4l2_ctrl_h264_pred_weights {
1446 __u16 luma_log2_weight_denom;
1447 __u16 chroma_log2_weight_denom;
1448 struct v4l2_h264_weight_factors weight_factors[2];
1449};
1450
1451#define V4L2_H264_SLICE_TYPE_P 0
1452#define V4L2_H264_SLICE_TYPE_B 1
1453#define V4L2_H264_SLICE_TYPE_I 2
1454#define V4L2_H264_SLICE_TYPE_SP 3
1455#define V4L2_H264_SLICE_TYPE_SI 4
1456
1457#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x01
1458#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x02
1459
1460#define V4L2_H264_TOP_FIELD_REF 0x1
1461#define V4L2_H264_BOTTOM_FIELD_REF 0x2
1462#define V4L2_H264_FRAME_REF 0x3
1463
1464/**
1465 * struct v4l2_h264_reference - H264 picture reference
1466 *
1467 * @fields: indicates how the picture is referenced.
1468 * Valid values are V4L2_H264_{}_REF.
1469 * @index: index into v4l2_ctrl_h264_decode_params.dpb[].
1470 */
1471struct v4l2_h264_reference {
1472 __u8 fields;
1473 __u8 index;
1474};
1475
1476/*
1477 * Maximum DPB size, as specified by section 'A.3.1 Level limits
1478 * common to the Baseline, Main, and Extended profiles'.
1479 */
1480#define V4L2_H264_NUM_DPB_ENTRIES 16
1481#define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES)
1482
1483#define V4L2_CID_STATELESS_H264_SLICE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 6)
1484/**
1485 * struct v4l2_ctrl_h264_slice_params - H264 slice parameters
1486 *
1487 * This structure holds the H264 syntax elements that are specified
1488 * as non-invariant for the slices in a given frame.
1489 *
1490 * Slice invariant syntax elements are contained in struct
1491 * v4l2_ctrl_h264_decode_params. This is done to reduce the API surface
1492 * on frame-based decoders, where slice header parsing is done by the
1493 * hardware.
1494 *
1495 * Slice invariant syntax elements are specified in specification section
1496 * "7.4.3 Slice header semantics".
1497 *
1498 * Except where noted, the members on this struct match the slice header syntax.
1499 *
1500 * @header_bit_size: offset in bits to slice_data() from the beginning of this slice.
1501 * @first_mb_in_slice: see H264 specification.
1502 * @slice_type: see H264 specification.
1503 * @colour_plane_id: see H264 specification.
1504 * @redundant_pic_cnt: see H264 specification.
1505 * @cabac_init_idc: see H264 specification.
1506 * @slice_qp_delta: see H264 specification.
1507 * @slice_qs_delta: see H264 specification.
1508 * @disable_deblocking_filter_idc: see H264 specification.
1509 * @slice_alpha_c0_offset_div2: see H264 specification.
1510 * @slice_beta_offset_div2: see H264 specification.
1511 * @num_ref_idx_l0_active_minus1: see H264 specification.
1512 * @num_ref_idx_l1_active_minus1: see H264 specification.
1513 * @reserved: padding field. Should be zeroed by applications.
1514 * @ref_pic_list0: reference picture list 0 after applying the per-slice modifications.
1515 * @ref_pic_list1: reference picture list 1 after applying the per-slice modifications.
1516 * @flags: see V4L2_H264_SLICE_FLAG_{}.
1517 */
1518struct v4l2_ctrl_h264_slice_params {
1519 __u32 header_bit_size;
1520 __u32 first_mb_in_slice;
1521 __u8 slice_type;
1522 __u8 colour_plane_id;
1523 __u8 redundant_pic_cnt;
1524 __u8 cabac_init_idc;
1525 __s8 slice_qp_delta;
1526 __s8 slice_qs_delta;
1527 __u8 disable_deblocking_filter_idc;
1528 __s8 slice_alpha_c0_offset_div2;
1529 __s8 slice_beta_offset_div2;
1530 __u8 num_ref_idx_l0_active_minus1;
1531 __u8 num_ref_idx_l1_active_minus1;
1532
1533 __u8 reserved;
1534
1535 struct v4l2_h264_reference ref_pic_list0[V4L2_H264_REF_LIST_LEN];
1536 struct v4l2_h264_reference ref_pic_list1[V4L2_H264_REF_LIST_LEN];
1537
1538 __u32 flags;
1539};
1540
1541#define V4L2_H264_DPB_ENTRY_FLAG_VALID 0x01
1542#define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE 0x02
1543#define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM 0x04
1544#define V4L2_H264_DPB_ENTRY_FLAG_FIELD 0x08
1545
1546/**
1547 * struct v4l2_h264_dpb_entry - H264 decoded picture buffer entry
1548 *
1549 * @reference_ts: timestamp of the V4L2 capture buffer to use as reference.
1550 * The timestamp refers to the timestamp field in struct v4l2_buffer.
1551 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
1552 * @pic_num: matches PicNum variable assigned during the reference
1553 * picture lists construction process.
1554 * @frame_num: frame identifier which matches frame_num syntax element.
1555 * @fields: indicates how the DPB entry is referenced. Valid values are
1556 * V4L2_H264_{}_REF.
1557 * @reserved: padding field. Should be zeroed by applications.
1558 * @top_field_order_cnt: matches TopFieldOrderCnt picture value.
1559 * @bottom_field_order_cnt: matches BottomFieldOrderCnt picture value.
1560 * Note that picture field is indicated by v4l2_buffer.field.
1561 * @flags: see V4L2_H264_DPB_ENTRY_FLAG_{}.
1562 */
1563struct v4l2_h264_dpb_entry {
1564 __u64 reference_ts;
1565 __u32 pic_num;
1566 __u16 frame_num;
1567 __u8 fields;
1568 __u8 reserved[5];
1569 __s32 top_field_order_cnt;
1570 __s32 bottom_field_order_cnt;
1571 __u32 flags;
1572};
1573
1574#define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01
1575#define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02
1576#define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04
96ba61ee
DO		 1577#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08
1578#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10
46a309d2
EG		 1579
1580#define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7)
1581/**
1582 * struct v4l2_ctrl_h264_decode_params - H264 decoding parameters
1583 *
1584 * @dpb: decoded picture buffer.
1585 * @nal_ref_idc: slice header syntax element.
1586 * @frame_num: slice header syntax element.
1587 * @top_field_order_cnt: matches TopFieldOrderCnt picture value.
1588 * @bottom_field_order_cnt: matches BottomFieldOrderCnt picture value.
1589 * Note that picture field is indicated by v4l2_buffer.field.
1590 * @idr_pic_id: slice header syntax element.
1591 * @pic_order_cnt_lsb: slice header syntax element.
1592 * @delta_pic_order_cnt_bottom: slice header syntax element.
1593 * @delta_pic_order_cnt0: slice header syntax element.
1594 * @delta_pic_order_cnt1: slice header syntax element.
1595 * @dec_ref_pic_marking_bit_size: size in bits of dec_ref_pic_marking()
1596 * syntax element.
1597 * @pic_order_cnt_bit_size: size in bits of pic order count syntax.
1598 * @slice_group_change_cycle: slice header syntax element.
1599 * @reserved: padding field. Should be zeroed by applications.
1600 * @flags: see V4L2_H264_DECODE_PARAM_FLAG_{}.
1601 */
1602struct v4l2_ctrl_h264_decode_params {
1603 struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES];
1604 __u16 nal_ref_idc;
1605 __u16 frame_num;
1606 __s32 top_field_order_cnt;
1607 __s32 bottom_field_order_cnt;
1608 __u16 idr_pic_id;
1609 __u16 pic_order_cnt_lsb;
1610 __s32 delta_pic_order_cnt_bottom;
1611 __s32 delta_pic_order_cnt0;
1612 __s32 delta_pic_order_cnt1;
1613 __u32 dec_ref_pic_marking_bit_size;
1614 __u32 pic_order_cnt_bit_size;
1615 __u32 slice_group_change_cycle;
1616
1617 __u32 reserved;
1618 __u32 flags;
1619};
1620
008d2bd6 1621
206bc0f6
HV		 1622/* Stateless FWHT control, used by the vicodec driver */
1623
1624/* Current FWHT version */
1625#define V4L2_FWHT_VERSION 3
1626
1627/* Set if this is an interlaced format */
ce67eaca 1628#define V4L2_FWHT_FL_IS_INTERLACED _BITUL(0)
206bc0f6 1629/* Set if this is a bottom-first (NTSC) interlaced format */
ce67eaca 1630#define V4L2_FWHT_FL_IS_BOTTOM_FIRST _BITUL(1)
206bc0f6 1631/* Set if each 'frame' contains just one field */
ce67eaca 1632#define V4L2_FWHT_FL_IS_ALTERNATE _BITUL(2)
206bc0f6
HV		 1633/*
1634 * If V4L2_FWHT_FL_IS_ALTERNATE was set, then this is set if this
1635 * 'frame' is the bottom field, else it is the top field.
1636 */
ce67eaca 1637#define V4L2_FWHT_FL_IS_BOTTOM_FIELD _BITUL(3)
206bc0f6 1638/* Set if the Y' plane is uncompressed */
ce67eaca 1639#define V4L2_FWHT_FL_LUMA_IS_UNCOMPRESSED _BITUL(4)
206bc0f6 1640/* Set if the Cb plane is uncompressed */
ce67eaca 1641#define V4L2_FWHT_FL_CB_IS_UNCOMPRESSED _BITUL(5)
206bc0f6 1642/* Set if the Cr plane is uncompressed */
ce67eaca 1643#define V4L2_FWHT_FL_CR_IS_UNCOMPRESSED _BITUL(6)
206bc0f6 1644/* Set if the chroma plane is full height, if cleared it is half height */
ce67eaca 1645#define V4L2_FWHT_FL_CHROMA_FULL_HEIGHT _BITUL(7)
206bc0f6 1646/* Set if the chroma plane is full width, if cleared it is half width */
ce67eaca 1647#define V4L2_FWHT_FL_CHROMA_FULL_WIDTH _BITUL(8)
206bc0f6 1648/* Set if the alpha plane is uncompressed */
ce67eaca 1649#define V4L2_FWHT_FL_ALPHA_IS_UNCOMPRESSED _BITUL(9)
206bc0f6 1650/* Set if this is an I Frame */
ce67eaca 1651#define V4L2_FWHT_FL_I_FRAME _BITUL(10)
206bc0f6
HV		 1652
1653/* A 4-values flag - the number of components - 1 */
1654#define V4L2_FWHT_FL_COMPONENTS_NUM_MSK GENMASK(18, 16)
1655#define V4L2_FWHT_FL_COMPONENTS_NUM_OFFSET 16
1656
1657/* A 4-values flag - the pixel encoding type */
1658#define V4L2_FWHT_FL_PIXENC_MSK GENMASK(20, 19)
1659#define V4L2_FWHT_FL_PIXENC_OFFSET 19
1660#define V4L2_FWHT_FL_PIXENC_YUV (1 << V4L2_FWHT_FL_PIXENC_OFFSET)
1661#define V4L2_FWHT_FL_PIXENC_RGB (2 << V4L2_FWHT_FL_PIXENC_OFFSET)
1662#define V4L2_FWHT_FL_PIXENC_HSV (3 << V4L2_FWHT_FL_PIXENC_OFFSET)
1663
1664#define V4L2_CID_STATELESS_FWHT_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 100)
1665/**
1666 * struct v4l2_ctrl_fwht_params - FWHT parameters
1667 *
1668 * @backward_ref_ts: timestamp of the V4L2 capture buffer to use as reference.
1669 * The timestamp refers to the timestamp field in struct v4l2_buffer.
1670 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
1671 * @version: must be V4L2_FWHT_VERSION.
1672 * @width: width of frame.
1673 * @height: height of frame.
1674 * @flags: FWHT flags (see V4L2_FWHT_FL_*).
1675 * @colorspace: the colorspace (enum v4l2_colorspace).
1676 * @xfer_func: the transfer function (enum v4l2_xfer_func).
1677 * @ycbcr_enc: the Y'CbCr encoding (enum v4l2_ycbcr_encoding).
1678 * @quantization: the quantization (enum v4l2_quantization).
1679 */
1680struct v4l2_ctrl_fwht_params {
1681 __u64 backward_ref_ts;
1682 __u32 version;
1683 __u32 width;
1684 __u32 height;
1685 __u32 flags;
1686 __u32 colorspace;
1687 __u32 xfer_func;
1688 __u32 ycbcr_enc;
1689 __u32 quantization;
1690};
1691
363240ce
EG		 1692/* Stateless VP8 control */
1693
1694#define V4L2_VP8_SEGMENT_FLAG_ENABLED 0x01
1695#define V4L2_VP8_SEGMENT_FLAG_UPDATE_MAP 0x02
1696#define V4L2_VP8_SEGMENT_FLAG_UPDATE_FEATURE_DATA 0x04
1697#define V4L2_VP8_SEGMENT_FLAG_DELTA_VALUE_MODE 0x08
1698
1699/**
1700 * struct v4l2_vp8_segment - VP8 segment-based adjustments parameters
1701 *
1702 * @quant_update: update values for the segment quantizer.
1703 * @lf_update: update values for the loop filter level.
1704 * @segment_probs: branch probabilities of the segment_id decoding tree.
1705 * @padding: padding field. Should be zeroed by applications.
1706 * @flags: see V4L2_VP8_SEGMENT_FLAG_{}.
1707 *
1708 * This structure contains segment-based adjustments related parameters.
1709 * See the 'update_segmentation()' part of the frame header syntax,
1710 * and section '9.3. Segment-Based Adjustments' of the VP8 specification
1711 * for more details.
1712 */
1713struct v4l2_vp8_segment {
1714 __s8 quant_update[4];
1715 __s8 lf_update[4];
1716 __u8 segment_probs[3];
1717 __u8 padding;
1718 __u32 flags;
1719};
1720
1721#define V4L2_VP8_LF_ADJ_ENABLE 0x01
1722#define V4L2_VP8_LF_DELTA_UPDATE 0x02
1723#define V4L2_VP8_LF_FILTER_TYPE_SIMPLE 0x04
1724
1725/**
1726 * struct v4l2_vp8_loop_filter - VP8 loop filter parameters
1727 *
1728 * @ref_frm_delta: Reference frame signed delta values.
1729 * @mb_mode_delta: MB prediction mode signed delta values.
1730 * @sharpness_level: matches sharpness_level syntax element.
1731 * @level: matches loop_filter_level syntax element.
1732 * @padding: padding field. Should be zeroed by applications.
1733 * @flags: see V4L2_VP8_LF_FLAG_{}.
1734 *
1735 * This structure contains loop filter related parameters.
1736 * See the 'mb_lf_adjustments()' part of the frame header syntax,
1737 * and section '9.4. Loop Filter Type and Levels' of the VP8 specification
1738 * for more details.
1739 */
1740struct v4l2_vp8_loop_filter {
1741 __s8 ref_frm_delta[4];
1742 __s8 mb_mode_delta[4];
1743 __u8 sharpness_level;
1744 __u8 level;
1745 __u16 padding;
1746 __u32 flags;
1747};
1748
1749/**
1750 * struct v4l2_vp8_quantization - VP8 quantizattion indices
1751 *
1752 * @y_ac_qi: luma AC coefficient table index.
1753 * @y_dc_delta: luma DC delta vaue.
1754 * @y2_dc_delta: y2 block DC delta value.
1755 * @y2_ac_delta: y2 block AC delta value.
1756 * @uv_dc_delta: chroma DC delta value.
1757 * @uv_ac_delta: chroma AC delta value.
1758 * @padding: padding field. Should be zeroed by applications.
e6a7d7c3 1759 *
363240ce
EG		 1760 * This structure contains the quantization indices present
1761 * in 'quant_indices()' part of the frame header syntax.
1762 * See section '9.6. Dequantization Indices' of the VP8 specification
1763 * for more details.
1764 */
1765struct v4l2_vp8_quantization {
1766 __u8 y_ac_qi;
1767 __s8 y_dc_delta;
1768 __s8 y2_dc_delta;
1769 __s8 y2_ac_delta;
1770 __s8 uv_dc_delta;
1771 __s8 uv_ac_delta;
1772 __u16 padding;
1773};
1774
1775#define V4L2_VP8_COEFF_PROB_CNT 11
1776#define V4L2_VP8_MV_PROB_CNT 19
1777
1778/**
1779 * struct v4l2_vp8_entropy - VP8 update probabilities
1780 *
1781 * @coeff_probs: coefficient probability update values.
1782 * @y_mode_probs: luma intra-prediction probabilities.
1783 * @uv_mode_probs: chroma intra-prediction probabilities.
1784 * @mv_probs: mv decoding probability.
1785 * @padding: padding field. Should be zeroed by applications.
1786 *
1787 * This structure contains the update probabilities present in
1788 * 'token_prob_update()' and 'mv_prob_update()' part of the frame header.
1789 * See section '17.2. Probability Updates' of the VP8 specification
1790 * for more details.
1791 */
1792struct v4l2_vp8_entropy {
1793 __u8 coeff_probs[4][8][3][V4L2_VP8_COEFF_PROB_CNT];
1794 __u8 y_mode_probs[4];
1795 __u8 uv_mode_probs[3];
1796 __u8 mv_probs[2][V4L2_VP8_MV_PROB_CNT];
1797 __u8 padding[3];
1798};
1799
1800/**
1801 * struct v4l2_vp8_entropy_coder_state - VP8 boolean coder state
1802 *
1803 * @range: coder state value for "Range"
1804 * @value: coder state value for "Value"
1805 * @bit_count: number of bits left in range "Value".
1806 * @padding: padding field. Should be zeroed by applications.
1807 *
1808 * This structure contains the state for the boolean coder, as
1809 * explained in section '7. Boolean Entropy Decoder' of the VP8 specification.
1810 */
1811struct v4l2_vp8_entropy_coder_state {
1812 __u8 range;
1813 __u8 value;
1814 __u8 bit_count;
1815 __u8 padding;
1816};
1817
1818#define V4L2_VP8_FRAME_FLAG_KEY_FRAME 0x01
1819#define V4L2_VP8_FRAME_FLAG_EXPERIMENTAL 0x02
1820#define V4L2_VP8_FRAME_FLAG_SHOW_FRAME 0x04
1821#define V4L2_VP8_FRAME_FLAG_MB_NO_SKIP_COEFF 0x08
1822#define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN 0x10
1823#define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT 0x20
1824
1825#define V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) \
1826 (!!((hdr)->flags & V4L2_VP8_FRAME_FLAG_KEY_FRAME))
1827
1828#define V4L2_CID_STATELESS_VP8_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 200)
1829/**
e6a7d7c3 1830 * struct v4l2_ctrl_vp8_frame - VP8 frame parameters
363240ce 1831 *
e6a7d7c3 1832 * @segment: segmentation parameters. See &v4l2_vp8_segment for more details
363240ce
EG		 1833 * @lf: loop filter parameters. See &v4l2_vp8_loop_filter for more details
1834 * @quant: quantization parameters. See &v4l2_vp8_quantization for more details
e6a7d7c3
EG		 1835 * @entropy: update probabilities. See &v4l2_vp8_entropy for more details
1836 * @coder_state: boolean coder state. See &v4l2_vp8_entropy_coder_state for more details
363240ce
EG		 1837 * @width: frame width.
1838 * @height: frame height.
1839 * @horizontal_scale: horizontal scaling factor.
1840 * @vertical_scale: vertical scaling factor.
1841 * @version: bitstream version.
1842 * @prob_skip_false: frame header syntax element.
1843 * @prob_intra: frame header syntax element.
1844 * @prob_last: frame header syntax element.
1845 * @prob_gf: frame header syntax element.
1846 * @num_dct_parts: number of DCT coefficients partitions.
1847 * @first_part_size: size of the first partition, i.e. the control partition.
1848 * @first_part_header_bits: size in bits of the first partition header portion.
1849 * @dct_part_sizes: DCT coefficients sizes.
1850 * @last_frame_ts: "last" reference buffer timestamp.
1851 * The timestamp refers to the timestamp field in struct v4l2_buffer.
1852 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
1853 * @golden_frame_ts: "golden" reference buffer timestamp.
1854 * @alt_frame_ts: "alt" reference buffer timestamp.
1855 * @flags: see V4L2_VP8_FRAME_FLAG_{}.
1856 */
1857struct v4l2_ctrl_vp8_frame {
1858 struct v4l2_vp8_segment segment;
1859 struct v4l2_vp8_loop_filter lf;
1860 struct v4l2_vp8_quantization quant;
1861 struct v4l2_vp8_entropy entropy;
1862 struct v4l2_vp8_entropy_coder_state coder_state;
1863
1864 __u16 width;
1865 __u16 height;
1866
1867 __u8 horizontal_scale;
1868 __u8 vertical_scale;
1869
1870 __u8 version;
1871 __u8 prob_skip_false;
1872 __u8 prob_intra;
1873 __u8 prob_last;
1874 __u8 prob_gf;
1875 __u8 num_dct_parts;
1876
1877 __u32 first_part_size;
1878 __u32 first_part_header_bits;
1879 __u32 dct_part_sizes[8];
1880
1881 __u64 last_frame_ts;
1882 __u64 golden_frame_ts;
1883 __u64 alt_frame_ts;
1884
1885 __u64 flags;
1886};
1887
f4815b39
EG		 1888/* Stateless MPEG-2 controls */
1889
1890#define V4L2_MPEG2_SEQ_FLAG_PROGRESSIVE 0x01
1891
1892#define V4L2_CID_STATELESS_MPEG2_SEQUENCE (V4L2_CID_CODEC_STATELESS_BASE+220)
1893/**
1894 * struct v4l2_ctrl_mpeg2_sequence - MPEG-2 sequence header
1895 *
1896 * All the members on this structure match the sequence header and sequence
1897 * extension syntaxes as specified by the MPEG-2 specification.
1898 *
1899 * Fields horizontal_size, vertical_size and vbv_buffer_size are a
1900 * combination of respective _value and extension syntax elements,
1901 * as described in section 6.3.3 "Sequence header".
1902 *
1903 * @horizontal_size: combination of elements horizontal_size_value and
1904 * horizontal_size_extension.
1905 * @vertical_size: combination of elements vertical_size_value and
1906 * vertical_size_extension.
1907 * @vbv_buffer_size: combination of elements vbv_buffer_size_value and
1908 * vbv_buffer_size_extension.
1909 * @profile_and_level_indication: see MPEG-2 specification.
1910 * @chroma_format: see MPEG-2 specification.
1911 * @flags: see V4L2_MPEG2_SEQ_FLAG_{}.
1912 */
1913struct v4l2_ctrl_mpeg2_sequence {
1914 __u16 horizontal_size;
1915 __u16 vertical_size;
1916 __u32 vbv_buffer_size;
1917 __u16 profile_and_level_indication;
1918 __u8 chroma_format;
1919 __u8 flags;
1920};
1921
1922#define V4L2_MPEG2_PIC_CODING_TYPE_I 1
1923#define V4L2_MPEG2_PIC_CODING_TYPE_P 2
1924#define V4L2_MPEG2_PIC_CODING_TYPE_B 3
1925#define V4L2_MPEG2_PIC_CODING_TYPE_D 4
1926
1927#define V4L2_MPEG2_PIC_TOP_FIELD 0x1
1928#define V4L2_MPEG2_PIC_BOTTOM_FIELD 0x2
1929#define V4L2_MPEG2_PIC_FRAME 0x3
1930
1931#define V4L2_MPEG2_PIC_FLAG_TOP_FIELD_FIRST 0x0001
1932#define V4L2_MPEG2_PIC_FLAG_FRAME_PRED_DCT 0x0002
1933#define V4L2_MPEG2_PIC_FLAG_CONCEALMENT_MV 0x0004
1934#define V4L2_MPEG2_PIC_FLAG_Q_SCALE_TYPE 0x0008
1935#define V4L2_MPEG2_PIC_FLAG_INTRA_VLC 0x0010
1936#define V4L2_MPEG2_PIC_FLAG_ALT_SCAN 0x0020
1937#define V4L2_MPEG2_PIC_FLAG_REPEAT_FIRST 0x0040
1938#define V4L2_MPEG2_PIC_FLAG_PROGRESSIVE 0x0080
1939
1940#define V4L2_CID_STATELESS_MPEG2_PICTURE (V4L2_CID_CODEC_STATELESS_BASE+221)
1941/**
1942 * struct v4l2_ctrl_mpeg2_picture - MPEG-2 picture header
1943 *
1944 * All the members on this structure match the picture header and picture
1945 * coding extension syntaxes as specified by the MPEG-2 specification.
1946 *
1947 * @backward_ref_ts: timestamp of the V4L2 capture buffer to use as
1948 * reference for backward prediction.
1949 * @forward_ref_ts: timestamp of the V4L2 capture buffer to use as
1950 * reference for forward prediction. These timestamp refers to the
1951 * timestamp field in struct v4l2_buffer. Use v4l2_timeval_to_ns()
1952 * to convert the struct timeval to a __u64.
1953 * @flags: see V4L2_MPEG2_PIC_FLAG_{}.
1954 * @f_code: see MPEG-2 specification.
1955 * @picture_coding_type: see MPEG-2 specification.
1956 * @picture_structure: see V4L2_MPEG2_PIC_{}_FIELD.
1957 * @intra_dc_precision: see MPEG-2 specification.
1958 * @reserved: padding field. Should be zeroed by applications.
1959 */
1960struct v4l2_ctrl_mpeg2_picture {
1961 __u64 backward_ref_ts;
1962 __u64 forward_ref_ts;
1963 __u32 flags;
1964 __u8 f_code[2][2];
1965 __u8 picture_coding_type;
1966 __u8 picture_structure;
1967 __u8 intra_dc_precision;
1968 __u8 reserved[5];
1969};
1970
1971#define V4L2_CID_STATELESS_MPEG2_QUANTISATION (V4L2_CID_CODEC_STATELESS_BASE+222)
1972/**
1973 * struct v4l2_ctrl_mpeg2_quantisation - MPEG-2 quantisation
1974 *
1975 * Quantisation matrices as specified by section 6.3.7
1976 * "Quant matrix extension".
1977 *
1978 * @intra_quantiser_matrix: The quantisation matrix coefficients
1979 * for intra-coded frames, in zigzag scanning order. It is relevant
1980 * for both luma and chroma components, although it can be superseded
1981 * by the chroma-specific matrix for non-4:2:0 YUV formats.
1982 * @non_intra_quantiser_matrix: The quantisation matrix coefficients
1983 * for non-intra-coded frames, in zigzag scanning order. It is relevant
1984 * for both luma and chroma components, although it can be superseded
1985 * by the chroma-specific matrix for non-4:2:0 YUV formats.
1986 * @chroma_intra_quantiser_matrix: The quantisation matrix coefficients
1987 * for the chominance component of intra-coded frames, in zigzag scanning
1988 * order. Only relevant for 4:2:2 and 4:4:4 YUV formats.
1989 * @chroma_non_intra_quantiser_matrix: The quantisation matrix coefficients
1990 * for the chrominance component of non-intra-coded frames, in zigzag scanning
1991 * order. Only relevant for 4:2:2 and 4:4:4 YUV formats.
1992 */
1993struct v4l2_ctrl_mpeg2_quantisation {
1994 __u8 intra_quantiser_matrix[64];
1995 __u8 non_intra_quantiser_matrix[64];
1996 __u8 chroma_intra_quantiser_matrix[64];
1997 __u8 chroma_non_intra_quantiser_matrix[64];
1998};
1999
ca24fef0
BG		 2000#define V4L2_CID_STATELESS_HEVC_SPS (V4L2_CID_CODEC_STATELESS_BASE + 400)
2001#define V4L2_CID_STATELESS_HEVC_PPS (V4L2_CID_CODEC_STATELESS_BASE + 401)
2002#define V4L2_CID_STATELESS_HEVC_SLICE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 402)
2003#define V4L2_CID_STATELESS_HEVC_SCALING_MATRIX (V4L2_CID_CODEC_STATELESS_BASE + 403)
2004#define V4L2_CID_STATELESS_HEVC_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 404)
2005#define V4L2_CID_STATELESS_HEVC_DECODE_MODE (V4L2_CID_CODEC_STATELESS_BASE + 405)
2006#define V4L2_CID_STATELESS_HEVC_START_CODE (V4L2_CID_CODEC_STATELESS_BASE + 406)
2007#define V4L2_CID_STATELESS_HEVC_ENTRY_POINT_OFFSETS (V4L2_CID_CODEC_STATELESS_BASE + 407)
2008
2009enum v4l2_stateless_hevc_decode_mode {
2010 V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED,
2011 V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
2012};
2013
2014enum v4l2_stateless_hevc_start_code {
2015 V4L2_STATELESS_HEVC_START_CODE_NONE,
2016 V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
2017};
2018
2019#define V4L2_HEVC_SLICE_TYPE_B 0
2020#define V4L2_HEVC_SLICE_TYPE_P 1
2021#define V4L2_HEVC_SLICE_TYPE_I 2
2022
2023#define V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE (1ULL << 0)
2024#define V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED (1ULL << 1)
2025#define V4L2_HEVC_SPS_FLAG_AMP_ENABLED (1ULL << 2)
2026#define V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET (1ULL << 3)
2027#define V4L2_HEVC_SPS_FLAG_PCM_ENABLED (1ULL << 4)
2028#define V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED (1ULL << 5)
2029#define V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT (1ULL << 6)
2030#define V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED (1ULL << 7)
2031#define V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED (1ULL << 8)
2032
2033/**
2034 * struct v4l2_ctrl_hevc_sps - ITU-T Rec. H.265: Sequence parameter set
2035 *
2036 * @video_parameter_set_id: specifies the value of the
2037 * vps_video_parameter_set_id of the active VPS
2038 * @seq_parameter_set_id: provides an identifier for the SPS for
2039 * reference by other syntax elements
2040 * @pic_width_in_luma_samples: specifies the width of each decoded picture
2041 * in units of luma samples
2042 * @pic_height_in_luma_samples: specifies the height of each decoded picture
2043 * in units of luma samples
2044 * @bit_depth_luma_minus8: this value plus 8specifies the bit depth of the
2045 * samples of the luma array
2046 * @bit_depth_chroma_minus8: this value plus 8 specifies the bit depth of the
2047 * samples of the chroma arrays
2048 * @log2_max_pic_order_cnt_lsb_minus4: this value plus 4 specifies the value of
2049 * the variable MaxPicOrderCntLsb
2050 * @sps_max_dec_pic_buffering_minus1: this value plus 1 specifies the maximum
2051 * required size of the decoded picture
2052 * buffer for the codec video sequence
2053 * @sps_max_num_reorder_pics: indicates the maximum allowed number of pictures
2054 * @sps_max_latency_increase_plus1: not equal to 0 is used to compute the
2055 * value of SpsMaxLatencyPictures array
2056 * @log2_min_luma_coding_block_size_minus3: plus 3 specifies the minimum
2057 * luma coding block size
2058 * @log2_diff_max_min_luma_coding_block_size: specifies the difference between
2059 * the maximum and minimum luma
2060 * coding block size
2061 * @log2_min_luma_transform_block_size_minus2: plus 2 specifies the minimum luma
2062 * transform block size
2063 * @log2_diff_max_min_luma_transform_block_size: specifies the difference between
2064 * the maximum and minimum luma
2065 * transform block size
2066 * @max_transform_hierarchy_depth_inter: specifies the maximum hierarchy
2067 * depth for transform units of
2068 * coding units coded in inter
2069 * prediction mode
2070 * @max_transform_hierarchy_depth_intra: specifies the maximum hierarchy
2071 * depth for transform units of
2072 * coding units coded in intra
2073 * prediction mode
2074 * @pcm_sample_bit_depth_luma_minus1: this value plus 1 specifies the number of
2075 * bits used to represent each of PCM sample
2076 * values of the luma component
2077 * @pcm_sample_bit_depth_chroma_minus1: this value plus 1 specifies the number
2078 * of bits used to represent each of PCM
2079 * sample values of the chroma components
2080 * @log2_min_pcm_luma_coding_block_size_minus3: this value plus 3 specifies the
2081 * minimum size of coding blocks
2082 * @log2_diff_max_min_pcm_luma_coding_block_size: specifies the difference between
2083 * the maximum and minimum size of
2084 * coding blocks
2085 * @num_short_term_ref_pic_sets: specifies the number of st_ref_pic_set()
2086 * syntax structures included in the SPS
2087 * @num_long_term_ref_pics_sps: specifies the number of candidate long-term
2088 * reference pictures that are specified in the SPS
2089 * @chroma_format_idc: specifies the chroma sampling
2090 * @sps_max_sub_layers_minus1: this value plus 1 specifies the maximum number
2091 * of temporal sub-layers
2092 * @reserved: padding field. Should be zeroed by applications.
2093 * @flags: see V4L2_HEVC_SPS_FLAG_{}
2094 */
2095struct v4l2_ctrl_hevc_sps {
2096 __u8 video_parameter_set_id;
2097 __u8 seq_parameter_set_id;
2098 __u16 pic_width_in_luma_samples;
2099 __u16 pic_height_in_luma_samples;
2100 __u8 bit_depth_luma_minus8;
2101 __u8 bit_depth_chroma_minus8;
2102 __u8 log2_max_pic_order_cnt_lsb_minus4;
2103 __u8 sps_max_dec_pic_buffering_minus1;
2104 __u8 sps_max_num_reorder_pics;
2105 __u8 sps_max_latency_increase_plus1;
2106 __u8 log2_min_luma_coding_block_size_minus3;
2107 __u8 log2_diff_max_min_luma_coding_block_size;
2108 __u8 log2_min_luma_transform_block_size_minus2;
2109 __u8 log2_diff_max_min_luma_transform_block_size;
2110 __u8 max_transform_hierarchy_depth_inter;
2111 __u8 max_transform_hierarchy_depth_intra;
2112 __u8 pcm_sample_bit_depth_luma_minus1;
2113 __u8 pcm_sample_bit_depth_chroma_minus1;
2114 __u8 log2_min_pcm_luma_coding_block_size_minus3;
2115 __u8 log2_diff_max_min_pcm_luma_coding_block_size;
2116 __u8 num_short_term_ref_pic_sets;
2117 __u8 num_long_term_ref_pics_sps;
2118 __u8 chroma_format_idc;
2119 __u8 sps_max_sub_layers_minus1;
2120
2121 __u8 reserved[6];
2122 __u64 flags;
2123};
2124
2125#define V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED (1ULL << 0)
2126#define V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT (1ULL << 1)
2127#define V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED (1ULL << 2)
2128#define V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT (1ULL << 3)
2129#define V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED (1ULL << 4)
2130#define V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED (1ULL << 5)
2131#define V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED (1ULL << 6)
2132#define V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT (1ULL << 7)
2133#define V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED (1ULL << 8)
2134#define V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED (1ULL << 9)
2135#define V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED (1ULL << 10)
2136#define V4L2_HEVC_PPS_FLAG_TILES_ENABLED (1ULL << 11)
2137#define V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED (1ULL << 12)
2138#define V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED (1ULL << 13)
2139#define V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 14)
2140#define V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED (1ULL << 15)
2141#define V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER (1ULL << 16)
2142#define V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT (1ULL << 17)
2143#define V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT (1ULL << 18)
2144#define V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT (1ULL << 19)
2145#define V4L2_HEVC_PPS_FLAG_UNIFORM_SPACING (1ULL << 20)
2146
2147/**
2148 * struct v4l2_ctrl_hevc_pps - ITU-T Rec. H.265: Picture parameter set
2149 *
2150 * @pic_parameter_set_id: identifies the PPS for reference by other
2151 * syntax elements
2152 * @num_extra_slice_header_bits: specifies the number of extra slice header
2153 * bits that are present in the slice header RBSP
2154 * for coded pictures referring to the PPS.
2155 * @num_ref_idx_l0_default_active_minus1: this value plus 1 specifies the
2156 * inferred value of num_ref_idx_l0_active_minus1
2157 * @num_ref_idx_l1_default_active_minus1: this value plus 1 specifies the
2158 * inferred value of num_ref_idx_l1_active_minus1
2159 * @init_qp_minus26: this value plus 26 specifies the initial value of SliceQp Y for
2160 * each slice referring to the PPS
2161 * @diff_cu_qp_delta_depth: specifies the difference between the luma coding
2162 * tree block size and the minimum luma coding block
2163 * size of coding units that convey cu_qp_delta_abs
2164 * and cu_qp_delta_sign_flag
2165 * @pps_cb_qp_offset: specify the offsets to the luma quantization parameter Cb
2166 * @pps_cr_qp_offset: specify the offsets to the luma quantization parameter Cr
2167 * @num_tile_columns_minus1: this value plus 1 specifies the number of tile columns
2168 * partitioning the picture
2169 * @num_tile_rows_minus1: this value plus 1 specifies the number of tile rows partitioning
2170 * the picture
2171 * @column_width_minus1: this value plus 1 specifies the width of the each tile column in
2172 * units of coding tree blocks
2173 * @row_height_minus1: this value plus 1 specifies the height of the each tile row in
2174 * units of coding tree blocks
2175 * @pps_beta_offset_div2: specify the default deblocking parameter offsets for
2176 * beta divided by 2
2177 * @pps_tc_offset_div2: specify the default deblocking parameter offsets for tC
2178 * divided by 2
2179 * @log2_parallel_merge_level_minus2: this value plus 2 specifies the value of
2180 * the variable Log2ParMrgLevel
2181 * @reserved: padding field. Should be zeroed by applications.
2182 * @flags: see V4L2_HEVC_PPS_FLAG_{}
2183 */
2184struct v4l2_ctrl_hevc_pps {
2185 __u8 pic_parameter_set_id;
2186 __u8 num_extra_slice_header_bits;
2187 __u8 num_ref_idx_l0_default_active_minus1;
2188 __u8 num_ref_idx_l1_default_active_minus1;
2189 __s8 init_qp_minus26;
2190 __u8 diff_cu_qp_delta_depth;
2191 __s8 pps_cb_qp_offset;
2192 __s8 pps_cr_qp_offset;
2193 __u8 num_tile_columns_minus1;
2194 __u8 num_tile_rows_minus1;
2195 __u8 column_width_minus1[20];
2196 __u8 row_height_minus1[22];
2197 __s8 pps_beta_offset_div2;
2198 __s8 pps_tc_offset_div2;
2199 __u8 log2_parallel_merge_level_minus2;
2200 __u8 reserved;
2201 __u64 flags;
2202};
2203
2204#define V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE 0x01
2205
2206#define V4L2_HEVC_SEI_PIC_STRUCT_FRAME 0
2207#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_FIELD 1
2208#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_FIELD 2
2209#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_BOTTOM 3
2210#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_TOP 4
2211#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_BOTTOM_TOP 5
2212#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_TOP_BOTTOM 6
2213#define V4L2_HEVC_SEI_PIC_STRUCT_FRAME_DOUBLING 7
2214#define V4L2_HEVC_SEI_PIC_STRUCT_FRAME_TRIPLING 8
2215#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_PAIRED_PREVIOUS_BOTTOM 9
2216#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_PAIRED_PREVIOUS_TOP 10
2217#define V4L2_HEVC_SEI_PIC_STRUCT_TOP_PAIRED_NEXT_BOTTOM 11
2218#define V4L2_HEVC_SEI_PIC_STRUCT_BOTTOM_PAIRED_NEXT_TOP 12
2219
2220#define V4L2_HEVC_DPB_ENTRIES_NUM_MAX 16
2221
2222/**
2223 * struct v4l2_hevc_dpb_entry - HEVC decoded picture buffer entry
2224 *
2225 * @timestamp: timestamp of the V4L2 capture buffer to use as reference.
2226 * @flags: long term flag for the reference frame
2227 * @field_pic: whether the reference is a field picture or a frame.
2228 * @reserved: padding field. Should be zeroed by applications.
2229 * @pic_order_cnt_val: the picture order count of the current picture.
2230 */
2231struct v4l2_hevc_dpb_entry {
2232 __u64 timestamp;
2233 __u8 flags;
2234 __u8 field_pic;
2235 __u16 reserved;
2236 __s32 pic_order_cnt_val;
2237};
2238
2239/**
2240 * struct v4l2_hevc_pred_weight_table - HEVC weighted prediction parameters
2241 *
2242 * @delta_luma_weight_l0: the difference of the weighting factor applied
2243 * to the luma prediction value for list 0
2244 * @luma_offset_l0: the additive offset applied to the luma prediction value
2245 * for list 0
2246 * @delta_chroma_weight_l0: the difference of the weighting factor applied
2247 * to the chroma prediction values for list 0
2248 * @chroma_offset_l0: the difference of the additive offset applied to
2249 * the chroma prediction values for list 0
2250 * @delta_luma_weight_l1: the difference of the weighting factor applied
2251 * to the luma prediction value for list 1
2252 * @luma_offset_l1: the additive offset applied to the luma prediction value
2253 * for list 1
2254 * @delta_chroma_weight_l1: the difference of the weighting factor applied
2255 * to the chroma prediction values for list 1
2256 * @chroma_offset_l1: the difference of the additive offset applied to
2257 * the chroma prediction values for list 1
2258 * @luma_log2_weight_denom: the base 2 logarithm of the denominator for
2259 * all luma weighting factors
2260 * @delta_chroma_log2_weight_denom: the difference of the base 2 logarithm
2261 * of the denominator for all chroma
2262 * weighting factors
2263 */
2264struct v4l2_hevc_pred_weight_table {
2265 __s8 delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2266 __s8 luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2267 __s8 delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2268 __s8 chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2269
2270 __s8 delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2271 __s8 luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2272 __s8 delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2273 __s8 chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
2274
2275 __u8 luma_log2_weight_denom;
2276 __s8 delta_chroma_log2_weight_denom;
2277};
2278
2279#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA (1ULL << 0)
2280#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA (1ULL << 1)
2281#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED (1ULL << 2)
2282#define V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO (1ULL << 3)
2283#define V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT (1ULL << 4)
2284#define V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0 (1ULL << 5)
2285#define V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV (1ULL << 6)
2286#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED (1ULL << 7)
2287#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 8)
2288#define V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT (1ULL << 9)
2289
2290/**
2291 * struct v4l2_ctrl_hevc_slice_params - HEVC slice parameters
2292 *
2293 * This control is a dynamically sized 1-dimensional array,
2294 * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it.
2295 *
2296 * @bit_size: size (in bits) of the current slice data
2297 * @data_byte_offset: offset (in bytes) to the video data in the current slice data
2298 * @num_entry_point_offsets: specifies the number of entry point offset syntax
2299 * elements in the slice header.
2300 * @nal_unit_type: specifies the coding type of the slice (B, P or I)
2301 * @nuh_temporal_id_plus1: minus 1 specifies a temporal identifier for the NAL unit
2302 * @slice_type: see V4L2_HEVC_SLICE_TYPE_{}
2303 * @colour_plane_id: specifies the colour plane associated with the current slice
2304 * @slice_pic_order_cnt: specifies the picture order count
2305 * @num_ref_idx_l0_active_minus1: this value plus 1 specifies the maximum
2306 * reference index for reference picture list 0
2307 * that may be used to decode the slice
2308 * @num_ref_idx_l1_active_minus1: this value plus 1 specifies the maximum
2309 * reference index for reference picture list 1
2310 * that may be used to decode the slice
2311 * @collocated_ref_idx: specifies the reference index of the collocated picture used
2312 * for temporal motion vector prediction
2313 * @five_minus_max_num_merge_cand: specifies the maximum number of merging
2314 * motion vector prediction candidates supported in
2315 * the slice subtracted from 5
2316 * @slice_qp_delta: specifies the initial value of QpY to be used for the coding
2317 * blocks in the slice
2318 * @slice_cb_qp_offset: specifies a difference to be added to the value of pps_cb_qp_offset
2319 * @slice_cr_qp_offset: specifies a difference to be added to the value of pps_cr_qp_offset
2320 * @slice_act_y_qp_offset: screen content extension parameters
2321 * @slice_act_cb_qp_offset: screen content extension parameters
2322 * @slice_act_cr_qp_offset: screen content extension parameters
2323 * @slice_beta_offset_div2: specify the deblocking parameter offsets for beta divided by 2
2324 * @slice_tc_offset_div2: specify the deblocking parameter offsets for tC divided by 2
2325 * @pic_struct: indicates whether a picture should be displayed as a frame or as one or
2326 * more fields
2327 * @reserved0: padding field. Should be zeroed by applications.
2328 * @slice_segment_addr: specifies the address of the first coding tree block in
2329 * the slice segment
2330 * @ref_idx_l0: the list of L0 reference elements as indices in the DPB
2331 * @ref_idx_l1: the list of L1 reference elements as indices in the DPB
2332 * @short_term_ref_pic_set_size: specifies the size of short-term reference
2333 * pictures set included in the SPS
2334 * @long_term_ref_pic_set_size: specifies the size of long-term reference
2335 * pictures set include in the SPS
2336 * @pred_weight_table: the prediction weight coefficients for inter-picture
2337 * prediction
2338 * @reserved1: padding field. Should be zeroed by applications.
2339 * @flags: see V4L2_HEVC_SLICE_PARAMS_FLAG_{}
2340 */
2341struct v4l2_ctrl_hevc_slice_params {
2342 __u32 bit_size;
2343 __u32 data_byte_offset;
2344 __u32 num_entry_point_offsets;
2345
2346 /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
2347 __u8 nal_unit_type;
2348 __u8 nuh_temporal_id_plus1;
2349
2350 /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
2351 __u8 slice_type;
2352 __u8 colour_plane_id;
2353 __s32 slice_pic_order_cnt;
2354 __u8 num_ref_idx_l0_active_minus1;
2355 __u8 num_ref_idx_l1_active_minus1;
2356 __u8 collocated_ref_idx;
2357 __u8 five_minus_max_num_merge_cand;
2358 __s8 slice_qp_delta;
2359 __s8 slice_cb_qp_offset;
2360 __s8 slice_cr_qp_offset;
2361 __s8 slice_act_y_qp_offset;
2362 __s8 slice_act_cb_qp_offset;
2363 __s8 slice_act_cr_qp_offset;
2364 __s8 slice_beta_offset_div2;
2365 __s8 slice_tc_offset_div2;
2366
2367 /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture timing SEI message */
2368 __u8 pic_struct;
2369
2370 __u8 reserved0[3];
2371 /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
2372 __u32 slice_segment_addr;
2373 __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2374 __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2375 __u16 short_term_ref_pic_set_size;
2376 __u16 long_term_ref_pic_set_size;
2377
2378 /* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
2379 struct v4l2_hevc_pred_weight_table pred_weight_table;
2380
2381 __u8 reserved1[2];
2382 __u64 flags;
2383};
2384
2385#define V4L2_HEVC_DECODE_PARAM_FLAG_IRAP_PIC 0x1
2386#define V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC 0x2
2387#define V4L2_HEVC_DECODE_PARAM_FLAG_NO_OUTPUT_OF_PRIOR 0x4
2388
2389/**
2390 * struct v4l2_ctrl_hevc_decode_params - HEVC decode parameters
2391 *
2392 * @pic_order_cnt_val: picture order count
2393 * @short_term_ref_pic_set_size: specifies the size of short-term reference
2394 * pictures set included in the SPS of the first slice
2395 * @long_term_ref_pic_set_size: specifies the size of long-term reference
2396 * pictures set include in the SPS of the first slice
2397 * @num_active_dpb_entries: the number of entries in dpb
2398 * @num_poc_st_curr_before: the number of reference pictures in the short-term
2399 * set that come before the current frame
2400 * @num_poc_st_curr_after: the number of reference pictures in the short-term
2401 * set that come after the current frame
2402 * @num_poc_lt_curr: the number of reference pictures in the long-term set
2403 * @poc_st_curr_before: provides the index of the short term before references
2404 * in DPB array
2405 * @poc_st_curr_after: provides the index of the short term after references
2406 * in DPB array
2407 * @poc_lt_curr: provides the index of the long term references in DPB array
2408 * @reserved: padding field. Should be zeroed by applications.
2409 * @dpb: the decoded picture buffer, for meta-data about reference frames
2410 * @flags: see V4L2_HEVC_DECODE_PARAM_FLAG_{}
2411 */
2412struct v4l2_ctrl_hevc_decode_params {
2413 __s32 pic_order_cnt_val;
2414 __u16 short_term_ref_pic_set_size;
2415 __u16 long_term_ref_pic_set_size;
2416 __u8 num_active_dpb_entries;
2417 __u8 num_poc_st_curr_before;
2418 __u8 num_poc_st_curr_after;
2419 __u8 num_poc_lt_curr;
2420 __u8 poc_st_curr_before[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2421 __u8 poc_st_curr_after[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2422 __u8 poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2423 __u8 reserved[4];
2424 struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
2425 __u64 flags;
2426};
2427
2428/**
2429 * struct v4l2_ctrl_hevc_scaling_matrix - HEVC scaling lists parameters
2430 *
2431 * @scaling_list_4x4: scaling list is used for the scaling process for
2432 * transform coefficients. The values on each scaling
2433 * list are expected in raster scan order
2434 * @scaling_list_8x8: scaling list is used for the scaling process for
2435 * transform coefficients. The values on each scaling
2436 * list are expected in raster scan order
2437 * @scaling_list_16x16: scaling list is used for the scaling process for
2438 * transform coefficients. The values on each scaling
2439 * list are expected in raster scan order
2440 * @scaling_list_32x32: scaling list is used for the scaling process for
2441 * transform coefficients. The values on each scaling
2442 * list are expected in raster scan order
2443 * @scaling_list_dc_coef_16x16: scaling list is used for the scaling process
2444 * for transform coefficients. The values on each
2445 * scaling list are expected in raster scan order.
2446 * @scaling_list_dc_coef_32x32: scaling list is used for the scaling process
2447 * for transform coefficients. The values on each
2448 * scaling list are expected in raster scan order.
2449 */
2450struct v4l2_ctrl_hevc_scaling_matrix {
2451 __u8 scaling_list_4x4[6][16];
2452 __u8 scaling_list_8x8[6][64];
2453 __u8 scaling_list_16x16[6][64];
2454 __u8 scaling_list_32x32[2][64];
2455 __u8 scaling_list_dc_coef_16x16[6];
2456 __u8 scaling_list_dc_coef_32x32[2];
2457};
2458
f31b9ffd
SV		 2459#define V4L2_CID_COLORIMETRY_CLASS_BASE (V4L2_CTRL_CLASS_COLORIMETRY | 0x900)
2460#define V4L2_CID_COLORIMETRY_CLASS (V4L2_CTRL_CLASS_COLORIMETRY | 1)
2461
1ad0de78
SV		 2462#define V4L2_CID_COLORIMETRY_HDR10_CLL_INFO (V4L2_CID_COLORIMETRY_CLASS_BASE + 0)
2463
2464struct v4l2_ctrl_hdr10_cll_info {
2465 __u16 max_content_light_level;
2466 __u16 max_pic_average_light_level;
2467};
2468
2469#define V4L2_CID_COLORIMETRY_HDR10_MASTERING_DISPLAY (V4L2_CID_COLORIMETRY_CLASS_BASE + 1)
2470
2471#define V4L2_HDR10_MASTERING_PRIMARIES_X_LOW 5
2472#define V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH 37000
2473#define V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW 5
2474#define V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH 42000
2475#define V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW 5
2476#define V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH 37000
2477#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW 5
2478#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH 42000
2479#define V4L2_HDR10_MASTERING_MAX_LUMA_LOW 50000
2480#define V4L2_HDR10_MASTERING_MAX_LUMA_HIGH 100000000
2481#define V4L2_HDR10_MASTERING_MIN_LUMA_LOW 1
2482#define V4L2_HDR10_MASTERING_MIN_LUMA_HIGH 50000
2483
2484struct v4l2_ctrl_hdr10_mastering_display {
2485 __u16 display_primaries_x[3];
2486 __u16 display_primaries_y[3];
2487 __u16 white_point_x;
2488 __u16 white_point_y;
2489 __u32 max_display_mastering_luminance;
2490 __u32 min_display_mastering_luminance;
2491};
2492
b88dbe38
AP		 2493/* Stateless VP9 controls */
2494
2495#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1
2496#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2
2497
2498/**
2499 * struct v4l2_vp9_loop_filter - VP9 loop filter parameters
2500 *
2501 * @ref_deltas: contains the adjustment needed for the filter level based on the
2502 * chosen reference frame. If this syntax element is not present in the bitstream,
2503 * users should pass its last value.
2504 * @mode_deltas: contains the adjustment needed for the filter level based on the
2505 * chosen mode. If this syntax element is not present in the bitstream, users should
2506 * pass its last value.
2507 * @level: indicates the loop filter strength.
2508 * @sharpness: indicates the sharpness level.
2509 * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags.
2510 * @reserved: padding field. Should be zeroed by applications.
2511 *
2512 * This structure contains all loop filter related parameters. See sections
2513 * '7.2.8 Loop filter semantics' of the VP9 specification for more details.
2514 */
2515struct v4l2_vp9_loop_filter {
2516 __s8 ref_deltas[4];
2517 __s8 mode_deltas[2];
2518 __u8 level;
2519 __u8 sharpness;
2520 __u8 flags;
2521 __u8 reserved[7];
2522};
2523
2524/**
2525 * struct v4l2_vp9_quantization - VP9 quantization parameters
2526 *
2527 * @base_q_idx: indicates the base frame qindex.
2528 * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx.
2529 * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx.
2530 * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx.
2531 * @reserved: padding field. Should be zeroed by applications.
2532 *
2533 * Encodes the quantization parameters. See section '7.2.9 Quantization params
2534 * syntax' of the VP9 specification for more details.
2535 */
2536struct v4l2_vp9_quantization {
2537 __u8 base_q_idx;
2538 __s8 delta_q_y_dc;
2539 __s8 delta_q_uv_dc;
2540 __s8 delta_q_uv_ac;
2541 __u8 reserved[4];
2542};
2543
2544#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01
2545#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02
2546#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04
2547#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08
2548#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10
2549
2550#define V4L2_VP9_SEG_LVL_ALT_Q 0
2551#define V4L2_VP9_SEG_LVL_ALT_L 1
2552#define V4L2_VP9_SEG_LVL_REF_FRAME 2
2553#define V4L2_VP9_SEG_LVL_SKIP 3
2554#define V4L2_VP9_SEG_LVL_MAX 4
2555
2556#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id))
2557#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf
2558
2559/**
2560 * struct v4l2_vp9_segmentation - VP9 segmentation parameters
2561 *
2562 * @feature_data: data attached to each feature. Data entry is only valid if
2563 * the feature is enabled. The array shall be indexed with segment number as
2564 * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension.
2565 * @feature_enabled: bitmask defining which features are enabled in each segment.
2566 * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id)
2567 * values where id is one of V4L2_VP9_SEG_LVL_{}.
2568 * @tree_probs: specifies the probability values to be used when decoding a
2569 * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification
2570 * for more details.
2571 * @pred_probs: specifies the probability values to be used when decoding a
2572 * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9`
2573 * for more details.
2574 * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags.
2575 * @reserved: padding field. Should be zeroed by applications.
2576 *
2577 * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of
2578 * the VP9 specification for more details.
2579 */
2580struct v4l2_vp9_segmentation {
2581 __s16 feature_data[8][4];
2582 __u8 feature_enabled[8];
2583 __u8 tree_probs[7];
2584 __u8 pred_probs[3];
2585 __u8 flags;
2586 __u8 reserved[5];
2587};
2588
2589#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001
2590#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002
2591#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004
2592#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008
2593#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010
2594#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020
2595#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040
2596#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080
2597#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100
2598#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200
2599
2600#define V4L2_VP9_SIGN_BIAS_LAST 0x1
2601#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2
2602#define V4L2_VP9_SIGN_BIAS_ALT 0x4
2603
2604#define V4L2_VP9_RESET_FRAME_CTX_NONE 0
2605#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1
2606#define V4L2_VP9_RESET_FRAME_CTX_ALL 2
2607
2608#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0
2609#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1
2610#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2
2611#define V4L2_VP9_INTERP_FILTER_BILINEAR 3
2612#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4
2613
2614#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0
2615#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1
2616#define V4L2_VP9_REFERENCE_MODE_SELECT 2
2617
2618#define V4L2_VP9_PROFILE_MAX 3
2619
2620#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300)
2621/**
2622 * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control
2623 *
2624 * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details.
2625 * @quant: quantization parameters. See &v4l2_vp9_quantization for more details.
2626 * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details.
2627 * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags.
2628 * @compressed_header_size: compressed header size in bytes.
2629 * @uncompressed_header_size: uncompressed header size in bytes.
2630 * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels.
2631 * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels.
2632 * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in
2633 * pixels. This is not used during the decoding process but might be used by HW scalers
2634 * to prepare a frame that's ready for scanout.
2635 * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in
2636 * pixels. This is not used during the decoding process but might be used by HW scalers
2637 * to prepare a frame that's ready for scanout.
2638 * @last_frame_ts: "last" reference buffer timestamp.
2639 * The timestamp refers to the timestamp field in struct v4l2_buffer.
2640 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
2641 * @golden_frame_ts: "golden" reference buffer timestamp.
2642 * The timestamp refers to the timestamp field in struct v4l2_buffer.
2643 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
2644 * @alt_frame_ts: "alt" reference buffer timestamp.
2645 * The timestamp refers to the timestamp field in struct v4l2_buffer.
2646 * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.
2647 * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given
2648 * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}.
2649 * @reset_frame_context: specifies whether the frame context should be reset to default values.
2650 * Either of V4L2_VP9_RESET_FRAME_CTX_{}.
2651 * @frame_context_idx: frame context that should be used/updated.
2652 * @profile: VP9 profile. Can be 0, 1, 2 or 3.
2653 * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support
2654 * 10 and/or 12 bits depths.
2655 * @interpolation_filter: specifies the filter selection used for performing inter prediction.
2656 * Set to one of V4L2_VP9_INTERP_FILTER_{}.
2657 * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width
2658 * is measured in units of 8x8 blocks). Shall be less than or equal to 6.
2659 * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height
2660 * is measured in units of 8x8 blocks).
2661 * @reference_mode: specifies the type of inter prediction to be used.
2662 * Set to one of V4L2_VP9_REFERENCE_MODE_{}.
2663 * @reserved: padding field. Should be zeroed by applications.
2664 */
2665struct v4l2_ctrl_vp9_frame {
2666 struct v4l2_vp9_loop_filter lf;
2667 struct v4l2_vp9_quantization quant;
2668 struct v4l2_vp9_segmentation seg;
2669 __u32 flags;
2670 __u16 compressed_header_size;
2671 __u16 uncompressed_header_size;
2672 __u16 frame_width_minus_1;
2673 __u16 frame_height_minus_1;
2674 __u16 render_width_minus_1;
2675 __u16 render_height_minus_1;
2676 __u64 last_frame_ts;
2677 __u64 golden_frame_ts;
2678 __u64 alt_frame_ts;
2679 __u8 ref_frame_sign_bias;
2680 __u8 reset_frame_context;
2681 __u8 frame_context_idx;
2682 __u8 profile;
2683 __u8 bit_depth;
2684 __u8 interpolation_filter;
2685 __u8 tile_cols_log2;
2686 __u8 tile_rows_log2;
2687 __u8 reference_mode;
2688 __u8 reserved[7];
2689};
2690
2691#define V4L2_VP9_NUM_FRAME_CTX 4
2692
2693/**
2694 * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates
2695 * @joint: motion vector joint probability updates.
2696 * @sign: motion vector sign probability updates.
2697 * @classes: motion vector class probability updates.
2698 * @class0_bit: motion vector class0 bit probability updates.
2699 * @bits: motion vector bits probability updates.
2700 * @class0_fr: motion vector class0 fractional bit probability updates.
2701 * @fr: motion vector fractional bit probability updates.
2702 * @class0_hp: motion vector class0 high precision fractional bit probability updates.
2703 * @hp: motion vector high precision fractional bit probability updates.
2704 *
2705 * This structure contains new values of motion vector probabilities.
2706 * A value of zero in an array element means there is no update of the relevant probability.
2707 * See `struct v4l2_vp9_prob_updates` for details.
2708 */
2709struct v4l2_vp9_mv_probs {
2710 __u8 joint[3];
2711 __u8 sign[2];
2712 __u8 classes[2][10];
2713 __u8 class0_bit[2];
2714 __u8 bits[2][10];
2715 __u8 class0_fr[2][2][3];
2716 __u8 fr[2][3];
2717 __u8 class0_hp[2];
2718 __u8 hp[2];
2719};
2720
2721#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301)
2722
2723#define V4L2_VP9_TX_MODE_ONLY_4X4 0
2724#define V4L2_VP9_TX_MODE_ALLOW_8X8 1
2725#define V4L2_VP9_TX_MODE_ALLOW_16X16 2
2726#define V4L2_VP9_TX_MODE_ALLOW_32X32 3
2727#define V4L2_VP9_TX_MODE_SELECT 4
2728
2729/**
2730 * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control
2731 * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}.
2732 * @tx8: TX 8x8 probability updates.
2733 * @tx16: TX 16x16 probability updates.
2734 * @tx32: TX 32x32 probability updates.
2735 * @coef: coefficient probability updates.
2736 * @skip: skip probability updates.
2737 * @inter_mode: inter mode probability updates.
2738 * @interp_filter: interpolation filter probability updates.
2739 * @is_inter: is inter-block probability updates.
2740 * @comp_mode: compound prediction mode probability updates.
2741 * @single_ref: single ref probability updates.
2742 * @comp_ref: compound ref probability updates.
2743 * @y_mode: Y prediction mode probability updates.
2744 * @uv_mode: UV prediction mode probability updates.
2745 * @partition: partition probability updates.
2746 * @mv: motion vector probability updates.
2747 *
2748 * This structure holds the probabilities update as parsed in the compressed
2749 * header (Spec 6.3). These values represent the value of probability update after
2750 * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element
2751 * means that there is no update of the relevant probability.
2752 *
2753 * This control is optional and needs to be used when dealing with the hardware which is
2754 * not capable of parsing the compressed header itself. Only drivers which need it will
2755 * implement it.
2756 */
2757struct v4l2_ctrl_vp9_compressed_hdr {
2758 __u8 tx_mode;
2759 __u8 tx8[2][1];
2760 __u8 tx16[2][2];
2761 __u8 tx32[2][3];
2762 __u8 coef[4][2][2][6][6][3];
2763 __u8 skip[3];
2764 __u8 inter_mode[7][3];
2765 __u8 interp_filter[4][2];
2766 __u8 is_inter[4];
2767 __u8 comp_mode[5];
2768 __u8 single_ref[5][2];
2769 __u8 comp_ref[5];
2770 __u8 y_mode[4][9];
2771 __u8 uv_mode[10][9];
2772 __u8 partition[16][3];
2773
2774 struct v4l2_vp9_mv_probs mv;
2775};
2776
35aaa6e6
EG		 2777/* MPEG-compression definitions kept for backwards compatibility */
2778#ifndef __KERNEL__
2779#define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC
2780#define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS
2781#define V4L2_CID_MPEG_BASE V4L2_CID_CODEC_BASE
2782#define V4L2_CID_MPEG_CX2341X_BASE V4L2_CID_CODEC_CX2341X_BASE
2783#define V4L2_CID_MPEG_MFC51_BASE V4L2_CID_CODEC_MFC51_BASE
2784#endif
2785
8e19b347 2786#endif
Linux 6.x block layer and io_uring tree(s)