Merge branch 'fix/asoc' into for-linus
[linux-block.git] / include / sound / asound.h
CommitLineData
1da177e4
LT
1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
c1017a4c 3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
9adfbfb6
AB
26#include <linux/types.h>
27
1da177e4 28#ifdef __KERNEL__
6560c349 29#include <linux/ioctl.h>
1da177e4
LT
30#include <linux/time.h>
31#include <asm/byteorder.h>
32
33#ifdef __LITTLE_ENDIAN
34#define SNDRV_LITTLE_ENDIAN
35#else
36#ifdef __BIG_ENDIAN
37#define SNDRV_BIG_ENDIAN
38#else
39#error "Unsupported endian..."
40#endif
41#endif
42
6560c349 43#endif /* __KERNEL__ **/
1da177e4
LT
44
45/*
46 * protocol version
47 */
48
49#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
50#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
51#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
52#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
53#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
54 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
55 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
56 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
57
58/****************************************************************************
59 * *
60 * Digital audio interface *
61 * *
62 ****************************************************************************/
63
512bbd6a 64struct snd_aes_iec958 {
1da177e4
LT
65 unsigned char status[24]; /* AES/IEC958 channel status bits */
66 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
67 unsigned char pad; /* nothing */
68 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
69};
70
71/****************************************************************************
72 * *
73 * Section for driver hardware dependent interface - /dev/snd/hw? *
74 * *
75 ****************************************************************************/
76
77#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
78
512bbd6a 79enum {
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80 SNDRV_HWDEP_IFACE_OPL2 = 0,
81 SNDRV_HWDEP_IFACE_OPL3,
82 SNDRV_HWDEP_IFACE_OPL4,
83 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
84 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
85 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
86 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
87 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
88 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
89 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
90 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
91 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
92 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
93 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
94 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
b259b10c 95 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
2807314d 96 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */
030a07e4 97 SNDRV_HWDEP_IFACE_USB_STREAM, /* direct access to usb stream */
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98
99 /* Don't forget to change the following: */
030a07e4 100 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_USB_STREAM
1da177e4
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101};
102
512bbd6a 103struct snd_hwdep_info {
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LT
104 unsigned int device; /* WR: device number */
105 int card; /* R: card number */
106 unsigned char id[64]; /* ID (user selectable) */
107 unsigned char name[80]; /* hwdep name */
512bbd6a 108 int iface; /* hwdep interface */
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LT
109 unsigned char reserved[64]; /* reserved for future */
110};
111
112/* generic DSP loader */
512bbd6a 113struct snd_hwdep_dsp_status {
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LT
114 unsigned int version; /* R: driver-specific version */
115 unsigned char id[32]; /* R: driver-specific ID string */
116 unsigned int num_dsps; /* R: number of DSP images to transfer */
117 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
118 unsigned int chip_ready; /* R: 1 = initialization finished */
119 unsigned char reserved[16]; /* reserved for future use */
120};
121
512bbd6a 122struct snd_hwdep_dsp_image {
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123 unsigned int index; /* W: DSP index */
124 unsigned char name[64]; /* W: ID (e.g. file name) */
125 unsigned char __user *image; /* W: binary image */
126 size_t length; /* W: size of image in bytes */
127 unsigned long driver_data; /* W: driver-specific data */
128};
129
78a05b52
TI
130#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
131#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
132#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
133#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
1da177e4
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134
135/*****************************************************************************
136 * *
137 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
138 * *
139 *****************************************************************************/
140
b751eef1 141#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 9)
1da177e4 142
512bbd6a
TI
143typedef unsigned long snd_pcm_uframes_t;
144typedef signed long snd_pcm_sframes_t;
1da177e4 145
512bbd6a 146enum {
1da177e4
LT
147 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
148 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
149 SNDRV_PCM_CLASS_MODEM, /* software modem class */
150 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
151 /* Don't forget to change the following: */
152 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
153};
154
512bbd6a 155enum {
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156 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
157 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
158 /* Don't forget to change the following: */
159 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
160};
161
512bbd6a 162enum {
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163 SNDRV_PCM_STREAM_PLAYBACK = 0,
164 SNDRV_PCM_STREAM_CAPTURE,
165 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
166};
167
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TI
168typedef int __bitwise snd_pcm_access_t;
169#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
170#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
171#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
172#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
173#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
174#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
175
176typedef int __bitwise snd_pcm_format_t;
177#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
178#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
179#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
180#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
181#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
182#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
183#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
184#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
185#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
186#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
187#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
188#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
189#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
190#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
191#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
192#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
193#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
194#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
195#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
196#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
197#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
198#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
199#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
200#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
201#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
202#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
203#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
204#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
205#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
206#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
207#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
208#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
209#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
210#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
211#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
212#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
213#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
214#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
215#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_U18_3BE
1da177e4
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216
217#ifdef SNDRV_LITTLE_ENDIAN
512bbd6a
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218#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
219#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
220#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
221#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
222#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
223#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
224#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
225#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
226#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
1da177e4
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227#endif
228#ifdef SNDRV_BIG_ENDIAN
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229#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
230#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
231#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
232#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
233#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
234#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
235#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
236#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
237#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
1da177e4 238#endif
1da177e4 239
512bbd6a
TI
240typedef int __bitwise snd_pcm_subformat_t;
241#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
242#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
1da177e4
LT
243
244#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
245#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
246#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
247#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
248#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
249#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
250#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
251#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
252#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
253#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
254#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
255#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
256#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
257#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
258
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TI
259typedef int __bitwise snd_pcm_state_t;
260#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
261#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
262#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
263#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
264#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
265#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
266#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
267#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
268#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
269#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
1da177e4
LT
270
271enum {
272 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
273 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
274 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
275};
276
512bbd6a 277union snd_pcm_sync_id {
1da177e4
LT
278 unsigned char id[16];
279 unsigned short id16[8];
280 unsigned int id32[4];
281};
282
512bbd6a 283struct snd_pcm_info {
1da177e4
LT
284 unsigned int device; /* RO/WR (control): device number */
285 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 286 int stream; /* RO/WR (control): stream direction */
1da177e4
LT
287 int card; /* R: card number */
288 unsigned char id[64]; /* ID (user selectable) */
289 unsigned char name[80]; /* name of this device */
290 unsigned char subname[32]; /* subdevice name */
512bbd6a
TI
291 int dev_class; /* SNDRV_PCM_CLASS_* */
292 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
1da177e4
LT
293 unsigned int subdevices_count;
294 unsigned int subdevices_avail;
512bbd6a 295 union snd_pcm_sync_id sync; /* hardware synchronization ID */
1da177e4
LT
296 unsigned char reserved[64]; /* reserved for future... */
297};
298
a99606d2
TI
299typedef int snd_pcm_hw_param_t;
300#define SNDRV_PCM_HW_PARAM_ACCESS 0 /* Access type */
301#define SNDRV_PCM_HW_PARAM_FORMAT 1 /* Format */
302#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 /* Subformat */
512bbd6a
TI
303#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
304#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
305
a99606d2
TI
306#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 /* Bits per sample */
307#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 /* Bits per frame */
308#define SNDRV_PCM_HW_PARAM_CHANNELS 10 /* Channels */
309#define SNDRV_PCM_HW_PARAM_RATE 11 /* Approx rate */
310#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 /* Approx distance between
311 * interrupts in us
312 */
313#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 /* Approx frames between
314 * interrupts
315 */
316#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 /* Approx bytes between
317 * interrupts
318 */
319#define SNDRV_PCM_HW_PARAM_PERIODS 15 /* Approx interrupts per
320 * buffer
321 */
322#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 /* Approx duration of buffer
323 * in us
324 */
325#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 /* Size of buffer in frames */
326#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 /* Size of buffer in bytes */
327#define SNDRV_PCM_HW_PARAM_TICK_TIME 19 /* Approx tick duration in us */
512bbd6a
TI
328#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
329#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
1da177e4 330
a99606d2 331#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
1da177e4 332
512bbd6a 333struct snd_interval {
1da177e4
LT
334 unsigned int min, max;
335 unsigned int openmin:1,
336 openmax:1,
337 integer:1,
338 empty:1;
339};
340
341#define SNDRV_MASK_MAX 256
342
512bbd6a 343struct snd_mask {
9adfbfb6 344 __u32 bits[(SNDRV_MASK_MAX+31)/32];
1da177e4
LT
345};
346
512bbd6a 347struct snd_pcm_hw_params {
1da177e4 348 unsigned int flags;
512bbd6a 349 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
1da177e4 350 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
512bbd6a
TI
351 struct snd_mask mres[5]; /* reserved masks */
352 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
1da177e4 353 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
512bbd6a 354 struct snd_interval ires[9]; /* reserved intervals */
1da177e4
LT
355 unsigned int rmask; /* W: requested masks */
356 unsigned int cmask; /* R: changed masks */
357 unsigned int info; /* R: Info flags for returned setup */
358 unsigned int msbits; /* R: used most significant bits */
359 unsigned int rate_num; /* R: rate numerator */
360 unsigned int rate_den; /* R: rate denominator */
512bbd6a 361 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
1da177e4
LT
362 unsigned char reserved[64]; /* reserved for future */
363};
364
512bbd6a 365enum {
1da177e4 366 SNDRV_PCM_TSTAMP_NONE = 0,
8c121586
JK
367 SNDRV_PCM_TSTAMP_ENABLE,
368 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
1da177e4
LT
369};
370
512bbd6a
TI
371struct snd_pcm_sw_params {
372 int tstamp_mode; /* timestamp mode */
1da177e4
LT
373 unsigned int period_step;
374 unsigned int sleep_min; /* min ticks to sleep */
512bbd6a 375 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
d948035a 376 snd_pcm_uframes_t xfer_align; /* obsolete: xfer size need to be a multiple */
512bbd6a
TI
377 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
378 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
379 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
380 snd_pcm_uframes_t silence_size; /* silence block size */
381 snd_pcm_uframes_t boundary; /* pointers wrap point */
1da177e4
LT
382 unsigned char reserved[64]; /* reserved for future */
383};
384
512bbd6a 385struct snd_pcm_channel_info {
1da177e4 386 unsigned int channel;
85efde6f 387 __kernel_off_t offset; /* mmap offset */
1da177e4
LT
388 unsigned int first; /* offset to first sample in bits */
389 unsigned int step; /* samples distance in bits */
390};
391
512bbd6a
TI
392struct snd_pcm_status {
393 snd_pcm_state_t state; /* stream state */
1da177e4
LT
394 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
395 struct timespec tstamp; /* reference timestamp */
512bbd6a
TI
396 snd_pcm_uframes_t appl_ptr; /* appl ptr */
397 snd_pcm_uframes_t hw_ptr; /* hw ptr */
398 snd_pcm_sframes_t delay; /* current delay in frames */
399 snd_pcm_uframes_t avail; /* number of frames available */
400 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
401 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
402 snd_pcm_state_t suspended_state; /* suspended stream state */
1da177e4
LT
403 unsigned char reserved[60]; /* must be filled with zero */
404};
405
512bbd6a
TI
406struct snd_pcm_mmap_status {
407 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
1da177e4 408 int pad1; /* Needed for 64 bit alignment */
512bbd6a 409 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
1da177e4 410 struct timespec tstamp; /* Timestamp */
512bbd6a 411 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
1da177e4
LT
412};
413
512bbd6a
TI
414struct snd_pcm_mmap_control {
415 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
416 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
1da177e4
LT
417};
418
419#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
420#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
421#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
422
512bbd6a 423struct snd_pcm_sync_ptr {
1da177e4
LT
424 unsigned int flags;
425 union {
512bbd6a 426 struct snd_pcm_mmap_status status;
1da177e4
LT
427 unsigned char reserved[64];
428 } s;
429 union {
512bbd6a 430 struct snd_pcm_mmap_control control;
1da177e4
LT
431 unsigned char reserved[64];
432 } c;
433};
434
512bbd6a
TI
435struct snd_xferi {
436 snd_pcm_sframes_t result;
1da177e4 437 void __user *buf;
512bbd6a 438 snd_pcm_uframes_t frames;
1da177e4
LT
439};
440
512bbd6a
TI
441struct snd_xfern {
442 snd_pcm_sframes_t result;
1da177e4 443 void __user * __user *bufs;
512bbd6a 444 snd_pcm_uframes_t frames;
1da177e4
LT
445};
446
b751eef1
JK
447enum {
448 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
449 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */
450 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
451};
452
78a05b52
TI
453#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
454#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
455#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
456#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
457#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
458#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
459#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
460#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
461#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
462#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
463#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
464#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
465#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
466#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
467#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
468#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
469#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
470#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
471#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
472#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
473#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
474#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
475#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
476#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
477#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
478#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
479#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
480#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
481#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
1da177e4
LT
482
483/*****************************************************************************
484 * *
485 * MIDI v1.0 interface *
486 * *
487 *****************************************************************************/
488
489/*
490 * Raw MIDI section - /dev/snd/midi??
491 */
492
493#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
494
512bbd6a 495enum {
1da177e4
LT
496 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
497 SNDRV_RAWMIDI_STREAM_INPUT,
498 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
499};
500
501#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
502#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
503#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
504
512bbd6a 505struct snd_rawmidi_info {
1da177e4
LT
506 unsigned int device; /* RO/WR (control): device number */
507 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 508 int stream; /* WR: stream */
1da177e4
LT
509 int card; /* R: card number */
510 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
511 unsigned char id[64]; /* ID (user selectable) */
512 unsigned char name[80]; /* name of device */
513 unsigned char subname[32]; /* name of active or selected subdevice */
514 unsigned int subdevices_count;
515 unsigned int subdevices_avail;
516 unsigned char reserved[64]; /* reserved for future use */
517};
518
512bbd6a
TI
519struct snd_rawmidi_params {
520 int stream;
1da177e4
LT
521 size_t buffer_size; /* queue size in bytes */
522 size_t avail_min; /* minimum avail bytes for wakeup */
523 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
524 unsigned char reserved[16]; /* reserved for future use */
525};
526
512bbd6a
TI
527struct snd_rawmidi_status {
528 int stream;
1da177e4
LT
529 struct timespec tstamp; /* Timestamp */
530 size_t avail; /* available bytes */
531 size_t xruns; /* count of overruns since last status (in bytes) */
532 unsigned char reserved[16]; /* reserved for future use */
533};
534
78a05b52
TI
535#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
536#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
537#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
538#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
539#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
540#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
1da177e4
LT
541
542/*
543 * Timer section - /dev/snd/timer
544 */
545
a501dfa3 546#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
1da177e4 547
512bbd6a 548enum {
1da177e4
LT
549 SNDRV_TIMER_CLASS_NONE = -1,
550 SNDRV_TIMER_CLASS_SLAVE = 0,
551 SNDRV_TIMER_CLASS_GLOBAL,
552 SNDRV_TIMER_CLASS_CARD,
553 SNDRV_TIMER_CLASS_PCM,
554 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
555};
556
557/* slave timer classes */
512bbd6a 558enum {
1da177e4
LT
559 SNDRV_TIMER_SCLASS_NONE = 0,
560 SNDRV_TIMER_SCLASS_APPLICATION,
561 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
562 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
563 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
564};
565
566/* global timers (device member) */
567#define SNDRV_TIMER_GLOBAL_SYSTEM 0
568#define SNDRV_TIMER_GLOBAL_RTC 1
569#define SNDRV_TIMER_GLOBAL_HPET 2
bbaf5e97 570#define SNDRV_TIMER_GLOBAL_HRTIMER 3
1da177e4
LT
571
572/* info flags */
573#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
574
512bbd6a
TI
575struct snd_timer_id {
576 int dev_class;
577 int dev_sclass;
1da177e4
LT
578 int card;
579 int device;
580 int subdevice;
581};
582
512bbd6a
TI
583struct snd_timer_ginfo {
584 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
585 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
586 int card; /* card number */
587 unsigned char id[64]; /* timer identification */
588 unsigned char name[80]; /* timer name */
589 unsigned long reserved0; /* reserved for future use */
590 unsigned long resolution; /* average period resolution in ns */
591 unsigned long resolution_min; /* minimal period resolution in ns */
592 unsigned long resolution_max; /* maximal period resolution in ns */
593 unsigned int clients; /* active timer clients */
594 unsigned char reserved[32];
595};
596
512bbd6a
TI
597struct snd_timer_gparams {
598 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
599 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
600 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
601 unsigned char reserved[32];
602};
603
512bbd6a
TI
604struct snd_timer_gstatus {
605 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
606 unsigned long resolution; /* current period resolution in ns */
607 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
608 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
609 unsigned char reserved[32];
610};
611
512bbd6a
TI
612struct snd_timer_select {
613 struct snd_timer_id id; /* bind to timer ID */
1da177e4
LT
614 unsigned char reserved[32]; /* reserved */
615};
616
512bbd6a 617struct snd_timer_info {
1da177e4
LT
618 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
619 int card; /* card number */
620 unsigned char id[64]; /* timer identificator */
621 unsigned char name[80]; /* timer name */
622 unsigned long reserved0; /* reserved for future use */
623 unsigned long resolution; /* average period resolution in ns */
624 unsigned char reserved[64]; /* reserved */
625};
626
627#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
628#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
629#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
630
512bbd6a 631struct snd_timer_params {
1da177e4
LT
632 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
633 unsigned int ticks; /* requested resolution in ticks */
634 unsigned int queue_size; /* total size of queue (32-1024) */
635 unsigned int reserved0; /* reserved, was: failure locations */
636 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
637 unsigned char reserved[60]; /* reserved */
638};
639
512bbd6a 640struct snd_timer_status {
1da177e4
LT
641 struct timespec tstamp; /* Timestamp - last update */
642 unsigned int resolution; /* current period resolution in ns */
643 unsigned int lost; /* counter of master tick lost */
644 unsigned int overrun; /* count of read queue overruns */
645 unsigned int queue; /* used queue size */
646 unsigned char reserved[64]; /* reserved */
647};
648
78a05b52
TI
649#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
650#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
651#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
652#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
653#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
654#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
655#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
656#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
657#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
658#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
659/* The following four ioctls are changed since 1.0.9 due to confliction */
660#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
661#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
662#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
663#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
1da177e4 664
512bbd6a 665struct snd_timer_read {
1da177e4
LT
666 unsigned int resolution;
667 unsigned int ticks;
668};
669
512bbd6a 670enum {
1da177e4
LT
671 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
672 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
673 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
674 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
675 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
676 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
677 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
a501dfa3 678 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
5ca307b2 679 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
1da177e4
LT
680 /* master timer events for slave timer instances */
681 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
682 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
683 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
684 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
a501dfa3
JK
685 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
686 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
1da177e4
LT
687};
688
512bbd6a
TI
689struct snd_timer_tread {
690 int event;
1da177e4
LT
691 struct timespec tstamp;
692 unsigned int val;
693};
694
695/****************************************************************************
696 * *
697 * Section for driver control interface - /dev/snd/control? *
698 * *
699 ****************************************************************************/
700
ff33f230 701#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
1da177e4 702
512bbd6a 703struct snd_ctl_card_info {
1da177e4
LT
704 int card; /* card number */
705 int pad; /* reserved for future (was type) */
706 unsigned char id[16]; /* ID of card (user selectable) */
707 unsigned char driver[16]; /* Driver name */
708 unsigned char name[32]; /* Short name of soundcard */
709 unsigned char longname[80]; /* name + info text about soundcard */
710 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
711 unsigned char mixername[80]; /* visual mixer identification */
ff33f230 712 unsigned char components[128]; /* card components / fine identification, delimited with one space (AC97 etc..) */
1da177e4
LT
713};
714
512bbd6a
TI
715typedef int __bitwise snd_ctl_elem_type_t;
716#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
717#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
718#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
719#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
720#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
721#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
722#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
723#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
724
725typedef int __bitwise snd_ctl_elem_iface_t;
726#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
727#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
728#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
729#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
730#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
731#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
732#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
733#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
1da177e4
LT
734
735#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
736#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
737#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
738#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
8aa9b586
JK
739#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3) /* when was control changed */
740#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
741#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
742#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
743#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */
1da177e4
LT
744#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
745#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
746#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
8aa9b586 747#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */
1da177e4 748#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
8ace4f3c 749/* bits 30 and 31 are obsoleted (for indirect access) */
1da177e4
LT
750
751/* for further details see the ACPI and PCI power management specification */
752#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
753#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
754#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
755#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
756#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
757#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
758
512bbd6a 759struct snd_ctl_elem_id {
1da177e4 760 unsigned int numid; /* numeric identifier, zero = invalid */
512bbd6a 761 snd_ctl_elem_iface_t iface; /* interface identifier */
1da177e4
LT
762 unsigned int device; /* device/client number */
763 unsigned int subdevice; /* subdevice (substream) number */
764 unsigned char name[44]; /* ASCII name of item */
765 unsigned int index; /* index of item */
766};
767
512bbd6a 768struct snd_ctl_elem_list {
1da177e4
LT
769 unsigned int offset; /* W: first element ID to get */
770 unsigned int space; /* W: count of element IDs to get */
771 unsigned int used; /* R: count of element IDs set */
772 unsigned int count; /* R: count of all elements */
512bbd6a 773 struct snd_ctl_elem_id __user *pids; /* R: IDs */
1da177e4
LT
774 unsigned char reserved[50];
775};
776
512bbd6a
TI
777struct snd_ctl_elem_info {
778 struct snd_ctl_elem_id id; /* W: element ID */
779 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
1da177e4
LT
780 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
781 unsigned int count; /* count of values */
85efde6f 782 __kernel_pid_t owner; /* owner's PID of this control */
1da177e4
LT
783 union {
784 struct {
785 long min; /* R: minimum value */
786 long max; /* R: maximum value */
787 long step; /* R: step (0 variable) */
788 } integer;
789 struct {
790 long long min; /* R: minimum value */
791 long long max; /* R: maximum value */
792 long long step; /* R: step (0 variable) */
793 } integer64;
794 struct {
795 unsigned int items; /* R: number of items */
796 unsigned int item; /* W: item number */
797 char name[64]; /* R: value name */
798 } enumerated;
799 unsigned char reserved[128];
800 } value;
801 union {
802 unsigned short d[4]; /* dimensions */
8ace4f3c 803 unsigned short *d_ptr; /* indirect - obsoleted */
1da177e4
LT
804 } dimen;
805 unsigned char reserved[64-4*sizeof(unsigned short)];
806};
807
512bbd6a
TI
808struct snd_ctl_elem_value {
809 struct snd_ctl_elem_id id; /* W: element ID */
8ace4f3c 810 unsigned int indirect: 1; /* W: indirect access - obsoleted */
1da177e4
LT
811 union {
812 union {
813 long value[128];
8ace4f3c 814 long *value_ptr; /* obsoleted */
1da177e4
LT
815 } integer;
816 union {
817 long long value[64];
8ace4f3c 818 long long *value_ptr; /* obsoleted */
1da177e4
LT
819 } integer64;
820 union {
821 unsigned int item[128];
8ace4f3c 822 unsigned int *item_ptr; /* obsoleted */
1da177e4
LT
823 } enumerated;
824 union {
825 unsigned char data[512];
8ace4f3c 826 unsigned char *data_ptr; /* obsoleted */
1da177e4 827 } bytes;
512bbd6a 828 struct snd_aes_iec958 iec958;
1da177e4
LT
829 } value; /* RO */
830 struct timespec tstamp;
831 unsigned char reserved[128-sizeof(struct timespec)];
832};
833
42750b04
JK
834struct snd_ctl_tlv {
835 unsigned int numid; /* control element numeric identification */
836 unsigned int length; /* in bytes aligned to 4 */
837 unsigned int tlv[0]; /* first TLV */
838};
839
78a05b52
TI
840#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
841#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
842#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
843#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
844#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
845#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
846#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
847#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
848#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
849#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
850#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
851#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
852#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
853#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
854#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
855#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
856#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
857#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
858#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
859#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
860#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
861#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
862#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
863#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
864#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
1da177e4
LT
865
866/*
867 * Read interface.
868 */
869
870enum sndrv_ctl_event_type {
871 SNDRV_CTL_EVENT_ELEM = 0,
872 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
873};
874
875#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
876#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
877#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
8aa9b586 878#define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */
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LT
879#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
880
512bbd6a
TI
881struct snd_ctl_event {
882 int type; /* event type - SNDRV_CTL_EVENT_* */
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LT
883 union {
884 struct {
885 unsigned int mask;
512bbd6a 886 struct snd_ctl_elem_id id;
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LT
887 } elem;
888 unsigned char data8[60];
889 } data;
890};
891
892/*
893 * Control names
894 */
895
896#define SNDRV_CTL_NAME_NONE ""
897#define SNDRV_CTL_NAME_PLAYBACK "Playback "
898#define SNDRV_CTL_NAME_CAPTURE "Capture "
899
900#define SNDRV_CTL_NAME_IEC958_NONE ""
901#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
902#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
903#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
904#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
905#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
906#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
907#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
908#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
909
1da177e4 910#endif /* __SOUND_ASOUND_H */