[linux-2.6-block.git] / include / net / caif / caif_hsi.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) ST-Ericsson AB 2010
 * Author:  Daniel Martensson / daniel.martensson@stericsson.com
 *	    Dmitry.Tarnyagin  / dmitry.tarnyagin@stericsson.com
 */

#ifndef CAIF_HSI_H_
#define CAIF_HSI_H_

#include <net/caif/caif_layer.h>
#include <net/caif/caif_device.h>
#include <linux/atomic.h>

/*
 * Maximum number of CAIF frames that can reside in the same HSI frame.
 */
#define CFHSI_MAX_PKTS 15

/*
 * Maximum number of bytes used for the frame that can be embedded in the
 * HSI descriptor.
 */
#define CFHSI_MAX_EMB_FRM_SZ 96

/*
 * Decides if HSI buffers should be prefilled with 0xFF pattern for easier
 * debugging. Both TX and RX buffers will be filled before the transfer.
 */
#define CFHSI_DBG_PREFILL		0

/* Structure describing a HSI packet descriptor. */
#pragma pack(1) /* Byte alignment. */
struct cfhsi_desc {
	u8 header;
	u8 offset;
	u16 cffrm_len[CFHSI_MAX_PKTS];
	u8 emb_frm[CFHSI_MAX_EMB_FRM_SZ];
};
#pragma pack() /* Default alignment. */

/* Size of the complete HSI packet descriptor. */
#define CFHSI_DESC_SZ (sizeof(struct cfhsi_desc))

/*
 * Size of the complete HSI packet descriptor excluding the optional embedded
 * CAIF frame.
 */
#define CFHSI_DESC_SHORT_SZ (CFHSI_DESC_SZ - CFHSI_MAX_EMB_FRM_SZ)

/*
 * Maximum bytes transferred in one transfer.
 */
#define CFHSI_MAX_CAIF_FRAME_SZ 4096

#define CFHSI_MAX_PAYLOAD_SZ (CFHSI_MAX_PKTS * CFHSI_MAX_CAIF_FRAME_SZ)

/* Size of the complete HSI TX buffer. */
#define CFHSI_BUF_SZ_TX (CFHSI_DESC_SZ + CFHSI_MAX_PAYLOAD_SZ)

/* Size of the complete HSI RX buffer. */
#define CFHSI_BUF_SZ_RX ((2 * CFHSI_DESC_SZ) + CFHSI_MAX_PAYLOAD_SZ)

/* Bitmasks for the HSI descriptor. */
#define CFHSI_PIGGY_DESC		(0x01 << 7)

#define CFHSI_TX_STATE_IDLE			0
#define CFHSI_TX_STATE_XFER			1

#define CFHSI_RX_STATE_DESC			0
#define CFHSI_RX_STATE_PAYLOAD			1

/* Bitmasks for power management. */
#define CFHSI_WAKE_UP				0
#define CFHSI_WAKE_UP_ACK			1
#define CFHSI_WAKE_DOWN_ACK			2
#define CFHSI_AWAKE				3
#define CFHSI_WAKELOCK_HELD			4
#define CFHSI_SHUTDOWN				5
#define CFHSI_FLUSH_FIFO			6

#ifndef CFHSI_INACTIVITY_TOUT
#define CFHSI_INACTIVITY_TOUT			(1 * HZ)
#endif /* CFHSI_INACTIVITY_TOUT */

#ifndef CFHSI_WAKE_TOUT
#define CFHSI_WAKE_TOUT			(3 * HZ)
#endif /* CFHSI_WAKE_TOUT */

#ifndef CFHSI_MAX_RX_RETRIES
#define CFHSI_MAX_RX_RETRIES		(10 * HZ)
#endif

/* Structure implemented by the CAIF HSI driver. */
struct cfhsi_cb_ops {
	void (*tx_done_cb) (struct cfhsi_cb_ops *drv);
	void (*rx_done_cb) (struct cfhsi_cb_ops *drv);
	void (*wake_up_cb) (struct cfhsi_cb_ops *drv);
	void (*wake_down_cb) (struct cfhsi_cb_ops *drv);
};

/* Structure implemented by HSI device. */
struct cfhsi_ops {
	int (*cfhsi_up) (struct cfhsi_ops *dev);
	int (*cfhsi_down) (struct cfhsi_ops *dev);
	int (*cfhsi_tx) (u8 *ptr, int len, struct cfhsi_ops *dev);
	int (*cfhsi_rx) (u8 *ptr, int len, struct cfhsi_ops *dev);
	int (*cfhsi_wake_up) (struct cfhsi_ops *dev);
	int (*cfhsi_wake_down) (struct cfhsi_ops *dev);
	int (*cfhsi_get_peer_wake) (struct cfhsi_ops *dev, bool *status);
	int (*cfhsi_fifo_occupancy) (struct cfhsi_ops *dev, size_t *occupancy);
	int (*cfhsi_rx_cancel)(struct cfhsi_ops *dev);
	struct cfhsi_cb_ops *cb_ops;
};

/* Structure holds status of received CAIF frames processing */
struct cfhsi_rx_state {
	int state;
	int nfrms;
	int pld_len;
	int retries;
	bool piggy_desc;
};

/* Priority mapping */
enum {
	CFHSI_PRIO_CTL = 0,
	CFHSI_PRIO_VI,
	CFHSI_PRIO_VO,
	CFHSI_PRIO_BEBK,
	CFHSI_PRIO_LAST,
};

struct cfhsi_config {
	u32 inactivity_timeout;
	u32 aggregation_timeout;
	u32 head_align;
	u32 tail_align;
	u32 q_high_mark;
	u32 q_low_mark;
};

/* Structure implemented by CAIF HSI drivers. */
struct cfhsi {
	struct caif_dev_common cfdev;
	struct net_device *ndev;
	struct platform_device *pdev;
	struct sk_buff_head qhead[CFHSI_PRIO_LAST];
	struct cfhsi_cb_ops cb_ops;
	struct cfhsi_ops *ops;
	int tx_state;
	struct cfhsi_rx_state rx_state;
	struct cfhsi_config cfg;
	int rx_len;
	u8 *rx_ptr;
	u8 *tx_buf;
	u8 *rx_buf;
	u8 *rx_flip_buf;
	spinlock_t lock;
	int flow_off_sent;
	struct list_head list;
	struct work_struct wake_up_work;
	struct work_struct wake_down_work;
	struct work_struct out_of_sync_work;
	struct workqueue_struct *wq;
	wait_queue_head_t wake_up_wait;
	wait_queue_head_t wake_down_wait;
	wait_queue_head_t flush_fifo_wait;
	struct timer_list inactivity_timer;
	struct timer_list rx_slowpath_timer;

	/* TX aggregation */
	int aggregation_len;
	struct timer_list aggregation_timer;

	unsigned long bits;
};
extern struct platform_driver cfhsi_driver;

/**
 * enum ifla_caif_hsi - CAIF HSI NetlinkRT parameters.
 * @IFLA_CAIF_HSI_INACTIVITY_TOUT: Inactivity timeout before
 *			taking the HSI wakeline down, in milliseconds.
 * When using RT Netlink to create, destroy or configure a CAIF HSI interface,
 * enum ifla_caif_hsi is used to specify the configuration attributes.
 */
enum ifla_caif_hsi {
	__IFLA_CAIF_HSI_UNSPEC,
	__IFLA_CAIF_HSI_INACTIVITY_TOUT,
	__IFLA_CAIF_HSI_AGGREGATION_TOUT,
	__IFLA_CAIF_HSI_HEAD_ALIGN,
	__IFLA_CAIF_HSI_TAIL_ALIGN,
	__IFLA_CAIF_HSI_QHIGH_WATERMARK,
	__IFLA_CAIF_HSI_QLOW_WATERMARK,
	__IFLA_CAIF_HSI_MAX
};

struct cfhsi_ops *cfhsi_get_ops(void);

#endif		/* CAIF_HSI_H_ */
Commit	Line	Data
af873fce	1	/* SPDX-License-Identifier: GPL-2.0-only */
40d69043 DT	2	/*
40d69043 DT	3	* Copyright (C) ST-Ericsson AB 2010
40d69043 DT	4	* Author: Daniel Martensson / daniel.martensson@stericsson.com
40d69043 DT	5	* Dmitry.Tarnyagin / dmitry.tarnyagin@stericsson.com
40d69043 DT	6	*/
	7
	8	#ifndef CAIF_HSI_H_
	9	#define CAIF_HSI_H_
	10
	11	#include <net/caif/caif_layer.h>
	12	#include <net/caif/caif_device.h>
	13	#include <linux/atomic.h>
	14
	15	/*
	16	* Maximum number of CAIF frames that can reside in the same HSI frame.
	17	*/
	18	#define CFHSI_MAX_PKTS 15
	19
	20	/*
	21	* Maximum number of bytes used for the frame that can be embedded in the
	22	* HSI descriptor.
	23	*/
	24	#define CFHSI_MAX_EMB_FRM_SZ 96
	25
	26	/*
	27	* Decides if HSI buffers should be prefilled with 0xFF pattern for easier
	28	* debugging. Both TX and RX buffers will be filled before the transfer.
	29	*/
	30	#define CFHSI_DBG_PREFILL 0
	31
	32	/* Structure describing a HSI packet descriptor. */
	33	#pragma pack(1) /* Byte alignment. */
	34	struct cfhsi_desc {
	35	u8 header;
	36	u8 offset;
	37	u16 cffrm_len[CFHSI_MAX_PKTS];
	38	u8 emb_frm[CFHSI_MAX_EMB_FRM_SZ];
	39	};
	40	#pragma pack() /* Default alignment. */
	41
	42	/* Size of the complete HSI packet descriptor. */
	43	#define CFHSI_DESC_SZ (sizeof(struct cfhsi_desc))
	44
	45	/*
	46	* Size of the complete HSI packet descriptor excluding the optional embedded
	47	* CAIF frame.
	48	*/
	49	#define CFHSI_DESC_SHORT_SZ (CFHSI_DESC_SZ - CFHSI_MAX_EMB_FRM_SZ)
	50
	51	/*
	52	* Maximum bytes transferred in one transfer.
	53	*/
5bbed92d DM	54	#define CFHSI_MAX_CAIF_FRAME_SZ 4096
	55
	56	#define CFHSI_MAX_PAYLOAD_SZ (CFHSI_MAX_PKTS * CFHSI_MAX_CAIF_FRAME_SZ)
40d69043 DT	57
	58	/* Size of the complete HSI TX buffer. */
	59	#define CFHSI_BUF_SZ_TX (CFHSI_DESC_SZ + CFHSI_MAX_PAYLOAD_SZ)
	60
	61	/* Size of the complete HSI RX buffer. */
	62	#define CFHSI_BUF_SZ_RX ((2 * CFHSI_DESC_SZ) + CFHSI_MAX_PAYLOAD_SZ)
	63
	64	/* Bitmasks for the HSI descriptor. */
	65	#define CFHSI_PIGGY_DESC (0x01 << 7)
	66
	67	#define CFHSI_TX_STATE_IDLE 0
	68	#define CFHSI_TX_STATE_XFER 1
	69
	70	#define CFHSI_RX_STATE_DESC 0
	71	#define CFHSI_RX_STATE_PAYLOAD 1
	72
	73	/* Bitmasks for power management. */
	74	#define CFHSI_WAKE_UP 0
	75	#define CFHSI_WAKE_UP_ACK 1
	76	#define CFHSI_WAKE_DOWN_ACK 2
	77	#define CFHSI_AWAKE 3
687b13e9 DM	78	#define CFHSI_WAKELOCK_HELD 4
	79	#define CFHSI_SHUTDOWN 5
	80	#define CFHSI_FLUSH_FIFO 6
40d69043 DT	81
	82	#ifndef CFHSI_INACTIVITY_TOUT
	83	#define CFHSI_INACTIVITY_TOUT (1 * HZ)
	84	#endif /* CFHSI_INACTIVITY_TOUT */
	85
687b13e9 DM	86	#ifndef CFHSI_WAKE_TOUT
	87	#define CFHSI_WAKE_TOUT (3 * HZ)
	88	#endif /* CFHSI_WAKE_TOUT */
40d69043	89
687b13e9 DM	90	#ifndef CFHSI_MAX_RX_RETRIES
	91	#define CFHSI_MAX_RX_RETRIES (10 * HZ)
	92	#endif
40d69043 DT	93
40d69043 DT	94	/* Structure implemented by the CAIF HSI driver. */
1c385f1f SB	95	struct cfhsi_cb_ops {
	96	void (tx_done_cb) (struct cfhsi_cb_ops drv);
	97	void (rx_done_cb) (struct cfhsi_cb_ops drv);
	98	void (wake_up_cb) (struct cfhsi_cb_ops drv);
	99	void (wake_down_cb) (struct cfhsi_cb_ops drv);
40d69043 DT	100	};
	101
	102	/* Structure implemented by HSI device. */
1c385f1f SB	103	struct cfhsi_ops {
	104	int (cfhsi_up) (struct cfhsi_ops dev);
	105	int (cfhsi_down) (struct cfhsi_ops dev);
	106	int (cfhsi_tx) (u8 ptr, int len, struct cfhsi_ops *dev);
	107	int (cfhsi_rx) (u8 ptr, int len, struct cfhsi_ops *dev);
	108	int (cfhsi_wake_up) (struct cfhsi_ops dev);
	109	int (cfhsi_wake_down) (struct cfhsi_ops dev);
	110	int (cfhsi_get_peer_wake) (struct cfhsi_ops dev, bool *status);
	111	int (cfhsi_fifo_occupancy) (struct cfhsi_ops dev, size_t *occupancy);
	112	int (cfhsi_rx_cancel)(struct cfhsi_ops dev);
	113	struct cfhsi_cb_ops *cb_ops;
40d69043 DT	114	};
40d69043 DT	115
687b13e9 DM	116	/* Structure holds status of received CAIF frames processing */
	117	struct cfhsi_rx_state {
	118	int state;
	119	int nfrms;
	120	int pld_len;
	121	int retries;
	122	bool piggy_desc;
	123	};
	124
ece367d5 DT	125	/* Priority mapping */
	126	enum {
	127	CFHSI_PRIO_CTL = 0,
	128	CFHSI_PRIO_VI,
	129	CFHSI_PRIO_VO,
	130	CFHSI_PRIO_BEBK,
	131	CFHSI_PRIO_LAST,
	132	};
	133
91fa0cbc SB	134	struct cfhsi_config {
	135	u32 inactivity_timeout;
	136	u32 aggregation_timeout;
	137	u32 head_align;
	138	u32 tail_align;
	139	u32 q_high_mark;
	140	u32 q_low_mark;
	141	};
	142
40d69043 DT	143	/* Structure implemented by CAIF HSI drivers. */
	144	struct cfhsi {
	145	struct caif_dev_common cfdev;
	146	struct net_device *ndev;
	147	struct platform_device *pdev;
ece367d5	148	struct sk_buff_head qhead[CFHSI_PRIO_LAST];
1c385f1f SB	149	struct cfhsi_cb_ops cb_ops;
1c385f1f SB	150	struct cfhsi_ops *ops;
40d69043	151	int tx_state;
687b13e9	152	struct cfhsi_rx_state rx_state;
91fa0cbc	153	struct cfhsi_config cfg;
40d69043 DT	154	int rx_len;
	155	u8 *rx_ptr;
	156	u8 *tx_buf;
	157	u8 *rx_buf;
332ad43f	158	u8 *rx_flip_buf;
40d69043 DT	159	spinlock_t lock;
40d69043 DT	160	int flow_off_sent;
40d69043 DT	161	struct list_head list;
	162	struct work_struct wake_up_work;
	163	struct work_struct wake_down_work;
5bbed92d	164	struct work_struct out_of_sync_work;
40d69043 DT	165	struct workqueue_struct *wq;
	166	wait_queue_head_t wake_up_wait;
	167	wait_queue_head_t wake_down_wait;
	168	wait_queue_head_t flush_fifo_wait;
ece367d5	169	struct timer_list inactivity_timer;
687b13e9	170	struct timer_list rx_slowpath_timer;
ece367d5 DT	171
ece367d5 DT	172	/* TX aggregation */
ece367d5 DT	173	int aggregation_len;
	174	struct timer_list aggregation_timer;
	175
40d69043 DT	176	unsigned long bits;
40d69043 DT	177	};
40d69043 DT	178	extern struct platform_driver cfhsi_driver;
40d69043 DT	179
c4125400 SB	180	/**
	181	* enum ifla_caif_hsi - CAIF HSI NetlinkRT parameters.
	182	* @IFLA_CAIF_HSI_INACTIVITY_TOUT: Inactivity timeout before
	183	* taking the HSI wakeline down, in milliseconds.
	184	* When using RT Netlink to create, destroy or configure a CAIF HSI interface,
	185	* enum ifla_caif_hsi is used to specify the configuration attributes.
	186	*/
	187	enum ifla_caif_hsi {
	188	__IFLA_CAIF_HSI_UNSPEC,
	189	__IFLA_CAIF_HSI_INACTIVITY_TOUT,
	190	__IFLA_CAIF_HSI_AGGREGATION_TOUT,
	191	__IFLA_CAIF_HSI_HEAD_ALIGN,
	192	__IFLA_CAIF_HSI_TAIL_ALIGN,
	193	__IFLA_CAIF_HSI_QHIGH_WATERMARK,
	194	__IFLA_CAIF_HSI_QLOW_WATERMARK,
	195	__IFLA_CAIF_HSI_MAX
	196	};
	197
a22b8f4b	198	struct cfhsi_ops *cfhsi_get_ops(void);
c4125400	199
40d69043	200	#endif /* CAIF_HSI_H_ */