ocxl: Remove some unused exported symbols
[linux-block.git] / include / misc / ocxl.h
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1// SPDX-License-Identifier: GPL-2.0+
2// Copyright 2017 IBM Corp.
3#ifndef _MISC_OCXL_H_
4#define _MISC_OCXL_H_
5
6#include <linux/pci.h>
7
8/*
9 * Opencapi drivers all need some common facilities, like parsing the
10 * device configuration space, adding a Process Element to the Shared
11 * Process Area, etc...
12 *
13 * The ocxl module provides a kernel API, to allow other drivers to
14 * reuse common code. A bit like a in-kernel library.
15 */
16
17#define OCXL_AFU_NAME_SZ (24+1) /* add 1 for NULL termination */
18
19/*
20 * The following 2 structures are a fairly generic way of representing
21 * the configuration data for a function and AFU, as read from the
22 * configuration space.
23 */
24struct ocxl_afu_config {
25 u8 idx;
26 int dvsec_afu_control_pos; /* offset of AFU control DVSEC */
27 char name[OCXL_AFU_NAME_SZ];
28 u8 version_major;
29 u8 version_minor;
30 u8 afuc_type;
31 u8 afum_type;
32 u8 profile;
33 u8 global_mmio_bar; /* global MMIO area */
34 u64 global_mmio_offset;
35 u32 global_mmio_size;
36 u8 pp_mmio_bar; /* per-process MMIO area */
37 u64 pp_mmio_offset;
38 u32 pp_mmio_stride;
39 u8 log_mem_size;
40 u8 pasid_supported_log;
41 u16 actag_supported;
42};
43
44struct ocxl_fn_config {
45 int dvsec_tl_pos; /* offset of the Transaction Layer DVSEC */
46 int dvsec_function_pos; /* offset of the Function DVSEC */
47 int dvsec_afu_info_pos; /* offset of the AFU information DVSEC */
48 s8 max_pasid_log;
49 s8 max_afu_index;
50};
51
52/*
53 * Read the configuration space of a function and fill in a
54 * ocxl_fn_config structure with all the function details
55 */
53e3e745 56int ocxl_config_read_function(struct pci_dev *dev,
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57 struct ocxl_fn_config *fn);
58
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59/*
60 * Read the configuration space of a function for the AFU specified by
61 * the index 'afu_idx'. Fills in a ocxl_afu_config structure
62 */
53e3e745 63int ocxl_config_read_afu(struct pci_dev *dev,
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64 struct ocxl_fn_config *fn,
65 struct ocxl_afu_config *afu,
66 u8 afu_idx);
67
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68/*
69 * Tell an AFU, by writing in the configuration space, the PASIDs that
70 * it can use. Range starts at 'pasid_base' and its size is a multiple
71 * of 2
72 *
73 * 'afu_control_offset' is the offset of the AFU control DVSEC which
74 * can be found in the function configuration
75 */
53e3e745 76void ocxl_config_set_afu_pasid(struct pci_dev *dev,
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77 int afu_control_offset,
78 int pasid_base, u32 pasid_count_log);
79
80/*
81 * Get the actag configuration for the function:
82 * 'base' is the first actag value that can be used.
83 * 'enabled' it the number of actags available, starting from base.
84 * 'supported' is the total number of actags desired by all the AFUs
85 * of the function.
86 */
53e3e745 87int ocxl_config_get_actag_info(struct pci_dev *dev,
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88 u16 *base, u16 *enabled, u16 *supported);
89
90/*
91 * Tell a function, by writing in the configuration space, the actags
92 * it can use.
93 *
94 * 'func_offset' is the offset of the Function DVSEC that can found in
95 * the function configuration
96 */
53e3e745 97void ocxl_config_set_actag(struct pci_dev *dev, int func_offset,
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98 u32 actag_base, u32 actag_count);
99
100/*
101 * Tell an AFU, by writing in the configuration space, the actags it
102 * can use.
103 *
104 * 'afu_control_offset' is the offset of the AFU control DVSEC for the
105 * desired AFU. It can be found in the AFU configuration
106 */
53e3e745 107void ocxl_config_set_afu_actag(struct pci_dev *dev,
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108 int afu_control_offset,
109 int actag_base, int actag_count);
110
111/*
112 * Enable/disable an AFU, by writing in the configuration space.
113 *
114 * 'afu_control_offset' is the offset of the AFU control DVSEC for the
115 * desired AFU. It can be found in the AFU configuration
116 */
53e3e745 117void ocxl_config_set_afu_state(struct pci_dev *dev,
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118 int afu_control_offset, int enable);
119
120/*
121 * Set the Transaction Layer configuration in the configuration space.
122 * Only needed for function 0.
123 *
124 * It queries the host TL capabilities, find some common ground
125 * between the host and device, and set the Transaction Layer on both
126 * accordingly.
127 */
53e3e745 128int ocxl_config_set_TL(struct pci_dev *dev, int tl_dvsec);
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129
130/*
131 * Request an AFU to terminate a PASID.
132 * Will return once the AFU has acked the request, or an error in case
133 * of timeout.
134 *
135 * The hardware can only terminate one PASID at a time, so caller must
136 * guarantee some kind of serialization.
137 *
138 * 'afu_control_offset' is the offset of the AFU control DVSEC for the
139 * desired AFU. It can be found in the AFU configuration
140 */
53e3e745 141int ocxl_config_terminate_pasid(struct pci_dev *dev,
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142 int afu_control_offset, int pasid);
143
144/*
145 * Set up the opencapi link for the function.
146 *
147 * When called for the first time for a link, it sets up the Shared
148 * Process Area for the link and the interrupt handler to process
149 * translation faults.
150 *
151 * Returns a 'link handle' that should be used for further calls for
152 * the link
153 */
53e3e745 154int ocxl_link_setup(struct pci_dev *dev, int PE_mask,
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155 void **link_handle);
156
157/*
158 * Remove the association between the function and its link.
159 */
53e3e745 160void ocxl_link_release(struct pci_dev *dev, void *link_handle);
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161
162/*
163 * Add a Process Element to the Shared Process Area for a link.
164 * The process is defined by its PASID, pid, tid and its mm_struct.
165 *
166 * 'xsl_err_cb' is an optional callback if the driver wants to be
167 * notified when the translation fault interrupt handler detects an
168 * address error.
169 * 'xsl_err_data' is an argument passed to the above callback, if
170 * defined
171 */
53e3e745 172int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
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173 u64 amr, struct mm_struct *mm,
174 void (*xsl_err_cb)(void *data, u64 addr, u64 dsisr),
175 void *xsl_err_data);
176
177/*
178 * Remove a Process Element from the Shared Process Area for a link
179 */
53e3e745 180int ocxl_link_remove_pe(void *link_handle, int pasid);
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181
182/*
183 * Allocate an AFU interrupt associated to the link.
184 *
185 * 'hw_irq' is the hardware interrupt number
186 * 'obj_handle' is the 64-bit object handle to be passed to the AFU to
187 * trigger the interrupt.
188 * On P9, 'obj_handle' is an address, which, if written, triggers the
189 * interrupt. It is an MMIO address which needs to be remapped (one
190 * page).
191 */
53e3e745 192int ocxl_link_irq_alloc(void *link_handle, int *hw_irq,
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193 u64 *obj_handle);
194
195/*
196 * Free a previously allocated AFU interrupt
197 */
53e3e745 198void ocxl_link_free_irq(void *link_handle, int hw_irq);
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199
200#endif /* _MISC_OCXL_H_ */