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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
89e1f7d4 AW |
2 | /* |
3 | * Copyright (C) 2012 Red Hat, Inc. All rights reserved. | |
4 | * Author: Alex Williamson <alex.williamson@redhat.com> | |
5 | * | |
89e1f7d4 AW |
6 | * Derived from original vfio: |
7 | * Copyright 2010 Cisco Systems, Inc. All rights reserved. | |
8 | * Author: Tom Lyon, pugs@cisco.com | |
9 | */ | |
10 | ||
11 | #include <linux/mutex.h> | |
12 | #include <linux/pci.h> | |
c39f8fa7 | 13 | #include <linux/vfio.h> |
6d7425f1 | 14 | #include <linux/irqbypass.h> |
28541d41 | 15 | #include <linux/types.h> |
cc20d799 | 16 | #include <linux/uuid.h> |
137e5531 | 17 | #include <linux/notifier.h> |
89e1f7d4 | 18 | |
9a389938 MG |
19 | #ifndef VFIO_PCI_CORE_H |
20 | #define VFIO_PCI_CORE_H | |
89e1f7d4 AW |
21 | |
22 | #define VFIO_PCI_OFFSET_SHIFT 40 | |
23 | ||
24 | #define VFIO_PCI_OFFSET_TO_INDEX(off) (off >> VFIO_PCI_OFFSET_SHIFT) | |
25 | #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT) | |
26 | #define VFIO_PCI_OFFSET_MASK (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1) | |
27 | ||
345d7104 AW |
28 | /* Special capability IDs predefined access */ |
29 | #define PCI_CAP_ID_INVALID 0xFF /* default raw access */ | |
30 | #define PCI_CAP_ID_INVALID_VIRT 0xFE /* default virt access */ | |
31 | ||
30656177 AW |
32 | /* Cap maximum number of ioeventfds per device (arbitrary) */ |
33 | #define VFIO_PCI_IOEVENTFD_MAX 1000 | |
34 | ||
35 | struct vfio_pci_ioeventfd { | |
36 | struct list_head next; | |
53647510 | 37 | struct vfio_pci_core_device *vdev; |
30656177 AW |
38 | struct virqfd *virqfd; |
39 | void __iomem *addr; | |
40 | uint64_t data; | |
41 | loff_t pos; | |
42 | int bar; | |
43 | int count; | |
bc93b9ae | 44 | bool test_mem; |
30656177 AW |
45 | }; |
46 | ||
89e1f7d4 AW |
47 | struct vfio_pci_irq_ctx { |
48 | struct eventfd_ctx *trigger; | |
49 | struct virqfd *unmask; | |
50 | struct virqfd *mask; | |
51 | char *name; | |
52 | bool masked; | |
6d7425f1 | 53 | struct irq_bypass_producer producer; |
89e1f7d4 AW |
54 | }; |
55 | ||
53647510 | 56 | struct vfio_pci_core_device; |
28541d41 AW |
57 | struct vfio_pci_region; |
58 | ||
59 | struct vfio_pci_regops { | |
53647510 | 60 | ssize_t (*rw)(struct vfio_pci_core_device *vdev, char __user *buf, |
28541d41 | 61 | size_t count, loff_t *ppos, bool iswrite); |
53647510 | 62 | void (*release)(struct vfio_pci_core_device *vdev, |
28541d41 | 63 | struct vfio_pci_region *region); |
53647510 | 64 | int (*mmap)(struct vfio_pci_core_device *vdev, |
a15b1883 AK |
65 | struct vfio_pci_region *region, |
66 | struct vm_area_struct *vma); | |
53647510 | 67 | int (*add_capability)(struct vfio_pci_core_device *vdev, |
c2c0f1cd AK |
68 | struct vfio_pci_region *region, |
69 | struct vfio_info_cap *caps); | |
28541d41 AW |
70 | }; |
71 | ||
72 | struct vfio_pci_region { | |
73 | u32 type; | |
74 | u32 subtype; | |
75 | const struct vfio_pci_regops *ops; | |
76 | void *data; | |
77 | size_t size; | |
78 | u32 flags; | |
79 | }; | |
80 | ||
05f0c03f YX |
81 | struct vfio_pci_dummy_resource { |
82 | struct resource resource; | |
83 | int index; | |
84 | struct list_head res_next; | |
85 | }; | |
86 | ||
cc20d799 AW |
87 | struct vfio_pci_vf_token { |
88 | struct mutex lock; | |
89 | uuid_t uuid; | |
90 | int users; | |
91 | }; | |
92 | ||
11c4cd07 AW |
93 | struct vfio_pci_mmap_vma { |
94 | struct vm_area_struct *vma; | |
95 | struct list_head vma_next; | |
96 | }; | |
97 | ||
53647510 | 98 | struct vfio_pci_core_device { |
6b018e20 | 99 | struct vfio_device vdev; |
89e1f7d4 | 100 | struct pci_dev *pdev; |
c9c13ba4 DE |
101 | void __iomem *barmap[PCI_STD_NUM_BARS]; |
102 | bool bar_mmap_supported[PCI_STD_NUM_BARS]; | |
89e1f7d4 AW |
103 | u8 *pci_config_map; |
104 | u8 *vconfig; | |
105 | struct perm_bits *msi_perm; | |
106 | spinlock_t irqlock; | |
107 | struct mutex igate; | |
89e1f7d4 AW |
108 | struct vfio_pci_irq_ctx *ctx; |
109 | int num_ctx; | |
110 | int irq_type; | |
28541d41 AW |
111 | int num_regions; |
112 | struct vfio_pci_region *region; | |
89e1f7d4 AW |
113 | u8 msi_qmax; |
114 | u8 msix_bar; | |
115 | u16 msix_size; | |
116 | u32 msix_offset; | |
117 | u32 rbar[7]; | |
118 | bool pci_2_3; | |
119 | bool virq_disabled; | |
120 | bool reset_works; | |
121 | bool extended_caps; | |
122 | bool bardirty; | |
84237a82 | 123 | bool has_vga; |
bc4fba77 | 124 | bool needs_reset; |
45074405 | 125 | bool nointx; |
51ef3a00 | 126 | bool needs_pm_restore; |
89e1f7d4 | 127 | struct pci_saved_state *pci_saved_state; |
51ef3a00 | 128 | struct pci_saved_state *pm_save; |
30656177 | 129 | int ioeventfds_nr; |
dad9f897 | 130 | struct eventfd_ctx *err_trigger; |
6140a8f5 | 131 | struct eventfd_ctx *req_trigger; |
05f0c03f | 132 | struct list_head dummy_resources_list; |
30656177 AW |
133 | struct mutex ioeventfds_lock; |
134 | struct list_head ioeventfds_list; | |
cc20d799 | 135 | struct vfio_pci_vf_token *vf_token; |
137e5531 | 136 | struct notifier_block nb; |
11c4cd07 AW |
137 | struct mutex vma_lock; |
138 | struct list_head vma_list; | |
abafbc55 | 139 | struct rw_semaphore memory_lock; |
89e1f7d4 AW |
140 | }; |
141 | ||
142 | #define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) | |
143 | #define is_msi(vdev) (vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX) | |
144 | #define is_msix(vdev) (vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX) | |
145 | #define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev))) | |
146 | #define irq_is(vdev, type) (vdev->irq_type == type) | |
147 | ||
53647510 MG |
148 | extern void vfio_pci_intx_mask(struct vfio_pci_core_device *vdev); |
149 | extern void vfio_pci_intx_unmask(struct vfio_pci_core_device *vdev); | |
89e1f7d4 | 150 | |
53647510 | 151 | extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_core_device *vdev, |
89e1f7d4 AW |
152 | uint32_t flags, unsigned index, |
153 | unsigned start, unsigned count, void *data); | |
154 | ||
53647510 | 155 | extern ssize_t vfio_pci_config_rw(struct vfio_pci_core_device *vdev, |
906ee99d AW |
156 | char __user *buf, size_t count, |
157 | loff_t *ppos, bool iswrite); | |
158 | ||
53647510 | 159 | extern ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, |
906ee99d | 160 | size_t count, loff_t *ppos, bool iswrite); |
89e1f7d4 | 161 | |
53647510 | 162 | extern ssize_t vfio_pci_vga_rw(struct vfio_pci_core_device *vdev, char __user *buf, |
84237a82 AW |
163 | size_t count, loff_t *ppos, bool iswrite); |
164 | ||
53647510 | 165 | extern long vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset, |
30656177 AW |
166 | uint64_t data, int count, int fd); |
167 | ||
89e1f7d4 AW |
168 | extern int vfio_pci_init_perm_bits(void); |
169 | extern void vfio_pci_uninit_perm_bits(void); | |
170 | ||
53647510 MG |
171 | extern int vfio_config_init(struct vfio_pci_core_device *vdev); |
172 | extern void vfio_config_free(struct vfio_pci_core_device *vdev); | |
28541d41 | 173 | |
53647510 | 174 | extern int vfio_pci_register_dev_region(struct vfio_pci_core_device *vdev, |
28541d41 AW |
175 | unsigned int type, unsigned int subtype, |
176 | const struct vfio_pci_regops *ops, | |
177 | size_t size, u32 flags, void *data); | |
51ef3a00 | 178 | |
53647510 | 179 | extern int vfio_pci_set_power_state(struct vfio_pci_core_device *vdev, |
51ef3a00 AW |
180 | pci_power_t state); |
181 | ||
53647510 MG |
182 | extern bool __vfio_pci_memory_enabled(struct vfio_pci_core_device *vdev); |
183 | extern void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device | |
abafbc55 | 184 | *vdev); |
53647510 MG |
185 | extern u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device *vdev); |
186 | extern void vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device *vdev, | |
abafbc55 AW |
187 | u16 cmd); |
188 | ||
5846ff54 | 189 | #ifdef CONFIG_VFIO_PCI_IGD |
53647510 | 190 | extern int vfio_pci_igd_init(struct vfio_pci_core_device *vdev); |
5846ff54 | 191 | #else |
53647510 | 192 | static inline int vfio_pci_igd_init(struct vfio_pci_core_device *vdev) |
5846ff54 AW |
193 | { |
194 | return -ENODEV; | |
195 | } | |
196 | #endif | |
e6b817d4 | 197 | |
b9abef43 | 198 | #ifdef CONFIG_S390 |
53647510 | 199 | extern int vfio_pci_info_zdev_add_caps(struct vfio_pci_core_device *vdev, |
e6b817d4 MR |
200 | struct vfio_info_cap *caps); |
201 | #else | |
53647510 | 202 | static inline int vfio_pci_info_zdev_add_caps(struct vfio_pci_core_device *vdev, |
e6b817d4 MR |
203 | struct vfio_info_cap *caps) |
204 | { | |
205 | return -ENODEV; | |
206 | } | |
207 | #endif | |
208 | ||
ff53edf6 | 209 | /* Will be exported for vfio pci drivers usage */ |
c61302aa YH |
210 | void vfio_pci_core_set_params(bool nointxmask, bool is_disable_vga, |
211 | bool is_disable_idle_d3); | |
ff53edf6 | 212 | void vfio_pci_core_close_device(struct vfio_device *core_vdev); |
ff53edf6 MG |
213 | void vfio_pci_core_init_device(struct vfio_pci_core_device *vdev, |
214 | struct pci_dev *pdev, | |
215 | const struct vfio_device_ops *vfio_pci_ops); | |
216 | int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev); | |
217 | void vfio_pci_core_uninit_device(struct vfio_pci_core_device *vdev); | |
218 | void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev); | |
219 | int vfio_pci_core_sriov_configure(struct pci_dev *pdev, int nr_virtfn); | |
220 | extern const struct pci_error_handlers vfio_pci_core_err_handlers; | |
221 | long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd, | |
222 | unsigned long arg); | |
223 | ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf, | |
224 | size_t count, loff_t *ppos); | |
225 | ssize_t vfio_pci_core_write(struct vfio_device *core_vdev, const char __user *buf, | |
226 | size_t count, loff_t *ppos); | |
227 | int vfio_pci_core_mmap(struct vfio_device *core_vdev, struct vm_area_struct *vma); | |
228 | void vfio_pci_core_request(struct vfio_device *core_vdev, unsigned int count); | |
229 | int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf); | |
2fb89f56 MG |
230 | int vfio_pci_core_enable(struct vfio_pci_core_device *vdev); |
231 | void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); | |
232 | void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); | |
233 | ||
234 | static inline bool vfio_pci_is_vga(struct pci_dev *pdev) | |
235 | { | |
236 | return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA; | |
237 | } | |
ff53edf6 | 238 | |
9a389938 | 239 | #endif /* VFIO_PCI_CORE_H */ |