[linux-2.6-block.git] / include / linux / usb / tegra_usb_phy.h

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2010 Google, Inc.
 */

#ifndef __TEGRA_USB_PHY_H
#define __TEGRA_USB_PHY_H

#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/regmap.h>
#include <linux/reset.h>
#include <linux/usb/otg.h>

/*
 * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
 *     should be set up by clk-tegra, false if by the PHY code
 * has_hostpc: true if the USB controller has the HOSTPC extension, which
 *     changes the location of the PHCD and PTS fields
 * requires_usbmode_setup: true if the USBMODE register needs to be set to
 *      enter host mode
 * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
 *      and hsdiscon_level should be set for adequate signal quality
 * requires_pmc_ao_power_up: true if USB AO is powered down by default
 */

struct tegra_phy_soc_config {
	bool utmi_pll_config_in_car_module;
	bool has_hostpc;
	bool requires_usbmode_setup;
	bool requires_extra_tuning_parameters;
	bool requires_pmc_ao_power_up;
};

struct tegra_utmip_config {
	u8 hssync_start_delay;
	u8 elastic_limit;
	u8 idle_wait_delay;
	u8 term_range_adj;
	bool xcvr_setup_use_fuses;
	u8 xcvr_setup;
	u8 xcvr_lsfslew;
	u8 xcvr_lsrslew;
	u8 xcvr_hsslew;
	u8 hssquelch_level;
	u8 hsdiscon_level;
};

enum tegra_usb_phy_port_speed {
	TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
	TEGRA_USB_PHY_PORT_SPEED_LOW,
	TEGRA_USB_PHY_PORT_SPEED_HIGH,
};

struct tegra_xtal_freq;

struct tegra_usb_phy {
	int irq;
	int instance;
	const struct tegra_xtal_freq *freq;
	void __iomem *regs;
	void __iomem *pad_regs;
	struct clk *clk;
	struct clk *pll_u;
	struct clk *pad_clk;
	struct regulator *vbus;
	struct regmap *pmc_regmap;
	enum usb_dr_mode mode;
	void *config;
	const struct tegra_phy_soc_config *soc_config;
	struct usb_phy *ulpi;
	struct usb_phy u_phy;
	bool is_legacy_phy;
	bool is_ulpi_phy;
	struct gpio_desc *reset_gpio;
	struct reset_control *pad_rst;
	bool wakeup_enabled;
	bool pad_wakeup;
	bool powered_on;
};

void tegra_usb_phy_preresume(struct usb_phy *phy);

void tegra_usb_phy_postresume(struct usb_phy *phy);

void tegra_ehci_phy_restore_start(struct usb_phy *phy,
				 enum tegra_usb_phy_port_speed port_speed);

void tegra_ehci_phy_restore_end(struct usb_phy *phy);

#endif /* __TEGRA_USB_PHY_H */
Commit	Line	Data
5fd54ace	1	// SPDX-License-Identifier: GPL-2.0
91525d08	2	/*
91525d08	3	* Copyright (C) 2010 Google, Inc.
91525d08 BG	4	*/
91525d08 BG	5
1ba8216f VB	6	#ifndef __TEGRA_USB_PHY_H
1ba8216f VB	7	#define __TEGRA_USB_PHY_H
91525d08 BG	8
91525d08 BG	9	#include <linux/clk.h>
06e60e50	10	#include <linux/gpio.h>
c1baf6c5	11	#include <linux/regmap.h>
14347036	12	#include <linux/reset.h>
91525d08 BG	13	#include <linux/usb/otg.h>
91525d08 BG	14
3e635202 TT	15	/*
	16	* utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
	17	* should be set up by clk-tegra, false if by the PHY code
	18	* has_hostpc: true if the USB controller has the HOSTPC extension, which
	19	* changes the location of the PHCD and PTS fields
	20	* requires_usbmode_setup: true if the USBMODE register needs to be set to
	21	* enter host mode
	22	* requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
	23	* and hsdiscon_level should be set for adequate signal quality
c1baf6c5	24	* requires_pmc_ao_power_up: true if USB AO is powered down by default
3e635202 TT	25	*/
	26
	27	struct tegra_phy_soc_config {
	28	bool utmi_pll_config_in_car_module;
	29	bool has_hostpc;
	30	bool requires_usbmode_setup;
	31	bool requires_extra_tuning_parameters;
c1baf6c5	32	bool requires_pmc_ao_power_up;
3e635202 TT	33	};
3e635202 TT	34
91525d08 BG	35	struct tegra_utmip_config {
	36	u8 hssync_start_delay;
	37	u8 elastic_limit;
	38	u8 idle_wait_delay;
	39	u8 term_range_adj;
e497a24d	40	bool xcvr_setup_use_fuses;
91525d08 BG	41	u8 xcvr_setup;
	42	u8 xcvr_lsfslew;
	43	u8 xcvr_lsrslew;
e497a24d TT	44	u8 xcvr_hsslew;
	45	u8 hssquelch_level;
	46	u8 hsdiscon_level;
91525d08 BG	47	};
91525d08 BG	48
91525d08 BG	49	enum tegra_usb_phy_port_speed {
	50	TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
	51	TEGRA_USB_PHY_PORT_SPEED_LOW,
	52	TEGRA_USB_PHY_PORT_SPEED_HIGH,
	53	};
	54
91525d08 BG	55	struct tegra_xtal_freq;
	56
	57	struct tegra_usb_phy {
c1baf6c5	58	int irq;
91525d08 BG	59	int instance;
	60	const struct tegra_xtal_freq *freq;
	61	void __iomem *regs;
	62	void __iomem *pad_regs;
	63	struct clk *clk;
	64	struct clk *pll_u;
	65	struct clk *pad_clk;
f5b8c8b6	66	struct regulator *vbus;
c1baf6c5	67	struct regmap *pmc_regmap;
6558d7ed	68	enum usb_dr_mode mode;
91525d08	69	void *config;
3e635202	70	const struct tegra_phy_soc_config *soc_config;
86753811	71	struct usb_phy *ulpi;
1ba8216f	72	struct usb_phy u_phy;
3a55c6a8	73	bool is_legacy_phy;
3f9db1a1	74	bool is_ulpi_phy;
06e60e50	75	struct gpio_desc *reset_gpio;
14347036	76	struct reset_control *pad_rst;
35192007 DO	77	bool wakeup_enabled;
35192007 DO	78	bool pad_wakeup;
18bd8bff	79	bool powered_on;
91525d08 BG	80	};
91525d08 BG	81
ab137d04	82	void tegra_usb_phy_preresume(struct usb_phy *phy);
91525d08	83
ab137d04	84	void tegra_usb_phy_postresume(struct usb_phy *phy);
91525d08	85
ab137d04	86	void tegra_ehci_phy_restore_start(struct usb_phy *phy,
91525d08 BG	87	enum tegra_usb_phy_port_speed port_speed);
91525d08 BG	88
ab137d04	89	void tegra_ehci_phy_restore_end(struct usb_phy *phy);
91525d08	90
1ba8216f	91	#endif /* __TEGRA_USB_PHY_H */