[linux-block.git] / include / linux / tpm.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2004,2007,2008 IBM Corporation
 *
 * Authors:
 * Leendert van Doorn <leendert@watson.ibm.com>
 * Dave Safford <safford@watson.ibm.com>
 * Reiner Sailer <sailer@watson.ibm.com>
 * Kylene Hall <kjhall@us.ibm.com>
 * Debora Velarde <dvelarde@us.ibm.com>
 *
 * Maintained by: <tpmdd_devel@lists.sourceforge.net>
 *
 * Device driver for TCG/TCPA TPM (trusted platform module).
 * Specifications at www.trustedcomputinggroup.org
 */
#ifndef __LINUX_TPM_H__
#define __LINUX_TPM_H__

#include <linux/hw_random.h>
#include <linux/acpi.h>
#include <linux/cdev.h>
#include <linux/fs.h>
#include <linux/highmem.h>
#include <crypto/hash_info.h>
#include <crypto/aes.h>

#define TPM_DIGEST_SIZE 20	/* Max TPM v1.2 PCR size */
#define TPM_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE

struct tpm_chip;
struct trusted_key_payload;
struct trusted_key_options;
/* opaque structure, holds auth session parameters like the session key */
struct tpm2_auth;

enum tpm2_session_types {
	TPM2_SE_HMAC	= 0x00,
	TPM2_SE_POLICY	= 0x01,
	TPM2_SE_TRIAL	= 0x02,
};

/* if you add a new hash to this, increment TPM_MAX_HASHES below */
enum tpm_algorithms {
	TPM_ALG_ERROR		= 0x0000,
	TPM_ALG_SHA1		= 0x0004,
	TPM_ALG_AES		= 0x0006,
	TPM_ALG_KEYEDHASH	= 0x0008,
	TPM_ALG_SHA256		= 0x000B,
	TPM_ALG_SHA384		= 0x000C,
	TPM_ALG_SHA512		= 0x000D,
	TPM_ALG_NULL		= 0x0010,
	TPM_ALG_SM3_256		= 0x0012,
	TPM_ALG_ECC		= 0x0023,
	TPM_ALG_CFB		= 0x0043,
};

/*
 * maximum number of hashing algorithms a TPM can have.  This is
 * basically a count of every hash in tpm_algorithms above
 */
#define TPM_MAX_HASHES	5

enum tpm2_curves {
	TPM2_ECC_NONE		= 0x0000,
	TPM2_ECC_NIST_P256	= 0x0003,
};

struct tpm_digest {
	u16 alg_id;
	u8 digest[TPM_MAX_DIGEST_SIZE];
} __packed;

struct tpm_bank_info {
	u16 alg_id;
	u16 digest_size;
	u16 crypto_id;
};

enum TPM_OPS_FLAGS {
	TPM_OPS_AUTO_STARTUP = BIT(0),
};

struct tpm_class_ops {
	unsigned int flags;
	const u8 req_complete_mask;
	const u8 req_complete_val;
	bool (*req_canceled)(struct tpm_chip *chip, u8 status);
	int (*recv) (struct tpm_chip *chip, u8 *buf, size_t len);
	int (*send) (struct tpm_chip *chip, u8 *buf, size_t len);
	void (*cancel) (struct tpm_chip *chip);
	u8 (*status) (struct tpm_chip *chip);
	void (*update_timeouts)(struct tpm_chip *chip,
				unsigned long *timeout_cap);
	void (*update_durations)(struct tpm_chip *chip,
				 unsigned long *duration_cap);
	int (*go_idle)(struct tpm_chip *chip);
	int (*cmd_ready)(struct tpm_chip *chip);
	int (*request_locality)(struct tpm_chip *chip, int loc);
	int (*relinquish_locality)(struct tpm_chip *chip, int loc);
	void (*clk_enable)(struct tpm_chip *chip, bool value);
};

#define TPM_NUM_EVENT_LOG_FILES		3

/* Indexes the duration array */
enum tpm_duration {
	TPM_SHORT = 0,
	TPM_MEDIUM = 1,
	TPM_LONG = 2,
	TPM_LONG_LONG = 3,
	TPM_UNDEFINED,
	TPM_NUM_DURATIONS = TPM_UNDEFINED,
};

#define TPM_PPI_VERSION_LEN		3

struct tpm_space {
	u32 context_tbl[3];
	u8 *context_buf;
	u32 session_tbl[3];
	u8 *session_buf;
	u32 buf_size;
};

struct tpm_bios_log {
	void *bios_event_log;
	void *bios_event_log_end;
};

struct tpm_chip_seqops {
	struct tpm_chip *chip;
	const struct seq_operations *seqops;
};

/* fixed define for the curve we use which is NIST_P256 */
#define EC_PT_SZ	32

/*
 * fixed define for the size of a name.  This is actually HASHALG size
 * plus 2, so 32 for SHA256
 */
#define TPM2_NAME_SIZE	34

/*
 * The maximum size for an object context
 */
#define TPM2_MAX_CONTEXT_SIZE 4096

struct tpm_chip {
	struct device dev;
	struct device devs;
	struct cdev cdev;
	struct cdev cdevs;

	/* A driver callback under ops cannot be run unless ops_sem is held
	 * (sometimes implicitly, eg for the sysfs code). ops becomes null
	 * when the driver is unregistered, see tpm_try_get_ops.
	 */
	struct rw_semaphore ops_sem;
	const struct tpm_class_ops *ops;

	struct tpm_bios_log log;
	struct tpm_chip_seqops bin_log_seqops;
	struct tpm_chip_seqops ascii_log_seqops;

	unsigned int flags;

	int dev_num;		/* /dev/tpm# */
	unsigned long is_open;	/* only one allowed */

	char hwrng_name[64];
	struct hwrng hwrng;

	struct mutex tpm_mutex;	/* tpm is processing */

	unsigned long timeout_a; /* jiffies */
	unsigned long timeout_b; /* jiffies */
	unsigned long timeout_c; /* jiffies */
	unsigned long timeout_d; /* jiffies */
	bool timeout_adjusted;
	unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */
	bool duration_adjusted;

	struct dentry *bios_dir[TPM_NUM_EVENT_LOG_FILES];

	const struct attribute_group *groups[3 + TPM_MAX_HASHES];
	unsigned int groups_cnt;

	u32 nr_allocated_banks;
	struct tpm_bank_info *allocated_banks;
#ifdef CONFIG_ACPI
	acpi_handle acpi_dev_handle;
	char ppi_version[TPM_PPI_VERSION_LEN + 1];
#endif /* CONFIG_ACPI */

	struct tpm_space work_space;
	u32 last_cc;
	u32 nr_commands;
	u32 *cc_attrs_tbl;

	/* active locality */
	int locality;

#ifdef CONFIG_TCG_TPM2_HMAC
	/* details for communication security via sessions */

	/* saved context for NULL seed */
	u8 null_key_context[TPM2_MAX_CONTEXT_SIZE];
	 /* name of NULL seed */
	u8 null_key_name[TPM2_NAME_SIZE];
	u8 null_ec_key_x[EC_PT_SZ];
	u8 null_ec_key_y[EC_PT_SZ];
	struct tpm2_auth *auth;
#endif
};

#define TPM_HEADER_SIZE		10

enum tpm2_const {
	TPM2_PLATFORM_PCR       =     24,
	TPM2_PCR_SELECT_MIN     = ((TPM2_PLATFORM_PCR + 7) / 8),
};

enum tpm2_timeouts {
	TPM2_TIMEOUT_A          =    750,
	TPM2_TIMEOUT_B          =   2000,
	TPM2_TIMEOUT_C          =    200,
	TPM2_TIMEOUT_D          =     30,
	TPM2_DURATION_SHORT     =     20,
	TPM2_DURATION_MEDIUM    =    750,
	TPM2_DURATION_LONG      =   2000,
	TPM2_DURATION_LONG_LONG = 300000,
	TPM2_DURATION_DEFAULT   = 120000,
};

enum tpm2_structures {
	TPM2_ST_NO_SESSIONS	= 0x8001,
	TPM2_ST_SESSIONS	= 0x8002,
	TPM2_ST_CREATION	= 0x8021,
};

/* Indicates from what layer of the software stack the error comes from */
#define TSS2_RC_LAYER_SHIFT	 16
#define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)

enum tpm2_return_codes {
	TPM2_RC_SUCCESS		= 0x0000,
	TPM2_RC_HASH		= 0x0083, /* RC_FMT1 */
	TPM2_RC_HANDLE		= 0x008B,
	TPM2_RC_INTEGRITY	= 0x009F,
	TPM2_RC_INITIALIZE	= 0x0100, /* RC_VER1 */
	TPM2_RC_FAILURE		= 0x0101,
	TPM2_RC_DISABLED	= 0x0120,
	TPM2_RC_UPGRADE		= 0x012D,
	TPM2_RC_COMMAND_CODE    = 0x0143,
	TPM2_RC_TESTING		= 0x090A, /* RC_WARN */
	TPM2_RC_REFERENCE_H0	= 0x0910,
	TPM2_RC_RETRY		= 0x0922,
};

enum tpm2_command_codes {
	TPM2_CC_FIRST		        = 0x011F,
	TPM2_CC_HIERARCHY_CONTROL       = 0x0121,
	TPM2_CC_HIERARCHY_CHANGE_AUTH   = 0x0129,
	TPM2_CC_CREATE_PRIMARY          = 0x0131,
	TPM2_CC_SEQUENCE_COMPLETE       = 0x013E,
	TPM2_CC_SELF_TEST	        = 0x0143,
	TPM2_CC_STARTUP		        = 0x0144,
	TPM2_CC_SHUTDOWN	        = 0x0145,
	TPM2_CC_NV_READ                 = 0x014E,
	TPM2_CC_CREATE		        = 0x0153,
	TPM2_CC_LOAD		        = 0x0157,
	TPM2_CC_SEQUENCE_UPDATE         = 0x015C,
	TPM2_CC_UNSEAL		        = 0x015E,
	TPM2_CC_CONTEXT_LOAD	        = 0x0161,
	TPM2_CC_CONTEXT_SAVE	        = 0x0162,
	TPM2_CC_FLUSH_CONTEXT	        = 0x0165,
	TPM2_CC_READ_PUBLIC		= 0x0173,
	TPM2_CC_START_AUTH_SESS		= 0x0176,
	TPM2_CC_VERIFY_SIGNATURE        = 0x0177,
	TPM2_CC_GET_CAPABILITY	        = 0x017A,
	TPM2_CC_GET_RANDOM	        = 0x017B,
	TPM2_CC_PCR_READ	        = 0x017E,
	TPM2_CC_PCR_EXTEND	        = 0x0182,
	TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
	TPM2_CC_HASH_SEQUENCE_START     = 0x0186,
	TPM2_CC_CREATE_LOADED           = 0x0191,
	TPM2_CC_LAST		        = 0x0193, /* Spec 1.36 */
};

enum tpm2_permanent_handles {
	TPM2_RH_NULL		= 0x40000007,
	TPM2_RS_PW		= 0x40000009,
};

/* Most Significant Octet for key types  */
enum tpm2_mso_type {
	TPM2_MSO_NVRAM		= 0x01,
	TPM2_MSO_SESSION	= 0x02,
	TPM2_MSO_POLICY		= 0x03,
	TPM2_MSO_PERMANENT	= 0x40,
	TPM2_MSO_VOLATILE	= 0x80,
	TPM2_MSO_PERSISTENT	= 0x81,
};

static inline enum tpm2_mso_type tpm2_handle_mso(u32 handle)
{
	return handle >> 24;
}

enum tpm2_capabilities {
	TPM2_CAP_HANDLES	= 1,
	TPM2_CAP_COMMANDS	= 2,
	TPM2_CAP_PCRS		= 5,
	TPM2_CAP_TPM_PROPERTIES = 6,
};

enum tpm2_properties {
	TPM_PT_TOTAL_COMMANDS	= 0x0129,
};

enum tpm2_startup_types {
	TPM2_SU_CLEAR	= 0x0000,
	TPM2_SU_STATE	= 0x0001,
};

enum tpm2_cc_attrs {
	TPM2_CC_ATTR_CHANDLES	= 25,
	TPM2_CC_ATTR_RHANDLE	= 28,
	TPM2_CC_ATTR_VENDOR	= 29,
};

#define TPM_VID_INTEL    0x8086
#define TPM_VID_WINBOND  0x1050
#define TPM_VID_STM      0x104A
#define TPM_VID_ATML     0x1114

enum tpm_chip_flags {
	TPM_CHIP_FLAG_BOOTSTRAPPED		= BIT(0),
	TPM_CHIP_FLAG_TPM2			= BIT(1),
	TPM_CHIP_FLAG_IRQ			= BIT(2),
	TPM_CHIP_FLAG_VIRTUAL			= BIT(3),
	TPM_CHIP_FLAG_HAVE_TIMEOUTS		= BIT(4),
	TPM_CHIP_FLAG_ALWAYS_POWERED		= BIT(5),
	TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED	= BIT(6),
	TPM_CHIP_FLAG_FIRMWARE_UPGRADE		= BIT(7),
	TPM_CHIP_FLAG_SUSPENDED			= BIT(8),
	TPM_CHIP_FLAG_HWRNG_DISABLED		= BIT(9),
	TPM_CHIP_FLAG_DISABLE			= BIT(10),
};

#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)

struct tpm_header {
	__be16 tag;
	__be32 length;
	union {
		__be32 ordinal;
		__be32 return_code;
	};
} __packed;

enum tpm_buf_flags {
	/* the capacity exceeded: */
	TPM_BUF_OVERFLOW	= BIT(0),
	/* TPM2B format: */
	TPM_BUF_TPM2B		= BIT(1),
	/* read out of boundary: */
	TPM_BUF_BOUNDARY_ERROR	= BIT(2),
};

/*
 * A string buffer type for constructing TPM commands.
 */
struct tpm_buf {
	u32 flags;
	u32 length;
	u8 *data;
	u8 handles;
};

enum tpm2_object_attributes {
	TPM2_OA_FIXED_TPM		= BIT(1),
	TPM2_OA_ST_CLEAR		= BIT(2),
	TPM2_OA_FIXED_PARENT		= BIT(4),
	TPM2_OA_SENSITIVE_DATA_ORIGIN	= BIT(5),
	TPM2_OA_USER_WITH_AUTH		= BIT(6),
	TPM2_OA_ADMIN_WITH_POLICY	= BIT(7),
	TPM2_OA_NO_DA			= BIT(10),
	TPM2_OA_ENCRYPTED_DUPLICATION	= BIT(11),
	TPM2_OA_RESTRICTED		= BIT(16),
	TPM2_OA_DECRYPT			= BIT(17),
	TPM2_OA_SIGN			= BIT(18),
};

enum tpm2_session_attributes {
	TPM2_SA_CONTINUE_SESSION	= BIT(0),
	TPM2_SA_AUDIT_EXCLUSIVE		= BIT(1),
	TPM2_SA_AUDIT_RESET		= BIT(3),
	TPM2_SA_DECRYPT			= BIT(5),
	TPM2_SA_ENCRYPT			= BIT(6),
	TPM2_SA_AUDIT			= BIT(7),
};

struct tpm2_hash {
	unsigned int crypto_id;
	unsigned int tpm_id;
};

int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal);
void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal);
int tpm_buf_init_sized(struct tpm_buf *buf);
void tpm_buf_reset_sized(struct tpm_buf *buf);
void tpm_buf_destroy(struct tpm_buf *buf);
u32 tpm_buf_length(struct tpm_buf *buf);
void tpm_buf_append(struct tpm_buf *buf, const u8 *new_data, u16 new_length);
void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value);
void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value);
void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value);
u8 tpm_buf_read_u8(struct tpm_buf *buf, off_t *offset);
u16 tpm_buf_read_u16(struct tpm_buf *buf, off_t *offset);
u32 tpm_buf_read_u32(struct tpm_buf *buf, off_t *offset);

/*
 * Check if TPM device is in the firmware upgrade mode.
 */
static inline bool tpm_is_firmware_upgrade(struct tpm_chip *chip)
{
	return chip->flags & TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
}

static inline u32 tpm2_rc_value(u32 rc)
{
	return (rc & BIT(7)) ? rc & 0xbf : rc;
}

#if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE)

extern int tpm_is_tpm2(struct tpm_chip *chip);
extern __must_check int tpm_try_get_ops(struct tpm_chip *chip);
extern void tpm_put_ops(struct tpm_chip *chip);
extern ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf,
				size_t min_rsp_body_length, const char *desc);
extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
			struct tpm_digest *digest);
extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
			  struct tpm_digest *digests);
extern int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max);
extern struct tpm_chip *tpm_default_chip(void);
void tpm2_flush_context(struct tpm_chip *chip, u32 handle);

static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
{
	/* simple authorization for empty auth */
	tpm_buf_append_u32(buf, 9);		/* total length of auth */
	tpm_buf_append_u32(buf, handle);
	tpm_buf_append_u16(buf, 0);		/* nonce len */
	tpm_buf_append_u8(buf, 0);		/* attributes */
	tpm_buf_append_u16(buf, 0);		/* hmac len */
}
#else
static inline int tpm_is_tpm2(struct tpm_chip *chip)
{
	return -ENODEV;
}
static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx,
			       struct tpm_digest *digest)
{
	return -ENODEV;
}

static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
				 struct tpm_digest *digests)
{
	return -ENODEV;
}

static inline int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max)
{
	return -ENODEV;
}

static inline struct tpm_chip *tpm_default_chip(void)
{
	return NULL;
}

static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
{
}
#endif
#ifdef CONFIG_TCG_TPM2_HMAC

int tpm2_start_auth_session(struct tpm_chip *chip);
void tpm_buf_append_name(struct tpm_chip *chip, struct tpm_buf *buf,
			 u32 handle, u8 *name);
void tpm_buf_append_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf,
				 u8 attributes, u8 *passphrase,
				 int passphraselen);
static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
						   struct tpm_buf *buf,
						   u8 attributes,
						   u8 *passphrase,
						   int passphraselen)
{
	tpm_buf_append_hmac_session(chip, buf, attributes, passphrase,
				    passphraselen);
}
void tpm_buf_fill_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf);
int tpm_buf_check_hmac_response(struct tpm_chip *chip, struct tpm_buf *buf,
				int rc);
void tpm2_end_auth_session(struct tpm_chip *chip);
#else
#include <asm/unaligned.h>

static inline int tpm2_start_auth_session(struct tpm_chip *chip)
{
	return 0;
}
static inline void tpm2_end_auth_session(struct tpm_chip *chip)
{
}
static inline void tpm_buf_append_name(struct tpm_chip *chip,
				       struct tpm_buf *buf,
				       u32 handle, u8 *name)
{
	tpm_buf_append_u32(buf, handle);
	/* count the number of handles in the upper bits of flags */
	buf->handles++;
}
static inline void tpm_buf_append_hmac_session(struct tpm_chip *chip,
					       struct tpm_buf *buf,
					       u8 attributes, u8 *passphrase,
					       int passphraselen)
{
	/* offset tells us where the sessions area begins */
	int offset = buf->handles * 4 + TPM_HEADER_SIZE;
	u32 len = 9 + passphraselen;

	if (tpm_buf_length(buf) != offset) {
		/* not the first session so update the existing length */
		len += get_unaligned_be32(&buf->data[offset]);
		put_unaligned_be32(len, &buf->data[offset]);
	} else {
		tpm_buf_append_u32(buf, len);
	}
	/* auth handle */
	tpm_buf_append_u32(buf, TPM2_RS_PW);
	/* nonce */
	tpm_buf_append_u16(buf, 0);
	/* attributes */
	tpm_buf_append_u8(buf, 0);
	/* passphrase */
	tpm_buf_append_u16(buf, passphraselen);
	tpm_buf_append(buf, passphrase, passphraselen);
}
static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
						   struct tpm_buf *buf,
						   u8 attributes,
						   u8 *passphrase,
						   int passphraselen)
{
	int offset = buf->handles * 4 + TPM_HEADER_SIZE;
	struct tpm_header *head = (struct tpm_header *) buf->data;

	/*
	 * if the only sessions are optional, the command tag
	 * must change to TPM2_ST_NO_SESSIONS
	 */
	if (tpm_buf_length(buf) == offset)
		head->tag = cpu_to_be16(TPM2_ST_NO_SESSIONS);
}
static inline void tpm_buf_fill_hmac_session(struct tpm_chip *chip,
					     struct tpm_buf *buf)
{
}
static inline int tpm_buf_check_hmac_response(struct tpm_chip *chip,
					      struct tpm_buf *buf,
					      int rc)
{
	return rc;
}
#endif	/* CONFIG_TCG_TPM2_HMAC */

#endif
Commit	Line	Data
b886d83c	1	/* SPDX-License-Identifier: GPL-2.0-only */
659aaf2b RA	2	/*
	3	* Copyright (C) 2004,2007,2008 IBM Corporation
	4	*
	5	* Authors:
	6	* Leendert van Doorn <leendert@watson.ibm.com>
	7	* Dave Safford <safford@watson.ibm.com>
	8	* Reiner Sailer <sailer@watson.ibm.com>
	9	* Kylene Hall <kjhall@us.ibm.com>
	10	* Debora Velarde <dvelarde@us.ibm.com>
	11	*
	12	* Maintained by: <tpmdd_devel@lists.sourceforge.net>
	13	*
	14	* Device driver for TCG/TCPA TPM (trusted platform module).
	15	* Specifications at www.trustedcomputinggroup.org
659aaf2b RA	16	*/
	17	#ifndef __LINUX_TPM_H__
	18	#define __LINUX_TPM_H__
	19
901615cb RS	20	#include <linux/hw_random.h>
	21	#include <linux/acpi.h>
	22	#include <linux/cdev.h>
	23	#include <linux/fs.h>
74edff2d	24	#include <linux/highmem.h>
aa042475	25	#include <crypto/hash_info.h>
d2add27c	26	#include <crypto/aes.h>
aa042475	27
1c16c963	28	#define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */
aa042475	29	#define TPM_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE
1c16c963	30
01ad1fa7	31	struct tpm_chip;
954650ef JS	32	struct trusted_key_payload;
954650ef JS	33	struct trusted_key_options;
699e3efd JB	34	/* opaque structure, holds auth session parameters like the session key */
	35	struct tpm2_auth;
	36
	37	enum tpm2_session_types {
	38	TPM2_SE_HMAC = 0x00,
	39	TPM2_SE_POLICY = 0x01,
	40	TPM2_SE_TRIAL = 0x02,
	41	};
01ad1fa7	42
aab73d95	43	/* if you add a new hash to this, increment TPM_MAX_HASHES below */
aa042475 RS	44	enum tpm_algorithms {
	45	TPM_ALG_ERROR = 0x0000,
	46	TPM_ALG_SHA1 = 0x0004,
d2add27c	47	TPM_ALG_AES = 0x0006,
aa042475 RS	48	TPM_ALG_KEYEDHASH = 0x0008,
	49	TPM_ALG_SHA256 = 0x000B,
	50	TPM_ALG_SHA384 = 0x000C,
	51	TPM_ALG_SHA512 = 0x000D,
	52	TPM_ALG_NULL = 0x0010,
	53	TPM_ALG_SM3_256 = 0x0012,
d2add27c JB	54	TPM_ALG_ECC = 0x0023,
d2add27c JB	55	TPM_ALG_CFB = 0x0043,
aa042475 RS	56	};
aa042475 RS	57
aab73d95 JB	58	/*
	59	* maximum number of hashing algorithms a TPM can have. This is
	60	* basically a count of every hash in tpm_algorithms above
	61	*/
	62	#define TPM_MAX_HASHES 5
	63
d2add27c JB	64	enum tpm2_curves {
	65	TPM2_ECC_NONE = 0x0000,
	66	TPM2_ECC_NIST_P256 = 0x0003,
	67	};
	68
aa042475 RS	69	struct tpm_digest {
	70	u16 alg_id;
	71	u8 digest[TPM_MAX_DIGEST_SIZE];
	72	} __packed;
	73
879b5892 RS	74	struct tpm_bank_info {
	75	u16 alg_id;
	76	u16 digest_size;
	77	u16 crypto_id;
	78	};
	79
cae8b441 JG	80	enum TPM_OPS_FLAGS {
	81	TPM_OPS_AUTO_STARTUP = BIT(0),
	82	};
	83
01ad1fa7	84	struct tpm_class_ops {
cae8b441	85	unsigned int flags;
01ad1fa7 JG	86	const u8 req_complete_mask;
	87	const u8 req_complete_val;
	88	bool (req_canceled)(struct tpm_chip chip, u8 status);
	89	int (recv) (struct tpm_chip chip, u8 *buf, size_t len);
	90	int (send) (struct tpm_chip chip, u8 *buf, size_t len);
	91	void (cancel) (struct tpm_chip chip);
	92	u8 (status) (struct tpm_chip chip);
36ce0897	93	void (update_timeouts)(struct tpm_chip chip,
8e54caf4	94	unsigned long *timeout_cap);
15d0b22c JS	95	void (update_durations)(struct tpm_chip chip,
15d0b22c JS	96	unsigned long *duration_cap);
627448e8 TW	97	int (go_idle)(struct tpm_chip chip);
627448e8 TW	98	int (cmd_ready)(struct tpm_chip chip);
877c57d0	99	int (request_locality)(struct tpm_chip chip, int loc);
888d867d	100	int (relinquish_locality)(struct tpm_chip chip, int loc);
b3e958ce	101	void (clk_enable)(struct tpm_chip chip, bool value);
01ad1fa7 JG	102	};
01ad1fa7 JG	103
901615cb RS	104	#define TPM_NUM_EVENT_LOG_FILES 3
	105
	106	/* Indexes the duration array */
	107	enum tpm_duration {
	108	TPM_SHORT = 0,
	109	TPM_MEDIUM = 1,
	110	TPM_LONG = 2,
	111	TPM_LONG_LONG = 3,
	112	TPM_UNDEFINED,
	113	TPM_NUM_DURATIONS = TPM_UNDEFINED,
	114	};
	115
	116	#define TPM_PPI_VERSION_LEN 3
	117
	118	struct tpm_space {
	119	u32 context_tbl[3];
	120	u8 *context_buf;
	121	u32 session_tbl[3];
	122	u8 *session_buf;
6c4e79d9	123	u32 buf_size;
901615cb RS	124	};
	125
	126	struct tpm_bios_log {
	127	void *bios_event_log;
	128	void *bios_event_log_end;
	129	};
	130
	131	struct tpm_chip_seqops {
	132	struct tpm_chip *chip;
	133	const struct seq_operations *seqops;
	134	};
	135
d2add27c JB	136	/* fixed define for the curve we use which is NIST_P256 */
	137	#define EC_PT_SZ 32
	138
	139	/*
	140	* fixed define for the size of a name. This is actually HASHALG size
	141	* plus 2, so 32 for SHA256
	142	*/
	143	#define TPM2_NAME_SIZE 34
	144
	145	/*
	146	* The maximum size for an object context
	147	*/
	148	#define TPM2_MAX_CONTEXT_SIZE 4096
	149
901615cb RS	150	struct tpm_chip {
	151	struct device dev;
	152	struct device devs;
	153	struct cdev cdev;
	154	struct cdev cdevs;
	155
	156	/* A driver callback under ops cannot be run unless ops_sem is held
	157	* (sometimes implicitly, eg for the sysfs code). ops becomes null
	158	* when the driver is unregistered, see tpm_try_get_ops.
	159	*/
	160	struct rw_semaphore ops_sem;
	161	const struct tpm_class_ops *ops;
	162
	163	struct tpm_bios_log log;
	164	struct tpm_chip_seqops bin_log_seqops;
	165	struct tpm_chip_seqops ascii_log_seqops;
	166
	167	unsigned int flags;
	168
	169	int dev_num; /* /dev/tpm# */
	170	unsigned long is_open; /* only one allowed */
	171
	172	char hwrng_name[64];
	173	struct hwrng hwrng;
	174
	175	struct mutex tpm_mutex; /* tpm is processing */
	176
	177	unsigned long timeout_a; /* jiffies */
	178	unsigned long timeout_b; /* jiffies */
	179	unsigned long timeout_c; /* jiffies */
	180	unsigned long timeout_d; /* jiffies */
	181	bool timeout_adjusted;
	182	unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */
	183	bool duration_adjusted;
	184
	185	struct dentry *bios_dir[TPM_NUM_EVENT_LOG_FILES];
	186
aab73d95	187	const struct attribute_group *groups[3 + TPM_MAX_HASHES];
901615cb RS	188	unsigned int groups_cnt;
	189
	190	u32 nr_allocated_banks;
	191	struct tpm_bank_info *allocated_banks;
	192	#ifdef CONFIG_ACPI
	193	acpi_handle acpi_dev_handle;
	194	char ppi_version[TPM_PPI_VERSION_LEN + 1];
	195	#endif /* CONFIG_ACPI */
	196
	197	struct tpm_space work_space;
	198	u32 last_cc;
	199	u32 nr_commands;
	200	u32 *cc_attrs_tbl;
	201
	202	/* active locality */
	203	int locality;
d2add27c JB	204
	205	#ifdef CONFIG_TCG_TPM2_HMAC
	206	/* details for communication security via sessions */
	207
	208	/* saved context for NULL seed */
	209	u8 null_key_context[TPM2_MAX_CONTEXT_SIZE];
	210	/* name of NULL seed */
	211	u8 null_key_name[TPM2_NAME_SIZE];
	212	u8 null_ec_key_x[EC_PT_SZ];
	213	u8 null_ec_key_y[EC_PT_SZ];
699e3efd	214	struct tpm2_auth *auth;
d2add27c	215	#endif
901615cb RS	216	};
901615cb RS	217
74edff2d SG	218	#define TPM_HEADER_SIZE 10
	219
	220	enum tpm2_const {
	221	TPM2_PLATFORM_PCR = 24,
	222	TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8),
	223	};
	224
	225	enum tpm2_timeouts {
	226	TPM2_TIMEOUT_A = 750,
	227	TPM2_TIMEOUT_B = 2000,
	228	TPM2_TIMEOUT_C = 200,
	229	TPM2_TIMEOUT_D = 30,
	230	TPM2_DURATION_SHORT = 20,
	231	TPM2_DURATION_MEDIUM = 750,
	232	TPM2_DURATION_LONG = 2000,
	233	TPM2_DURATION_LONG_LONG = 300000,
	234	TPM2_DURATION_DEFAULT = 120000,
	235	};
	236
	237	enum tpm2_structures {
	238	TPM2_ST_NO_SESSIONS = 0x8001,
	239	TPM2_ST_SESSIONS = 0x8002,
d2add27c	240	TPM2_ST_CREATION = 0x8021,
74edff2d SG	241	};
	242
	243	/* Indicates from what layer of the software stack the error comes from */
	244	#define TSS2_RC_LAYER_SHIFT 16
	245	#define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)
	246
	247	enum tpm2_return_codes {
	248	TPM2_RC_SUCCESS = 0x0000,
	249	TPM2_RC_HASH = 0x0083, /* RC_FMT1 */
	250	TPM2_RC_HANDLE = 0x008B,
eb24c978	251	TPM2_RC_INTEGRITY = 0x009F,
74edff2d SG	252	TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */
	253	TPM2_RC_FAILURE = 0x0101,
	254	TPM2_RC_DISABLED = 0x0120,
0aa69878	255	TPM2_RC_UPGRADE = 0x012D,
74edff2d SG	256	TPM2_RC_COMMAND_CODE = 0x0143,
	257	TPM2_RC_TESTING = 0x090A, /* RC_WARN */
	258	TPM2_RC_REFERENCE_H0 = 0x0910,
	259	TPM2_RC_RETRY = 0x0922,
	260	};
	261
	262	enum tpm2_command_codes {
	263	TPM2_CC_FIRST = 0x011F,
	264	TPM2_CC_HIERARCHY_CONTROL = 0x0121,
	265	TPM2_CC_HIERARCHY_CHANGE_AUTH = 0x0129,
	266	TPM2_CC_CREATE_PRIMARY = 0x0131,
	267	TPM2_CC_SEQUENCE_COMPLETE = 0x013E,
	268	TPM2_CC_SELF_TEST = 0x0143,
	269	TPM2_CC_STARTUP = 0x0144,
	270	TPM2_CC_SHUTDOWN = 0x0145,
	271	TPM2_CC_NV_READ = 0x014E,
	272	TPM2_CC_CREATE = 0x0153,
	273	TPM2_CC_LOAD = 0x0157,
	274	TPM2_CC_SEQUENCE_UPDATE = 0x015C,
	275	TPM2_CC_UNSEAL = 0x015E,
	276	TPM2_CC_CONTEXT_LOAD = 0x0161,
	277	TPM2_CC_CONTEXT_SAVE = 0x0162,
	278	TPM2_CC_FLUSH_CONTEXT = 0x0165,
d0a25bb9	279	TPM2_CC_READ_PUBLIC = 0x0173,
699e3efd	280	TPM2_CC_START_AUTH_SESS = 0x0176,
74edff2d SG	281	TPM2_CC_VERIFY_SIGNATURE = 0x0177,
	282	TPM2_CC_GET_CAPABILITY = 0x017A,
	283	TPM2_CC_GET_RANDOM = 0x017B,
	284	TPM2_CC_PCR_READ = 0x017E,
	285	TPM2_CC_PCR_EXTEND = 0x0182,
	286	TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
	287	TPM2_CC_HASH_SEQUENCE_START = 0x0186,
	288	TPM2_CC_CREATE_LOADED = 0x0191,
	289	TPM2_CC_LAST = 0x0193, /* Spec 1.36 */
	290	};
	291
	292	enum tpm2_permanent_handles {
d2add27c	293	TPM2_RH_NULL = 0x40000007,
74edff2d SG	294	TPM2_RS_PW = 0x40000009,
	295	};
	296
d0a25bb9 JB	297	/* Most Significant Octet for key types */
	298	enum tpm2_mso_type {
	299	TPM2_MSO_NVRAM = 0x01,
	300	TPM2_MSO_SESSION = 0x02,
	301	TPM2_MSO_POLICY = 0x03,
	302	TPM2_MSO_PERMANENT = 0x40,
	303	TPM2_MSO_VOLATILE = 0x80,
	304	TPM2_MSO_PERSISTENT = 0x81,
	305	};
	306
	307	static inline enum tpm2_mso_type tpm2_handle_mso(u32 handle)
	308	{
	309	return handle >> 24;
	310	}
	311
74edff2d SG	312	enum tpm2_capabilities {
	313	TPM2_CAP_HANDLES = 1,
	314	TPM2_CAP_COMMANDS = 2,
	315	TPM2_CAP_PCRS = 5,
	316	TPM2_CAP_TPM_PROPERTIES = 6,
	317	};
	318
	319	enum tpm2_properties {
	320	TPM_PT_TOTAL_COMMANDS = 0x0129,
	321	};
	322
	323	enum tpm2_startup_types {
	324	TPM2_SU_CLEAR = 0x0000,
	325	TPM2_SU_STATE = 0x0001,
	326	};
	327
	328	enum tpm2_cc_attrs {
	329	TPM2_CC_ATTR_CHANDLES = 25,
	330	TPM2_CC_ATTR_RHANDLE = 28,
85b93bbd	331	TPM2_CC_ATTR_VENDOR = 29,
74edff2d SG	332	};
	333
	334	#define TPM_VID_INTEL 0x8086
	335	#define TPM_VID_WINBOND 0x1050
	336	#define TPM_VID_STM 0x104A
79ca6f74	337	#define TPM_VID_ATML 0x1114
74edff2d SG	338
74edff2d SG	339	enum tpm_chip_flags {
0c8862de JS	340	TPM_CHIP_FLAG_BOOTSTRAPPED = BIT(0),
	341	TPM_CHIP_FLAG_TPM2 = BIT(1),
	342	TPM_CHIP_FLAG_IRQ = BIT(2),
	343	TPM_CHIP_FLAG_VIRTUAL = BIT(3),
	344	TPM_CHIP_FLAG_HAVE_TIMEOUTS = BIT(4),
	345	TPM_CHIP_FLAG_ALWAYS_POWERED = BIT(5),
74edff2d	346	TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6),
0c8862de	347	TPM_CHIP_FLAG_FIRMWARE_UPGRADE = BIT(7),
99d46450	348	TPM_CHIP_FLAG_SUSPENDED = BIT(8),
554b841d	349	TPM_CHIP_FLAG_HWRNG_DISABLED = BIT(9),
eb24c978	350	TPM_CHIP_FLAG_DISABLE = BIT(10),
74edff2d SG	351	};
	352
	353	#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)
	354
	355	struct tpm_header {
	356	__be16 tag;
	357	__be32 length;
	358	union {
	359	__be32 ordinal;
	360	__be32 return_code;
	361	};
	362	} __packed;
	363
74edff2d	364	enum tpm_buf_flags {
37e2ee16	365	/* the capacity exceeded: */
74edff2d	366	TPM_BUF_OVERFLOW = BIT(0),
d926ee92 JS	367	/* TPM2B format: */
d926ee92 JS	368	TPM_BUF_TPM2B = BIT(1),
acd5eb4f JS	369	/* read out of boundary: */
acd5eb4f JS	370	TPM_BUF_BOUNDARY_ERROR = BIT(2),
74edff2d SG	371	};
74edff2d SG	372
37e2ee16 JS	373	/*
	374	* A string buffer type for constructing TPM commands.
	375	*/
74edff2d	376	struct tpm_buf {
e1b72e1b JS	377	u32 flags;
e1b72e1b JS	378	u32 length;
74edff2d	379	u8 *data;
699e3efd	380	u8 handles;
74edff2d SG	381	};
74edff2d SG	382
2e19e101	383	enum tpm2_object_attributes {
e5fb5d2c	384	TPM2_OA_FIXED_TPM = BIT(1),
699e3efd	385	TPM2_OA_ST_CLEAR = BIT(2),
e5fb5d2c	386	TPM2_OA_FIXED_PARENT = BIT(4),
d2add27c	387	TPM2_OA_SENSITIVE_DATA_ORIGIN = BIT(5),
2e19e101	388	TPM2_OA_USER_WITH_AUTH = BIT(6),
699e3efd	389	TPM2_OA_ADMIN_WITH_POLICY = BIT(7),
d2add27c	390	TPM2_OA_NO_DA = BIT(10),
699e3efd	391	TPM2_OA_ENCRYPTED_DUPLICATION = BIT(11),
d2add27c JB	392	TPM2_OA_RESTRICTED = BIT(16),
d2add27c JB	393	TPM2_OA_DECRYPT = BIT(17),
699e3efd	394	TPM2_OA_SIGN = BIT(18),
2e19e101 SG	395	};
	396
	397	enum tpm2_session_attributes {
	398	TPM2_SA_CONTINUE_SESSION = BIT(0),
699e3efd JB	399	TPM2_SA_AUDIT_EXCLUSIVE = BIT(1),
	400	TPM2_SA_AUDIT_RESET = BIT(3),
	401	TPM2_SA_DECRYPT = BIT(5),
	402	TPM2_SA_ENCRYPT = BIT(6),
	403	TPM2_SA_AUDIT = BIT(7),
2e19e101 SG	404	};
	405
	406	struct tpm2_hash {
	407	unsigned int crypto_id;
	408	unsigned int tpm_id;
	409	};
	410
17d89b2e JB	411	int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal);
17d89b2e JB	412	void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal);
d926ee92 JS	413	int tpm_buf_init_sized(struct tpm_buf *buf);
d926ee92 JS	414	void tpm_buf_reset_sized(struct tpm_buf *buf);
17d89b2e JB	415	void tpm_buf_destroy(struct tpm_buf *buf);
17d89b2e JB	416	u32 tpm_buf_length(struct tpm_buf *buf);
e1b72e1b	417	void tpm_buf_append(struct tpm_buf buf, const u8 new_data, u16 new_length);
17d89b2e JB	418	void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value);
	419	void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value);
	420	void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value);
acd5eb4f JS	421	u8 tpm_buf_read_u8(struct tpm_buf buf, off_t offset);
	422	u16 tpm_buf_read_u16(struct tpm_buf buf, off_t offset);
	423	u32 tpm_buf_read_u32(struct tpm_buf buf, off_t offset);
74edff2d	424
0aa69878	425	/*
	426	* Check if TPM device is in the firmware upgrade mode.
	427	*/
	428	static inline bool tpm_is_firmware_upgrade(struct tpm_chip *chip)
	429	{
	430	return chip->flags & TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
	431	}
	432
2e19e101 SG	433	static inline u32 tpm2_rc_value(u32 rc)
2e19e101 SG	434	{
eb24c978	435	return (rc & BIT(7)) ? rc & 0xbf : rc;
2e19e101 SG	436	}
2e19e101 SG	437
ff76ec18	438	#if defined(CONFIG_TCG_TPM) \|\| defined(CONFIG_TCG_TPM_MODULE)
659aaf2b	439
aad887f6	440	extern int tpm_is_tpm2(struct tpm_chip *chip);
8c657a05 JS	441	extern __must_check int tpm_try_get_ops(struct tpm_chip *chip);
	442	extern void tpm_put_ops(struct tpm_chip *chip);
	443	extern ssize_t tpm_transmit_cmd(struct tpm_chip chip, struct tpm_buf buf,
	444	size_t min_rsp_body_length, const char *desc);
879b5892 RS	445	extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
879b5892 RS	446	struct tpm_digest *digest);
0b6cf6b9 RS	447	extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
0b6cf6b9 RS	448	struct tpm_digest *digests);
aad887f6	449	extern int tpm_get_random(struct tpm_chip chip, u8 data, size_t max);
aaae8153	450	extern struct tpm_chip *tpm_default_chip(void);
45477b3f	451	void tpm2_flush_context(struct tpm_chip *chip, u32 handle);
d2add27c JB	452
	453	static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
	454	{
	455	/* simple authorization for empty auth */
	456	tpm_buf_append_u32(buf, 9); /* total length of auth */
	457	tpm_buf_append_u32(buf, handle);
	458	tpm_buf_append_u16(buf, 0); /* nonce len */
	459	tpm_buf_append_u8(buf, 0); /* attributes */
	460	tpm_buf_append_u16(buf, 0); /* hmac len */
	461	}
d6ba4521	462	#else
aad887f6	463	static inline int tpm_is_tpm2(struct tpm_chip *chip)
954650ef JS	464	{
	465	return -ENODEV;
	466	}
879b5892 RS	467	static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx,
879b5892 RS	468	struct tpm_digest *digest)
aad887f6	469	{
d6ba4521 MZ	470	return -ENODEV;
d6ba4521 MZ	471	}
95adc6b4 TW	472
95adc6b4 TW	473	static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
0b6cf6b9	474	struct tpm_digest *digests)
aad887f6	475	{
d6ba4521 MZ	476	return -ENODEV;
d6ba4521 MZ	477	}
95adc6b4	478
aad887f6 JS	479	static inline int tpm_get_random(struct tpm_chip chip, u8 data, size_t max)
aad887f6 JS	480	{
41ab999c KY	481	return -ENODEV;
41ab999c KY	482	}
954650ef	483
aaae8153 SB	484	static inline struct tpm_chip *tpm_default_chip(void)
	485	{
	486	return NULL;
	487	}
d2add27c JB	488
	489	static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
	490	{
	491	}
659aaf2b	492	#endif
699e3efd JB	493	#ifdef CONFIG_TCG_TPM2_HMAC
	494
	495	int tpm2_start_auth_session(struct tpm_chip *chip);
d0a25bb9 JB	496	void tpm_buf_append_name(struct tpm_chip chip, struct tpm_buf buf,
d0a25bb9 JB	497	u32 handle, u8 *name);
1085b827 JB	498	void tpm_buf_append_hmac_session(struct tpm_chip chip, struct tpm_buf buf,
	499	u8 attributes, u8 *passphrase,
	500	int passphraselen);
	501	static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
	502	struct tpm_buf *buf,
	503	u8 attributes,
	504	u8 *passphrase,
	505	int passphraselen)
	506	{
	507	tpm_buf_append_hmac_session(chip, buf, attributes, passphrase,
	508	passphraselen);
	509	}
	510	void tpm_buf_fill_hmac_session(struct tpm_chip chip, struct tpm_buf buf);
	511	int tpm_buf_check_hmac_response(struct tpm_chip chip, struct tpm_buf buf,
	512	int rc);
699e3efd JB	513	void tpm2_end_auth_session(struct tpm_chip *chip);
699e3efd JB	514	#else
1085b827 JB	515	#include <asm/unaligned.h>
1085b827 JB	516
699e3efd JB	517	static inline int tpm2_start_auth_session(struct tpm_chip *chip)
	518	{
	519	return 0;
	520	}
	521	static inline void tpm2_end_auth_session(struct tpm_chip *chip)
	522	{
	523	}
d0a25bb9 JB	524	static inline void tpm_buf_append_name(struct tpm_chip *chip,
	525	struct tpm_buf *buf,
	526	u32 handle, u8 *name)
	527	{
	528	tpm_buf_append_u32(buf, handle);
	529	/* count the number of handles in the upper bits of flags */
	530	buf->handles++;
	531	}
1085b827 JB	532	static inline void tpm_buf_append_hmac_session(struct tpm_chip *chip,
	533	struct tpm_buf *buf,
	534	u8 attributes, u8 *passphrase,
	535	int passphraselen)
	536	{
	537	/* offset tells us where the sessions area begins */
	538	int offset = buf->handles * 4 + TPM_HEADER_SIZE;
	539	u32 len = 9 + passphraselen;
	540
	541	if (tpm_buf_length(buf) != offset) {
	542	/* not the first session so update the existing length */
	543	len += get_unaligned_be32(&buf->data[offset]);
	544	put_unaligned_be32(len, &buf->data[offset]);
	545	} else {
	546	tpm_buf_append_u32(buf, len);
	547	}
	548	/* auth handle */
	549	tpm_buf_append_u32(buf, TPM2_RS_PW);
	550	/* nonce */
	551	tpm_buf_append_u16(buf, 0);
	552	/* attributes */
	553	tpm_buf_append_u8(buf, 0);
	554	/* passphrase */
	555	tpm_buf_append_u16(buf, passphraselen);
	556	tpm_buf_append(buf, passphrase, passphraselen);
	557	}
	558	static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip,
	559	struct tpm_buf *buf,
	560	u8 attributes,
	561	u8 *passphrase,
	562	int passphraselen)
	563	{
	564	int offset = buf->handles * 4 + TPM_HEADER_SIZE;
	565	struct tpm_header head = (struct tpm_header ) buf->data;
	566
	567	/*
	568	* if the only sessions are optional, the command tag
	569	* must change to TPM2_ST_NO_SESSIONS
	570	*/
	571	if (tpm_buf_length(buf) == offset)
	572	head->tag = cpu_to_be16(TPM2_ST_NO_SESSIONS);
	573	}
	574	static inline void tpm_buf_fill_hmac_session(struct tpm_chip *chip,
	575	struct tpm_buf *buf)
	576	{
	577	}
	578	static inline int tpm_buf_check_hmac_response(struct tpm_chip *chip,
	579	struct tpm_buf *buf,
	580	int rc)
	581	{
	582	return rc;
	583	}
699e3efd JB	584	#endif /* CONFIG_TCG_TPM2_HMAC */
699e3efd JB	585
659aaf2b	586	#endif