[linux-block.git] / include / linux / tpm.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2004,2007,2008 IBM Corporation
 *
 * Authors:
 * Leendert van Doorn <leendert@watson.ibm.com>
 * Dave Safford <safford@watson.ibm.com>
 * Reiner Sailer <sailer@watson.ibm.com>
 * Kylene Hall <kjhall@us.ibm.com>
 * Debora Velarde <dvelarde@us.ibm.com>
 *
 * Maintained by: <tpmdd_devel@lists.sourceforge.net>
 *
 * Device driver for TCG/TCPA TPM (trusted platform module).
 * Specifications at www.trustedcomputinggroup.org
 */
#ifndef __LINUX_TPM_H__
#define __LINUX_TPM_H__

#include <linux/hw_random.h>
#include <linux/acpi.h>
#include <linux/cdev.h>
#include <linux/fs.h>
#include <linux/highmem.h>
#include <crypto/hash_info.h>

#define TPM_DIGEST_SIZE 20	/* Max TPM v1.2 PCR size */
#define TPM_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE

struct tpm_chip;
struct trusted_key_payload;
struct trusted_key_options;

/* if you add a new hash to this, increment TPM_MAX_HASHES below */
enum tpm_algorithms {
	TPM_ALG_ERROR		= 0x0000,
	TPM_ALG_SHA1		= 0x0004,
	TPM_ALG_KEYEDHASH	= 0x0008,
	TPM_ALG_SHA256		= 0x000B,
	TPM_ALG_SHA384		= 0x000C,
	TPM_ALG_SHA512		= 0x000D,
	TPM_ALG_NULL		= 0x0010,
	TPM_ALG_SM3_256		= 0x0012,
};

/*
 * maximum number of hashing algorithms a TPM can have.  This is
 * basically a count of every hash in tpm_algorithms above
 */
#define TPM_MAX_HASHES	5

struct tpm_digest {
	u16 alg_id;
	u8 digest[TPM_MAX_DIGEST_SIZE];
} __packed;

struct tpm_bank_info {
	u16 alg_id;
	u16 digest_size;
	u16 crypto_id;
};

enum TPM_OPS_FLAGS {
	TPM_OPS_AUTO_STARTUP = BIT(0),
};

struct tpm_class_ops {
	unsigned int flags;
	const u8 req_complete_mask;
	const u8 req_complete_val;
	bool (*req_canceled)(struct tpm_chip *chip, u8 status);
	int (*recv) (struct tpm_chip *chip, u8 *buf, size_t len);
	int (*send) (struct tpm_chip *chip, u8 *buf, size_t len);
	void (*cancel) (struct tpm_chip *chip);
	u8 (*status) (struct tpm_chip *chip);
	void (*update_timeouts)(struct tpm_chip *chip,
				unsigned long *timeout_cap);
	void (*update_durations)(struct tpm_chip *chip,
				 unsigned long *duration_cap);
	int (*go_idle)(struct tpm_chip *chip);
	int (*cmd_ready)(struct tpm_chip *chip);
	int (*request_locality)(struct tpm_chip *chip, int loc);
	int (*relinquish_locality)(struct tpm_chip *chip, int loc);
	void (*clk_enable)(struct tpm_chip *chip, bool value);
};

#define TPM_NUM_EVENT_LOG_FILES		3

/* Indexes the duration array */
enum tpm_duration {
	TPM_SHORT = 0,
	TPM_MEDIUM = 1,
	TPM_LONG = 2,
	TPM_LONG_LONG = 3,
	TPM_UNDEFINED,
	TPM_NUM_DURATIONS = TPM_UNDEFINED,
};

#define TPM_PPI_VERSION_LEN		3

struct tpm_space {
	u32 context_tbl[3];
	u8 *context_buf;
	u32 session_tbl[3];
	u8 *session_buf;
	u32 buf_size;
};

struct tpm_bios_log {
	void *bios_event_log;
	void *bios_event_log_end;
};

struct tpm_chip_seqops {
	struct tpm_chip *chip;
	const struct seq_operations *seqops;
};

struct tpm_chip {
	struct device dev;
	struct device devs;
	struct cdev cdev;
	struct cdev cdevs;

	/* A driver callback under ops cannot be run unless ops_sem is held
	 * (sometimes implicitly, eg for the sysfs code). ops becomes null
	 * when the driver is unregistered, see tpm_try_get_ops.
	 */
	struct rw_semaphore ops_sem;
	const struct tpm_class_ops *ops;

	struct tpm_bios_log log;
	struct tpm_chip_seqops bin_log_seqops;
	struct tpm_chip_seqops ascii_log_seqops;

	unsigned int flags;

	int dev_num;		/* /dev/tpm# */
	unsigned long is_open;	/* only one allowed */

	char hwrng_name[64];
	struct hwrng hwrng;

	struct mutex tpm_mutex;	/* tpm is processing */

	unsigned long timeout_a; /* jiffies */
	unsigned long timeout_b; /* jiffies */
	unsigned long timeout_c; /* jiffies */
	unsigned long timeout_d; /* jiffies */
	bool timeout_adjusted;
	unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */
	bool duration_adjusted;

	struct dentry *bios_dir[TPM_NUM_EVENT_LOG_FILES];

	const struct attribute_group *groups[3 + TPM_MAX_HASHES];
	unsigned int groups_cnt;

	u32 nr_allocated_banks;
	struct tpm_bank_info *allocated_banks;
#ifdef CONFIG_ACPI
	acpi_handle acpi_dev_handle;
	char ppi_version[TPM_PPI_VERSION_LEN + 1];
#endif /* CONFIG_ACPI */

	struct tpm_space work_space;
	u32 last_cc;
	u32 nr_commands;
	u32 *cc_attrs_tbl;

	/* active locality */
	int locality;
};

#define TPM_HEADER_SIZE		10

enum tpm2_const {
	TPM2_PLATFORM_PCR       =     24,
	TPM2_PCR_SELECT_MIN     = ((TPM2_PLATFORM_PCR + 7) / 8),
};

enum tpm2_timeouts {
	TPM2_TIMEOUT_A          =    750,
	TPM2_TIMEOUT_B          =   2000,
	TPM2_TIMEOUT_C          =    200,
	TPM2_TIMEOUT_D          =     30,
	TPM2_DURATION_SHORT     =     20,
	TPM2_DURATION_MEDIUM    =    750,
	TPM2_DURATION_LONG      =   2000,
	TPM2_DURATION_LONG_LONG = 300000,
	TPM2_DURATION_DEFAULT   = 120000,
};

enum tpm2_structures {
	TPM2_ST_NO_SESSIONS	= 0x8001,
	TPM2_ST_SESSIONS	= 0x8002,
};

/* Indicates from what layer of the software stack the error comes from */
#define TSS2_RC_LAYER_SHIFT	 16
#define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)

enum tpm2_return_codes {
	TPM2_RC_SUCCESS		= 0x0000,
	TPM2_RC_HASH		= 0x0083, /* RC_FMT1 */
	TPM2_RC_HANDLE		= 0x008B,
	TPM2_RC_INITIALIZE	= 0x0100, /* RC_VER1 */
	TPM2_RC_FAILURE		= 0x0101,
	TPM2_RC_DISABLED	= 0x0120,
	TPM2_RC_COMMAND_CODE    = 0x0143,
	TPM2_RC_TESTING		= 0x090A, /* RC_WARN */
	TPM2_RC_REFERENCE_H0	= 0x0910,
	TPM2_RC_RETRY		= 0x0922,
};

enum tpm2_command_codes {
	TPM2_CC_FIRST		        = 0x011F,
	TPM2_CC_HIERARCHY_CONTROL       = 0x0121,
	TPM2_CC_HIERARCHY_CHANGE_AUTH   = 0x0129,
	TPM2_CC_CREATE_PRIMARY          = 0x0131,
	TPM2_CC_SEQUENCE_COMPLETE       = 0x013E,
	TPM2_CC_SELF_TEST	        = 0x0143,
	TPM2_CC_STARTUP		        = 0x0144,
	TPM2_CC_SHUTDOWN	        = 0x0145,
	TPM2_CC_NV_READ                 = 0x014E,
	TPM2_CC_CREATE		        = 0x0153,
	TPM2_CC_LOAD		        = 0x0157,
	TPM2_CC_SEQUENCE_UPDATE         = 0x015C,
	TPM2_CC_UNSEAL		        = 0x015E,
	TPM2_CC_CONTEXT_LOAD	        = 0x0161,
	TPM2_CC_CONTEXT_SAVE	        = 0x0162,
	TPM2_CC_FLUSH_CONTEXT	        = 0x0165,
	TPM2_CC_VERIFY_SIGNATURE        = 0x0177,
	TPM2_CC_GET_CAPABILITY	        = 0x017A,
	TPM2_CC_GET_RANDOM	        = 0x017B,
	TPM2_CC_PCR_READ	        = 0x017E,
	TPM2_CC_PCR_EXTEND	        = 0x0182,
	TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
	TPM2_CC_HASH_SEQUENCE_START     = 0x0186,
	TPM2_CC_CREATE_LOADED           = 0x0191,
	TPM2_CC_LAST		        = 0x0193, /* Spec 1.36 */
};

enum tpm2_permanent_handles {
	TPM2_RS_PW		= 0x40000009,
};

enum tpm2_capabilities {
	TPM2_CAP_HANDLES	= 1,
	TPM2_CAP_COMMANDS	= 2,
	TPM2_CAP_PCRS		= 5,
	TPM2_CAP_TPM_PROPERTIES = 6,
};

enum tpm2_properties {
	TPM_PT_TOTAL_COMMANDS	= 0x0129,
};

enum tpm2_startup_types {
	TPM2_SU_CLEAR	= 0x0000,
	TPM2_SU_STATE	= 0x0001,
};

enum tpm2_cc_attrs {
	TPM2_CC_ATTR_CHANDLES	= 25,
	TPM2_CC_ATTR_RHANDLE	= 28,
};

#define TPM_VID_INTEL    0x8086
#define TPM_VID_WINBOND  0x1050
#define TPM_VID_STM      0x104A

enum tpm_chip_flags {
	TPM_CHIP_FLAG_TPM2		= BIT(1),
	TPM_CHIP_FLAG_IRQ		= BIT(2),
	TPM_CHIP_FLAG_VIRTUAL		= BIT(3),
	TPM_CHIP_FLAG_HAVE_TIMEOUTS	= BIT(4),
	TPM_CHIP_FLAG_ALWAYS_POWERED	= BIT(5),
	TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED	= BIT(6),
};

#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)

struct tpm_header {
	__be16 tag;
	__be32 length;
	union {
		__be32 ordinal;
		__be32 return_code;
	};
} __packed;

/* A string buffer type for constructing TPM commands. This is based on the
 * ideas of string buffer code in security/keys/trusted.h but is heap based
 * in order to keep the stack usage minimal.
 */

enum tpm_buf_flags {
	TPM_BUF_OVERFLOW	= BIT(0),
};

struct tpm_buf {
	unsigned int flags;
	u8 *data;
};

enum tpm2_object_attributes {
	TPM2_OA_FIXED_TPM		= BIT(1),
	TPM2_OA_FIXED_PARENT		= BIT(4),
	TPM2_OA_USER_WITH_AUTH		= BIT(6),
};

enum tpm2_session_attributes {
	TPM2_SA_CONTINUE_SESSION	= BIT(0),
};

struct tpm2_hash {
	unsigned int crypto_id;
	unsigned int tpm_id;
};

static inline void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal)
{
	struct tpm_header *head = (struct tpm_header *)buf->data;

	head->tag = cpu_to_be16(tag);
	head->length = cpu_to_be32(sizeof(*head));
	head->ordinal = cpu_to_be32(ordinal);
}

static inline int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal)
{
	buf->data = (u8 *)__get_free_page(GFP_KERNEL);
	if (!buf->data)
		return -ENOMEM;

	buf->flags = 0;
	tpm_buf_reset(buf, tag, ordinal);
	return 0;
}

static inline void tpm_buf_destroy(struct tpm_buf *buf)
{
	free_page((unsigned long)buf->data);
}

static inline u32 tpm_buf_length(struct tpm_buf *buf)
{
	struct tpm_header *head = (struct tpm_header *)buf->data;

	return be32_to_cpu(head->length);
}

static inline u16 tpm_buf_tag(struct tpm_buf *buf)
{
	struct tpm_header *head = (struct tpm_header *)buf->data;

	return be16_to_cpu(head->tag);
}

static inline void tpm_buf_append(struct tpm_buf *buf,
				  const unsigned char *new_data,
				  unsigned int new_len)
{
	struct tpm_header *head = (struct tpm_header *)buf->data;
	u32 len = tpm_buf_length(buf);

	/* Return silently if overflow has already happened. */
	if (buf->flags & TPM_BUF_OVERFLOW)
		return;

	if ((len + new_len) > PAGE_SIZE) {
		WARN(1, "tpm_buf: overflow\n");
		buf->flags |= TPM_BUF_OVERFLOW;
		return;
	}

	memcpy(&buf->data[len], new_data, new_len);
	head->length = cpu_to_be32(len + new_len);
}

static inline void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value)
{
	tpm_buf_append(buf, &value, 1);
}

static inline void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value)
{
	__be16 value2 = cpu_to_be16(value);

	tpm_buf_append(buf, (u8 *) &value2, 2);
}

static inline void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value)
{
	__be32 value2 = cpu_to_be32(value);

	tpm_buf_append(buf, (u8 *) &value2, 4);
}

static inline u32 tpm2_rc_value(u32 rc)
{
	return (rc & BIT(7)) ? rc & 0xff : rc;
}

#if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE)

extern int tpm_is_tpm2(struct tpm_chip *chip);
extern __must_check int tpm_try_get_ops(struct tpm_chip *chip);
extern void tpm_put_ops(struct tpm_chip *chip);
extern ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf,
				size_t min_rsp_body_length, const char *desc);
extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
			struct tpm_digest *digest);
extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
			  struct tpm_digest *digests);
extern int tpm_send(struct tpm_chip *chip, void *cmd, size_t buflen);
extern int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max);
extern struct tpm_chip *tpm_default_chip(void);
void tpm2_flush_context(struct tpm_chip *chip, u32 handle);
#else
static inline int tpm_is_tpm2(struct tpm_chip *chip)
{
	return -ENODEV;
}
static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx,
			       struct tpm_digest *digest)
{
	return -ENODEV;
}

static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
				 struct tpm_digest *digests)
{
	return -ENODEV;
}

static inline int tpm_send(struct tpm_chip *chip, void *cmd, size_t buflen)
{
	return -ENODEV;
}
static inline int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max)
{
	return -ENODEV;
}

static inline struct tpm_chip *tpm_default_chip(void)
{
	return NULL;
}
#endif
#endif
Commit	Line	Data
b886d83c	1	/* SPDX-License-Identifier: GPL-2.0-only */
659aaf2b RA	2	/*
	3	* Copyright (C) 2004,2007,2008 IBM Corporation
	4	*
	5	* Authors:
	6	* Leendert van Doorn <leendert@watson.ibm.com>
	7	* Dave Safford <safford@watson.ibm.com>
	8	* Reiner Sailer <sailer@watson.ibm.com>
	9	* Kylene Hall <kjhall@us.ibm.com>
	10	* Debora Velarde <dvelarde@us.ibm.com>
	11	*
	12	* Maintained by: <tpmdd_devel@lists.sourceforge.net>
	13	*
	14	* Device driver for TCG/TCPA TPM (trusted platform module).
	15	* Specifications at www.trustedcomputinggroup.org
659aaf2b RA	16	*/
	17	#ifndef __LINUX_TPM_H__
	18	#define __LINUX_TPM_H__
	19
901615cb RS	20	#include <linux/hw_random.h>
	21	#include <linux/acpi.h>
	22	#include <linux/cdev.h>
	23	#include <linux/fs.h>
74edff2d	24	#include <linux/highmem.h>
aa042475 RS	25	#include <crypto/hash_info.h>
aa042475 RS	26
1c16c963	27	#define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */
aa042475	28	#define TPM_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE
1c16c963	29
01ad1fa7	30	struct tpm_chip;
954650ef JS	31	struct trusted_key_payload;
954650ef JS	32	struct trusted_key_options;
01ad1fa7	33
aab73d95	34	/* if you add a new hash to this, increment TPM_MAX_HASHES below */
aa042475 RS	35	enum tpm_algorithms {
	36	TPM_ALG_ERROR = 0x0000,
	37	TPM_ALG_SHA1 = 0x0004,
	38	TPM_ALG_KEYEDHASH = 0x0008,
	39	TPM_ALG_SHA256 = 0x000B,
	40	TPM_ALG_SHA384 = 0x000C,
	41	TPM_ALG_SHA512 = 0x000D,
	42	TPM_ALG_NULL = 0x0010,
	43	TPM_ALG_SM3_256 = 0x0012,
	44	};
	45
aab73d95 JB	46	/*
	47	* maximum number of hashing algorithms a TPM can have. This is
	48	* basically a count of every hash in tpm_algorithms above
	49	*/
	50	#define TPM_MAX_HASHES 5
	51
aa042475 RS	52	struct tpm_digest {
	53	u16 alg_id;
	54	u8 digest[TPM_MAX_DIGEST_SIZE];
	55	} __packed;
	56
879b5892 RS	57	struct tpm_bank_info {
	58	u16 alg_id;
	59	u16 digest_size;
	60	u16 crypto_id;
	61	};
	62
cae8b441 JG	63	enum TPM_OPS_FLAGS {
	64	TPM_OPS_AUTO_STARTUP = BIT(0),
	65	};
	66
01ad1fa7	67	struct tpm_class_ops {
cae8b441	68	unsigned int flags;
01ad1fa7 JG	69	const u8 req_complete_mask;
	70	const u8 req_complete_val;
	71	bool (req_canceled)(struct tpm_chip chip, u8 status);
	72	int (recv) (struct tpm_chip chip, u8 *buf, size_t len);
	73	int (send) (struct tpm_chip chip, u8 *buf, size_t len);
	74	void (cancel) (struct tpm_chip chip);
	75	u8 (status) (struct tpm_chip chip);
36ce0897	76	void (update_timeouts)(struct tpm_chip chip,
8e54caf4	77	unsigned long *timeout_cap);
15d0b22c JS	78	void (update_durations)(struct tpm_chip chip,
15d0b22c JS	79	unsigned long *duration_cap);
627448e8 TW	80	int (go_idle)(struct tpm_chip chip);
627448e8 TW	81	int (cmd_ready)(struct tpm_chip chip);
877c57d0	82	int (request_locality)(struct tpm_chip chip, int loc);
888d867d	83	int (relinquish_locality)(struct tpm_chip chip, int loc);
b3e958ce	84	void (clk_enable)(struct tpm_chip chip, bool value);
01ad1fa7 JG	85	};
01ad1fa7 JG	86
901615cb RS	87	#define TPM_NUM_EVENT_LOG_FILES 3
	88
	89	/* Indexes the duration array */
	90	enum tpm_duration {
	91	TPM_SHORT = 0,
	92	TPM_MEDIUM = 1,
	93	TPM_LONG = 2,
	94	TPM_LONG_LONG = 3,
	95	TPM_UNDEFINED,
	96	TPM_NUM_DURATIONS = TPM_UNDEFINED,
	97	};
	98
	99	#define TPM_PPI_VERSION_LEN 3
	100
	101	struct tpm_space {
	102	u32 context_tbl[3];
	103	u8 *context_buf;
	104	u32 session_tbl[3];
	105	u8 *session_buf;
6c4e79d9	106	u32 buf_size;
901615cb RS	107	};
	108
	109	struct tpm_bios_log {
	110	void *bios_event_log;
	111	void *bios_event_log_end;
	112	};
	113
	114	struct tpm_chip_seqops {
	115	struct tpm_chip *chip;
	116	const struct seq_operations *seqops;
	117	};
	118
	119	struct tpm_chip {
	120	struct device dev;
	121	struct device devs;
	122	struct cdev cdev;
	123	struct cdev cdevs;
	124
	125	/* A driver callback under ops cannot be run unless ops_sem is held
	126	* (sometimes implicitly, eg for the sysfs code). ops becomes null
	127	* when the driver is unregistered, see tpm_try_get_ops.
	128	*/
	129	struct rw_semaphore ops_sem;
	130	const struct tpm_class_ops *ops;
	131
	132	struct tpm_bios_log log;
	133	struct tpm_chip_seqops bin_log_seqops;
	134	struct tpm_chip_seqops ascii_log_seqops;
	135
	136	unsigned int flags;
	137
	138	int dev_num; /* /dev/tpm# */
	139	unsigned long is_open; /* only one allowed */
	140
	141	char hwrng_name[64];
	142	struct hwrng hwrng;
	143
	144	struct mutex tpm_mutex; /* tpm is processing */
	145
	146	unsigned long timeout_a; /* jiffies */
	147	unsigned long timeout_b; /* jiffies */
	148	unsigned long timeout_c; /* jiffies */
	149	unsigned long timeout_d; /* jiffies */
	150	bool timeout_adjusted;
	151	unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */
	152	bool duration_adjusted;
	153
	154	struct dentry *bios_dir[TPM_NUM_EVENT_LOG_FILES];
	155
aab73d95	156	const struct attribute_group *groups[3 + TPM_MAX_HASHES];
901615cb RS	157	unsigned int groups_cnt;
	158
	159	u32 nr_allocated_banks;
	160	struct tpm_bank_info *allocated_banks;
	161	#ifdef CONFIG_ACPI
	162	acpi_handle acpi_dev_handle;
	163	char ppi_version[TPM_PPI_VERSION_LEN + 1];
	164	#endif /* CONFIG_ACPI */
	165
	166	struct tpm_space work_space;
	167	u32 last_cc;
	168	u32 nr_commands;
	169	u32 *cc_attrs_tbl;
	170
	171	/* active locality */
	172	int locality;
	173	};
	174
74edff2d SG	175	#define TPM_HEADER_SIZE 10
	176
	177	enum tpm2_const {
	178	TPM2_PLATFORM_PCR = 24,
	179	TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8),
	180	};
	181
	182	enum tpm2_timeouts {
	183	TPM2_TIMEOUT_A = 750,
	184	TPM2_TIMEOUT_B = 2000,
	185	TPM2_TIMEOUT_C = 200,
	186	TPM2_TIMEOUT_D = 30,
	187	TPM2_DURATION_SHORT = 20,
	188	TPM2_DURATION_MEDIUM = 750,
	189	TPM2_DURATION_LONG = 2000,
	190	TPM2_DURATION_LONG_LONG = 300000,
	191	TPM2_DURATION_DEFAULT = 120000,
	192	};
	193
	194	enum tpm2_structures {
	195	TPM2_ST_NO_SESSIONS = 0x8001,
	196	TPM2_ST_SESSIONS = 0x8002,
	197	};
	198
	199	/* Indicates from what layer of the software stack the error comes from */
	200	#define TSS2_RC_LAYER_SHIFT 16
	201	#define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)
	202
	203	enum tpm2_return_codes {
	204	TPM2_RC_SUCCESS = 0x0000,
	205	TPM2_RC_HASH = 0x0083, /* RC_FMT1 */
	206	TPM2_RC_HANDLE = 0x008B,
	207	TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */
	208	TPM2_RC_FAILURE = 0x0101,
	209	TPM2_RC_DISABLED = 0x0120,
	210	TPM2_RC_COMMAND_CODE = 0x0143,
	211	TPM2_RC_TESTING = 0x090A, /* RC_WARN */
	212	TPM2_RC_REFERENCE_H0 = 0x0910,
	213	TPM2_RC_RETRY = 0x0922,
	214	};
	215
	216	enum tpm2_command_codes {
	217	TPM2_CC_FIRST = 0x011F,
	218	TPM2_CC_HIERARCHY_CONTROL = 0x0121,
	219	TPM2_CC_HIERARCHY_CHANGE_AUTH = 0x0129,
	220	TPM2_CC_CREATE_PRIMARY = 0x0131,
	221	TPM2_CC_SEQUENCE_COMPLETE = 0x013E,
	222	TPM2_CC_SELF_TEST = 0x0143,
	223	TPM2_CC_STARTUP = 0x0144,
	224	TPM2_CC_SHUTDOWN = 0x0145,
	225	TPM2_CC_NV_READ = 0x014E,
	226	TPM2_CC_CREATE = 0x0153,
	227	TPM2_CC_LOAD = 0x0157,
	228	TPM2_CC_SEQUENCE_UPDATE = 0x015C,
	229	TPM2_CC_UNSEAL = 0x015E,
	230	TPM2_CC_CONTEXT_LOAD = 0x0161,
	231	TPM2_CC_CONTEXT_SAVE = 0x0162,
	232	TPM2_CC_FLUSH_CONTEXT = 0x0165,
	233	TPM2_CC_VERIFY_SIGNATURE = 0x0177,
	234	TPM2_CC_GET_CAPABILITY = 0x017A,
	235	TPM2_CC_GET_RANDOM = 0x017B,
	236	TPM2_CC_PCR_READ = 0x017E,
	237	TPM2_CC_PCR_EXTEND = 0x0182,
	238	TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
239	TPM2_CC_HASH_SEQUENCE_START = 0x0186,
240	TPM2_CC_CREATE_LOADED = 0x0191,
241	TPM2_CC_LAST = 0x0193, /* Spec 1.36 */
242	};
243
244	enum tpm2_permanent_handles {
245	TPM2_RS_PW = 0x40000009,
246	};
247
248	enum tpm2_capabilities {
249	TPM2_CAP_HANDLES = 1,
250	TPM2_CAP_COMMANDS = 2,
251	TPM2_CAP_PCRS = 5,
252	TPM2_CAP_TPM_PROPERTIES = 6,
253	};
254
255	enum tpm2_properties {
256	TPM_PT_TOTAL_COMMANDS = 0x0129,
257	};
258
259	enum tpm2_startup_types {
260	TPM2_SU_CLEAR = 0x0000,
261	TPM2_SU_STATE = 0x0001,
262	};
263
264	enum tpm2_cc_attrs {
265	TPM2_CC_ATTR_CHANDLES = 25,
266	TPM2_CC_ATTR_RHANDLE = 28,
267	};
268
269	#define TPM_VID_INTEL 0x8086
270	#define TPM_VID_WINBOND 0x1050
271	#define TPM_VID_STM 0x104A
272
273	enum tpm_chip_flags {
274	TPM_CHIP_FLAG_TPM2 = BIT(1),
275	TPM_CHIP_FLAG_IRQ = BIT(2),
276	TPM_CHIP_FLAG_VIRTUAL = BIT(3),
277	TPM_CHIP_FLAG_HAVE_TIMEOUTS = BIT(4),
278	TPM_CHIP_FLAG_ALWAYS_POWERED = BIT(5),
279	TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6),
280	};
281
282	#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)
283
284	struct tpm_header {
285	__be16 tag;
286	__be32 length;
287	union {
288	__be32 ordinal;
289	__be32 return_code;
290	};
291	} __packed;
292
293	/* A string buffer type for constructing TPM commands. This is based on the
294	* ideas of string buffer code in security/keys/trusted.h but is heap based
295	* in order to keep the stack usage minimal.
296	*/
297
298	enum tpm_buf_flags {
299	TPM_BUF_OVERFLOW = BIT(0),
300	};
301
302	struct tpm_buf {
303	unsigned int flags;
304	u8 *data;
305	};
306
2e19e101	307	enum tpm2_object_attributes {
e5fb5d2c JB	308	TPM2_OA_FIXED_TPM = BIT(1),
e5fb5d2c JB	309	TPM2_OA_FIXED_PARENT = BIT(4),
2e19e101 SG	310	TPM2_OA_USER_WITH_AUTH = BIT(6),
	311	};
	312
	313	enum tpm2_session_attributes {
	314	TPM2_SA_CONTINUE_SESSION = BIT(0),
	315	};
	316
	317	struct tpm2_hash {
	318	unsigned int crypto_id;
	319	unsigned int tpm_id;
	320	};
	321
74edff2d SG	322	static inline void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal)
	323	{
	324	struct tpm_header head = (struct tpm_header )buf->data;
	325
	326	head->tag = cpu_to_be16(tag);
	327	head->length = cpu_to_be32(sizeof(*head));
	328	head->ordinal = cpu_to_be32(ordinal);
	329	}
	330
	331	static inline int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal)
	332	{
	333	buf->data = (u8 *)__get_free_page(GFP_KERNEL);
	334	if (!buf->data)
	335	return -ENOMEM;
	336
	337	buf->flags = 0;
	338	tpm_buf_reset(buf, tag, ordinal);
	339	return 0;
	340	}
	341
	342	static inline void tpm_buf_destroy(struct tpm_buf *buf)
	343	{
	344	free_page((unsigned long)buf->data);
	345	}
	346
	347	static inline u32 tpm_buf_length(struct tpm_buf *buf)
	348	{
	349	struct tpm_header head = (struct tpm_header )buf->data;
	350
	351	return be32_to_cpu(head->length);
	352	}
	353
	354	static inline u16 tpm_buf_tag(struct tpm_buf *buf)
	355	{
	356	struct tpm_header head = (struct tpm_header )buf->data;
	357
	358	return be16_to_cpu(head->tag);
	359	}
	360
	361	static inline void tpm_buf_append(struct tpm_buf *buf,
	362	const unsigned char *new_data,
	363	unsigned int new_len)
	364	{
	365	struct tpm_header head = (struct tpm_header )buf->data;
	366	u32 len = tpm_buf_length(buf);
	367
	368	/* Return silently if overflow has already happened. */
	369	if (buf->flags & TPM_BUF_OVERFLOW)
	370	return;
	371
	372	if ((len + new_len) > PAGE_SIZE) {
	373	WARN(1, "tpm_buf: overflow\n");
	374	buf->flags \|= TPM_BUF_OVERFLOW;
	375	return;
	376	}
	377
	378	memcpy(&buf->data[len], new_data, new_len);
	379	head->length = cpu_to_be32(len + new_len);
	380	}
	381
	382	static inline void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value)
	383	{
	384	tpm_buf_append(buf, &value, 1);
	385	}
386
387	static inline void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value)
388	{
389	__be16 value2 = cpu_to_be16(value);
390
391	tpm_buf_append(buf, (u8 *) &value2, 2);
392	}
393
394	static inline void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value)
395	{
396	__be32 value2 = cpu_to_be32(value);
397
398	tpm_buf_append(buf, (u8 *) &value2, 4);
399	}
400
2e19e101 SG	401	static inline u32 tpm2_rc_value(u32 rc)
	402	{
	403	return (rc & BIT(7)) ? rc & 0xff : rc;
	404	}
	405
ff76ec18	406	#if defined(CONFIG_TCG_TPM) \|\| defined(CONFIG_TCG_TPM_MODULE)
659aaf2b	407
aad887f6	408	extern int tpm_is_tpm2(struct tpm_chip *chip);
8c657a05 JS	409	extern __must_check int tpm_try_get_ops(struct tpm_chip *chip);
	410	extern void tpm_put_ops(struct tpm_chip *chip);
	411	extern ssize_t tpm_transmit_cmd(struct tpm_chip chip, struct tpm_buf buf,
	412	size_t min_rsp_body_length, const char *desc);
879b5892 RS	413	extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
879b5892 RS	414	struct tpm_digest *digest);
0b6cf6b9 RS	415	extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
0b6cf6b9 RS	416	struct tpm_digest *digests);
aad887f6 JS	417	extern int tpm_send(struct tpm_chip chip, void cmd, size_t buflen);
aad887f6 JS	418	extern int tpm_get_random(struct tpm_chip chip, u8 data, size_t max);
aaae8153	419	extern struct tpm_chip *tpm_default_chip(void);
45477b3f	420	void tpm2_flush_context(struct tpm_chip *chip, u32 handle);
d6ba4521	421	#else
aad887f6	422	static inline int tpm_is_tpm2(struct tpm_chip *chip)
954650ef JS	423	{
	424	return -ENODEV;
	425	}
879b5892 RS	426	static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx,
879b5892 RS	427	struct tpm_digest *digest)
aad887f6	428	{
d6ba4521 MZ	429	return -ENODEV;
d6ba4521 MZ	430	}
95adc6b4 TW	431
95adc6b4 TW	432	static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
0b6cf6b9	433	struct tpm_digest *digests)
aad887f6	434	{
d6ba4521 MZ	435	return -ENODEV;
d6ba4521 MZ	436	}
95adc6b4	437
aad887f6 JS	438	static inline int tpm_send(struct tpm_chip chip, void cmd, size_t buflen)
aad887f6 JS	439	{
c749ba91 MZ	440	return -ENODEV;
c749ba91 MZ	441	}
aad887f6 JS	442	static inline int tpm_get_random(struct tpm_chip chip, u8 data, size_t max)
aad887f6 JS	443	{
41ab999c KY	444	return -ENODEV;
41ab999c KY	445	}
954650ef	446
aaae8153 SB	447	static inline struct tpm_chip *tpm_default_chip(void)
	448	{
	449	return NULL;
	450	}
659aaf2b RA	451	#endif
659aaf2b RA	452	#endif