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1 | #ifndef LINUX_SSB_H_ |
2 | #define LINUX_SSB_H_ | |
3 | ||
4 | #include <linux/device.h> | |
5 | #include <linux/list.h> | |
6 | #include <linux/types.h> | |
7 | #include <linux/spinlock.h> | |
8 | #include <linux/pci.h> | |
9 | #include <linux/mod_devicetable.h> | |
10 | ||
11 | #include <linux/ssb/ssb_regs.h> | |
12 | ||
13 | ||
14 | struct pcmcia_device; | |
15 | struct ssb_bus; | |
16 | struct ssb_driver; | |
17 | ||
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18 | struct ssb_sprom { |
19 | u8 revision; | |
ac82fab4 LF |
20 | u8 il0mac[6]; /* MAC address for 802.11b/g */ |
21 | u8 et0mac[6]; /* MAC address for Ethernet */ | |
22 | u8 et1mac[6]; /* MAC address for 802.11a */ | |
23 | u8 et0phyaddr; /* MII address for enet0 */ | |
24 | u8 et1phyaddr; /* MII address for enet1 */ | |
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25 | u8 et0mdcport; /* MDIO for enet0 */ |
26 | u8 et1mdcport; /* MDIO for enet1 */ | |
27 | u8 board_rev; /* Board revision number from SPROM. */ | |
ac82fab4 | 28 | u8 country_code; /* Country Code */ |
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29 | u8 ant_available_a; /* A-PHY antenna available bits (up to 4) */ |
30 | u8 ant_available_bg; /* B/G-PHY antenna available bits (up to 4) */ | |
ac82fab4 LF |
31 | u16 pa0b0; |
32 | u16 pa0b1; | |
33 | u16 pa0b2; | |
34 | u16 pa1b0; | |
35 | u16 pa1b1; | |
36 | u16 pa1b2; | |
37 | u8 gpio0; /* GPIO pin 0 */ | |
38 | u8 gpio1; /* GPIO pin 1 */ | |
39 | u8 gpio2; /* GPIO pin 2 */ | |
40 | u8 gpio3; /* GPIO pin 3 */ | |
41 | u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */ | |
42 | u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */ | |
43 | u8 itssi_a; /* Idle TSSI Target for A-PHY */ | |
44 | u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ | |
45 | u16 boardflags_lo; /* Boardflags (low 16 bits) */ | |
af4b7450 | 46 | u16 boardflags_hi; /* Boardflags (high 16 bits) */ |
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47 | |
48 | /* Antenna gain values for up to 4 antennas | |
49 | * on each band. Values in dBm/4 (Q5.2). Negative gain means the | |
50 | * loss in the connectors is bigger than the gain. */ | |
51 | struct { | |
52 | struct { | |
53 | s8 a0, a1, a2, a3; | |
54 | } ghz24; /* 2.4GHz band */ | |
55 | struct { | |
56 | s8 a0, a1, a2, a3; | |
57 | } ghz5; /* 5GHz band */ | |
58 | } antenna_gain; | |
ac82fab4 LF |
59 | |
60 | /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */ | |
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61 | }; |
62 | ||
63 | /* Information about the PCB the circuitry is soldered on. */ | |
64 | struct ssb_boardinfo { | |
65 | u16 vendor; | |
66 | u16 type; | |
67 | u16 rev; | |
68 | }; | |
69 | ||
70 | ||
71 | struct ssb_device; | |
72 | /* Lowlevel read/write operations on the device MMIO. | |
73 | * Internal, don't use that outside of ssb. */ | |
74 | struct ssb_bus_ops { | |
75 | u16 (*read16)(struct ssb_device *dev, u16 offset); | |
76 | u32 (*read32)(struct ssb_device *dev, u16 offset); | |
77 | void (*write16)(struct ssb_device *dev, u16 offset, u16 value); | |
78 | void (*write32)(struct ssb_device *dev, u16 offset, u32 value); | |
79 | }; | |
80 | ||
81 | ||
82 | /* Core-ID values. */ | |
83 | #define SSB_DEV_CHIPCOMMON 0x800 | |
84 | #define SSB_DEV_ILINE20 0x801 | |
85 | #define SSB_DEV_SDRAM 0x803 | |
86 | #define SSB_DEV_PCI 0x804 | |
87 | #define SSB_DEV_MIPS 0x805 | |
88 | #define SSB_DEV_ETHERNET 0x806 | |
89 | #define SSB_DEV_V90 0x807 | |
90 | #define SSB_DEV_USB11_HOSTDEV 0x808 | |
91 | #define SSB_DEV_ADSL 0x809 | |
92 | #define SSB_DEV_ILINE100 0x80A | |
93 | #define SSB_DEV_IPSEC 0x80B | |
94 | #define SSB_DEV_PCMCIA 0x80D | |
95 | #define SSB_DEV_INTERNAL_MEM 0x80E | |
96 | #define SSB_DEV_MEMC_SDRAM 0x80F | |
97 | #define SSB_DEV_EXTIF 0x811 | |
98 | #define SSB_DEV_80211 0x812 | |
99 | #define SSB_DEV_MIPS_3302 0x816 | |
100 | #define SSB_DEV_USB11_HOST 0x817 | |
101 | #define SSB_DEV_USB11_DEV 0x818 | |
102 | #define SSB_DEV_USB20_HOST 0x819 | |
103 | #define SSB_DEV_USB20_DEV 0x81A | |
104 | #define SSB_DEV_SDIO_HOST 0x81B | |
105 | #define SSB_DEV_ROBOSWITCH 0x81C | |
106 | #define SSB_DEV_PARA_ATA 0x81D | |
107 | #define SSB_DEV_SATA_XORDMA 0x81E | |
108 | #define SSB_DEV_ETHERNET_GBIT 0x81F | |
109 | #define SSB_DEV_PCIE 0x820 | |
110 | #define SSB_DEV_MIMO_PHY 0x821 | |
111 | #define SSB_DEV_SRAM_CTRLR 0x822 | |
112 | #define SSB_DEV_MINI_MACPHY 0x823 | |
113 | #define SSB_DEV_ARM_1176 0x824 | |
114 | #define SSB_DEV_ARM_7TDMI 0x825 | |
115 | ||
116 | /* Vendor-ID values */ | |
117 | #define SSB_VENDOR_BROADCOM 0x4243 | |
118 | ||
119 | /* Some kernel subsystems poke with dev->drvdata, so we must use the | |
120 | * following ugly workaround to get from struct device to struct ssb_device */ | |
121 | struct __ssb_dev_wrapper { | |
122 | struct device dev; | |
123 | struct ssb_device *sdev; | |
124 | }; | |
125 | ||
126 | struct ssb_device { | |
127 | /* Having a copy of the ops pointer in each dev struct | |
128 | * is an optimization. */ | |
129 | const struct ssb_bus_ops *ops; | |
130 | ||
131 | struct device *dev; | |
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132 | /* Pointer to the device that has to be used for |
133 | * any DMA related operation. */ | |
134 | struct device *dma_dev; | |
135 | ||
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136 | struct ssb_bus *bus; |
137 | struct ssb_device_id id; | |
138 | ||
139 | u8 core_index; | |
140 | unsigned int irq; | |
141 | ||
142 | /* Internal-only stuff follows. */ | |
143 | void *drvdata; /* Per-device data */ | |
144 | void *devtypedata; /* Per-devicetype (eg 802.11) data */ | |
145 | }; | |
146 | ||
147 | /* Go from struct device to struct ssb_device. */ | |
148 | static inline | |
149 | struct ssb_device * dev_to_ssb_dev(struct device *dev) | |
150 | { | |
151 | struct __ssb_dev_wrapper *wrap; | |
152 | wrap = container_of(dev, struct __ssb_dev_wrapper, dev); | |
153 | return wrap->sdev; | |
154 | } | |
155 | ||
156 | /* Device specific user data */ | |
157 | static inline | |
158 | void ssb_set_drvdata(struct ssb_device *dev, void *data) | |
159 | { | |
160 | dev->drvdata = data; | |
161 | } | |
162 | static inline | |
163 | void * ssb_get_drvdata(struct ssb_device *dev) | |
164 | { | |
165 | return dev->drvdata; | |
166 | } | |
167 | ||
168 | /* Devicetype specific user data. This is per device-type (not per device) */ | |
169 | void ssb_set_devtypedata(struct ssb_device *dev, void *data); | |
170 | static inline | |
171 | void * ssb_get_devtypedata(struct ssb_device *dev) | |
172 | { | |
173 | return dev->devtypedata; | |
174 | } | |
175 | ||
176 | ||
177 | struct ssb_driver { | |
178 | const char *name; | |
179 | const struct ssb_device_id *id_table; | |
180 | ||
181 | int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id); | |
182 | void (*remove)(struct ssb_device *dev); | |
183 | int (*suspend)(struct ssb_device *dev, pm_message_t state); | |
184 | int (*resume)(struct ssb_device *dev); | |
185 | void (*shutdown)(struct ssb_device *dev); | |
186 | ||
187 | struct device_driver drv; | |
188 | }; | |
189 | #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) | |
190 | ||
191 | extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); | |
192 | static inline int ssb_driver_register(struct ssb_driver *drv) | |
193 | { | |
194 | return __ssb_driver_register(drv, THIS_MODULE); | |
195 | } | |
196 | extern void ssb_driver_unregister(struct ssb_driver *drv); | |
197 | ||
198 | ||
199 | ||
200 | ||
201 | enum ssb_bustype { | |
202 | SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */ | |
203 | SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */ | |
204 | SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */ | |
205 | }; | |
206 | ||
207 | /* board_vendor */ | |
208 | #define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */ | |
209 | #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ | |
210 | #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ | |
211 | /* board_type */ | |
212 | #define SSB_BOARD_BCM94306MP 0x0418 | |
213 | #define SSB_BOARD_BCM4309G 0x0421 | |
214 | #define SSB_BOARD_BCM4306CB 0x0417 | |
215 | #define SSB_BOARD_BCM4309MP 0x040C | |
216 | #define SSB_BOARD_MP4318 0x044A | |
217 | #define SSB_BOARD_BU4306 0x0416 | |
218 | #define SSB_BOARD_BU4309 0x040A | |
219 | /* chip_package */ | |
220 | #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ | |
221 | #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ | |
222 | #define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */ | |
223 | ||
224 | #include <linux/ssb/ssb_driver_chipcommon.h> | |
225 | #include <linux/ssb/ssb_driver_mips.h> | |
226 | #include <linux/ssb/ssb_driver_extif.h> | |
227 | #include <linux/ssb/ssb_driver_pci.h> | |
228 | ||
229 | struct ssb_bus { | |
230 | /* The MMIO area. */ | |
231 | void __iomem *mmio; | |
232 | ||
233 | const struct ssb_bus_ops *ops; | |
234 | ||
235 | /* The core in the basic address register window. (PCI bus only) */ | |
236 | struct ssb_device *mapped_device; | |
237 | /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */ | |
238 | u8 mapped_pcmcia_seg; | |
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239 | /* Lock for core and segment switching. |
240 | * On PCMCIA-host busses this is used to protect the whole MMIO access. */ | |
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241 | spinlock_t bar_lock; |
242 | ||
243 | /* The bus this backplane is running on. */ | |
244 | enum ssb_bustype bustype; | |
245 | /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */ | |
246 | struct pci_dev *host_pci; | |
247 | /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */ | |
248 | struct pcmcia_device *host_pcmcia; | |
249 | ||
250 | #ifdef CONFIG_SSB_PCIHOST | |
251 | /* Mutex to protect the SPROM writing. */ | |
252 | struct mutex pci_sprom_mutex; | |
253 | #endif | |
254 | ||
255 | /* ID information about the Chip. */ | |
256 | u16 chip_id; | |
257 | u16 chip_rev; | |
c272ef44 | 258 | u16 sprom_size; /* number of words in sprom */ |
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259 | u8 chip_package; |
260 | ||
261 | /* List of devices (cores) on the backplane. */ | |
262 | struct ssb_device devices[SSB_MAX_NR_CORES]; | |
263 | u8 nr_devices; | |
264 | ||
265 | /* Reference count. Number of suspended devices. */ | |
266 | u8 suspend_cnt; | |
267 | ||
268 | /* Software ID number for this bus. */ | |
269 | unsigned int busnumber; | |
270 | ||
271 | /* The ChipCommon device (if available). */ | |
272 | struct ssb_chipcommon chipco; | |
273 | /* The PCI-core device (if available). */ | |
274 | struct ssb_pcicore pcicore; | |
275 | /* The MIPS-core device (if available). */ | |
276 | struct ssb_mipscore mipscore; | |
277 | /* The EXTif-core device (if available). */ | |
278 | struct ssb_extif extif; | |
279 | ||
280 | /* The following structure elements are not available in early | |
281 | * SSB initialization. Though, they are available for regular | |
282 | * registered drivers at any stage. So be careful when | |
283 | * using them in the ssb core code. */ | |
284 | ||
285 | /* ID information about the PCB. */ | |
286 | struct ssb_boardinfo boardinfo; | |
287 | /* Contents of the SPROM. */ | |
288 | struct ssb_sprom sprom; | |
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289 | /* If the board has a cardbus slot, this is set to true. */ |
290 | bool has_cardbus_slot; | |
61e115a5 | 291 | |
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292 | #ifdef CONFIG_SSB_EMBEDDED |
293 | /* Lock for GPIO register access. */ | |
294 | spinlock_t gpio_lock; | |
295 | #endif /* EMBEDDED */ | |
296 | ||
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297 | /* Internal-only stuff follows. Do not touch. */ |
298 | struct list_head list; | |
299 | #ifdef CONFIG_SSB_DEBUG | |
300 | /* Is the bus already powered up? */ | |
301 | bool powered_up; | |
302 | int power_warn_count; | |
303 | #endif /* DEBUG */ | |
304 | }; | |
305 | ||
306 | /* The initialization-invariants. */ | |
307 | struct ssb_init_invariants { | |
7cb44615 | 308 | /* Versioning information about the PCB. */ |
61e115a5 | 309 | struct ssb_boardinfo boardinfo; |
7cb44615 MB |
310 | /* The SPROM information. That's either stored in an |
311 | * EEPROM or NVRAM on the board. */ | |
61e115a5 | 312 | struct ssb_sprom sprom; |
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313 | /* If the board has a cardbus slot, this is set to true. */ |
314 | bool has_cardbus_slot; | |
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315 | }; |
316 | /* Type of function to fetch the invariants. */ | |
317 | typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus, | |
318 | struct ssb_init_invariants *iv); | |
319 | ||
320 | /* Register a SSB system bus. get_invariants() is called after the | |
321 | * basic system devices are initialized. | |
322 | * The invariants are usually fetched from some NVRAM. | |
323 | * Put the invariants into the struct pointed to by iv. */ | |
324 | extern int ssb_bus_ssbbus_register(struct ssb_bus *bus, | |
325 | unsigned long baseaddr, | |
326 | ssb_invariants_func_t get_invariants); | |
327 | #ifdef CONFIG_SSB_PCIHOST | |
328 | extern int ssb_bus_pcibus_register(struct ssb_bus *bus, | |
329 | struct pci_dev *host_pci); | |
330 | #endif /* CONFIG_SSB_PCIHOST */ | |
331 | #ifdef CONFIG_SSB_PCMCIAHOST | |
332 | extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus, | |
333 | struct pcmcia_device *pcmcia_dev, | |
334 | unsigned long baseaddr); | |
335 | #endif /* CONFIG_SSB_PCMCIAHOST */ | |
336 | ||
337 | extern void ssb_bus_unregister(struct ssb_bus *bus); | |
338 | ||
339 | extern u32 ssb_clockspeed(struct ssb_bus *bus); | |
340 | ||
341 | /* Is the device enabled in hardware? */ | |
342 | int ssb_device_is_enabled(struct ssb_device *dev); | |
343 | /* Enable a device and pass device-specific SSB_TMSLOW flags. | |
344 | * If no device-specific flags are available, use 0. */ | |
345 | void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags); | |
346 | /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */ | |
347 | void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags); | |
348 | ||
349 | ||
350 | /* Device MMIO register read/write functions. */ | |
351 | static inline u16 ssb_read16(struct ssb_device *dev, u16 offset) | |
352 | { | |
353 | return dev->ops->read16(dev, offset); | |
354 | } | |
355 | static inline u32 ssb_read32(struct ssb_device *dev, u16 offset) | |
356 | { | |
357 | return dev->ops->read32(dev, offset); | |
358 | } | |
359 | static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value) | |
360 | { | |
361 | dev->ops->write16(dev, offset, value); | |
362 | } | |
363 | static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value) | |
364 | { | |
365 | dev->ops->write32(dev, offset, value); | |
366 | } | |
367 | ||
368 | ||
369 | /* Translation (routing) bits that need to be ORed to DMA | |
370 | * addresses before they are given to a device. */ | |
371 | extern u32 ssb_dma_translation(struct ssb_device *dev); | |
372 | #define SSB_DMA_TRANSLATION_MASK 0xC0000000 | |
373 | #define SSB_DMA_TRANSLATION_SHIFT 30 | |
374 | ||
375 | extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask); | |
376 | ||
377 | ||
378 | #ifdef CONFIG_SSB_PCIHOST | |
379 | /* PCI-host wrapper driver */ | |
380 | extern int ssb_pcihost_register(struct pci_driver *driver); | |
381 | static inline void ssb_pcihost_unregister(struct pci_driver *driver) | |
382 | { | |
383 | pci_unregister_driver(driver); | |
384 | } | |
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385 | |
386 | static inline | |
387 | void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) | |
388 | { | |
389 | if (sdev->bus->bustype == SSB_BUSTYPE_PCI) | |
390 | pci_set_power_state(sdev->bus->host_pci, state); | |
391 | } | |
532031d7 AM |
392 | #else |
393 | static inline void ssb_pcihost_unregister(struct pci_driver *driver) | |
394 | { | |
395 | } | |
396 | ||
397 | static inline | |
398 | void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) | |
399 | { | |
400 | } | |
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401 | #endif /* CONFIG_SSB_PCIHOST */ |
402 | ||
403 | ||
404 | /* If a driver is shutdown or suspended, call this to signal | |
405 | * that the bus may be completely powered down. SSB will decide, | |
406 | * if it's really time to power down the bus, based on if there | |
407 | * are other devices that want to run. */ | |
408 | extern int ssb_bus_may_powerdown(struct ssb_bus *bus); | |
409 | /* Before initializing and enabling a device, call this to power-up the bus. | |
410 | * If you want to allow use of dynamic-power-control, pass the flag. | |
411 | * Otherwise static always-on powercontrol will be used. */ | |
412 | extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl); | |
413 | ||
414 | ||
415 | /* Various helper functions */ | |
416 | extern u32 ssb_admatch_base(u32 adm); | |
417 | extern u32 ssb_admatch_size(u32 adm); | |
418 | ||
419 | ||
420 | #endif /* LINUX_SSB_H_ */ |