Commit | Line | Data |
---|---|---|
b6d6454f BD |
1 | /* include/linux/sm501.h |
2 | * | |
3 | * Copyright (c) 2006 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * Vincent Sanders <vince@simtec.co.uk> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | extern int sm501_unit_power(struct device *dev, | |
22 | unsigned int unit, unsigned int to); | |
23 | ||
24 | extern unsigned long sm501_set_clock(struct device *dev, | |
25 | int clksrc, unsigned long freq); | |
26 | ||
3149be50 VS |
27 | extern unsigned long sm501_find_clock(struct device *dev, |
28 | int clksrc, unsigned long req_freq); | |
b6d6454f BD |
29 | |
30 | /* sm501_misc_control | |
31 | * | |
32 | * Modify the SM501's MISC_CONTROL register | |
33 | */ | |
34 | ||
35 | extern int sm501_misc_control(struct device *dev, | |
36 | unsigned long set, unsigned long clear); | |
37 | ||
38 | /* sm501_modify_reg | |
39 | * | |
40 | * Modify a register in the SM501 which may be shared with other | |
41 | * drivers. | |
42 | */ | |
43 | ||
44 | extern unsigned long sm501_modify_reg(struct device *dev, | |
45 | unsigned long reg, | |
46 | unsigned long set, | |
47 | unsigned long clear); | |
48 | ||
b6d6454f BD |
49 | |
50 | /* Platform data definitions */ | |
51 | ||
52 | #define SM501FB_FLAG_USE_INIT_MODE (1<<0) | |
53 | #define SM501FB_FLAG_DISABLE_AT_EXIT (1<<1) | |
54 | #define SM501FB_FLAG_USE_HWCURSOR (1<<2) | |
55 | #define SM501FB_FLAG_USE_HWACCEL (1<<3) | |
cdc83ae2 BD |
56 | #define SM501FB_FLAG_PANEL_NO_FPEN (1<<4) |
57 | #define SM501FB_FLAG_PANEL_NO_VBIASEN (1<<5) | |
206c5d69 BD |
58 | #define SM501FB_FLAG_PANEL_INV_FPEN (1<<6) |
59 | #define SM501FB_FLAG_PANEL_INV_VBIASEN (1<<7) | |
b6d6454f BD |
60 | |
61 | struct sm501_platdata_fbsub { | |
62 | struct fb_videomode *def_mode; | |
63 | unsigned int def_bpp; | |
64 | unsigned long max_mem; | |
65 | unsigned int flags; | |
66 | }; | |
67 | ||
68 | enum sm501_fb_routing { | |
69 | SM501_FB_OWN = 0, /* CRT=>CRT, Panel=>Panel */ | |
70 | SM501_FB_CRT_PANEL = 1, /* Panel=>CRT, Panel=>Panel */ | |
71 | }; | |
72 | ||
73 | /* sm501_platdata_fb flag field bit definitions */ | |
74 | ||
75 | #define SM501_FBPD_SWAP_FB_ENDIAN (1<<0) /* need to endian swap */ | |
76 | ||
77 | /* sm501_platdata_fb | |
78 | * | |
79 | * configuration data for the framebuffer driver | |
80 | */ | |
81 | ||
82 | struct sm501_platdata_fb { | |
83 | enum sm501_fb_routing fb_route; | |
84 | unsigned int flags; | |
85 | struct sm501_platdata_fbsub *fb_crt; | |
86 | struct sm501_platdata_fbsub *fb_pnl; | |
87 | }; | |
88 | ||
42cd2366 BD |
89 | /* gpio i2c |
90 | * | |
91 | * Note, we have to pass in the bus number, as the number used will be | |
92 | * passed to the i2c-gpio driver's platform_device.id, subsequently used | |
93 | * to register the i2c bus. | |
94 | */ | |
b6d6454f BD |
95 | |
96 | struct sm501_platdata_gpio_i2c { | |
42cd2366 | 97 | unsigned int bus_num; |
b6d6454f BD |
98 | unsigned int pin_sda; |
99 | unsigned int pin_scl; | |
42cd2366 BD |
100 | int udelay; |
101 | int timeout; | |
b6d6454f BD |
102 | }; |
103 | ||
104 | /* sm501_initdata | |
105 | * | |
106 | * use for initialising values that may not have been setup | |
107 | * before the driver is loaded. | |
108 | */ | |
109 | ||
110 | struct sm501_reg_init { | |
111 | unsigned long set; | |
112 | unsigned long mask; | |
113 | }; | |
114 | ||
115 | #define SM501_USE_USB_HOST (1<<0) | |
116 | #define SM501_USE_USB_SLAVE (1<<1) | |
117 | #define SM501_USE_SSP0 (1<<2) | |
118 | #define SM501_USE_SSP1 (1<<3) | |
119 | #define SM501_USE_UART0 (1<<4) | |
120 | #define SM501_USE_UART1 (1<<5) | |
121 | #define SM501_USE_FBACCEL (1<<6) | |
122 | #define SM501_USE_AC97 (1<<7) | |
123 | #define SM501_USE_I2S (1<<8) | |
f61be273 | 124 | #define SM501_USE_GPIO (1<<9) |
b6d6454f BD |
125 | |
126 | #define SM501_USE_ALL (0xffffffff) | |
127 | ||
128 | struct sm501_initdata { | |
129 | struct sm501_reg_init gpio_low; | |
130 | struct sm501_reg_init gpio_high; | |
131 | struct sm501_reg_init misc_timing; | |
132 | struct sm501_reg_init misc_control; | |
133 | ||
134 | unsigned long devices; | |
135 | unsigned long mclk; /* non-zero to modify */ | |
136 | unsigned long m1xclk; /* non-zero to modify */ | |
137 | }; | |
138 | ||
139 | /* sm501_init_gpio | |
140 | * | |
141 | * default gpio settings | |
142 | */ | |
143 | ||
144 | struct sm501_init_gpio { | |
145 | struct sm501_reg_init gpio_data_low; | |
146 | struct sm501_reg_init gpio_data_high; | |
147 | struct sm501_reg_init gpio_ddr_low; | |
148 | struct sm501_reg_init gpio_ddr_high; | |
149 | }; | |
150 | ||
472dba7d BD |
151 | #define SM501_FLAG_SUSPEND_OFF (1<<4) |
152 | ||
b6d6454f BD |
153 | /* sm501_platdata |
154 | * | |
155 | * This is passed with the platform device to allow the board | |
156 | * to control the behaviour of the SM501 driver(s) which attach | |
157 | * to the device. | |
158 | * | |
159 | */ | |
160 | ||
161 | struct sm501_platdata { | |
162 | struct sm501_initdata *init; | |
163 | struct sm501_init_gpio *init_gpiop; | |
164 | struct sm501_platdata_fb *fb; | |
165 | ||
472dba7d | 166 | int flags; |
60e540d6 | 167 | int gpio_base; |
472dba7d BD |
168 | |
169 | int (*get_power)(struct device *dev); | |
170 | int (*set_power)(struct device *dev, unsigned int on); | |
171 | ||
b6d6454f BD |
172 | struct sm501_platdata_gpio_i2c *gpio_i2c; |
173 | unsigned int gpio_i2c_nr; | |
174 | }; | |
bf5f0019 HS |
175 | |
176 | #if defined(CONFIG_PPC32) | |
177 | #define smc501_readl(addr) ioread32be((addr)) | |
178 | #define smc501_writel(val, addr) iowrite32be((val), (addr)) | |
179 | #else | |
180 | #define smc501_readl(addr) readl(addr) | |
181 | #define smc501_writel(val, addr) writel(val, addr) | |
182 | #endif |