Commit | Line | Data |
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2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
1da177e4 LT |
2 | /* |
3 | * linux/include/linux/serial_8250.h | |
4 | * | |
5 | * Copyright (C) 2004 Russell King | |
1da177e4 LT |
6 | */ |
7 | #ifndef _LINUX_SERIAL_8250_H | |
8 | #define _LINUX_SERIAL_8250_H | |
9 | ||
b334214e | 10 | #include <linux/errno.h> |
1da177e4 | 11 | #include <linux/serial_core.h> |
34d2e458 | 12 | #include <linux/serial_reg.h> |
d052d1be | 13 | #include <linux/platform_device.h> |
1da177e4 | 14 | |
30c61f53 IJ |
15 | struct uart_8250_port; |
16 | ||
bc49a661 RK |
17 | /* |
18 | * This is the platform device platform_data structure | |
30c61f53 IJ |
19 | * |
20 | * @mapsize: Port size for ioremap() | |
21 | * @bugs: Port bugs | |
22 | * | |
23 | * @dl_read: ``u32 ()(struct uart_8250_port *up)`` | |
24 | * | |
25 | * UART divisor latch read. | |
26 | * | |
27 | * @dl_write: ``void ()(struct uart_8250_port *up, u32 value)`` | |
28 | * | |
29 | * Write @value into UART divisor latch. | |
30 | * | |
31 | * Locking: Caller holds port's lock. | |
bc49a661 | 32 | */ |
1da177e4 LT |
33 | struct plat_serial8250_port { |
34 | unsigned long iobase; /* io base address */ | |
35 | void __iomem *membase; /* ioremap cookie or NULL */ | |
4f640efb | 36 | resource_size_t mapbase; /* resource base */ |
30c61f53 | 37 | resource_size_t mapsize; |
85bce38a | 38 | unsigned int uartclk; /* UART clock rate */ |
1da177e4 | 39 | unsigned int irq; /* interrupt number */ |
1c2f0493 | 40 | unsigned long irqflags; /* request_irq flags */ |
74a19741 | 41 | void *private_data; |
1da177e4 LT |
42 | unsigned char regshift; /* register shift */ |
43 | unsigned char iotype; /* UPIO_* */ | |
ec9f47cd | 44 | unsigned char hub6; |
d68fefdd | 45 | unsigned char has_sysrq; /* supports magic SysRq */ |
8e23fcc8 | 46 | unsigned int type; /* If UPF_FIXED_TYPE */ |
85bce38a | 47 | upf_t flags; /* UPF_* flags */ |
30c61f53 | 48 | u16 bugs; /* port bugs */ |
7d6a07d1 DD |
49 | unsigned int (*serial_in)(struct uart_port *, int); |
50 | void (*serial_out)(struct uart_port *, int, int); | |
30c61f53 IJ |
51 | u32 (*dl_read)(struct uart_8250_port *up); |
52 | void (*dl_write)(struct uart_8250_port *up, u32 value); | |
235dae5d PL |
53 | void (*set_termios)(struct uart_port *, |
54 | struct ktermios *new, | |
bec5b814 | 55 | const struct ktermios *old); |
db405a8f EB |
56 | void (*set_ldisc)(struct uart_port *, |
57 | struct ktermios *); | |
144ef5c2 | 58 | unsigned int (*get_mctrl)(struct uart_port *); |
583d28e9 | 59 | int (*handle_irq)(struct uart_port *); |
c161afe9 ML |
60 | void (*pm)(struct uart_port *, unsigned int state, |
61 | unsigned old); | |
bf03f65b | 62 | void (*handle_break)(struct uart_port *); |
1da177e4 LT |
63 | }; |
64 | ||
6df29deb RK |
65 | /* |
66 | * Allocate 8250 platform device IDs. Nothing is implied by | |
67 | * the numbering here, except for the legacy entry being -1. | |
68 | */ | |
69 | enum { | |
70 | PLAT8250_DEV_LEGACY = -1, | |
71 | PLAT8250_DEV_PLATFORM, | |
72 | PLAT8250_DEV_PLATFORM1, | |
104c7b03 | 73 | PLAT8250_DEV_PLATFORM2, |
6df29deb RK |
74 | PLAT8250_DEV_FOURPORT, |
75 | PLAT8250_DEV_ACCENT, | |
76 | PLAT8250_DEV_BOCA, | |
e0980daf | 77 | PLAT8250_DEV_EXAR_ST16C554, |
6df29deb | 78 | PLAT8250_DEV_HUB6, |
21c614a7 | 79 | PLAT8250_DEV_AU1X00, |
61711f8f | 80 | PLAT8250_DEV_SM501, |
6df29deb RK |
81 | }; |
82 | ||
9ee4b83e | 83 | struct uart_8250_dma; |
a4416cd1 PH |
84 | struct uart_8250_port; |
85 | ||
86 | /** | |
87 | * 8250 core driver operations | |
88 | * | |
89 | * @setup_irq() Setup irq handling. The universal 8250 driver links this | |
90 | * port to the irq chain. Other drivers may @request_irq(). | |
91 | * @release_irq() Undo irq handling. The universal 8250 driver unlinks | |
92 | * the port from the irq chain. | |
93 | */ | |
94 | struct uart_8250_ops { | |
95 | int (*setup_irq)(struct uart_8250_port *); | |
96 | void (*release_irq)(struct uart_8250_port *); | |
039d4926 | 97 | void (*setup_timer)(struct uart_8250_port *); |
a4416cd1 | 98 | }; |
9ee4b83e | 99 | |
e490c914 | 100 | struct uart_8250_em485 { |
6e0a5de2 RG |
101 | struct hrtimer start_tx_timer; /* "rs485 start tx" timer */ |
102 | struct hrtimer stop_tx_timer; /* "rs485 stop tx" timer */ | |
103 | struct hrtimer *active_timer; /* pointer to active timer */ | |
104 | struct uart_8250_port *port; /* for hrtimer callbacks */ | |
058bc104 | 105 | unsigned int tx_stopped:1; /* tx is currently stopped */ |
e490c914 MK |
106 | }; |
107 | ||
bc49a661 RK |
108 | /* |
109 | * This should be used by drivers which want to register | |
110 | * their own 8250 ports without registering their own | |
111 | * platform device. Using these will make your driver | |
112 | * dependent on the 8250 driver. | |
98658ae8 IJ |
113 | * |
114 | * @dl_read: ``u32 ()(struct uart_8250_port *port)`` | |
115 | * | |
116 | * UART divisor latch read. | |
117 | * | |
118 | * @dl_write: ``void ()(struct uart_8250_port *port, u32 value)`` | |
119 | * | |
120 | * Write @value into UART divisor latch. | |
121 | * | |
122 | * Locking: Caller holds port's lock. | |
bc49a661 | 123 | */ |
ce7240e4 AC |
124 | struct uart_8250_port { |
125 | struct uart_port port; | |
126 | struct timer_list timer; /* "no irq" timer */ | |
127 | struct list_head list; /* ports on this IRQ */ | |
98838d95 | 128 | u32 capabilities; /* port capabilities */ |
30c61f53 | 129 | u16 bugs; /* port bugs */ |
ce7240e4 AC |
130 | unsigned int tx_loadsz; /* transmit fifo load size */ |
131 | unsigned char acr; | |
aef9a7bd | 132 | unsigned char fcr; |
ce7240e4 AC |
133 | unsigned char ier; |
134 | unsigned char lcr; | |
135 | unsigned char mcr; | |
ce7240e4 | 136 | unsigned char cur_iotype; /* Running I/O type */ |
baeb7ef3 | 137 | unsigned int rpm_tx_active; |
4516d50a PH |
138 | unsigned char canary; /* non-zero during system sleep |
139 | * if no_console_suspend | |
140 | */ | |
40375393 | 141 | unsigned char probe; |
4a96895f | 142 | struct mctrl_gpios *gpios; |
40375393 | 143 | #define UART_PROBE_RSA (1 << 0) |
ce7240e4 AC |
144 | |
145 | /* | |
146 | * Some bits in registers are cleared on a read, so they must | |
147 | * be saved whenever the register is read but the bits will not | |
148 | * be immediately processed. | |
149 | */ | |
150 | #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS | |
f8ba5680 | 151 | u16 lsr_saved_flags; |
507bd6fb | 152 | u16 lsr_save_mask; |
ce7240e4 AC |
153 | #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA |
154 | unsigned char msr_saved_flags; | |
155 | ||
9ee4b83e | 156 | struct uart_8250_dma *dma; |
a4416cd1 | 157 | const struct uart_8250_ops *ops; |
9ee4b83e | 158 | |
ce7240e4 | 159 | /* 8250 specific callbacks */ |
b245aa0c IJ |
160 | u32 (*dl_read)(struct uart_8250_port *up); |
161 | void (*dl_write)(struct uart_8250_port *up, u32 value); | |
e490c914 MK |
162 | |
163 | struct uart_8250_em485 *em485; | |
058bc104 LW |
164 | void (*rs485_start_tx)(struct uart_8250_port *); |
165 | void (*rs485_stop_tx)(struct uart_8250_port *); | |
6d7f677a DD |
166 | |
167 | /* Serial port overrun backoff */ | |
168 | struct delayed_work overrun_backoff; | |
169 | u32 overrun_backoff_time_ms; | |
ce7240e4 | 170 | }; |
bc49a661 | 171 | |
b1261c86 AS |
172 | static inline struct uart_8250_port *up_to_u8250p(struct uart_port *up) |
173 | { | |
174 | return container_of(up, struct uart_8250_port, port); | |
175 | } | |
176 | ||
cd256b06 | 177 | int serial8250_register_8250_port(const struct uart_8250_port *); |
bc49a661 RK |
178 | void serial8250_unregister_port(int line); |
179 | void serial8250_suspend_port(int line); | |
180 | void serial8250_resume_port(int line); | |
181 | ||
6229ad99 IJ |
182 | int early_serial_setup(struct uart_port *port); |
183 | int early_serial8250_setup(struct earlycon_device *device, const char *options); | |
184 | ||
185 | void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk); | |
186 | void serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, | |
187 | const struct ktermios *old); | |
188 | void serial8250_do_set_ldisc(struct uart_port *port, struct ktermios *termios); | |
189 | unsigned int serial8250_do_get_mctrl(struct uart_port *port); | |
190 | int serial8250_do_startup(struct uart_port *port); | |
191 | void serial8250_do_shutdown(struct uart_port *port); | |
192 | void serial8250_do_pm(struct uart_port *port, unsigned int state, | |
193 | unsigned int oldstate); | |
194 | void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl); | |
195 | void serial8250_do_set_divisor(struct uart_port *port, unsigned int baud, | |
196 | unsigned int quot, unsigned int quot_frac); | |
197 | int fsl8250_handle_irq(struct uart_port *port); | |
583d28e9 | 198 | int serial8250_handle_irq(struct uart_port *port, unsigned int iir); |
f8ba5680 IJ |
199 | u16 serial8250_rx_chars(struct uart_8250_port *up, u16 lsr); |
200 | void serial8250_read_char(struct uart_8250_port *up, u16 lsr); | |
3986fb2b PG |
201 | void serial8250_tx_chars(struct uart_8250_port *up); |
202 | unsigned int serial8250_modem_status(struct uart_8250_port *up); | |
b6830f6d PH |
203 | void serial8250_init_port(struct uart_8250_port *up); |
204 | void serial8250_set_defaults(struct uart_8250_port *up); | |
205 | void serial8250_console_write(struct uart_8250_port *up, const char *s, | |
206 | unsigned int count); | |
207 | int serial8250_console_setup(struct uart_port *port, char *options, bool probe); | |
bedb404e | 208 | int serial8250_console_exit(struct uart_port *port); |
18a8bd94 | 209 | |
6229ad99 IJ |
210 | void serial8250_set_isa_configurator(void (*v)(int port, struct uart_port *up, |
211 | u32 *capabilities)); | |
af7f3743 | 212 | |
a609c580 | 213 | #ifdef CONFIG_SERIAL_8250_RT288X |
b334214e IJ |
214 | int rt288x_setup(struct uart_port *p); |
215 | int au_platform_setup(struct plat_serial8250_port *p); | |
216 | #else | |
217 | static inline int rt288x_setup(struct uart_port *p) { return -ENODEV; } | |
218 | static inline int au_platform_setup(struct plat_serial8250_port *p) { return -ENODEV; } | |
a609c580 LJ |
219 | #endif |
220 | ||
1da177e4 | 221 | #endif |