[linux-block.git] / include / linux / resctrl.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _RESCTRL_H
#define _RESCTRL_H

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/pid.h>

#ifdef CONFIG_PROC_CPU_RESCTRL

int proc_resctrl_show(struct seq_file *m,
		      struct pid_namespace *ns,
		      struct pid *pid,
		      struct task_struct *tsk);

#endif

/**
 * struct rdt_domain - group of CPUs sharing a resctrl resource
 * @list:		all instances of this resource
 * @id:			unique id for this instance
 * @cpu_mask:		which CPUs share this resource
 * @new_ctrl:		new ctrl value to be loaded
 * @have_new_ctrl:	did user provide new_ctrl for this domain
 * @rmid_busy_llc:	bitmap of which limbo RMIDs are above threshold
 * @mbm_total:		saved state for MBM total bandwidth
 * @mbm_local:		saved state for MBM local bandwidth
 * @mbm_over:		worker to periodically read MBM h/w counters
 * @cqm_limbo:		worker to periodically read CQM h/w counters
 * @mbm_work_cpu:	worker CPU for MBM h/w counters
 * @cqm_work_cpu:	worker CPU for CQM h/w counters
 * @plr:		pseudo-locked region (if any) associated with domain
 */
struct rdt_domain {
	struct list_head		list;
	int				id;
	struct cpumask			cpu_mask;
	u32				new_ctrl;
	bool				have_new_ctrl;
	unsigned long			*rmid_busy_llc;
	struct mbm_state		*mbm_total;
	struct mbm_state		*mbm_local;
	struct delayed_work		mbm_over;
	struct delayed_work		cqm_limbo;
	int				mbm_work_cpu;
	int				cqm_work_cpu;
	struct pseudo_lock_region	*plr;
};

/**
 * struct resctrl_cache - Cache allocation related data
 * @cbm_len:		Length of the cache bit mask
 * @min_cbm_bits:	Minimum number of consecutive bits to be set
 * @cbm_idx_mult:	Multiplier of CBM index
 * @cbm_idx_offset:	Offset of CBM index. CBM index is computed by:
 *			closid * cbm_idx_multi + cbm_idx_offset
 *			in a cache bit mask
 * @shareable_bits:	Bitmask of shareable resource with other
 *			executing entities
 * @arch_has_sparse_bitmaps:	True if a bitmap like f00f is valid.
 * @arch_has_empty_bitmaps:	True if the '0' bitmap is valid.
 * @arch_has_per_cpu_cfg:	True if QOS_CFG register for this cache
 *				level has CPU scope.
 */
struct resctrl_cache {
	unsigned int	cbm_len;
	unsigned int	min_cbm_bits;
	unsigned int	cbm_idx_mult;	// TODO remove this
	unsigned int	cbm_idx_offset; // TODO remove this
	unsigned int	shareable_bits;
	bool		arch_has_sparse_bitmaps;
	bool		arch_has_empty_bitmaps;
	bool		arch_has_per_cpu_cfg;
};

/**
 * enum membw_throttle_mode - System's memory bandwidth throttling mode
 * @THREAD_THROTTLE_UNDEFINED:	Not relevant to the system
 * @THREAD_THROTTLE_MAX:	Memory bandwidth is throttled at the core
 *				always using smallest bandwidth percentage
 *				assigned to threads, aka "max throttling"
 * @THREAD_THROTTLE_PER_THREAD:	Memory bandwidth is throttled at the thread
 */
enum membw_throttle_mode {
	THREAD_THROTTLE_UNDEFINED = 0,
	THREAD_THROTTLE_MAX,
	THREAD_THROTTLE_PER_THREAD,
};

/**
 * struct resctrl_membw - Memory bandwidth allocation related data
 * @min_bw:		Minimum memory bandwidth percentage user can request
 * @bw_gran:		Granularity at which the memory bandwidth is allocated
 * @delay_linear:	True if memory B/W delay is in linear scale
 * @arch_needs_linear:	True if we can't configure non-linear resources
 * @throttle_mode:	Bandwidth throttling mode when threads request
 *			different memory bandwidths
 * @mba_sc:		True if MBA software controller(mba_sc) is enabled
 * @mb_map:		Mapping of memory B/W percentage to memory B/W delay
 */
struct resctrl_membw {
	u32				min_bw;
	u32				bw_gran;
	u32				delay_linear;
	bool				arch_needs_linear;
	enum membw_throttle_mode	throttle_mode;
	bool				mba_sc;
	u32				*mb_map;
};

struct rdt_parse_data;

/**
 * struct rdt_resource - attributes of a resctrl resource
 * @rid:		The index of the resource
 * @alloc_enabled:	Is allocation enabled on this machine
 * @mon_enabled:	Is monitoring enabled for this feature
 * @alloc_capable:	Is allocation available on this machine
 * @mon_capable:	Is monitor feature available on this machine
 * @num_rmid:		Number of RMIDs available
 * @cache_level:	Which cache level defines scope of this resource
 * @cache:		Cache allocation related data
 * @membw:		If the component has bandwidth controls, their properties.
 * @domains:		All domains for this resource
 * @name:		Name to use in "schemata" file.
 * @data_width:		Character width of data when displaying
 * @default_ctrl:	Specifies default cache cbm or memory B/W percent.
 * @format_str:		Per resource format string to show domain value
 * @parse_ctrlval:	Per resource function pointer to parse control values
 * @evt_list:		List of monitoring events
 * @fflags:		flags to choose base and info files
 */
struct rdt_resource {
	int			rid;
	bool			alloc_enabled;
	bool			mon_enabled;
	bool			alloc_capable;
	bool			mon_capable;
	int			num_rmid;
	int			cache_level;
	struct resctrl_cache	cache;
	struct resctrl_membw	membw;
	struct list_head	domains;
	char			*name;
	int			data_width;
	u32			default_ctrl;
	const char		*format_str;
	int			(*parse_ctrlval)(struct rdt_parse_data *data,
						 struct rdt_resource *r,
						 struct rdt_domain *d);
	struct list_head	evt_list;
	unsigned long		fflags;

};

#endif /* _RESCTRL_H */
Commit	Line	Data
e79f15a4 CY	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _RESCTRL_H
	3	#define _RESCTRL_H
	4
63c8b123 JM	5	#include <linux/kernel.h>
63c8b123 JM	6	#include <linux/list.h>
a21a4391 JM	7	#include <linux/pid.h>
a21a4391 JM	8
e79f15a4 CY	9	#ifdef CONFIG_PROC_CPU_RESCTRL
	10
	11	int proc_resctrl_show(struct seq_file *m,
	12	struct pid_namespace *ns,
	13	struct pid *pid,
	14	struct task_struct *tsk);
	15
	16	#endif
	17
792e0f6f JM	18	/**
	19	* struct rdt_domain - group of CPUs sharing a resctrl resource
	20	* @list: all instances of this resource
	21	* @id: unique id for this instance
	22	* @cpu_mask: which CPUs share this resource
	23	* @new_ctrl: new ctrl value to be loaded
	24	* @have_new_ctrl: did user provide new_ctrl for this domain
	25	* @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
	26	* @mbm_total: saved state for MBM total bandwidth
	27	* @mbm_local: saved state for MBM local bandwidth
	28	* @mbm_over: worker to periodically read MBM h/w counters
	29	* @cqm_limbo: worker to periodically read CQM h/w counters
	30	* @mbm_work_cpu: worker CPU for MBM h/w counters
	31	* @cqm_work_cpu: worker CPU for CQM h/w counters
	32	* @plr: pseudo-locked region (if any) associated with domain
	33	*/
	34	struct rdt_domain {
	35	struct list_head list;
	36	int id;
	37	struct cpumask cpu_mask;
	38	u32 new_ctrl;
	39	bool have_new_ctrl;
	40	unsigned long *rmid_busy_llc;
	41	struct mbm_state *mbm_total;
	42	struct mbm_state *mbm_local;
	43	struct delayed_work mbm_over;
	44	struct delayed_work cqm_limbo;
	45	int mbm_work_cpu;
	46	int cqm_work_cpu;
	47	struct pseudo_lock_region *plr;
	48	};
63c8b123 JM	49
	50	/**
	51	* struct resctrl_cache - Cache allocation related data
	52	* @cbm_len: Length of the cache bit mask
	53	* @min_cbm_bits: Minimum number of consecutive bits to be set
	54	* @cbm_idx_mult: Multiplier of CBM index
	55	* @cbm_idx_offset: Offset of CBM index. CBM index is computed by:
	56	* closid * cbm_idx_multi + cbm_idx_offset
	57	* in a cache bit mask
	58	* @shareable_bits: Bitmask of shareable resource with other
	59	* executing entities
	60	* @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid.
	61	* @arch_has_empty_bitmaps: True if the '0' bitmap is valid.
	62	* @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
	63	* level has CPU scope.
	64	*/
	65	struct resctrl_cache {
	66	unsigned int cbm_len;
	67	unsigned int min_cbm_bits;
	68	unsigned int cbm_idx_mult; // TODO remove this
	69	unsigned int cbm_idx_offset; // TODO remove this
	70	unsigned int shareable_bits;
	71	bool arch_has_sparse_bitmaps;
	72	bool arch_has_empty_bitmaps;
	73	bool arch_has_per_cpu_cfg;
	74	};
	75
	76	/**
	77	* enum membw_throttle_mode - System's memory bandwidth throttling mode
	78	* @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
	79	* @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
	80	* always using smallest bandwidth percentage
	81	* assigned to threads, aka "max throttling"
	82	* @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
	83	*/
	84	enum membw_throttle_mode {
	85	THREAD_THROTTLE_UNDEFINED = 0,
	86	THREAD_THROTTLE_MAX,
	87	THREAD_THROTTLE_PER_THREAD,
	88	};
	89
	90	/**
	91	* struct resctrl_membw - Memory bandwidth allocation related data
	92	* @min_bw: Minimum memory bandwidth percentage user can request
	93	* @bw_gran: Granularity at which the memory bandwidth is allocated
	94	* @delay_linear: True if memory B/W delay is in linear scale
	95	* @arch_needs_linear: True if we can't configure non-linear resources
	96	* @throttle_mode: Bandwidth throttling mode when threads request
	97	* different memory bandwidths
	98	* @mba_sc: True if MBA software controller(mba_sc) is enabled
	99	* @mb_map: Mapping of memory B/W percentage to memory B/W delay
	100	*/
	101	struct resctrl_membw {
	102	u32 min_bw;
	103	u32 bw_gran;
	104	u32 delay_linear;
	105	bool arch_needs_linear;
	106	enum membw_throttle_mode throttle_mode;
	107	bool mba_sc;
	108	u32 *mb_map;
	109	};
	110
	111	struct rdt_parse_data;
	112
113	/**
114	* struct rdt_resource - attributes of a resctrl resource
115	* @rid: The index of the resource
116	* @alloc_enabled: Is allocation enabled on this machine
117	* @mon_enabled: Is monitoring enabled for this feature
118	* @alloc_capable: Is allocation available on this machine
119	* @mon_capable: Is monitor feature available on this machine
120	* @num_rmid: Number of RMIDs available
121	* @cache_level: Which cache level defines scope of this resource
122	* @cache: Cache allocation related data
123	* @membw: If the component has bandwidth controls, their properties.
124	* @domains: All domains for this resource
125	* @name: Name to use in "schemata" file.
126	* @data_width: Character width of data when displaying
127	* @default_ctrl: Specifies default cache cbm or memory B/W percent.
128	* @format_str: Per resource format string to show domain value
129	* @parse_ctrlval: Per resource function pointer to parse control values
130	* @evt_list: List of monitoring events
131	* @fflags: flags to choose base and info files
132	*/
133	struct rdt_resource {
134	int rid;
135	bool alloc_enabled;
136	bool mon_enabled;
137	bool alloc_capable;
138	bool mon_capable;
139	int num_rmid;
140	int cache_level;
141	struct resctrl_cache cache;
142	struct resctrl_membw membw;
143	struct list_head domains;
144	char *name;
145	int data_width;
146	u32 default_ctrl;
147	const char *format_str;
148	int (parse_ctrlval)(struct rdt_parse_data data,
149	struct rdt_resource *r,
150	struct rdt_domain *d);
151	struct list_head evt_list;
152	unsigned long fflags;
153
154	};
155
e79f15a4	156	#endif /* _RESCTRL_H */