[linux-2.6-block.git] / include / linux / resctrl.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _RESCTRL_H
#define _RESCTRL_H

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/pid.h>

#ifdef CONFIG_PROC_CPU_RESCTRL

int proc_resctrl_show(struct seq_file *m,
		      struct pid_namespace *ns,
		      struct pid *pid,
		      struct task_struct *tsk);

#endif

/**
 * enum resctrl_conf_type - The type of configuration.
 * @CDP_NONE:	No prioritisation, both code and data are controlled or monitored.
 * @CDP_CODE:	Configuration applies to instruction fetches.
 * @CDP_DATA:	Configuration applies to reads and writes.
 */
enum resctrl_conf_type {
	CDP_NONE,
	CDP_CODE,
	CDP_DATA,
};

#define CDP_NUM_TYPES	(CDP_DATA + 1)

/**
 * struct resctrl_staged_config - parsed configuration to be applied
 * @new_ctrl:		new ctrl value to be loaded
 * @have_new_ctrl:	whether the user provided new_ctrl is valid
 */
struct resctrl_staged_config {
	u32			new_ctrl;
	bool			have_new_ctrl;
};

/**
 * struct rdt_domain - group of CPUs sharing a resctrl resource
 * @list:		all instances of this resource
 * @id:			unique id for this instance
 * @cpu_mask:		which CPUs share this resource
 * @rmid_busy_llc:	bitmap of which limbo RMIDs are above threshold
 * @mbm_total:		saved state for MBM total bandwidth
 * @mbm_local:		saved state for MBM local bandwidth
 * @mbm_over:		worker to periodically read MBM h/w counters
 * @cqm_limbo:		worker to periodically read CQM h/w counters
 * @mbm_work_cpu:	worker CPU for MBM h/w counters
 * @cqm_work_cpu:	worker CPU for CQM h/w counters
 * @plr:		pseudo-locked region (if any) associated with domain
 * @staged_config:	parsed configuration to be applied
 */
struct rdt_domain {
	struct list_head		list;
	int				id;
	struct cpumask			cpu_mask;
	unsigned long			*rmid_busy_llc;
	struct mbm_state		*mbm_total;
	struct mbm_state		*mbm_local;
	struct delayed_work		mbm_over;
	struct delayed_work		cqm_limbo;
	int				mbm_work_cpu;
	int				cqm_work_cpu;
	struct pseudo_lock_region	*plr;
	struct resctrl_staged_config	staged_config[CDP_NUM_TYPES];
};

/**
 * struct resctrl_cache - Cache allocation related data
 * @cbm_len:		Length of the cache bit mask
 * @min_cbm_bits:	Minimum number of consecutive bits to be set
 * @cbm_idx_mult:	Multiplier of CBM index
 * @cbm_idx_offset:	Offset of CBM index. CBM index is computed by:
 *			closid * cbm_idx_multi + cbm_idx_offset
 *			in a cache bit mask
 * @shareable_bits:	Bitmask of shareable resource with other
 *			executing entities
 * @arch_has_sparse_bitmaps:	True if a bitmap like f00f is valid.
 * @arch_has_empty_bitmaps:	True if the '0' bitmap is valid.
 * @arch_has_per_cpu_cfg:	True if QOS_CFG register for this cache
 *				level has CPU scope.
 */
struct resctrl_cache {
	unsigned int	cbm_len;
	unsigned int	min_cbm_bits;
	unsigned int	cbm_idx_mult;	// TODO remove this
	unsigned int	cbm_idx_offset; // TODO remove this
	unsigned int	shareable_bits;
	bool		arch_has_sparse_bitmaps;
	bool		arch_has_empty_bitmaps;
	bool		arch_has_per_cpu_cfg;
};

/**
 * enum membw_throttle_mode - System's memory bandwidth throttling mode
 * @THREAD_THROTTLE_UNDEFINED:	Not relevant to the system
 * @THREAD_THROTTLE_MAX:	Memory bandwidth is throttled at the core
 *				always using smallest bandwidth percentage
 *				assigned to threads, aka "max throttling"
 * @THREAD_THROTTLE_PER_THREAD:	Memory bandwidth is throttled at the thread
 */
enum membw_throttle_mode {
	THREAD_THROTTLE_UNDEFINED = 0,
	THREAD_THROTTLE_MAX,
	THREAD_THROTTLE_PER_THREAD,
};

/**
 * struct resctrl_membw - Memory bandwidth allocation related data
 * @min_bw:		Minimum memory bandwidth percentage user can request
 * @bw_gran:		Granularity at which the memory bandwidth is allocated
 * @delay_linear:	True if memory B/W delay is in linear scale
 * @arch_needs_linear:	True if we can't configure non-linear resources
 * @throttle_mode:	Bandwidth throttling mode when threads request
 *			different memory bandwidths
 * @mba_sc:		True if MBA software controller(mba_sc) is enabled
 * @mb_map:		Mapping of memory B/W percentage to memory B/W delay
 */
struct resctrl_membw {
	u32				min_bw;
	u32				bw_gran;
	u32				delay_linear;
	bool				arch_needs_linear;
	enum membw_throttle_mode	throttle_mode;
	bool				mba_sc;
	u32				*mb_map;
};

struct rdt_parse_data;
struct resctrl_schema;

/**
 * struct rdt_resource - attributes of a resctrl resource
 * @rid:		The index of the resource
 * @alloc_enabled:	Is allocation enabled on this machine
 * @mon_enabled:	Is monitoring enabled for this feature
 * @alloc_capable:	Is allocation available on this machine
 * @mon_capable:	Is monitor feature available on this machine
 * @num_rmid:		Number of RMIDs available
 * @cache_level:	Which cache level defines scope of this resource
 * @cache:		Cache allocation related data
 * @membw:		If the component has bandwidth controls, their properties.
 * @domains:		All domains for this resource
 * @name:		Name to use in "schemata" file.
 * @data_width:		Character width of data when displaying
 * @default_ctrl:	Specifies default cache cbm or memory B/W percent.
 * @format_str:		Per resource format string to show domain value
 * @parse_ctrlval:	Per resource function pointer to parse control values
 * @evt_list:		List of monitoring events
 * @fflags:		flags to choose base and info files
 * @cdp_capable:	Is the CDP feature available on this resource
 */
struct rdt_resource {
	int			rid;
	bool			alloc_enabled;
	bool			mon_enabled;
	bool			alloc_capable;
	bool			mon_capable;
	int			num_rmid;
	int			cache_level;
	struct resctrl_cache	cache;
	struct resctrl_membw	membw;
	struct list_head	domains;
	char			*name;
	int			data_width;
	u32			default_ctrl;
	const char		*format_str;
	int			(*parse_ctrlval)(struct rdt_parse_data *data,
						 struct resctrl_schema *s,
						 struct rdt_domain *d);
	struct list_head	evt_list;
	unsigned long		fflags;
	bool			cdp_capable;
};

/**
 * struct resctrl_schema - configuration abilities of a resource presented to
 *			   user-space
 * @list:	Member of resctrl_schema_all.
 * @name:	The name to use in the "schemata" file.
 * @conf_type:	Whether this schema is specific to code/data.
 * @res:	The resource structure exported by the architecture to describe
 *		the hardware that is configured by this schema.
 * @num_closid:	The number of closid that can be used with this schema. When
 *		features like CDP are enabled, this will be lower than the
 *		hardware supports for the resource.
 */
struct resctrl_schema {
	struct list_head		list;
	char				name[8];
	enum resctrl_conf_type		conf_type;
	struct rdt_resource		*res;
	u32				num_closid;
};

/* The number of closid supported by this resource regardless of CDP */
u32 resctrl_arch_get_num_closid(struct rdt_resource *r);

#endif /* _RESCTRL_H */
Commit	Line	Data
e79f15a4 CY	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _RESCTRL_H
	3	#define _RESCTRL_H
	4
63c8b123 JM	5	#include <linux/kernel.h>
63c8b123 JM	6	#include <linux/list.h>
a21a4391 JM	7	#include <linux/pid.h>
a21a4391 JM	8
e79f15a4 CY	9	#ifdef CONFIG_PROC_CPU_RESCTRL
	10
	11	int proc_resctrl_show(struct seq_file *m,
	12	struct pid_namespace *ns,
	13	struct pid *pid,
	14	struct task_struct *tsk);
	15
	16	#endif
	17
208ab168 JM	18	/**
	19	* enum resctrl_conf_type - The type of configuration.
	20	* @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
	21	* @CDP_CODE: Configuration applies to instruction fetches.
	22	* @CDP_DATA: Configuration applies to reads and writes.
	23	*/
	24	enum resctrl_conf_type {
	25	CDP_NONE,
	26	CDP_CODE,
	27	CDP_DATA,
	28	};
	29
75408e43 JM	30	#define CDP_NUM_TYPES (CDP_DATA + 1)
75408e43 JM	31
e8f72825 JM	32	/**
	33	* struct resctrl_staged_config - parsed configuration to be applied
	34	* @new_ctrl: new ctrl value to be loaded
	35	* @have_new_ctrl: whether the user provided new_ctrl is valid
	36	*/
	37	struct resctrl_staged_config {
	38	u32 new_ctrl;
	39	bool have_new_ctrl;
	40	};
	41
792e0f6f JM	42	/**
	43	* struct rdt_domain - group of CPUs sharing a resctrl resource
	44	* @list: all instances of this resource
	45	* @id: unique id for this instance
	46	* @cpu_mask: which CPUs share this resource
792e0f6f JM	47	* @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
	48	* @mbm_total: saved state for MBM total bandwidth
	49	* @mbm_local: saved state for MBM local bandwidth
	50	* @mbm_over: worker to periodically read MBM h/w counters
	51	* @cqm_limbo: worker to periodically read CQM h/w counters
	52	* @mbm_work_cpu: worker CPU for MBM h/w counters
	53	* @cqm_work_cpu: worker CPU for CQM h/w counters
	54	* @plr: pseudo-locked region (if any) associated with domain
e8f72825	55	* @staged_config: parsed configuration to be applied
792e0f6f JM	56	*/
	57	struct rdt_domain {
	58	struct list_head list;
	59	int id;
	60	struct cpumask cpu_mask;
792e0f6f JM	61	unsigned long *rmid_busy_llc;
	62	struct mbm_state *mbm_total;
	63	struct mbm_state *mbm_local;
	64	struct delayed_work mbm_over;
	65	struct delayed_work cqm_limbo;
	66	int mbm_work_cpu;
	67	int cqm_work_cpu;
	68	struct pseudo_lock_region *plr;
75408e43	69	struct resctrl_staged_config staged_config[CDP_NUM_TYPES];
792e0f6f	70	};
63c8b123 JM	71
	72	/**
	73	* struct resctrl_cache - Cache allocation related data
	74	* @cbm_len: Length of the cache bit mask
	75	* @min_cbm_bits: Minimum number of consecutive bits to be set
	76	* @cbm_idx_mult: Multiplier of CBM index
	77	* @cbm_idx_offset: Offset of CBM index. CBM index is computed by:
	78	* closid * cbm_idx_multi + cbm_idx_offset
	79	* in a cache bit mask
	80	* @shareable_bits: Bitmask of shareable resource with other
	81	* executing entities
	82	* @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid.
	83	* @arch_has_empty_bitmaps: True if the '0' bitmap is valid.
	84	* @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
	85	* level has CPU scope.
	86	*/
	87	struct resctrl_cache {
	88	unsigned int cbm_len;
	89	unsigned int min_cbm_bits;
	90	unsigned int cbm_idx_mult; // TODO remove this
	91	unsigned int cbm_idx_offset; // TODO remove this
	92	unsigned int shareable_bits;
	93	bool arch_has_sparse_bitmaps;
	94	bool arch_has_empty_bitmaps;
	95	bool arch_has_per_cpu_cfg;
	96	};
	97
	98	/**
	99	* enum membw_throttle_mode - System's memory bandwidth throttling mode
	100	* @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
	101	* @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
	102	* always using smallest bandwidth percentage
	103	* assigned to threads, aka "max throttling"
	104	* @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
	105	*/
	106	enum membw_throttle_mode {
	107	THREAD_THROTTLE_UNDEFINED = 0,
	108	THREAD_THROTTLE_MAX,
	109	THREAD_THROTTLE_PER_THREAD,
	110	};
	111
	112	/**
	113	* struct resctrl_membw - Memory bandwidth allocation related data
	114	* @min_bw: Minimum memory bandwidth percentage user can request
	115	* @bw_gran: Granularity at which the memory bandwidth is allocated
	116	* @delay_linear: True if memory B/W delay is in linear scale
	117	* @arch_needs_linear: True if we can't configure non-linear resources
	118	* @throttle_mode: Bandwidth throttling mode when threads request
	119	* different memory bandwidths
	120	* @mba_sc: True if MBA software controller(mba_sc) is enabled
	121	* @mb_map: Mapping of memory B/W percentage to memory B/W delay
	122	*/
	123	struct resctrl_membw {
	124	u32 min_bw;
	125	u32 bw_gran;
	126	u32 delay_linear;
	127	bool arch_needs_linear;
	128	enum membw_throttle_mode throttle_mode;
	129	bool mba_sc;
	130	u32 *mb_map;
	131	};
	132
	133	struct rdt_parse_data;
1c290682	134	struct resctrl_schema;
63c8b123 JM	135
	136	/**
	137	* struct rdt_resource - attributes of a resctrl resource
	138	* @rid: The index of the resource
	139	* @alloc_enabled: Is allocation enabled on this machine
	140	* @mon_enabled: Is monitoring enabled for this feature
	141	* @alloc_capable: Is allocation available on this machine
	142	* @mon_capable: Is monitor feature available on this machine
	143	* @num_rmid: Number of RMIDs available
	144	* @cache_level: Which cache level defines scope of this resource
	145	* @cache: Cache allocation related data
	146	* @membw: If the component has bandwidth controls, their properties.
	147	* @domains: All domains for this resource
	148	* @name: Name to use in "schemata" file.
	149	* @data_width: Character width of data when displaying
	150	* @default_ctrl: Specifies default cache cbm or memory B/W percent.
	151	* @format_str: Per resource format string to show domain value
	152	* @parse_ctrlval: Per resource function pointer to parse control values
	153	* @evt_list: List of monitoring events
	154	* @fflags: flags to choose base and info files
c091e907	155	* @cdp_capable: Is the CDP feature available on this resource
63c8b123 JM	156	*/
	157	struct rdt_resource {
	158	int rid;
	159	bool alloc_enabled;
	160	bool mon_enabled;
	161	bool alloc_capable;
	162	bool mon_capable;
	163	int num_rmid;
	164	int cache_level;
	165	struct resctrl_cache cache;
	166	struct resctrl_membw membw;
	167	struct list_head domains;
	168	char *name;
	169	int data_width;
	170	u32 default_ctrl;
	171	const char *format_str;
	172	int (parse_ctrlval)(struct rdt_parse_data data,
1c290682	173	struct resctrl_schema *s,
63c8b123 JM	174	struct rdt_domain *d);
	175	struct list_head evt_list;
	176	unsigned long fflags;
c091e907	177	bool cdp_capable;
63c8b123 JM	178	};
63c8b123 JM	179
cdb9ebc9 JM	180	/**
	181	* struct resctrl_schema - configuration abilities of a resource presented to
	182	* user-space
	183	* @list: Member of resctrl_schema_all.
e198fde3	184	* @name: The name to use in the "schemata" file.
208ab168	185	* @conf_type: Whether this schema is specific to code/data.
cdb9ebc9 JM	186	* @res: The resource structure exported by the architecture to describe
cdb9ebc9 JM	187	* the hardware that is configured by this schema.
3183e87c JM	188	* @num_closid: The number of closid that can be used with this schema. When
	189	* features like CDP are enabled, this will be lower than the
	190	* hardware supports for the resource.
cdb9ebc9 JM	191	*/
	192	struct resctrl_schema {
	193	struct list_head list;
e198fde3	194	char name[8];
208ab168	195	enum resctrl_conf_type conf_type;
cdb9ebc9	196	struct rdt_resource *res;
eb6f3187	197	u32 num_closid;
cdb9ebc9	198	};
eb6f3187 JM	199
	200	/* The number of closid supported by this resource regardless of CDP */
	201	u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
	202
e79f15a4	203	#endif /* _RESCTRL_H */