Linux 5.16-rc1
[linux-block.git] / include / linux / regmap.h
CommitLineData
d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
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2#ifndef __LINUX_REGMAP_H
3#define __LINUX_REGMAP_H
4
5/*
6 * Register map access API
7 *
8 * Copyright 2011 Wolfson Microelectronics plc
9 *
10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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11 */
12
b83a313b 13#include <linux/list.h>
6863ca62 14#include <linux/rbtree.h>
f15cd6d9 15#include <linux/ktime.h>
adf08d48 16#include <linux/delay.h>
49ccc142 17#include <linux/err.h>
3f0fa9a8 18#include <linux/bug.h>
3cfe7a74 19#include <linux/lockdep.h>
e44ab4e1 20#include <linux/iopoll.h>
5cc2013b 21#include <linux/fwnode.h>
b83a313b 22
de477254 23struct module;
31895662 24struct clk;
313162d0 25struct device;
12479382 26struct device_node;
9943fa30 27struct i2c_client;
6445500b 28struct i3c_device;
90f790d2 29struct irq_domain;
1f89d2fe 30struct mdio_device;
7d6f7fb0 31struct slim_device;
a676f083 32struct spi_device;
a01779f8 33struct spmi_device;
b83d2ff0 34struct regmap;
6863ca62 35struct regmap_range_cfg;
67252287 36struct regmap_field;
22853223 37struct snd_ac97;
7c22ce6e 38struct sdw_slave;
9943fa30 39
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40/* An enum of all the supported cache types */
41enum regcache_type {
42 REGCACHE_NONE,
28644c80 43 REGCACHE_RBTREE,
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44 REGCACHE_COMPRESSED,
45 REGCACHE_FLAT,
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46};
47
bd20eb54 48/**
2cf8e2df 49 * struct reg_default - Default value for a register.
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50 *
51 * @reg: Register address.
52 * @def: Register default value.
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53 *
54 * We use an array of structs rather than a simple array as many modern devices
55 * have very sparse register maps.
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56 */
57struct reg_default {
58 unsigned int reg;
59 unsigned int def;
60};
61
8019ff6c 62/**
2cf8e2df 63 * struct reg_sequence - An individual write from a sequence of writes.
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64 *
65 * @reg: Register address.
66 * @def: Register value.
2de9d600 67 * @delay_us: Delay to be applied after the register write in microseconds
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68 *
69 * Register/value pairs for sequences of writes with an optional delay in
70 * microseconds to be applied after each write.
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71 */
72struct reg_sequence {
73 unsigned int reg;
74 unsigned int def;
2de9d600 75 unsigned int delay_us;
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76};
77
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78#define REG_SEQ(_reg, _def, _delay_us) { \
79 .reg = _reg, \
80 .def = _def, \
81 .delay_us = _delay_us, \
82 }
83#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0)
84
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85/**
86 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
2cf8e2df 87 *
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88 * @map: Regmap to read from
89 * @addr: Address to poll
90 * @val: Unsigned integer variable to read the value into
91 * @cond: Break condition (usually involving @val)
92 * @sleep_us: Maximum time to sleep between reads in us (0
93 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 94 * is used (see Documentation/timers/timers-howto.rst).
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95 * @timeout_us: Timeout in us, 0 means never timeout
96 *
97 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
98 * error return value in case of a error read. In the two former cases,
99 * the last read value at @addr is stored in @val. Must not be called
100 * from atomic context if sleep_us or timeout_us are used.
101 *
102 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
103 */
104#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
105({ \
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106 int __ret, __tmp; \
107 __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
108 sleep_us, timeout_us, false, (map), (addr), &(val)); \
109 __ret ?: __tmp; \
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110})
111
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112/**
113 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
114 *
115 * @map: Regmap to read from
116 * @addr: Address to poll
117 * @val: Unsigned integer variable to read the value into
118 * @cond: Break condition (usually involving @val)
119 * @delay_us: Time to udelay between reads in us (0 tight-loops).
120 * Should be less than ~10us since udelay is used
121 * (see Documentation/timers/timers-howto.rst).
122 * @timeout_us: Timeout in us, 0 means never timeout
123 *
124 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
125 * error return value in case of a error read. In the two former cases,
126 * the last read value at @addr is stored in @val.
127 *
128 * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
129 *
130 * Note: In general regmap cannot be used in atomic context. If you want to use
131 * this macro then first setup your regmap for atomic use (flat or no cache
132 * and MMIO regmap).
133 */
134#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
135({ \
136 u64 __timeout_us = (timeout_us); \
137 unsigned long __delay_us = (delay_us); \
138 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
139 int __ret; \
140 for (;;) { \
141 __ret = regmap_read((map), (addr), &(val)); \
142 if (__ret) \
143 break; \
144 if (cond) \
145 break; \
146 if ((__timeout_us) && \
147 ktime_compare(ktime_get(), __timeout) > 0) { \
148 __ret = regmap_read((map), (addr), &(val)); \
149 break; \
150 } \
151 if (__delay_us) \
152 udelay(__delay_us); \
153 } \
154 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
155})
156
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157/**
158 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
159 *
160 * @field: Regmap field to read from
161 * @val: Unsigned integer variable to read the value into
162 * @cond: Break condition (usually involving @val)
163 * @sleep_us: Maximum time to sleep between reads in us (0
164 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 165 * is used (see Documentation/timers/timers-howto.rst).
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166 * @timeout_us: Timeout in us, 0 means never timeout
167 *
168 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
169 * error return value in case of a error read. In the two former cases,
170 * the last read value at @addr is stored in @val. Must not be called
171 * from atomic context if sleep_us or timeout_us are used.
172 *
173 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
174 */
175#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
176({ \
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177 int __ret, __tmp; \
178 __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
179 sleep_us, timeout_us, false, (field), &(val)); \
180 __ret ?: __tmp; \
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181})
182
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183#ifdef CONFIG_REGMAP
184
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185enum regmap_endian {
186 /* Unspecified -> 0 -> Backwards compatible default */
187 REGMAP_ENDIAN_DEFAULT = 0,
188 REGMAP_ENDIAN_BIG,
189 REGMAP_ENDIAN_LITTLE,
190 REGMAP_ENDIAN_NATIVE,
191};
192
76aad392 193/**
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194 * struct regmap_range - A register range, used for access related checks
195 * (readable/writeable/volatile/precious checks)
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196 *
197 * @range_min: address of first register
198 * @range_max: address of last register
199 */
200struct regmap_range {
201 unsigned int range_min;
202 unsigned int range_max;
203};
204
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205#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
206
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207/**
208 * struct regmap_access_table - A table of register ranges for access checks
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209 *
210 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
211 * @n_yes_ranges: size of the above array
212 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
213 * @n_no_ranges: size of the above array
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214 *
215 * A table of ranges including some yes ranges and some no ranges.
216 * If a register belongs to a no_range, the corresponding check function
217 * will return false. If a register belongs to a yes range, the corresponding
218 * check function will return true. "no_ranges" are searched first.
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219 */
220struct regmap_access_table {
221 const struct regmap_range *yes_ranges;
222 unsigned int n_yes_ranges;
223 const struct regmap_range *no_ranges;
224 unsigned int n_no_ranges;
225};
226
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227typedef void (*regmap_lock)(void *);
228typedef void (*regmap_unlock)(void *);
229
dd898b20 230/**
2cf8e2df 231 * struct regmap_config - Configuration for the register map of a device.
dd898b20 232 *
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233 * @name: Optional name of the regmap. Useful when a device has multiple
234 * register regions.
235 *
dd898b20 236 * @reg_bits: Number of bits in a register address, mandatory.
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237 * @reg_stride: The register address stride. Valid register addresses are a
238 * multiple of this value. If set to 0, a value of 1 will be
239 * used.
82159ba8 240 * @pad_bits: Number of bits of padding between register and value.
dd898b20 241 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 242 *
3566cc9d 243 * @writeable_reg: Optional callback returning true if the register
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244 * can be written to. If this field is NULL but wr_table
245 * (see below) is not, the check is performed on such table
246 * (a register is writeable if it belongs to one of the ranges
247 * specified by wr_table).
3566cc9d 248 * @readable_reg: Optional callback returning true if the register
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249 * can be read from. If this field is NULL but rd_table
250 * (see below) is not, the check is performed on such table
251 * (a register is readable if it belongs to one of the ranges
252 * specified by rd_table).
3566cc9d 253 * @volatile_reg: Optional callback returning true if the register
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254 * value can't be cached. If this field is NULL but
255 * volatile_table (see below) is not, the check is performed on
256 * such table (a register is volatile if it belongs to one of
257 * the ranges specified by volatile_table).
bdc39644 258 * @precious_reg: Optional callback returning true if the register
76aad392 259 * should not be read outside of a call from the driver
bdc39644 260 * (e.g., a clear on read interrupt status register). If this
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261 * field is NULL but precious_table (see below) is not, the
262 * check is performed on such table (a register is precious if
263 * it belongs to one of the ranges specified by precious_table).
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264 * @writeable_noinc_reg: Optional callback returning true if the register
265 * supports multiple write operations without incrementing
266 * the register number. If this field is NULL but
267 * wr_noinc_table (see below) is not, the check is
268 * performed on such table (a register is no increment
269 * writeable if it belongs to one of the ranges specified
270 * by wr_noinc_table).
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271 * @readable_noinc_reg: Optional callback returning true if the register
272 * supports multiple read operations without incrementing
273 * the register number. If this field is NULL but
274 * rd_noinc_table (see below) is not, the check is
275 * performed on such table (a register is no increment
276 * readable if it belongs to one of the ranges specified
277 * by rd_noinc_table).
c9b41fcf 278 * @disable_locking: This regmap is either protected by external means or
6611561a 279 * is guaranteed not to be accessed from multiple threads.
c9b41fcf 280 * Don't use any locking mechanisms.
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281 * @lock: Optional lock callback (overrides regmap's default lock
282 * function, based on spinlock or mutex).
283 * @unlock: As above for unlocking.
284 * @lock_arg: this field is passed as the only argument of lock/unlock
285 * functions (ignored in case regular lock/unlock functions
286 * are not overridden).
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287 * @reg_read: Optional callback that if filled will be used to perform
288 * all the reads from the registers. Should only be provided for
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289 * devices whose read operation cannot be represented as a simple
290 * read operation on a bus such as SPI, I2C, etc. Most of the
291 * devices do not need this.
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292 * @reg_write: Same as above for writing.
293 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
294 * to perform locking. This field is ignored if custom lock/unlock
295 * functions are used (see fields lock/unlock of struct regmap_config).
296 * This field is a duplicate of a similar file in
297 * 'struct regmap_bus' and serves exact same purpose.
298 * Use it only for "no-bus" cases.
b429fab4 299 * @max_register: Optional, specifies the maximum valid register address.
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300 * @wr_table: Optional, points to a struct regmap_access_table specifying
301 * valid ranges for write access.
302 * @rd_table: As above, for read access.
303 * @volatile_table: As above, for volatile registers.
304 * @precious_table: As above, for precious registers.
cdf6b11d 305 * @wr_noinc_table: As above, for no increment writeable registers.
74fe7b55 306 * @rd_noinc_table: As above, for no increment readable registers.
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307 * @reg_defaults: Power on reset values for registers (for use with
308 * register cache support).
309 * @num_reg_defaults: Number of elements in reg_defaults.
6f306441 310 *
f50e38c9 311 * @read_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 312 * a read.
f50e38c9 313 * @write_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 314 * a write. If both read_flag_mask and write_flag_mask are
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315 * empty and zero_flag_mask is not set the regmap_bus default
316 * masks are used.
317 * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
318 * if they are both empty.
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319 * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers.
320 * This can avoid load on devices which don't require strict
321 * orderings, but drivers should carefully add any explicit
322 * memory barriers when they may require them.
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323 * @use_single_read: If set, converts the bulk read operation into a series of
324 * single read operations. This is useful for a device that
325 * does not support bulk read.
326 * @use_single_write: If set, converts the bulk write operation into a series of
327 * single write operations. This is useful for a device that
328 * does not support bulk write.
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329 * @can_multi_write: If set, the device supports the multi write mode of bulk
330 * write operations, if clear multi write requests will be
331 * split into individual write operations
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332 *
333 * @cache_type: The actual cache type.
334 * @reg_defaults_raw: Power on reset values for registers (for use with
335 * register cache support).
336 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
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337 * @reg_format_endian: Endianness for formatted register addresses. If this is
338 * DEFAULT, the @reg_format_endian_default value from the
339 * regmap bus is used.
340 * @val_format_endian: Endianness for formatted register values. If this is
341 * DEFAULT, the @reg_format_endian_default value from the
342 * regmap bus is used.
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343 *
344 * @ranges: Array of configuration entries for virtual address ranges.
345 * @num_ranges: Number of range configuration entries.
a4887813 346 * @use_hwlock: Indicate if a hardware spinlock should be used.
67021f25 347 * @use_raw_spinlock: Indicate if a raw spinlock should be used.
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348 * @hwlock_id: Specify the hardware spinlock id.
349 * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
350 * HWLOCK_IRQ or 0.
21f8e482 351 * @can_sleep: Optional, specifies whether regmap operations can sleep.
dd898b20 352 */
b83a313b 353struct regmap_config {
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354 const char *name;
355
b83a313b 356 int reg_bits;
f01ee60f 357 int reg_stride;
82159ba8 358 int pad_bits;
b83a313b 359 int val_bits;
2e2ae66d 360
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361 bool (*writeable_reg)(struct device *dev, unsigned int reg);
362 bool (*readable_reg)(struct device *dev, unsigned int reg);
363 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 364 bool (*precious_reg)(struct device *dev, unsigned int reg);
cdf6b11d 365 bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
74fe7b55 366 bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
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367
368 bool disable_locking;
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369 regmap_lock lock;
370 regmap_unlock unlock;
371 void *lock_arg;
bd20eb54 372
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373 int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
374 int (*reg_write)(void *context, unsigned int reg, unsigned int val);
375
376 bool fast_io;
377
bd20eb54 378 unsigned int max_register;
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379 const struct regmap_access_table *wr_table;
380 const struct regmap_access_table *rd_table;
381 const struct regmap_access_table *volatile_table;
382 const struct regmap_access_table *precious_table;
cdf6b11d 383 const struct regmap_access_table *wr_noinc_table;
74fe7b55 384 const struct regmap_access_table *rd_noinc_table;
720e4616 385 const struct reg_default *reg_defaults;
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386 unsigned int num_reg_defaults;
387 enum regcache_type cache_type;
388 const void *reg_defaults_raw;
389 unsigned int num_reg_defaults_raw;
6f306441 390
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391 unsigned long read_flag_mask;
392 unsigned long write_flag_mask;
9bf485c9 393 bool zero_flag_mask;
2e33caf1 394
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395 bool use_single_read;
396 bool use_single_write;
6e1e90ec 397 bool use_relaxed_mmio;
e894c3f4 398 bool can_multi_write;
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399
400 enum regmap_endian reg_format_endian;
401 enum regmap_endian val_format_endian;
38e23194 402
6863ca62 403 const struct regmap_range_cfg *ranges;
e3549cd0 404 unsigned int num_ranges;
8698b936 405
a4887813 406 bool use_hwlock;
67021f25 407 bool use_raw_spinlock;
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408 unsigned int hwlock_id;
409 unsigned int hwlock_mode;
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410
411 bool can_sleep;
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412};
413
414/**
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415 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
416 * registers.
6863ca62 417 *
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418 * @name: Descriptive name for diagnostics
419 *
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420 * @range_min: Address of the lowest register address in virtual range.
421 * @range_max: Address of the highest register in virtual range.
422 *
2cf8e2df 423 * @selector_reg: Register with selector field.
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424 * @selector_mask: Bit mask for selector value.
425 * @selector_shift: Bit shift for selector value.
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426 *
427 * @window_start: Address of first (lowest) register in data window.
428 * @window_len: Number of registers in data window.
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429 *
430 * Registers, mapped to this virtual range, are accessed in two steps:
431 * 1. page selector register update;
432 * 2. access through data window registers.
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433 */
434struct regmap_range_cfg {
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435 const char *name;
436
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437 /* Registers of virtual address range */
438 unsigned int range_min;
439 unsigned int range_max;
440
441 /* Page selector for indirect addressing */
442 unsigned int selector_reg;
443 unsigned int selector_mask;
444 int selector_shift;
445
446 /* Data window (per each page) */
447 unsigned int window_start;
448 unsigned int window_len;
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449};
450
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451struct regmap_async;
452
0135bbcc 453typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 454 size_t count);
0135bbcc 455typedef int (*regmap_hw_gather_write)(void *context,
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456 const void *reg, size_t reg_len,
457 const void *val, size_t val_len);
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458typedef int (*regmap_hw_async_write)(void *context,
459 const void *reg, size_t reg_len,
460 const void *val, size_t val_len,
461 struct regmap_async *async);
0135bbcc 462typedef int (*regmap_hw_read)(void *context,
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463 const void *reg_buf, size_t reg_size,
464 void *val_buf, size_t val_size);
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465typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
466 unsigned int *val);
467typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
468 unsigned int val);
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469typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
470 unsigned int mask, unsigned int val);
0d509f2b 471typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
0135bbcc 472typedef void (*regmap_hw_free_context)(void *context);
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473
474/**
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475 * struct regmap_bus - Description of a hardware bus for the register map
476 * infrastructure.
b83a313b 477 *
bacdbe07 478 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
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479 * to perform locking. This field is ignored if custom lock/unlock
480 * functions are used (see fields lock/unlock of
481 * struct regmap_config).
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482 * @write: Write operation.
483 * @gather_write: Write operation with split register/value, return -ENOTSUPP
484 * if not implemented on a given device.
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485 * @async_write: Write operation which completes asynchronously, optional and
486 * must serialise with respect to non-async I/O.
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487 * @reg_write: Write a single register value to the given register address. This
488 * write operation has to complete when returning from the function.
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489 * @reg_update_bits: Update bits operation to be used against volatile
490 * registers, intended for devices supporting some mechanism
491 * for setting clearing bits without having to
492 * read/modify/write.
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493 * @read: Read operation. Data is returned in the buffer used to transmit
494 * data.
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495 * @reg_read: Read a single register value from a given register address.
496 * @free_context: Free context.
0d509f2b 497 * @async_alloc: Allocate a regmap_async() structure.
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498 * @read_flag_mask: Mask to be set in the top byte of the register when doing
499 * a read.
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500 * @reg_format_endian_default: Default endianness for formatted register
501 * addresses. Used when the regmap_config specifies DEFAULT. If this is
502 * DEFAULT, BIG is assumed.
503 * @val_format_endian_default: Default endianness for formatted register
504 * values. Used when the regmap_config specifies DEFAULT. If this is
505 * DEFAULT, BIG is assumed.
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506 * @max_raw_read: Max raw read size that can be used on the bus.
507 * @max_raw_write: Max raw write size that can be used on the bus.
ea030ca6 508 * @free_on_exit: kfree this on exit of regmap
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509 */
510struct regmap_bus {
bacdbe07 511 bool fast_io;
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512 regmap_hw_write write;
513 regmap_hw_gather_write gather_write;
0d509f2b 514 regmap_hw_async_write async_write;
3ac17037 515 regmap_hw_reg_write reg_write;
77792b11 516 regmap_hw_reg_update_bits reg_update_bits;
b83a313b 517 regmap_hw_read read;
3ac17037 518 regmap_hw_reg_read reg_read;
0135bbcc 519 regmap_hw_free_context free_context;
0d509f2b 520 regmap_hw_async_alloc async_alloc;
b83a313b 521 u8 read_flag_mask;
141eba2e
SW
522 enum regmap_endian reg_format_endian_default;
523 enum regmap_endian val_format_endian_default;
adaac459
MP
524 size_t max_raw_read;
525 size_t max_raw_write;
ea030ca6 526 bool free_on_exit;
b83a313b
MB
527};
528
3cfe7a74
NB
529/*
530 * __regmap_init functions.
531 *
532 * These functions take a lock key and name parameter, and should not be called
533 * directly. Instead, use the regmap_init macros that generate a key and name
534 * for each call.
535 */
536struct regmap *__regmap_init(struct device *dev,
537 const struct regmap_bus *bus,
538 void *bus_context,
539 const struct regmap_config *config,
540 struct lock_class_key *lock_key,
541 const char *lock_name);
542struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
543 const struct regmap_config *config,
544 struct lock_class_key *lock_key,
545 const char *lock_name);
1f89d2fe
SV
546struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
547 const struct regmap_config *config,
548 struct lock_class_key *lock_key,
549 const char *lock_name);
bcf7eac3
AM
550struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
551 const struct regmap_config *config,
552 struct lock_class_key *lock_key,
553 const char *lock_name);
7d6f7fb0
SK
554struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
555 const struct regmap_config *config,
556 struct lock_class_key *lock_key,
557 const char *lock_name);
3cfe7a74
NB
558struct regmap *__regmap_init_spi(struct spi_device *dev,
559 const struct regmap_config *config,
560 struct lock_class_key *lock_key,
561 const char *lock_name);
562struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
563 const struct regmap_config *config,
564 struct lock_class_key *lock_key,
565 const char *lock_name);
566struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
567 const struct regmap_config *config,
568 struct lock_class_key *lock_key,
569 const char *lock_name);
cc5d0db3
AM
570struct regmap *__regmap_init_w1(struct device *w1_dev,
571 const struct regmap_config *config,
572 struct lock_class_key *lock_key,
573 const char *lock_name);
3cfe7a74
NB
574struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
575 void __iomem *regs,
576 const struct regmap_config *config,
577 struct lock_class_key *lock_key,
578 const char *lock_name);
579struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
580 const struct regmap_config *config,
581 struct lock_class_key *lock_key,
582 const char *lock_name);
7c22ce6e
VK
583struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
584 const struct regmap_config *config,
585 struct lock_class_key *lock_key,
586 const char *lock_name);
fb5103f9
PLB
587struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
588 const struct regmap_config *config,
589 struct lock_class_key *lock_key,
590 const char *lock_name);
7f9fb673
XY
591struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
592 const struct regmap_config *config,
593 struct lock_class_key *lock_key,
594 const char *lock_name);
3cfe7a74
NB
595
596struct regmap *__devm_regmap_init(struct device *dev,
597 const struct regmap_bus *bus,
598 void *bus_context,
599 const struct regmap_config *config,
600 struct lock_class_key *lock_key,
601 const char *lock_name);
602struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
603 const struct regmap_config *config,
604 struct lock_class_key *lock_key,
605 const char *lock_name);
1f89d2fe
SV
606struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
607 const struct regmap_config *config,
608 struct lock_class_key *lock_key,
609 const char *lock_name);
bcf7eac3
AM
610struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
611 const struct regmap_config *config,
612 struct lock_class_key *lock_key,
613 const char *lock_name);
3cfe7a74
NB
614struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
615 const struct regmap_config *config,
616 struct lock_class_key *lock_key,
617 const char *lock_name);
618struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
619 const struct regmap_config *config,
620 struct lock_class_key *lock_key,
621 const char *lock_name);
622struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
623 const struct regmap_config *config,
624 struct lock_class_key *lock_key,
625 const char *lock_name);
cc5d0db3
AM
626struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
627 const struct regmap_config *config,
628 struct lock_class_key *lock_key,
629 const char *lock_name);
3cfe7a74
NB
630struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
631 const char *clk_id,
632 void __iomem *regs,
633 const struct regmap_config *config,
634 struct lock_class_key *lock_key,
635 const char *lock_name);
636struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
637 const struct regmap_config *config,
638 struct lock_class_key *lock_key,
639 const char *lock_name);
7c22ce6e
VK
640struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
641 const struct regmap_config *config,
642 struct lock_class_key *lock_key,
643 const char *lock_name);
fb5103f9
PLB
644struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
645 const struct regmap_config *config,
646 struct lock_class_key *lock_key,
647 const char *lock_name);
ed24d568
SK
648struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
649 const struct regmap_config *config,
650 struct lock_class_key *lock_key,
651 const char *lock_name);
6445500b
VS
652struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
653 const struct regmap_config *config,
654 struct lock_class_key *lock_key,
655 const char *lock_name);
7f9fb673
XY
656struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
657 const struct regmap_config *config,
658 struct lock_class_key *lock_key,
659 const char *lock_name);
3cfe7a74
NB
660/*
661 * Wrapper for regmap_init macros to include a unique lockdep key and name
662 * for each call. No-op if CONFIG_LOCKDEP is not set.
663 *
664 * @fn: Real function to call (in the form __[*_]regmap_init[_*])
665 * @name: Config variable name (#config in the calling macro)
666 **/
667#ifdef CONFIG_LOCKDEP
668#define __regmap_lockdep_wrapper(fn, name, ...) \
669( \
670 ({ \
671 static struct lock_class_key _key; \
672 fn(__VA_ARGS__, &_key, \
673 KBUILD_BASENAME ":" \
674 __stringify(__LINE__) ":" \
675 "(" name ")->lock"); \
676 }) \
677)
678#else
679#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
680#endif
681
1ed81114 682/**
2cf8e2df 683 * regmap_init() - Initialise register map
1ed81114
NB
684 *
685 * @dev: Device that will be interacted with
686 * @bus: Bus-specific callbacks to use with device
687 * @bus_context: Data passed to bus-specific callbacks
688 * @config: Configuration for register map
689 *
690 * The return value will be an ERR_PTR() on error or a valid pointer to
691 * a struct regmap. This function should generally not be called
692 * directly, it should be called by bus-specific init functions.
693 */
3cfe7a74
NB
694#define regmap_init(dev, bus, bus_context, config) \
695 __regmap_lockdep_wrapper(__regmap_init, #config, \
696 dev, bus, bus_context, config)
6cfec04b 697int regmap_attach_dev(struct device *dev, struct regmap *map,
3cfe7a74 698 const struct regmap_config *config);
22853223 699
1ed81114 700/**
2cf8e2df 701 * regmap_init_i2c() - Initialise register map
1ed81114
NB
702 *
703 * @i2c: Device that will be interacted with
704 * @config: Configuration for register map
705 *
706 * The return value will be an ERR_PTR() on error or a valid pointer to
707 * a struct regmap.
708 */
3cfe7a74
NB
709#define regmap_init_i2c(i2c, config) \
710 __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
711 i2c, config)
1ed81114 712
1f89d2fe
SV
713/**
714 * regmap_init_mdio() - Initialise register map
715 *
716 * @mdio_dev: Device that will be interacted with
717 * @config: Configuration for register map
718 *
719 * The return value will be an ERR_PTR() on error or a valid pointer to
720 * a struct regmap.
721 */
722#define regmap_init_mdio(mdio_dev, config) \
723 __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \
724 mdio_dev, config)
725
bcf7eac3
AM
726/**
727 * regmap_init_sccb() - Initialise register map
728 *
729 * @i2c: Device that will be interacted with
730 * @config: Configuration for register map
731 *
732 * The return value will be an ERR_PTR() on error or a valid pointer to
733 * a struct regmap.
734 */
735#define regmap_init_sccb(i2c, config) \
736 __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \
737 i2c, config)
738
7d6f7fb0
SK
739/**
740 * regmap_init_slimbus() - Initialise register map
741 *
742 * @slimbus: Device that will be interacted with
743 * @config: Configuration for register map
744 *
745 * The return value will be an ERR_PTR() on error or a valid pointer to
746 * a struct regmap.
747 */
748#define regmap_init_slimbus(slimbus, config) \
749 __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
750 slimbus, config)
751
1ed81114 752/**
2cf8e2df 753 * regmap_init_spi() - Initialise register map
1ed81114 754 *
2cf8e2df 755 * @dev: Device that will be interacted with
1ed81114
NB
756 * @config: Configuration for register map
757 *
758 * The return value will be an ERR_PTR() on error or a valid pointer to
759 * a struct regmap.
760 */
3cfe7a74
NB
761#define regmap_init_spi(dev, config) \
762 __regmap_lockdep_wrapper(__regmap_init_spi, #config, \
763 dev, config)
1ed81114
NB
764
765/**
2cf8e2df
CK
766 * regmap_init_spmi_base() - Create regmap for the Base register space
767 *
768 * @dev: SPMI device that will be interacted with
1ed81114
NB
769 * @config: Configuration for register map
770 *
771 * The return value will be an ERR_PTR() on error or a valid pointer to
772 * a struct regmap.
773 */
3cfe7a74
NB
774#define regmap_init_spmi_base(dev, config) \
775 __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \
776 dev, config)
1ed81114
NB
777
778/**
2cf8e2df
CK
779 * regmap_init_spmi_ext() - Create regmap for Ext register space
780 *
781 * @dev: Device that will be interacted with
1ed81114
NB
782 * @config: Configuration for register map
783 *
784 * The return value will be an ERR_PTR() on error or a valid pointer to
785 * a struct regmap.
786 */
3cfe7a74
NB
787#define regmap_init_spmi_ext(dev, config) \
788 __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
789 dev, config)
1ed81114 790
cc5d0db3
AM
791/**
792 * regmap_init_w1() - Initialise register map
793 *
794 * @w1_dev: Device that will be interacted with
795 * @config: Configuration for register map
796 *
797 * The return value will be an ERR_PTR() on error or a valid pointer to
798 * a struct regmap.
799 */
800#define regmap_init_w1(w1_dev, config) \
801 __regmap_lockdep_wrapper(__regmap_init_w1, #config, \
802 w1_dev, config)
803
1ed81114 804/**
2cf8e2df 805 * regmap_init_mmio_clk() - Initialise register map with register clock
1ed81114
NB
806 *
807 * @dev: Device that will be interacted with
808 * @clk_id: register clock consumer ID
809 * @regs: Pointer to memory-mapped IO region
810 * @config: Configuration for register map
811 *
812 * The return value will be an ERR_PTR() on error or a valid pointer to
813 * a struct regmap.
814 */
3cfe7a74
NB
815#define regmap_init_mmio_clk(dev, clk_id, regs, config) \
816 __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \
817 dev, clk_id, regs, config)
878ec67b
PZ
818
819/**
2cf8e2df 820 * regmap_init_mmio() - Initialise register map
878ec67b
PZ
821 *
822 * @dev: Device that will be interacted with
823 * @regs: Pointer to memory-mapped IO region
824 * @config: Configuration for register map
825 *
826 * The return value will be an ERR_PTR() on error or a valid pointer to
827 * a struct regmap.
828 */
1ed81114
NB
829#define regmap_init_mmio(dev, regs, config) \
830 regmap_init_mmio_clk(dev, NULL, regs, config)
831
832/**
2cf8e2df 833 * regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
834 *
835 * @ac97: Device that will be interacted with
836 * @config: Configuration for register map
837 *
838 * The return value will be an ERR_PTR() on error or a valid pointer to
839 * a struct regmap.
840 */
3cfe7a74
NB
841#define regmap_init_ac97(ac97, config) \
842 __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \
843 ac97, config)
22853223 844bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
878ec67b 845
7c22ce6e
VK
846/**
847 * regmap_init_sdw() - Initialise register map
848 *
849 * @sdw: Device that will be interacted with
850 * @config: Configuration for register map
851 *
852 * The return value will be an ERR_PTR() on error or a valid pointer to
853 * a struct regmap.
854 */
855#define regmap_init_sdw(sdw, config) \
856 __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \
857 sdw, config)
858
fb5103f9
PLB
859/**
860 * regmap_init_sdw_mbq() - Initialise register map
861 *
862 * @sdw: Device that will be interacted with
863 * @config: Configuration for register map
864 *
865 * The return value will be an ERR_PTR() on error or a valid pointer to
866 * a struct regmap.
867 */
868#define regmap_init_sdw_mbq(sdw, config) \
869 __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
870 sdw, config)
871
7f9fb673
XY
872/**
873 * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
874 * to AVMM Bus Bridge
875 *
876 * @spi: Device that will be interacted with
877 * @config: Configuration for register map
878 *
879 * The return value will be an ERR_PTR() on error or a valid pointer
880 * to a struct regmap.
881 */
882#define regmap_init_spi_avmm(spi, config) \
883 __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \
884 spi, config)
7c22ce6e 885
1ed81114 886/**
2cf8e2df 887 * devm_regmap_init() - Initialise managed register map
1ed81114
NB
888 *
889 * @dev: Device that will be interacted with
890 * @bus: Bus-specific callbacks to use with device
891 * @bus_context: Data passed to bus-specific callbacks
892 * @config: Configuration for register map
893 *
894 * The return value will be an ERR_PTR() on error or a valid pointer
895 * to a struct regmap. This function should generally not be called
896 * directly, it should be called by bus-specific init functions. The
897 * map will be automatically freed by the device management code.
898 */
3cfe7a74
NB
899#define devm_regmap_init(dev, bus, bus_context, config) \
900 __regmap_lockdep_wrapper(__devm_regmap_init, #config, \
901 dev, bus, bus_context, config)
1ed81114
NB
902
903/**
2cf8e2df 904 * devm_regmap_init_i2c() - Initialise managed register map
1ed81114
NB
905 *
906 * @i2c: Device that will be interacted with
907 * @config: Configuration for register map
908 *
909 * The return value will be an ERR_PTR() on error or a valid pointer
910 * to a struct regmap. The regmap will be automatically freed by the
911 * device management code.
912 */
3cfe7a74
NB
913#define devm_regmap_init_i2c(i2c, config) \
914 __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \
915 i2c, config)
1ed81114 916
1f89d2fe
SV
917/**
918 * devm_regmap_init_mdio() - Initialise managed register map
919 *
920 * @mdio_dev: Device that will be interacted with
921 * @config: Configuration for register map
922 *
923 * The return value will be an ERR_PTR() on error or a valid pointer
924 * to a struct regmap. The regmap will be automatically freed by the
925 * device management code.
926 */
927#define devm_regmap_init_mdio(mdio_dev, config) \
928 __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \
929 mdio_dev, config)
930
bcf7eac3
AM
931/**
932 * devm_regmap_init_sccb() - Initialise managed register map
933 *
934 * @i2c: Device that will be interacted with
935 * @config: Configuration for register map
936 *
937 * The return value will be an ERR_PTR() on error or a valid pointer
938 * to a struct regmap. The regmap will be automatically freed by the
939 * device management code.
940 */
941#define devm_regmap_init_sccb(i2c, config) \
942 __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \
943 i2c, config)
944
1ed81114 945/**
2cf8e2df 946 * devm_regmap_init_spi() - Initialise register map
1ed81114 947 *
2cf8e2df 948 * @dev: Device that will be interacted with
1ed81114
NB
949 * @config: Configuration for register map
950 *
951 * The return value will be an ERR_PTR() on error or a valid pointer
952 * to a struct regmap. The map will be automatically freed by the
953 * device management code.
954 */
3cfe7a74
NB
955#define devm_regmap_init_spi(dev, config) \
956 __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \
957 dev, config)
1ed81114
NB
958
959/**
2cf8e2df
CK
960 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
961 *
962 * @dev: SPMI device that will be interacted with
1ed81114
NB
963 * @config: Configuration for register map
964 *
965 * The return value will be an ERR_PTR() on error or a valid pointer
966 * to a struct regmap. The regmap will be automatically freed by the
967 * device management code.
968 */
3cfe7a74
NB
969#define devm_regmap_init_spmi_base(dev, config) \
970 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \
971 dev, config)
1ed81114
NB
972
973/**
2cf8e2df
CK
974 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
975 *
976 * @dev: SPMI device that will be interacted with
1ed81114
NB
977 * @config: Configuration for register map
978 *
979 * The return value will be an ERR_PTR() on error or a valid pointer
980 * to a struct regmap. The regmap will be automatically freed by the
981 * device management code.
982 */
3cfe7a74
NB
983#define devm_regmap_init_spmi_ext(dev, config) \
984 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
985 dev, config)
3cfe7a74 986
cc5d0db3
AM
987/**
988 * devm_regmap_init_w1() - Initialise managed register map
989 *
990 * @w1_dev: Device that will be interacted with
991 * @config: Configuration for register map
992 *
993 * The return value will be an ERR_PTR() on error or a valid pointer
994 * to a struct regmap. The regmap will be automatically freed by the
995 * device management code.
996 */
997#define devm_regmap_init_w1(w1_dev, config) \
998 __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
999 w1_dev, config)
878ec67b 1000/**
2cf8e2df 1001 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
878ec67b
PZ
1002 *
1003 * @dev: Device that will be interacted with
1ed81114 1004 * @clk_id: register clock consumer ID
878ec67b
PZ
1005 * @regs: Pointer to memory-mapped IO region
1006 * @config: Configuration for register map
1007 *
1ed81114
NB
1008 * The return value will be an ERR_PTR() on error or a valid pointer
1009 * to a struct regmap. The regmap will be automatically freed by the
1010 * device management code.
878ec67b 1011 */
1ed81114
NB
1012#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \
1013 __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \
1014 dev, clk_id, regs, config)
878ec67b
PZ
1015
1016/**
2cf8e2df 1017 * devm_regmap_init_mmio() - Initialise managed register map
878ec67b
PZ
1018 *
1019 * @dev: Device that will be interacted with
1020 * @regs: Pointer to memory-mapped IO region
1021 * @config: Configuration for register map
1022 *
1023 * The return value will be an ERR_PTR() on error or a valid pointer
1024 * to a struct regmap. The regmap will be automatically freed by the
1025 * device management code.
1026 */
3cfe7a74
NB
1027#define devm_regmap_init_mmio(dev, regs, config) \
1028 devm_regmap_init_mmio_clk(dev, NULL, regs, config)
c0eb4676 1029
1ed81114 1030/**
2cf8e2df 1031 * devm_regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
1032 *
1033 * @ac97: Device that will be interacted with
1034 * @config: Configuration for register map
1035 *
1036 * The return value will be an ERR_PTR() on error or a valid pointer
1037 * to a struct regmap. The regmap will be automatically freed by the
1038 * device management code.
1039 */
1040#define devm_regmap_init_ac97(ac97, config) \
1041 __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \
1042 ac97, config)
c0eb4676 1043
7c22ce6e
VK
1044/**
1045 * devm_regmap_init_sdw() - Initialise managed register map
1046 *
1047 * @sdw: Device that will be interacted with
1048 * @config: Configuration for register map
1049 *
1050 * The return value will be an ERR_PTR() on error or a valid pointer
1051 * to a struct regmap. The regmap will be automatically freed by the
1052 * device management code.
1053 */
1054#define devm_regmap_init_sdw(sdw, config) \
1055 __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \
1056 sdw, config)
1057
fb5103f9
PLB
1058/**
1059 * devm_regmap_init_sdw_mbq() - Initialise managed register map
1060 *
1061 * @sdw: Device that will be interacted with
1062 * @config: Configuration for register map
1063 *
1064 * The return value will be an ERR_PTR() on error or a valid pointer
1065 * to a struct regmap. The regmap will be automatically freed by the
1066 * device management code.
1067 */
1068#define devm_regmap_init_sdw_mbq(sdw, config) \
1069 __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
1070 sdw, config)
1071
ed24d568
SK
1072/**
1073 * devm_regmap_init_slimbus() - Initialise managed register map
1074 *
1075 * @slimbus: Device that will be interacted with
1076 * @config: Configuration for register map
1077 *
1078 * The return value will be an ERR_PTR() on error or a valid pointer
1079 * to a struct regmap. The regmap will be automatically freed by the
1080 * device management code.
1081 */
1082#define devm_regmap_init_slimbus(slimbus, config) \
1083 __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \
1084 slimbus, config)
6445500b
VS
1085
1086/**
1087 * devm_regmap_init_i3c() - Initialise managed register map
1088 *
1089 * @i3c: Device that will be interacted with
1090 * @config: Configuration for register map
1091 *
1092 * The return value will be an ERR_PTR() on error or a valid pointer
1093 * to a struct regmap. The regmap will be automatically freed by the
1094 * device management code.
1095 */
1096#define devm_regmap_init_i3c(i3c, config) \
1097 __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \
1098 i3c, config)
1099
7f9fb673
XY
1100/**
1101 * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
1102 * to AVMM Bus Bridge
1103 *
1104 * @spi: Device that will be interacted with
1105 * @config: Configuration for register map
1106 *
1107 * The return value will be an ERR_PTR() on error or a valid pointer
1108 * to a struct regmap. The map will be automatically freed by the
1109 * device management code.
1110 */
1111#define devm_regmap_init_spi_avmm(spi, config) \
1112 __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \
1113 spi, config)
1114
31895662
MR
1115int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
1116void regmap_mmio_detach_clk(struct regmap *map);
b83a313b 1117void regmap_exit(struct regmap *map);
bf315173
MB
1118int regmap_reinit_cache(struct regmap *map,
1119 const struct regmap_config *config);
72b39f6f 1120struct regmap *dev_get_regmap(struct device *dev, const char *name);
8d7d3972 1121struct device *regmap_get_device(struct regmap *map);
b83a313b 1122int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
915f441b 1123int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
b83a313b
MB
1124int regmap_raw_write(struct regmap *map, unsigned int reg,
1125 const void *val, size_t val_len);
cdf6b11d
BW
1126int regmap_noinc_write(struct regmap *map, unsigned int reg,
1127 const void *val, size_t val_len);
8eaeb219
LD
1128int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1129 size_t val_count);
8019ff6c 1130int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
e33fabd3 1131 int num_regs);
1d5b40bc 1132int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 1133 const struct reg_sequence *regs,
1d5b40bc 1134 int num_regs);
0d509f2b
MB
1135int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1136 const void *val, size_t val_len);
b83a313b
MB
1137int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
1138int regmap_raw_read(struct regmap *map, unsigned int reg,
1139 void *val, size_t val_len);
74fe7b55
CDL
1140int regmap_noinc_read(struct regmap *map, unsigned int reg,
1141 void *val, size_t val_len);
b83a313b
MB
1142int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1143 size_t val_count);
91d31b9f
KM
1144int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1145 unsigned int mask, unsigned int val,
1146 bool *change, bool async, bool force);
4b9e7edb
BG
1147
1148static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1149 unsigned int mask, unsigned int val)
1150{
1151 return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
1152}
1153
1154static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1155 unsigned int mask, unsigned int val)
1156{
1157 return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
1158}
1159
1160static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1161 unsigned int mask, unsigned int val,
1162 bool *change)
1163{
1164 return regmap_update_bits_base(map, reg, mask, val,
1165 change, false, false);
1166}
1167
1168static inline int
1169regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1170 unsigned int mask, unsigned int val,
1171 bool *change)
1172{
1173 return regmap_update_bits_base(map, reg, mask, val,
1174 change, true, false);
1175}
1176
1177static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1178 unsigned int mask, unsigned int val)
1179{
1180 return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
1181}
1182
a6539c32 1183int regmap_get_val_bytes(struct regmap *map);
668abc72 1184int regmap_get_max_register(struct regmap *map);
a2f776cb 1185int regmap_get_reg_stride(struct regmap *map);
0d509f2b 1186int regmap_async_complete(struct regmap *map);
221ad7f2 1187bool regmap_can_raw_write(struct regmap *map);
f50c9eb4
MP
1188size_t regmap_get_raw_read_max(struct regmap *map);
1189size_t regmap_get_raw_write_max(struct regmap *map);
b83a313b 1190
39a58439 1191int regcache_sync(struct regmap *map);
4d4cfd16
MB
1192int regcache_sync_region(struct regmap *map, unsigned int min,
1193 unsigned int max);
697e85bc
MB
1194int regcache_drop_region(struct regmap *map, unsigned int min,
1195 unsigned int max);
92afb286 1196void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 1197void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 1198void regcache_mark_dirty(struct regmap *map);
92afb286 1199
154881e5
MB
1200bool regmap_check_range_table(struct regmap *map, unsigned int reg,
1201 const struct regmap_access_table *table);
1202
8019ff6c 1203int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a 1204 int num_regs);
13ff50c8
NC
1205int regmap_parse_val(struct regmap *map, const void *buf,
1206 unsigned int *val);
22f0d90a 1207
76aad392
DC
1208static inline bool regmap_reg_in_range(unsigned int reg,
1209 const struct regmap_range *range)
1210{
1211 return reg >= range->range_min && reg <= range->range_max;
1212}
1213
1214bool regmap_reg_in_ranges(unsigned int reg,
1215 const struct regmap_range *ranges,
1216 unsigned int nranges);
1217
aa2ff9db
BG
1218static inline int regmap_set_bits(struct regmap *map,
1219 unsigned int reg, unsigned int bits)
1220{
1221 return regmap_update_bits_base(map, reg, bits, bits,
1222 NULL, false, false);
1223}
1224
1225static inline int regmap_clear_bits(struct regmap *map,
1226 unsigned int reg, unsigned int bits)
1227{
1228 return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
1229}
1230
1231int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
1232
67252287 1233/**
2cf8e2df 1234 * struct reg_field - Description of an register field
67252287
SK
1235 *
1236 * @reg: Offset of the register within the regmap bank
1237 * @lsb: lsb of the register field.
f27b37f5 1238 * @msb: msb of the register field.
a0102375
KM
1239 * @id_size: port size if it has some ports
1240 * @id_offset: address offset for each ports
67252287
SK
1241 */
1242struct reg_field {
1243 unsigned int reg;
1244 unsigned int lsb;
1245 unsigned int msb;
a0102375
KM
1246 unsigned int id_size;
1247 unsigned int id_offset;
67252287
SK
1248};
1249
1250#define REG_FIELD(_reg, _lsb, _msb) { \
1251 .reg = _reg, \
1252 .lsb = _lsb, \
1253 .msb = _msb, \
1254 }
1255
8baebfc2
VO
1256#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \
1257 .reg = _reg, \
1258 .lsb = _lsb, \
1259 .msb = _msb, \
1260 .id_size = _size, \
1261 .id_offset = _offset, \
1262 }
1263
67252287
SK
1264struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1265 struct reg_field reg_field);
1266void regmap_field_free(struct regmap_field *field);
1267
1268struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1269 struct regmap *regmap, struct reg_field reg_field);
1270void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
1271
ea470b82
SK
1272int regmap_field_bulk_alloc(struct regmap *regmap,
1273 struct regmap_field **rm_field,
29c34975 1274 const struct reg_field *reg_field,
ea470b82
SK
1275 int num_fields);
1276void regmap_field_bulk_free(struct regmap_field *field);
1277int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
1278 struct regmap_field **field,
29c34975
IZ
1279 const struct reg_field *reg_field,
1280 int num_fields);
ea470b82
SK
1281void devm_regmap_field_bulk_free(struct device *dev,
1282 struct regmap_field *field);
1283
67252287 1284int regmap_field_read(struct regmap_field *field, unsigned int *val);
28972eaa
KM
1285int regmap_field_update_bits_base(struct regmap_field *field,
1286 unsigned int mask, unsigned int val,
1287 bool *change, bool async, bool force);
a0102375
KM
1288int regmap_fields_read(struct regmap_field *field, unsigned int id,
1289 unsigned int *val);
e126edec
KM
1290int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1291 unsigned int mask, unsigned int val,
1292 bool *change, bool async, bool force);
4b9e7edb
BG
1293
1294static inline int regmap_field_write(struct regmap_field *field,
1295 unsigned int val)
1296{
1297 return regmap_field_update_bits_base(field, ~0, val,
1298 NULL, false, false);
1299}
1300
1301static inline int regmap_field_force_write(struct regmap_field *field,
1302 unsigned int val)
1303{
1304 return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
1305}
1306
1307static inline int regmap_field_update_bits(struct regmap_field *field,
1308 unsigned int mask, unsigned int val)
1309{
1310 return regmap_field_update_bits_base(field, mask, val,
1311 NULL, false, false);
1312}
1313
1314static inline int
1315regmap_field_force_update_bits(struct regmap_field *field,
1316 unsigned int mask, unsigned int val)
1317{
1318 return regmap_field_update_bits_base(field, mask, val,
1319 NULL, false, true);
1320}
1321
1322static inline int regmap_fields_write(struct regmap_field *field,
1323 unsigned int id, unsigned int val)
1324{
1325 return regmap_fields_update_bits_base(field, id, ~0, val,
1326 NULL, false, false);
1327}
1328
1329static inline int regmap_fields_force_write(struct regmap_field *field,
1330 unsigned int id, unsigned int val)
1331{
1332 return regmap_fields_update_bits_base(field, id, ~0, val,
1333 NULL, false, true);
1334}
1335
1336static inline int
1337regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1338 unsigned int mask, unsigned int val)
1339{
1340 return regmap_fields_update_bits_base(field, id, mask, val,
1341 NULL, false, false);
1342}
1343
1344static inline int
1345regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1346 unsigned int mask, unsigned int val)
1347{
1348 return regmap_fields_update_bits_base(field, id, mask, val,
1349 NULL, false, true);
1350}
1351
1c2928e3
MV
1352/**
1353 * struct regmap_irq_type - IRQ type definitions.
1354 *
1355 * @type_reg_offset: Offset register for the irq type setting.
1356 * @type_rising_val: Register value to configure RISING type irq.
1357 * @type_falling_val: Register value to configure FALLING type irq.
1358 * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
1359 * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
1360 * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
1361 */
1362struct regmap_irq_type {
1363 unsigned int type_reg_offset;
1364 unsigned int type_reg_mask;
1365 unsigned int type_rising_val;
1366 unsigned int type_falling_val;
1367 unsigned int type_level_low_val;
1368 unsigned int type_level_high_val;
1369 unsigned int types_supported;
1370};
76aad392 1371
f8beab2b 1372/**
2cf8e2df 1373 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
f8beab2b
MB
1374 *
1375 * @reg_offset: Offset of the status/mask register within the bank
1376 * @mask: Mask used to flag/control the register.
1c2928e3 1377 * @type: IRQ trigger type setting details if supported.
f8beab2b
MB
1378 */
1379struct regmap_irq {
1380 unsigned int reg_offset;
1381 unsigned int mask;
1c2928e3 1382 struct regmap_irq_type type;
f8beab2b
MB
1383};
1384
b4fe8ba7
QZ
1385#define REGMAP_IRQ_REG(_irq, _off, _mask) \
1386 [_irq] = { .reg_offset = (_off), .mask = (_mask) }
1387
43fac323
TX
1388#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
1389 [_id] = { \
1390 .mask = BIT((_id) % (_reg_bits)), \
1391 .reg_offset = (_id) / (_reg_bits), \
1392 }
1393
a2d21848
MV
1394#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \
1395 { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
1396
1397struct regmap_irq_sub_irq_map {
1398 unsigned int num_regs;
1399 unsigned int *offset;
1400};
1401
f8beab2b 1402/**
2cf8e2df 1403 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
f8beab2b
MB
1404 *
1405 * @name: Descriptive name for IRQ controller.
1406 *
a2d21848
MV
1407 * @main_status: Base main status register address. For chips which have
1408 * interrupts arranged in separate sub-irq blocks with own IRQ
1409 * registers and which have a main IRQ registers indicating
1410 * sub-irq blocks with unhandled interrupts. For such chips fill
1411 * sub-irq register information in status_base, mask_base and
1412 * ack_base.
1413 * @num_main_status_bits: Should be given to chips where number of meaningfull
1414 * main status bits differs from num_regs.
1415 * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
1416 * registers. First item in array describes the registers
1417 * for first main status bit. Second array for second bit etc.
1418 * Offset is given as sub register status offset to
1419 * status_base. Should contain num_regs arrays.
1420 * Can be provided for chips with more complex mapping than
1421 * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1066cfbd
GDS
1422 * When used with not_fixed_stride, each one-element array
1423 * member contains offset calculated as address from each
1424 * peripheral to first peripheral.
a2d21848
MV
1425 * @num_main_regs: Number of 'main status' irq registers for chips which have
1426 * main_status set.
1427 *
f8beab2b
MB
1428 * @status_base: Base status register address.
1429 * @mask_base: Base mask register address.
a71411db 1430 * @mask_writeonly: Base mask register is write only.
7b7d1968
GZ
1431 * @unmask_base: Base unmask register address. for chips who have
1432 * separate mask and unmask registers
d3233433
AS
1433 * @ack_base: Base ack address. If zero then the chip is clear on read.
1434 * Using zero value is possible with @use_ack bit.
a43fd50d 1435 * @wake_base: Base address for wake enables. If zero unsupported.
7a78479f 1436 * @type_base: Base address for irq type. If zero unsupported.
4c501445 1437 * @virt_reg_base: Base addresses for extra config regs.
022f926a 1438 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
2753e6f8 1439 * @init_ack_masked: Ack all masked interrupts once during initalization.
68622bdf 1440 * @mask_invert: Inverted mask register: cleared bits are masked out.
d3233433 1441 * @use_ack: Use @ack register even if it is zero.
a650fdd9 1442 * @ack_invert: Inverted ack register: cleared bits for ack.
3a6f0fb7 1443 * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
68622bdf 1444 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
7a78479f 1445 * @type_invert: Invert the type flags.
bc998a73
BG
1446 * @type_in_mask: Use the mask registers for controlling irq type. For
1447 * interrupts defining type_rising/falling_mask use mask_base
1448 * for edge configuration and never update bits in type_base.
c82ea33e
BG
1449 * @clear_on_unmask: For chips with interrupts cleared on read: read the status
1450 * registers before unmasking interrupts to clear any bits
1451 * set when they were masked.
1066cfbd
GDS
1452 * @not_fixed_stride: Used when chip peripherals are not laid out with fixed
1453 * stride. Must be used with sub_reg_offsets containing the
1454 * offsets to each peripheral.
bcd23f93 1455 * @status_invert: Inverted status register: cleared bits are active interrupts.
0c00c50b 1456 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
f8beab2b
MB
1457 *
1458 * @num_regs: Number of registers in each control bank.
1459 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
1460 * assigned based on the index in the array of the interrupt.
1461 * @num_irqs: Number of descriptors.
7a78479f 1462 * @num_type_reg: Number of type registers.
4c501445
GDS
1463 * @num_virt_regs: Number of non-standard irq configuration registers.
1464 * If zero unsupported.
7a78479f
LD
1465 * @type_reg_stride: Stride to use for chips where type registers are not
1466 * contiguous.
ccc12561
LD
1467 * @handle_pre_irq: Driver specific callback to handle interrupt from device
1468 * before regmap_irq_handler process the interrupts.
1469 * @handle_post_irq: Driver specific callback to handle interrupt from device
1470 * after handling the interrupts in regmap_irq_handler().
394409aa
GDS
1471 * @set_type_virt: Driver specific callback to extend regmap_irq_set_type()
1472 * and configure virt regs.
ccc12561
LD
1473 * @irq_drv_data: Driver specific IRQ data which is passed as parameter when
1474 * driver specific pre/post interrupt handler is called.
2cf8e2df
CK
1475 *
1476 * This is not intended to handle every possible interrupt controller, but
1477 * it should handle a substantial proportion of those that are found in the
1478 * wild.
f8beab2b
MB
1479 */
1480struct regmap_irq_chip {
1481 const char *name;
1482
a2d21848
MV
1483 unsigned int main_status;
1484 unsigned int num_main_status_bits;
1485 struct regmap_irq_sub_irq_map *sub_reg_offsets;
1486 int num_main_regs;
1487
f8beab2b
MB
1488 unsigned int status_base;
1489 unsigned int mask_base;
7b7d1968 1490 unsigned int unmask_base;
f8beab2b 1491 unsigned int ack_base;
a43fd50d 1492 unsigned int wake_base;
7a78479f 1493 unsigned int type_base;
4c501445 1494 unsigned int *virt_reg_base;
022f926a 1495 unsigned int irq_reg_stride;
a71411db 1496 bool mask_writeonly:1;
f484f7a6
PZ
1497 bool init_ack_masked:1;
1498 bool mask_invert:1;
d3233433 1499 bool use_ack:1;
a650fdd9 1500 bool ack_invert:1;
3a6f0fb7 1501 bool clear_ack:1;
f484f7a6
PZ
1502 bool wake_invert:1;
1503 bool runtime_pm:1;
7a78479f 1504 bool type_invert:1;
bc998a73 1505 bool type_in_mask:1;
c82ea33e 1506 bool clear_on_unmask:1;
1066cfbd 1507 bool not_fixed_stride:1;
bcd23f93 1508 bool status_invert:1;
f8beab2b
MB
1509
1510 int num_regs;
1511
1512 const struct regmap_irq *irqs;
1513 int num_irqs;
7a78479f
LD
1514
1515 int num_type_reg;
4c501445 1516 int num_virt_regs;
7a78479f 1517 unsigned int type_reg_stride;
ccc12561
LD
1518
1519 int (*handle_pre_irq)(void *irq_drv_data);
1520 int (*handle_post_irq)(void *irq_drv_data);
394409aa
GDS
1521 int (*set_type_virt)(unsigned int **buf, unsigned int type,
1522 unsigned long hwirq, int reg);
ccc12561 1523 void *irq_drv_data;
f8beab2b
MB
1524};
1525
1526struct regmap_irq_chip_data;
1527
1528int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 1529 int irq_base, const struct regmap_irq_chip *chip,
f8beab2b 1530 struct regmap_irq_chip_data **data);
5cc2013b
MW
1531int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
1532 struct regmap *map, int irq,
1533 int irq_flags, int irq_base,
1534 const struct regmap_irq_chip *chip,
1535 struct regmap_irq_chip_data **data);
f8beab2b 1536void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
045b9848
LD
1537
1538int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
1539 int irq_flags, int irq_base,
1540 const struct regmap_irq_chip *chip,
1541 struct regmap_irq_chip_data **data);
5cc2013b
MW
1542int devm_regmap_add_irq_chip_fwnode(struct device *dev,
1543 struct fwnode_handle *fwnode,
1544 struct regmap *map, int irq,
1545 int irq_flags, int irq_base,
1546 const struct regmap_irq_chip *chip,
1547 struct regmap_irq_chip_data **data);
045b9848
LD
1548void devm_regmap_del_irq_chip(struct device *dev, int irq,
1549 struct regmap_irq_chip_data *data);
1550
209a6006 1551int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 1552int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
90f790d2 1553struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
92afb286 1554
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1555#else
1556
1557/*
1558 * These stubs should only ever be called by generic code which has
1559 * regmap based facilities, if they ever get called at runtime
1560 * something is going wrong and something probably needs to select
1561 * REGMAP.
1562 */
1563
1564static inline int regmap_write(struct regmap *map, unsigned int reg,
1565 unsigned int val)
1566{
1567 WARN_ONCE(1, "regmap API is disabled");
1568 return -EINVAL;
1569}
1570
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1571static inline int regmap_write_async(struct regmap *map, unsigned int reg,
1572 unsigned int val)
1573{
1574 WARN_ONCE(1, "regmap API is disabled");
1575 return -EINVAL;
1576}
1577
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1578static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
1579 const void *val, size_t val_len)
1580{
1581 WARN_ONCE(1, "regmap API is disabled");
1582 return -EINVAL;
1583}
1584
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1585static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1586 const void *val, size_t val_len)
1587{
1588 WARN_ONCE(1, "regmap API is disabled");
1589 return -EINVAL;
1590}
1591
cdf6b11d
BW
1592static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
1593 const void *val, size_t val_len)
1594{
1595 WARN_ONCE(1, "regmap API is disabled");
1596 return -EINVAL;
1597}
1598
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1599static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
1600 const void *val, size_t val_count)
1601{
1602 WARN_ONCE(1, "regmap API is disabled");
1603 return -EINVAL;
1604}
1605
1606static inline int regmap_read(struct regmap *map, unsigned int reg,
1607 unsigned int *val)
1608{
1609 WARN_ONCE(1, "regmap API is disabled");
1610 return -EINVAL;
1611}
1612
1613static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
1614 void *val, size_t val_len)
1615{
1616 WARN_ONCE(1, "regmap API is disabled");
1617 return -EINVAL;
1618}
1619
74fe7b55
CDL
1620static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
1621 void *val, size_t val_len)
1622{
1623 WARN_ONCE(1, "regmap API is disabled");
1624 return -EINVAL;
1625}
1626
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1627static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
1628 void *val, size_t val_count)
1629{
1630 WARN_ONCE(1, "regmap API is disabled");
1631 return -EINVAL;
1632}
1633
91d31b9f
KM
1634static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1635 unsigned int mask, unsigned int val,
1636 bool *change, bool async, bool force)
fd4b7286
KM
1637{
1638 WARN_ONCE(1, "regmap API is disabled");
1639 return -EINVAL;
1640}
1641
aa2ff9db
BG
1642static inline int regmap_set_bits(struct regmap *map,
1643 unsigned int reg, unsigned int bits)
1644{
1645 WARN_ONCE(1, "regmap API is disabled");
1646 return -EINVAL;
1647}
1648
1649static inline int regmap_clear_bits(struct regmap *map,
1650 unsigned int reg, unsigned int bits)
1651{
1652 WARN_ONCE(1, "regmap API is disabled");
1653 return -EINVAL;
1654}
1655
1656static inline int regmap_test_bits(struct regmap *map,
1657 unsigned int reg, unsigned int bits)
1658{
1659 WARN_ONCE(1, "regmap API is disabled");
1660 return -EINVAL;
1661}
1662
28972eaa
KM
1663static inline int regmap_field_update_bits_base(struct regmap_field *field,
1664 unsigned int mask, unsigned int val,
1665 bool *change, bool async, bool force)
915f441b
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1666{
1667 WARN_ONCE(1, "regmap API is disabled");
1668 return -EINVAL;
1669}
1670
e126edec
KM
1671static inline int regmap_fields_update_bits_base(struct regmap_field *field,
1672 unsigned int id,
1673 unsigned int mask, unsigned int val,
1674 bool *change, bool async, bool force)
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1675{
1676 WARN_ONCE(1, "regmap API is disabled");
1677 return -EINVAL;
1678}
1679
4b9e7edb
BG
1680static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1681 unsigned int mask, unsigned int val)
1682{
1683 WARN_ONCE(1, "regmap API is disabled");
1684 return -EINVAL;
1685}
1686
1687static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1688 unsigned int mask, unsigned int val)
1689{
1690 WARN_ONCE(1, "regmap API is disabled");
1691 return -EINVAL;
1692}
1693
1694static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1695 unsigned int mask, unsigned int val,
1696 bool *change)
1697{
1698 WARN_ONCE(1, "regmap API is disabled");
1699 return -EINVAL;
1700}
1701
1702static inline int
1703regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1704 unsigned int mask, unsigned int val,
1705 bool *change)
1706{
1707 WARN_ONCE(1, "regmap API is disabled");
1708 return -EINVAL;
1709}
1710
1711static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1712 unsigned int mask, unsigned int val)
1713{
1714 WARN_ONCE(1, "regmap API is disabled");
1715 return -EINVAL;
1716}
1717
1718static inline int regmap_field_write(struct regmap_field *field,
1719 unsigned int val)
1720{
1721 WARN_ONCE(1, "regmap API is disabled");
1722 return -EINVAL;
1723}
1724
1725static inline int regmap_field_force_write(struct regmap_field *field,
1726 unsigned int val)
1727{
1728 WARN_ONCE(1, "regmap API is disabled");
1729 return -EINVAL;
1730}
1731
1732static inline int regmap_field_update_bits(struct regmap_field *field,
1733 unsigned int mask, unsigned int val)
1734{
1735 WARN_ONCE(1, "regmap API is disabled");
1736 return -EINVAL;
1737}
1738
1739static inline int
1740regmap_field_force_update_bits(struct regmap_field *field,
1741 unsigned int mask, unsigned int val)
1742{
1743 WARN_ONCE(1, "regmap API is disabled");
1744 return -EINVAL;
1745}
1746
1747static inline int regmap_fields_write(struct regmap_field *field,
1748 unsigned int id, unsigned int val)
1749{
1750 WARN_ONCE(1, "regmap API is disabled");
1751 return -EINVAL;
1752}
1753
1754static inline int regmap_fields_force_write(struct regmap_field *field,
1755 unsigned int id, unsigned int val)
1756{
1757 WARN_ONCE(1, "regmap API is disabled");
1758 return -EINVAL;
1759}
1760
1761static inline int
1762regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1763 unsigned int mask, unsigned int val)
1764{
1765 WARN_ONCE(1, "regmap API is disabled");
1766 return -EINVAL;
1767}
1768
1769static inline int
1770regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1771 unsigned int mask, unsigned int val)
1772{
1773 WARN_ONCE(1, "regmap API is disabled");
1774 return -EINVAL;
1775}
1776
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1777static inline int regmap_get_val_bytes(struct regmap *map)
1778{
1779 WARN_ONCE(1, "regmap API is disabled");
1780 return -EINVAL;
1781}
1782
668abc72
SK
1783static inline int regmap_get_max_register(struct regmap *map)
1784{
1785 WARN_ONCE(1, "regmap API is disabled");
1786 return -EINVAL;
1787}
1788
a2f776cb
SK
1789static inline int regmap_get_reg_stride(struct regmap *map)
1790{
1791 WARN_ONCE(1, "regmap API is disabled");
1792 return -EINVAL;
1793}
1794
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1795static inline int regcache_sync(struct regmap *map)
1796{
1797 WARN_ONCE(1, "regmap API is disabled");
1798 return -EINVAL;
1799}
1800
a313f9f5
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1801static inline int regcache_sync_region(struct regmap *map, unsigned int min,
1802 unsigned int max)
1803{
1804 WARN_ONCE(1, "regmap API is disabled");
1805 return -EINVAL;
1806}
1807
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1808static inline int regcache_drop_region(struct regmap *map, unsigned int min,
1809 unsigned int max)
1810{
1811 WARN_ONCE(1, "regmap API is disabled");
1812 return -EINVAL;
1813}
1814
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1815static inline void regcache_cache_only(struct regmap *map, bool enable)
1816{
1817 WARN_ONCE(1, "regmap API is disabled");
1818}
1819
1820static inline void regcache_cache_bypass(struct regmap *map, bool enable)
1821{
1822 WARN_ONCE(1, "regmap API is disabled");
1823}
1824
1825static inline void regcache_mark_dirty(struct regmap *map)
1826{
1827 WARN_ONCE(1, "regmap API is disabled");
1828}
1829
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1830static inline void regmap_async_complete(struct regmap *map)
1831{
1832 WARN_ONCE(1, "regmap API is disabled");
1833}
1834
9cde5fcd 1835static inline int regmap_register_patch(struct regmap *map,
a6baa3de 1836 const struct reg_sequence *regs,
9cde5fcd
MB
1837 int num_regs)
1838{
1839 WARN_ONCE(1, "regmap API is disabled");
1840 return -EINVAL;
1841}
1842
13ff50c8
NC
1843static inline int regmap_parse_val(struct regmap *map, const void *buf,
1844 unsigned int *val)
1845{
1846 WARN_ONCE(1, "regmap API is disabled");
1847 return -EINVAL;
1848}
1849
72b39f6f
MB
1850static inline struct regmap *dev_get_regmap(struct device *dev,
1851 const char *name)
1852{
72b39f6f
MB
1853 return NULL;
1854}
1855
8d7d3972
TT
1856static inline struct device *regmap_get_device(struct regmap *map)
1857{
1858 WARN_ONCE(1, "regmap API is disabled");
1d33dc6b 1859 return NULL;
8d7d3972
TT
1860}
1861
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MB
1862#endif
1863
b83a313b 1864#endif