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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
b83a313b MB |
2 | #ifndef __LINUX_REGMAP_H |
3 | #define __LINUX_REGMAP_H | |
4 | ||
5 | /* | |
6 | * Register map access API | |
7 | * | |
8 | * Copyright 2011 Wolfson Microelectronics plc | |
9 | * | |
10 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
b83a313b MB |
11 | */ |
12 | ||
b83a313b | 13 | #include <linux/list.h> |
6863ca62 | 14 | #include <linux/rbtree.h> |
f15cd6d9 | 15 | #include <linux/ktime.h> |
adf08d48 | 16 | #include <linux/delay.h> |
49ccc142 | 17 | #include <linux/err.h> |
3f0fa9a8 | 18 | #include <linux/bug.h> |
3cfe7a74 | 19 | #include <linux/lockdep.h> |
e44ab4e1 | 20 | #include <linux/iopoll.h> |
5cc2013b | 21 | #include <linux/fwnode.h> |
b83a313b | 22 | |
de477254 | 23 | struct module; |
31895662 | 24 | struct clk; |
313162d0 | 25 | struct device; |
12479382 | 26 | struct device_node; |
9943fa30 | 27 | struct i2c_client; |
6445500b | 28 | struct i3c_device; |
90f790d2 | 29 | struct irq_domain; |
1f89d2fe | 30 | struct mdio_device; |
7d6f7fb0 | 31 | struct slim_device; |
a676f083 | 32 | struct spi_device; |
a01779f8 | 33 | struct spmi_device; |
b83d2ff0 | 34 | struct regmap; |
6863ca62 | 35 | struct regmap_range_cfg; |
67252287 | 36 | struct regmap_field; |
22853223 | 37 | struct snd_ac97; |
7c22ce6e | 38 | struct sdw_slave; |
9943fa30 | 39 | |
9fabe24e DP |
40 | /* An enum of all the supported cache types */ |
41 | enum regcache_type { | |
42 | REGCACHE_NONE, | |
28644c80 | 43 | REGCACHE_RBTREE, |
2ac902ce MB |
44 | REGCACHE_COMPRESSED, |
45 | REGCACHE_FLAT, | |
9fabe24e DP |
46 | }; |
47 | ||
bd20eb54 | 48 | /** |
2cf8e2df | 49 | * struct reg_default - Default value for a register. |
bd20eb54 MB |
50 | * |
51 | * @reg: Register address. | |
52 | * @def: Register default value. | |
2cf8e2df CK |
53 | * |
54 | * We use an array of structs rather than a simple array as many modern devices | |
55 | * have very sparse register maps. | |
bd20eb54 MB |
56 | */ |
57 | struct reg_default { | |
58 | unsigned int reg; | |
59 | unsigned int def; | |
60 | }; | |
61 | ||
8019ff6c | 62 | /** |
2cf8e2df | 63 | * struct reg_sequence - An individual write from a sequence of writes. |
8019ff6c NP |
64 | * |
65 | * @reg: Register address. | |
66 | * @def: Register value. | |
2de9d600 | 67 | * @delay_us: Delay to be applied after the register write in microseconds |
2cf8e2df CK |
68 | * |
69 | * Register/value pairs for sequences of writes with an optional delay in | |
70 | * microseconds to be applied after each write. | |
8019ff6c NP |
71 | */ |
72 | struct reg_sequence { | |
73 | unsigned int reg; | |
74 | unsigned int def; | |
2de9d600 | 75 | unsigned int delay_us; |
8019ff6c NP |
76 | }; |
77 | ||
bd3ddb49 MF |
78 | #define REG_SEQ(_reg, _def, _delay_us) { \ |
79 | .reg = _reg, \ | |
80 | .def = _def, \ | |
81 | .delay_us = _delay_us, \ | |
82 | } | |
83 | #define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0) | |
84 | ||
08188ba8 PZ |
85 | /** |
86 | * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs | |
2cf8e2df | 87 | * |
08188ba8 PZ |
88 | * @map: Regmap to read from |
89 | * @addr: Address to poll | |
90 | * @val: Unsigned integer variable to read the value into | |
91 | * @cond: Break condition (usually involving @val) | |
92 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
93 | * tight-loops). Should be less than ~20ms since usleep_range | |
458f69ef | 94 | * is used (see Documentation/timers/timers-howto.rst). |
08188ba8 PZ |
95 | * @timeout_us: Timeout in us, 0 means never timeout |
96 | * | |
97 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read | |
98 | * error return value in case of a error read. In the two former cases, | |
99 | * the last read value at @addr is stored in @val. Must not be called | |
100 | * from atomic context if sleep_us or timeout_us are used. | |
101 | * | |
102 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
103 | */ | |
104 | #define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ | |
105 | ({ \ | |
e44ab4e1 DZ |
106 | int __ret, __tmp; \ |
107 | __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \ | |
108 | sleep_us, timeout_us, false, (map), (addr), &(val)); \ | |
109 | __ret ?: __tmp; \ | |
08188ba8 PZ |
110 | }) |
111 | ||
50816a4c SP |
112 | /** |
113 | * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs | |
114 | * | |
115 | * @map: Regmap to read from | |
116 | * @addr: Address to poll | |
117 | * @val: Unsigned integer variable to read the value into | |
118 | * @cond: Break condition (usually involving @val) | |
119 | * @delay_us: Time to udelay between reads in us (0 tight-loops). | |
120 | * Should be less than ~10us since udelay is used | |
121 | * (see Documentation/timers/timers-howto.rst). | |
122 | * @timeout_us: Timeout in us, 0 means never timeout | |
123 | * | |
124 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read | |
125 | * error return value in case of a error read. In the two former cases, | |
126 | * the last read value at @addr is stored in @val. | |
127 | * | |
128 | * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h. | |
129 | * | |
130 | * Note: In general regmap cannot be used in atomic context. If you want to use | |
131 | * this macro then first setup your regmap for atomic use (flat or no cache | |
132 | * and MMIO regmap). | |
133 | */ | |
134 | #define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \ | |
135 | ({ \ | |
136 | u64 __timeout_us = (timeout_us); \ | |
137 | unsigned long __delay_us = (delay_us); \ | |
138 | ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ | |
139 | int __ret; \ | |
140 | for (;;) { \ | |
141 | __ret = regmap_read((map), (addr), &(val)); \ | |
142 | if (__ret) \ | |
143 | break; \ | |
144 | if (cond) \ | |
145 | break; \ | |
146 | if ((__timeout_us) && \ | |
147 | ktime_compare(ktime_get(), __timeout) > 0) { \ | |
148 | __ret = regmap_read((map), (addr), &(val)); \ | |
149 | break; \ | |
150 | } \ | |
151 | if (__delay_us) \ | |
152 | udelay(__delay_us); \ | |
153 | } \ | |
154 | __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ | |
155 | }) | |
156 | ||
667063ac CYT |
157 | /** |
158 | * regmap_field_read_poll_timeout - Poll until a condition is met or timeout | |
159 | * | |
160 | * @field: Regmap field to read from | |
161 | * @val: Unsigned integer variable to read the value into | |
162 | * @cond: Break condition (usually involving @val) | |
163 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
164 | * tight-loops). Should be less than ~20ms since usleep_range | |
458f69ef | 165 | * is used (see Documentation/timers/timers-howto.rst). |
667063ac CYT |
166 | * @timeout_us: Timeout in us, 0 means never timeout |
167 | * | |
168 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read | |
169 | * error return value in case of a error read. In the two former cases, | |
170 | * the last read value at @addr is stored in @val. Must not be called | |
171 | * from atomic context if sleep_us or timeout_us are used. | |
172 | * | |
173 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
174 | */ | |
175 | #define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \ | |
176 | ({ \ | |
148c01d1 DZ |
177 | int __ret, __tmp; \ |
178 | __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \ | |
179 | sleep_us, timeout_us, false, (field), &(val)); \ | |
180 | __ret ?: __tmp; \ | |
667063ac CYT |
181 | }) |
182 | ||
b83d2ff0 MB |
183 | #ifdef CONFIG_REGMAP |
184 | ||
141eba2e SW |
185 | enum regmap_endian { |
186 | /* Unspecified -> 0 -> Backwards compatible default */ | |
187 | REGMAP_ENDIAN_DEFAULT = 0, | |
188 | REGMAP_ENDIAN_BIG, | |
189 | REGMAP_ENDIAN_LITTLE, | |
190 | REGMAP_ENDIAN_NATIVE, | |
191 | }; | |
192 | ||
76aad392 | 193 | /** |
2cf8e2df CK |
194 | * struct regmap_range - A register range, used for access related checks |
195 | * (readable/writeable/volatile/precious checks) | |
76aad392 DC |
196 | * |
197 | * @range_min: address of first register | |
198 | * @range_max: address of last register | |
199 | */ | |
200 | struct regmap_range { | |
201 | unsigned int range_min; | |
202 | unsigned int range_max; | |
203 | }; | |
204 | ||
6112fe60 LD |
205 | #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } |
206 | ||
2cf8e2df CK |
207 | /** |
208 | * struct regmap_access_table - A table of register ranges for access checks | |
76aad392 DC |
209 | * |
210 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
211 | * @n_yes_ranges: size of the above array | |
212 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
213 | * @n_no_ranges: size of the above array | |
2cf8e2df CK |
214 | * |
215 | * A table of ranges including some yes ranges and some no ranges. | |
216 | * If a register belongs to a no_range, the corresponding check function | |
217 | * will return false. If a register belongs to a yes range, the corresponding | |
218 | * check function will return true. "no_ranges" are searched first. | |
76aad392 DC |
219 | */ |
220 | struct regmap_access_table { | |
221 | const struct regmap_range *yes_ranges; | |
222 | unsigned int n_yes_ranges; | |
223 | const struct regmap_range *no_ranges; | |
224 | unsigned int n_no_ranges; | |
225 | }; | |
226 | ||
0d4529c5 DC |
227 | typedef void (*regmap_lock)(void *); |
228 | typedef void (*regmap_unlock)(void *); | |
229 | ||
dd898b20 | 230 | /** |
2cf8e2df | 231 | * struct regmap_config - Configuration for the register map of a device. |
dd898b20 | 232 | * |
d3c242e1 SW |
233 | * @name: Optional name of the regmap. Useful when a device has multiple |
234 | * register regions. | |
235 | * | |
dd898b20 | 236 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
237 | * @reg_stride: The register address stride. Valid register addresses are a |
238 | * multiple of this value. If set to 0, a value of 1 will be | |
239 | * used. | |
86fc59ef CF |
240 | * @reg_downshift: The number of bits to downshift the register before |
241 | * performing any operations. | |
0074f3f2 CF |
242 | * @reg_base: Value to be added to every register address before performing any |
243 | * operation. | |
82159ba8 | 244 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 245 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 246 | * |
3566cc9d | 247 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
248 | * can be written to. If this field is NULL but wr_table |
249 | * (see below) is not, the check is performed on such table | |
250 | * (a register is writeable if it belongs to one of the ranges | |
251 | * specified by wr_table). | |
3566cc9d | 252 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
253 | * can be read from. If this field is NULL but rd_table |
254 | * (see below) is not, the check is performed on such table | |
255 | * (a register is readable if it belongs to one of the ranges | |
256 | * specified by rd_table). | |
3566cc9d | 257 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
258 | * value can't be cached. If this field is NULL but |
259 | * volatile_table (see below) is not, the check is performed on | |
260 | * such table (a register is volatile if it belongs to one of | |
261 | * the ranges specified by volatile_table). | |
bdc39644 | 262 | * @precious_reg: Optional callback returning true if the register |
76aad392 | 263 | * should not be read outside of a call from the driver |
bdc39644 | 264 | * (e.g., a clear on read interrupt status register). If this |
76aad392 DC |
265 | * field is NULL but precious_table (see below) is not, the |
266 | * check is performed on such table (a register is precious if | |
267 | * it belongs to one of the ranges specified by precious_table). | |
cdf6b11d BW |
268 | * @writeable_noinc_reg: Optional callback returning true if the register |
269 | * supports multiple write operations without incrementing | |
270 | * the register number. If this field is NULL but | |
271 | * wr_noinc_table (see below) is not, the check is | |
272 | * performed on such table (a register is no increment | |
273 | * writeable if it belongs to one of the ranges specified | |
274 | * by wr_noinc_table). | |
74fe7b55 CDL |
275 | * @readable_noinc_reg: Optional callback returning true if the register |
276 | * supports multiple read operations without incrementing | |
277 | * the register number. If this field is NULL but | |
278 | * rd_noinc_table (see below) is not, the check is | |
279 | * performed on such table (a register is no increment | |
280 | * readable if it belongs to one of the ranges specified | |
281 | * by rd_noinc_table). | |
c9b41fcf | 282 | * @disable_locking: This regmap is either protected by external means or |
6611561a | 283 | * is guaranteed not to be accessed from multiple threads. |
c9b41fcf | 284 | * Don't use any locking mechanisms. |
76aad392 DC |
285 | * @lock: Optional lock callback (overrides regmap's default lock |
286 | * function, based on spinlock or mutex). | |
287 | * @unlock: As above for unlocking. | |
288 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
289 | * functions (ignored in case regular lock/unlock functions | |
290 | * are not overridden). | |
d2a5884a AS |
291 | * @reg_read: Optional callback that if filled will be used to perform |
292 | * all the reads from the registers. Should only be provided for | |
bdc39644 LP |
293 | * devices whose read operation cannot be represented as a simple |
294 | * read operation on a bus such as SPI, I2C, etc. Most of the | |
295 | * devices do not need this. | |
d2a5884a | 296 | * @reg_write: Same as above for writing. |
02d6fdec AS |
297 | * @reg_update_bits: Optional callback that if filled will be used to perform |
298 | * all the update_bits(rmw) operation. Should only be provided | |
299 | * if the function require special handling with lock and reg | |
300 | * handling and the operation cannot be represented as a simple | |
301 | * update_bits operation on a bus such as SPI, I2C, etc. | |
d2a5884a AS |
302 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
303 | * to perform locking. This field is ignored if custom lock/unlock | |
304 | * functions are used (see fields lock/unlock of struct regmap_config). | |
305 | * This field is a duplicate of a similar file in | |
306 | * 'struct regmap_bus' and serves exact same purpose. | |
307 | * Use it only for "no-bus" cases. | |
b429fab4 | 308 | * @max_register: Optional, specifies the maximum valid register address. |
76aad392 DC |
309 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
310 | * valid ranges for write access. | |
311 | * @rd_table: As above, for read access. | |
312 | * @volatile_table: As above, for volatile registers. | |
313 | * @precious_table: As above, for precious registers. | |
cdf6b11d | 314 | * @wr_noinc_table: As above, for no increment writeable registers. |
74fe7b55 | 315 | * @rd_noinc_table: As above, for no increment readable registers. |
bd20eb54 MB |
316 | * @reg_defaults: Power on reset values for registers (for use with |
317 | * register cache support). | |
318 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 | 319 | * |
f50e38c9 | 320 | * @read_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 | 321 | * a read. |
f50e38c9 | 322 | * @write_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 | 323 | * a write. If both read_flag_mask and write_flag_mask are |
9bf485c9 AD |
324 | * empty and zero_flag_mask is not set the regmap_bus default |
325 | * masks are used. | |
326 | * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even | |
327 | * if they are both empty. | |
6e1e90ec AR |
328 | * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers. |
329 | * This can avoid load on devices which don't require strict | |
330 | * orderings, but drivers should carefully add any explicit | |
331 | * memory barriers when they may require them. | |
1c96a2f6 DF |
332 | * @use_single_read: If set, converts the bulk read operation into a series of |
333 | * single read operations. This is useful for a device that | |
334 | * does not support bulk read. | |
335 | * @use_single_write: If set, converts the bulk write operation into a series of | |
336 | * single write operations. This is useful for a device that | |
337 | * does not support bulk write. | |
e894c3f4 OAO |
338 | * @can_multi_write: If set, the device supports the multi write mode of bulk |
339 | * write operations, if clear multi write requests will be | |
340 | * split into individual write operations | |
9fabe24e DP |
341 | * |
342 | * @cache_type: The actual cache type. | |
343 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
344 | * register cache support). | |
345 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
346 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
347 | * DEFAULT, the @reg_format_endian_default value from the | |
348 | * regmap bus is used. | |
349 | * @val_format_endian: Endianness for formatted register values. If this is | |
350 | * DEFAULT, the @reg_format_endian_default value from the | |
351 | * regmap bus is used. | |
6863ca62 KG |
352 | * |
353 | * @ranges: Array of configuration entries for virtual address ranges. | |
354 | * @num_ranges: Number of range configuration entries. | |
a4887813 | 355 | * @use_hwlock: Indicate if a hardware spinlock should be used. |
67021f25 | 356 | * @use_raw_spinlock: Indicate if a raw spinlock should be used. |
8698b936 BW |
357 | * @hwlock_id: Specify the hardware spinlock id. |
358 | * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE, | |
359 | * HWLOCK_IRQ or 0. | |
21f8e482 | 360 | * @can_sleep: Optional, specifies whether regmap operations can sleep. |
dd898b20 | 361 | */ |
b83a313b | 362 | struct regmap_config { |
d3c242e1 SW |
363 | const char *name; |
364 | ||
b83a313b | 365 | int reg_bits; |
f01ee60f | 366 | int reg_stride; |
86fc59ef | 367 | int reg_downshift; |
0074f3f2 | 368 | unsigned int reg_base; |
82159ba8 | 369 | int pad_bits; |
b83a313b | 370 | int val_bits; |
2e2ae66d | 371 | |
2e2ae66d MB |
372 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
373 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
374 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 375 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
cdf6b11d | 376 | bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg); |
74fe7b55 | 377 | bool (*readable_noinc_reg)(struct device *dev, unsigned int reg); |
c9b41fcf BG |
378 | |
379 | bool disable_locking; | |
0d4529c5 DC |
380 | regmap_lock lock; |
381 | regmap_unlock unlock; | |
382 | void *lock_arg; | |
bd20eb54 | 383 | |
d2a5884a AS |
384 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
385 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
02d6fdec AS |
386 | int (*reg_update_bits)(void *context, unsigned int reg, |
387 | unsigned int mask, unsigned int val); | |
d2a5884a AS |
388 | |
389 | bool fast_io; | |
390 | ||
bd20eb54 | 391 | unsigned int max_register; |
76aad392 DC |
392 | const struct regmap_access_table *wr_table; |
393 | const struct regmap_access_table *rd_table; | |
394 | const struct regmap_access_table *volatile_table; | |
395 | const struct regmap_access_table *precious_table; | |
cdf6b11d | 396 | const struct regmap_access_table *wr_noinc_table; |
74fe7b55 | 397 | const struct regmap_access_table *rd_noinc_table; |
720e4616 | 398 | const struct reg_default *reg_defaults; |
9fabe24e DP |
399 | unsigned int num_reg_defaults; |
400 | enum regcache_type cache_type; | |
401 | const void *reg_defaults_raw; | |
402 | unsigned int num_reg_defaults_raw; | |
6f306441 | 403 | |
f50e38c9 TL |
404 | unsigned long read_flag_mask; |
405 | unsigned long write_flag_mask; | |
9bf485c9 | 406 | bool zero_flag_mask; |
2e33caf1 | 407 | |
1c96a2f6 DF |
408 | bool use_single_read; |
409 | bool use_single_write; | |
6e1e90ec | 410 | bool use_relaxed_mmio; |
e894c3f4 | 411 | bool can_multi_write; |
141eba2e SW |
412 | |
413 | enum regmap_endian reg_format_endian; | |
414 | enum regmap_endian val_format_endian; | |
38e23194 | 415 | |
6863ca62 | 416 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 417 | unsigned int num_ranges; |
8698b936 | 418 | |
a4887813 | 419 | bool use_hwlock; |
67021f25 | 420 | bool use_raw_spinlock; |
8698b936 BW |
421 | unsigned int hwlock_id; |
422 | unsigned int hwlock_mode; | |
21f8e482 DO |
423 | |
424 | bool can_sleep; | |
6863ca62 KG |
425 | }; |
426 | ||
427 | /** | |
2cf8e2df CK |
428 | * struct regmap_range_cfg - Configuration for indirectly accessed or paged |
429 | * registers. | |
6863ca62 | 430 | * |
d058bb49 MB |
431 | * @name: Descriptive name for diagnostics |
432 | * | |
6863ca62 KG |
433 | * @range_min: Address of the lowest register address in virtual range. |
434 | * @range_max: Address of the highest register in virtual range. | |
435 | * | |
2cf8e2df | 436 | * @selector_reg: Register with selector field. |
ad5906bd PL |
437 | * @selector_mask: Bit mask for selector value. |
438 | * @selector_shift: Bit shift for selector value. | |
6863ca62 KG |
439 | * |
440 | * @window_start: Address of first (lowest) register in data window. | |
441 | * @window_len: Number of registers in data window. | |
2cf8e2df CK |
442 | * |
443 | * Registers, mapped to this virtual range, are accessed in two steps: | |
444 | * 1. page selector register update; | |
445 | * 2. access through data window registers. | |
6863ca62 KG |
446 | */ |
447 | struct regmap_range_cfg { | |
d058bb49 MB |
448 | const char *name; |
449 | ||
6863ca62 KG |
450 | /* Registers of virtual address range */ |
451 | unsigned int range_min; | |
452 | unsigned int range_max; | |
453 | ||
454 | /* Page selector for indirect addressing */ | |
455 | unsigned int selector_reg; | |
456 | unsigned int selector_mask; | |
457 | int selector_shift; | |
458 | ||
459 | /* Data window (per each page) */ | |
460 | unsigned int window_start; | |
461 | unsigned int window_len; | |
b83a313b MB |
462 | }; |
463 | ||
0d509f2b MB |
464 | struct regmap_async; |
465 | ||
0135bbcc | 466 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 467 | size_t count); |
0135bbcc | 468 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
469 | const void *reg, size_t reg_len, |
470 | const void *val, size_t val_len); | |
0d509f2b MB |
471 | typedef int (*regmap_hw_async_write)(void *context, |
472 | const void *reg, size_t reg_len, | |
473 | const void *val, size_t val_len, | |
474 | struct regmap_async *async); | |
0135bbcc | 475 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
476 | const void *reg_buf, size_t reg_size, |
477 | void *val_buf, size_t val_size); | |
3ac17037 BB |
478 | typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, |
479 | unsigned int *val); | |
480 | typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, | |
481 | unsigned int val); | |
77792b11 JR |
482 | typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, |
483 | unsigned int mask, unsigned int val); | |
0d509f2b | 484 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 485 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
486 | |
487 | /** | |
2cf8e2df CK |
488 | * struct regmap_bus - Description of a hardware bus for the register map |
489 | * infrastructure. | |
b83a313b | 490 | * |
bacdbe07 | 491 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
492 | * to perform locking. This field is ignored if custom lock/unlock |
493 | * functions are used (see fields lock/unlock of | |
494 | * struct regmap_config). | |
b83a313b MB |
495 | * @write: Write operation. |
496 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
497 | * if not implemented on a given device. | |
0d509f2b MB |
498 | * @async_write: Write operation which completes asynchronously, optional and |
499 | * must serialise with respect to non-async I/O. | |
c5f58f2d MP |
500 | * @reg_write: Write a single register value to the given register address. This |
501 | * write operation has to complete when returning from the function. | |
2cf8e2df CK |
502 | * @reg_update_bits: Update bits operation to be used against volatile |
503 | * registers, intended for devices supporting some mechanism | |
504 | * for setting clearing bits without having to | |
505 | * read/modify/write. | |
b83a313b MB |
506 | * @read: Read operation. Data is returned in the buffer used to transmit |
507 | * data. | |
c5f58f2d MP |
508 | * @reg_read: Read a single register value from a given register address. |
509 | * @free_context: Free context. | |
0d509f2b | 510 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
511 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
512 | * a read. | |
141eba2e SW |
513 | * @reg_format_endian_default: Default endianness for formatted register |
514 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
515 | * DEFAULT, BIG is assumed. | |
516 | * @val_format_endian_default: Default endianness for formatted register | |
517 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
518 | * DEFAULT, BIG is assumed. | |
adaac459 MP |
519 | * @max_raw_read: Max raw read size that can be used on the bus. |
520 | * @max_raw_write: Max raw write size that can be used on the bus. | |
ea030ca6 | 521 | * @free_on_exit: kfree this on exit of regmap |
b83a313b MB |
522 | */ |
523 | struct regmap_bus { | |
bacdbe07 | 524 | bool fast_io; |
b83a313b MB |
525 | regmap_hw_write write; |
526 | regmap_hw_gather_write gather_write; | |
0d509f2b | 527 | regmap_hw_async_write async_write; |
3ac17037 | 528 | regmap_hw_reg_write reg_write; |
77792b11 | 529 | regmap_hw_reg_update_bits reg_update_bits; |
b83a313b | 530 | regmap_hw_read read; |
3ac17037 | 531 | regmap_hw_reg_read reg_read; |
0135bbcc | 532 | regmap_hw_free_context free_context; |
0d509f2b | 533 | regmap_hw_async_alloc async_alloc; |
b83a313b | 534 | u8 read_flag_mask; |
141eba2e SW |
535 | enum regmap_endian reg_format_endian_default; |
536 | enum regmap_endian val_format_endian_default; | |
adaac459 MP |
537 | size_t max_raw_read; |
538 | size_t max_raw_write; | |
ea030ca6 | 539 | bool free_on_exit; |
b83a313b MB |
540 | }; |
541 | ||
3cfe7a74 NB |
542 | /* |
543 | * __regmap_init functions. | |
544 | * | |
545 | * These functions take a lock key and name parameter, and should not be called | |
546 | * directly. Instead, use the regmap_init macros that generate a key and name | |
547 | * for each call. | |
548 | */ | |
549 | struct regmap *__regmap_init(struct device *dev, | |
550 | const struct regmap_bus *bus, | |
551 | void *bus_context, | |
552 | const struct regmap_config *config, | |
553 | struct lock_class_key *lock_key, | |
554 | const char *lock_name); | |
555 | struct regmap *__regmap_init_i2c(struct i2c_client *i2c, | |
556 | const struct regmap_config *config, | |
557 | struct lock_class_key *lock_key, | |
558 | const char *lock_name); | |
1f89d2fe SV |
559 | struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev, |
560 | const struct regmap_config *config, | |
561 | struct lock_class_key *lock_key, | |
562 | const char *lock_name); | |
bcf7eac3 AM |
563 | struct regmap *__regmap_init_sccb(struct i2c_client *i2c, |
564 | const struct regmap_config *config, | |
565 | struct lock_class_key *lock_key, | |
566 | const char *lock_name); | |
7d6f7fb0 SK |
567 | struct regmap *__regmap_init_slimbus(struct slim_device *slimbus, |
568 | const struct regmap_config *config, | |
569 | struct lock_class_key *lock_key, | |
570 | const char *lock_name); | |
3cfe7a74 NB |
571 | struct regmap *__regmap_init_spi(struct spi_device *dev, |
572 | const struct regmap_config *config, | |
573 | struct lock_class_key *lock_key, | |
574 | const char *lock_name); | |
575 | struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, | |
576 | const struct regmap_config *config, | |
577 | struct lock_class_key *lock_key, | |
578 | const char *lock_name); | |
579 | struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, | |
580 | const struct regmap_config *config, | |
581 | struct lock_class_key *lock_key, | |
582 | const char *lock_name); | |
cc5d0db3 AM |
583 | struct regmap *__regmap_init_w1(struct device *w1_dev, |
584 | const struct regmap_config *config, | |
585 | struct lock_class_key *lock_key, | |
586 | const char *lock_name); | |
3cfe7a74 NB |
587 | struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
588 | void __iomem *regs, | |
589 | const struct regmap_config *config, | |
590 | struct lock_class_key *lock_key, | |
591 | const char *lock_name); | |
592 | struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, | |
593 | const struct regmap_config *config, | |
594 | struct lock_class_key *lock_key, | |
595 | const char *lock_name); | |
7c22ce6e VK |
596 | struct regmap *__regmap_init_sdw(struct sdw_slave *sdw, |
597 | const struct regmap_config *config, | |
598 | struct lock_class_key *lock_key, | |
599 | const char *lock_name); | |
fb5103f9 PLB |
600 | struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw, |
601 | const struct regmap_config *config, | |
602 | struct lock_class_key *lock_key, | |
603 | const char *lock_name); | |
7f9fb673 XY |
604 | struct regmap *__regmap_init_spi_avmm(struct spi_device *spi, |
605 | const struct regmap_config *config, | |
606 | struct lock_class_key *lock_key, | |
607 | const char *lock_name); | |
3cfe7a74 NB |
608 | |
609 | struct regmap *__devm_regmap_init(struct device *dev, | |
610 | const struct regmap_bus *bus, | |
611 | void *bus_context, | |
612 | const struct regmap_config *config, | |
613 | struct lock_class_key *lock_key, | |
614 | const char *lock_name); | |
615 | struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, | |
616 | const struct regmap_config *config, | |
617 | struct lock_class_key *lock_key, | |
618 | const char *lock_name); | |
1f89d2fe SV |
619 | struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev, |
620 | const struct regmap_config *config, | |
621 | struct lock_class_key *lock_key, | |
622 | const char *lock_name); | |
bcf7eac3 AM |
623 | struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c, |
624 | const struct regmap_config *config, | |
625 | struct lock_class_key *lock_key, | |
626 | const char *lock_name); | |
3cfe7a74 NB |
627 | struct regmap *__devm_regmap_init_spi(struct spi_device *dev, |
628 | const struct regmap_config *config, | |
629 | struct lock_class_key *lock_key, | |
630 | const char *lock_name); | |
631 | struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, | |
632 | const struct regmap_config *config, | |
633 | struct lock_class_key *lock_key, | |
634 | const char *lock_name); | |
635 | struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, | |
636 | const struct regmap_config *config, | |
637 | struct lock_class_key *lock_key, | |
638 | const char *lock_name); | |
cc5d0db3 AM |
639 | struct regmap *__devm_regmap_init_w1(struct device *w1_dev, |
640 | const struct regmap_config *config, | |
641 | struct lock_class_key *lock_key, | |
642 | const char *lock_name); | |
3cfe7a74 NB |
643 | struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, |
644 | const char *clk_id, | |
645 | void __iomem *regs, | |
646 | const struct regmap_config *config, | |
647 | struct lock_class_key *lock_key, | |
648 | const char *lock_name); | |
649 | struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, | |
650 | const struct regmap_config *config, | |
651 | struct lock_class_key *lock_key, | |
652 | const char *lock_name); | |
7c22ce6e VK |
653 | struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw, |
654 | const struct regmap_config *config, | |
655 | struct lock_class_key *lock_key, | |
656 | const char *lock_name); | |
fb5103f9 PLB |
657 | struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw, |
658 | const struct regmap_config *config, | |
659 | struct lock_class_key *lock_key, | |
660 | const char *lock_name); | |
ed24d568 SK |
661 | struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus, |
662 | const struct regmap_config *config, | |
663 | struct lock_class_key *lock_key, | |
664 | const char *lock_name); | |
6445500b VS |
665 | struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, |
666 | const struct regmap_config *config, | |
667 | struct lock_class_key *lock_key, | |
668 | const char *lock_name); | |
7f9fb673 XY |
669 | struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi, |
670 | const struct regmap_config *config, | |
671 | struct lock_class_key *lock_key, | |
672 | const char *lock_name); | |
3cfe7a74 NB |
673 | /* |
674 | * Wrapper for regmap_init macros to include a unique lockdep key and name | |
675 | * for each call. No-op if CONFIG_LOCKDEP is not set. | |
676 | * | |
677 | * @fn: Real function to call (in the form __[*_]regmap_init[_*]) | |
678 | * @name: Config variable name (#config in the calling macro) | |
679 | **/ | |
680 | #ifdef CONFIG_LOCKDEP | |
681 | #define __regmap_lockdep_wrapper(fn, name, ...) \ | |
682 | ( \ | |
683 | ({ \ | |
684 | static struct lock_class_key _key; \ | |
685 | fn(__VA_ARGS__, &_key, \ | |
686 | KBUILD_BASENAME ":" \ | |
687 | __stringify(__LINE__) ":" \ | |
688 | "(" name ")->lock"); \ | |
689 | }) \ | |
690 | ) | |
691 | #else | |
692 | #define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) | |
693 | #endif | |
694 | ||
1ed81114 | 695 | /** |
2cf8e2df | 696 | * regmap_init() - Initialise register map |
1ed81114 NB |
697 | * |
698 | * @dev: Device that will be interacted with | |
699 | * @bus: Bus-specific callbacks to use with device | |
700 | * @bus_context: Data passed to bus-specific callbacks | |
701 | * @config: Configuration for register map | |
702 | * | |
703 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
704 | * a struct regmap. This function should generally not be called | |
705 | * directly, it should be called by bus-specific init functions. | |
706 | */ | |
3cfe7a74 NB |
707 | #define regmap_init(dev, bus, bus_context, config) \ |
708 | __regmap_lockdep_wrapper(__regmap_init, #config, \ | |
709 | dev, bus, bus_context, config) | |
6cfec04b | 710 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
3cfe7a74 | 711 | const struct regmap_config *config); |
22853223 | 712 | |
1ed81114 | 713 | /** |
2cf8e2df | 714 | * regmap_init_i2c() - Initialise register map |
1ed81114 NB |
715 | * |
716 | * @i2c: Device that will be interacted with | |
717 | * @config: Configuration for register map | |
718 | * | |
719 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
720 | * a struct regmap. | |
721 | */ | |
3cfe7a74 NB |
722 | #define regmap_init_i2c(i2c, config) \ |
723 | __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ | |
724 | i2c, config) | |
1ed81114 | 725 | |
1f89d2fe SV |
726 | /** |
727 | * regmap_init_mdio() - Initialise register map | |
728 | * | |
729 | * @mdio_dev: Device that will be interacted with | |
730 | * @config: Configuration for register map | |
731 | * | |
732 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
733 | * a struct regmap. | |
734 | */ | |
735 | #define regmap_init_mdio(mdio_dev, config) \ | |
736 | __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \ | |
737 | mdio_dev, config) | |
738 | ||
bcf7eac3 AM |
739 | /** |
740 | * regmap_init_sccb() - Initialise register map | |
741 | * | |
742 | * @i2c: Device that will be interacted with | |
743 | * @config: Configuration for register map | |
744 | * | |
745 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
746 | * a struct regmap. | |
747 | */ | |
748 | #define regmap_init_sccb(i2c, config) \ | |
749 | __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \ | |
750 | i2c, config) | |
751 | ||
7d6f7fb0 SK |
752 | /** |
753 | * regmap_init_slimbus() - Initialise register map | |
754 | * | |
755 | * @slimbus: Device that will be interacted with | |
756 | * @config: Configuration for register map | |
757 | * | |
758 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
759 | * a struct regmap. | |
760 | */ | |
761 | #define regmap_init_slimbus(slimbus, config) \ | |
762 | __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \ | |
763 | slimbus, config) | |
764 | ||
1ed81114 | 765 | /** |
2cf8e2df | 766 | * regmap_init_spi() - Initialise register map |
1ed81114 | 767 | * |
2cf8e2df | 768 | * @dev: Device that will be interacted with |
1ed81114 NB |
769 | * @config: Configuration for register map |
770 | * | |
771 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
772 | * a struct regmap. | |
773 | */ | |
3cfe7a74 NB |
774 | #define regmap_init_spi(dev, config) \ |
775 | __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ | |
776 | dev, config) | |
1ed81114 NB |
777 | |
778 | /** | |
2cf8e2df CK |
779 | * regmap_init_spmi_base() - Create regmap for the Base register space |
780 | * | |
781 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
782 | * @config: Configuration for register map |
783 | * | |
784 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
785 | * a struct regmap. | |
786 | */ | |
3cfe7a74 NB |
787 | #define regmap_init_spmi_base(dev, config) \ |
788 | __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ | |
789 | dev, config) | |
1ed81114 NB |
790 | |
791 | /** | |
2cf8e2df CK |
792 | * regmap_init_spmi_ext() - Create regmap for Ext register space |
793 | * | |
794 | * @dev: Device that will be interacted with | |
1ed81114 NB |
795 | * @config: Configuration for register map |
796 | * | |
797 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
798 | * a struct regmap. | |
799 | */ | |
3cfe7a74 NB |
800 | #define regmap_init_spmi_ext(dev, config) \ |
801 | __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ | |
802 | dev, config) | |
1ed81114 | 803 | |
cc5d0db3 AM |
804 | /** |
805 | * regmap_init_w1() - Initialise register map | |
806 | * | |
807 | * @w1_dev: Device that will be interacted with | |
808 | * @config: Configuration for register map | |
809 | * | |
810 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
811 | * a struct regmap. | |
812 | */ | |
813 | #define regmap_init_w1(w1_dev, config) \ | |
814 | __regmap_lockdep_wrapper(__regmap_init_w1, #config, \ | |
815 | w1_dev, config) | |
816 | ||
1ed81114 | 817 | /** |
2cf8e2df | 818 | * regmap_init_mmio_clk() - Initialise register map with register clock |
1ed81114 NB |
819 | * |
820 | * @dev: Device that will be interacted with | |
821 | * @clk_id: register clock consumer ID | |
822 | * @regs: Pointer to memory-mapped IO region | |
823 | * @config: Configuration for register map | |
824 | * | |
825 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
826 | * a struct regmap. | |
827 | */ | |
3cfe7a74 NB |
828 | #define regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
829 | __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ | |
830 | dev, clk_id, regs, config) | |
878ec67b PZ |
831 | |
832 | /** | |
2cf8e2df | 833 | * regmap_init_mmio() - Initialise register map |
878ec67b PZ |
834 | * |
835 | * @dev: Device that will be interacted with | |
836 | * @regs: Pointer to memory-mapped IO region | |
837 | * @config: Configuration for register map | |
838 | * | |
839 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
840 | * a struct regmap. | |
841 | */ | |
1ed81114 NB |
842 | #define regmap_init_mmio(dev, regs, config) \ |
843 | regmap_init_mmio_clk(dev, NULL, regs, config) | |
844 | ||
845 | /** | |
2cf8e2df | 846 | * regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
847 | * |
848 | * @ac97: Device that will be interacted with | |
849 | * @config: Configuration for register map | |
850 | * | |
851 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
852 | * a struct regmap. | |
853 | */ | |
3cfe7a74 NB |
854 | #define regmap_init_ac97(ac97, config) \ |
855 | __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ | |
856 | ac97, config) | |
22853223 | 857 | bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); |
878ec67b | 858 | |
7c22ce6e VK |
859 | /** |
860 | * regmap_init_sdw() - Initialise register map | |
861 | * | |
862 | * @sdw: Device that will be interacted with | |
863 | * @config: Configuration for register map | |
864 | * | |
865 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
866 | * a struct regmap. | |
867 | */ | |
868 | #define regmap_init_sdw(sdw, config) \ | |
869 | __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \ | |
870 | sdw, config) | |
871 | ||
fb5103f9 PLB |
872 | /** |
873 | * regmap_init_sdw_mbq() - Initialise register map | |
874 | * | |
875 | * @sdw: Device that will be interacted with | |
876 | * @config: Configuration for register map | |
877 | * | |
878 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
879 | * a struct regmap. | |
880 | */ | |
881 | #define regmap_init_sdw_mbq(sdw, config) \ | |
882 | __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \ | |
883 | sdw, config) | |
884 | ||
7f9fb673 XY |
885 | /** |
886 | * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave | |
887 | * to AVMM Bus Bridge | |
888 | * | |
889 | * @spi: Device that will be interacted with | |
890 | * @config: Configuration for register map | |
891 | * | |
892 | * The return value will be an ERR_PTR() on error or a valid pointer | |
893 | * to a struct regmap. | |
894 | */ | |
895 | #define regmap_init_spi_avmm(spi, config) \ | |
896 | __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \ | |
897 | spi, config) | |
7c22ce6e | 898 | |
1ed81114 | 899 | /** |
2cf8e2df | 900 | * devm_regmap_init() - Initialise managed register map |
1ed81114 NB |
901 | * |
902 | * @dev: Device that will be interacted with | |
903 | * @bus: Bus-specific callbacks to use with device | |
904 | * @bus_context: Data passed to bus-specific callbacks | |
905 | * @config: Configuration for register map | |
906 | * | |
907 | * The return value will be an ERR_PTR() on error or a valid pointer | |
908 | * to a struct regmap. This function should generally not be called | |
909 | * directly, it should be called by bus-specific init functions. The | |
910 | * map will be automatically freed by the device management code. | |
911 | */ | |
3cfe7a74 NB |
912 | #define devm_regmap_init(dev, bus, bus_context, config) \ |
913 | __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ | |
914 | dev, bus, bus_context, config) | |
1ed81114 NB |
915 | |
916 | /** | |
2cf8e2df | 917 | * devm_regmap_init_i2c() - Initialise managed register map |
1ed81114 NB |
918 | * |
919 | * @i2c: Device that will be interacted with | |
920 | * @config: Configuration for register map | |
921 | * | |
922 | * The return value will be an ERR_PTR() on error or a valid pointer | |
923 | * to a struct regmap. The regmap will be automatically freed by the | |
924 | * device management code. | |
925 | */ | |
3cfe7a74 NB |
926 | #define devm_regmap_init_i2c(i2c, config) \ |
927 | __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ | |
928 | i2c, config) | |
1ed81114 | 929 | |
1f89d2fe SV |
930 | /** |
931 | * devm_regmap_init_mdio() - Initialise managed register map | |
932 | * | |
933 | * @mdio_dev: Device that will be interacted with | |
934 | * @config: Configuration for register map | |
935 | * | |
936 | * The return value will be an ERR_PTR() on error or a valid pointer | |
937 | * to a struct regmap. The regmap will be automatically freed by the | |
938 | * device management code. | |
939 | */ | |
940 | #define devm_regmap_init_mdio(mdio_dev, config) \ | |
941 | __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \ | |
942 | mdio_dev, config) | |
943 | ||
bcf7eac3 AM |
944 | /** |
945 | * devm_regmap_init_sccb() - Initialise managed register map | |
946 | * | |
947 | * @i2c: Device that will be interacted with | |
948 | * @config: Configuration for register map | |
949 | * | |
950 | * The return value will be an ERR_PTR() on error or a valid pointer | |
951 | * to a struct regmap. The regmap will be automatically freed by the | |
952 | * device management code. | |
953 | */ | |
954 | #define devm_regmap_init_sccb(i2c, config) \ | |
955 | __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \ | |
956 | i2c, config) | |
957 | ||
1ed81114 | 958 | /** |
2cf8e2df | 959 | * devm_regmap_init_spi() - Initialise register map |
1ed81114 | 960 | * |
2cf8e2df | 961 | * @dev: Device that will be interacted with |
1ed81114 NB |
962 | * @config: Configuration for register map |
963 | * | |
964 | * The return value will be an ERR_PTR() on error or a valid pointer | |
965 | * to a struct regmap. The map will be automatically freed by the | |
966 | * device management code. | |
967 | */ | |
3cfe7a74 NB |
968 | #define devm_regmap_init_spi(dev, config) \ |
969 | __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ | |
970 | dev, config) | |
1ed81114 NB |
971 | |
972 | /** | |
2cf8e2df CK |
973 | * devm_regmap_init_spmi_base() - Create managed regmap for Base register space |
974 | * | |
975 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
976 | * @config: Configuration for register map |
977 | * | |
978 | * The return value will be an ERR_PTR() on error or a valid pointer | |
979 | * to a struct regmap. The regmap will be automatically freed by the | |
980 | * device management code. | |
981 | */ | |
3cfe7a74 NB |
982 | #define devm_regmap_init_spmi_base(dev, config) \ |
983 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ | |
984 | dev, config) | |
1ed81114 NB |
985 | |
986 | /** | |
2cf8e2df CK |
987 | * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space |
988 | * | |
989 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
990 | * @config: Configuration for register map |
991 | * | |
992 | * The return value will be an ERR_PTR() on error or a valid pointer | |
993 | * to a struct regmap. The regmap will be automatically freed by the | |
994 | * device management code. | |
995 | */ | |
3cfe7a74 NB |
996 | #define devm_regmap_init_spmi_ext(dev, config) \ |
997 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ | |
998 | dev, config) | |
3cfe7a74 | 999 | |
cc5d0db3 AM |
1000 | /** |
1001 | * devm_regmap_init_w1() - Initialise managed register map | |
1002 | * | |
1003 | * @w1_dev: Device that will be interacted with | |
1004 | * @config: Configuration for register map | |
1005 | * | |
1006 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1007 | * to a struct regmap. The regmap will be automatically freed by the | |
1008 | * device management code. | |
1009 | */ | |
1010 | #define devm_regmap_init_w1(w1_dev, config) \ | |
1011 | __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \ | |
1012 | w1_dev, config) | |
878ec67b | 1013 | /** |
2cf8e2df | 1014 | * devm_regmap_init_mmio_clk() - Initialise managed register map with clock |
878ec67b PZ |
1015 | * |
1016 | * @dev: Device that will be interacted with | |
1ed81114 | 1017 | * @clk_id: register clock consumer ID |
878ec67b PZ |
1018 | * @regs: Pointer to memory-mapped IO region |
1019 | * @config: Configuration for register map | |
1020 | * | |
1ed81114 NB |
1021 | * The return value will be an ERR_PTR() on error or a valid pointer |
1022 | * to a struct regmap. The regmap will be automatically freed by the | |
1023 | * device management code. | |
878ec67b | 1024 | */ |
1ed81114 NB |
1025 | #define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
1026 | __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ | |
1027 | dev, clk_id, regs, config) | |
878ec67b PZ |
1028 | |
1029 | /** | |
2cf8e2df | 1030 | * devm_regmap_init_mmio() - Initialise managed register map |
878ec67b PZ |
1031 | * |
1032 | * @dev: Device that will be interacted with | |
1033 | * @regs: Pointer to memory-mapped IO region | |
1034 | * @config: Configuration for register map | |
1035 | * | |
1036 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1037 | * to a struct regmap. The regmap will be automatically freed by the | |
1038 | * device management code. | |
1039 | */ | |
3cfe7a74 NB |
1040 | #define devm_regmap_init_mmio(dev, regs, config) \ |
1041 | devm_regmap_init_mmio_clk(dev, NULL, regs, config) | |
c0eb4676 | 1042 | |
1ed81114 | 1043 | /** |
2cf8e2df | 1044 | * devm_regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
1045 | * |
1046 | * @ac97: Device that will be interacted with | |
1047 | * @config: Configuration for register map | |
1048 | * | |
1049 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1050 | * to a struct regmap. The regmap will be automatically freed by the | |
1051 | * device management code. | |
1052 | */ | |
1053 | #define devm_regmap_init_ac97(ac97, config) \ | |
1054 | __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ | |
1055 | ac97, config) | |
c0eb4676 | 1056 | |
7c22ce6e VK |
1057 | /** |
1058 | * devm_regmap_init_sdw() - Initialise managed register map | |
1059 | * | |
1060 | * @sdw: Device that will be interacted with | |
1061 | * @config: Configuration for register map | |
1062 | * | |
1063 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1064 | * to a struct regmap. The regmap will be automatically freed by the | |
1065 | * device management code. | |
1066 | */ | |
1067 | #define devm_regmap_init_sdw(sdw, config) \ | |
1068 | __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \ | |
1069 | sdw, config) | |
1070 | ||
fb5103f9 PLB |
1071 | /** |
1072 | * devm_regmap_init_sdw_mbq() - Initialise managed register map | |
1073 | * | |
1074 | * @sdw: Device that will be interacted with | |
1075 | * @config: Configuration for register map | |
1076 | * | |
1077 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1078 | * to a struct regmap. The regmap will be automatically freed by the | |
1079 | * device management code. | |
1080 | */ | |
1081 | #define devm_regmap_init_sdw_mbq(sdw, config) \ | |
1082 | __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \ | |
1083 | sdw, config) | |
1084 | ||
ed24d568 SK |
1085 | /** |
1086 | * devm_regmap_init_slimbus() - Initialise managed register map | |
1087 | * | |
1088 | * @slimbus: Device that will be interacted with | |
1089 | * @config: Configuration for register map | |
1090 | * | |
1091 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1092 | * to a struct regmap. The regmap will be automatically freed by the | |
1093 | * device management code. | |
1094 | */ | |
1095 | #define devm_regmap_init_slimbus(slimbus, config) \ | |
1096 | __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \ | |
1097 | slimbus, config) | |
6445500b VS |
1098 | |
1099 | /** | |
1100 | * devm_regmap_init_i3c() - Initialise managed register map | |
1101 | * | |
1102 | * @i3c: Device that will be interacted with | |
1103 | * @config: Configuration for register map | |
1104 | * | |
1105 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1106 | * to a struct regmap. The regmap will be automatically freed by the | |
1107 | * device management code. | |
1108 | */ | |
1109 | #define devm_regmap_init_i3c(i3c, config) \ | |
1110 | __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \ | |
1111 | i3c, config) | |
1112 | ||
7f9fb673 XY |
1113 | /** |
1114 | * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave | |
1115 | * to AVMM Bus Bridge | |
1116 | * | |
1117 | * @spi: Device that will be interacted with | |
1118 | * @config: Configuration for register map | |
1119 | * | |
1120 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1121 | * to a struct regmap. The map will be automatically freed by the | |
1122 | * device management code. | |
1123 | */ | |
1124 | #define devm_regmap_init_spi_avmm(spi, config) \ | |
1125 | __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \ | |
1126 | spi, config) | |
1127 | ||
31895662 MR |
1128 | int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk); |
1129 | void regmap_mmio_detach_clk(struct regmap *map); | |
b83a313b | 1130 | void regmap_exit(struct regmap *map); |
bf315173 MB |
1131 | int regmap_reinit_cache(struct regmap *map, |
1132 | const struct regmap_config *config); | |
72b39f6f | 1133 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
8d7d3972 | 1134 | struct device *regmap_get_device(struct regmap *map); |
b83a313b | 1135 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
915f441b | 1136 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); |
b83a313b MB |
1137 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
1138 | const void *val, size_t val_len); | |
cdf6b11d BW |
1139 | int regmap_noinc_write(struct regmap *map, unsigned int reg, |
1140 | const void *val, size_t val_len); | |
8eaeb219 LD |
1141 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
1142 | size_t val_count); | |
8019ff6c | 1143 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
e33fabd3 | 1144 | int num_regs); |
1d5b40bc | 1145 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
8019ff6c | 1146 | const struct reg_sequence *regs, |
1d5b40bc | 1147 | int num_regs); |
0d509f2b MB |
1148 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
1149 | const void *val, size_t val_len); | |
b83a313b MB |
1150 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
1151 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
1152 | void *val, size_t val_len); | |
74fe7b55 CDL |
1153 | int regmap_noinc_read(struct regmap *map, unsigned int reg, |
1154 | void *val, size_t val_len); | |
b83a313b MB |
1155 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, |
1156 | size_t val_count); | |
91d31b9f KM |
1157 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
1158 | unsigned int mask, unsigned int val, | |
1159 | bool *change, bool async, bool force); | |
4b9e7edb BG |
1160 | |
1161 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
1162 | unsigned int mask, unsigned int val) | |
1163 | { | |
1164 | return regmap_update_bits_base(map, reg, mask, val, NULL, false, false); | |
1165 | } | |
1166 | ||
1167 | static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
1168 | unsigned int mask, unsigned int val) | |
1169 | { | |
1170 | return regmap_update_bits_base(map, reg, mask, val, NULL, true, false); | |
1171 | } | |
1172 | ||
1173 | static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
1174 | unsigned int mask, unsigned int val, | |
1175 | bool *change) | |
1176 | { | |
1177 | return regmap_update_bits_base(map, reg, mask, val, | |
1178 | change, false, false); | |
1179 | } | |
1180 | ||
1181 | static inline int | |
1182 | regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
1183 | unsigned int mask, unsigned int val, | |
1184 | bool *change) | |
1185 | { | |
1186 | return regmap_update_bits_base(map, reg, mask, val, | |
1187 | change, true, false); | |
1188 | } | |
1189 | ||
1190 | static inline int regmap_write_bits(struct regmap *map, unsigned int reg, | |
1191 | unsigned int mask, unsigned int val) | |
1192 | { | |
1193 | return regmap_update_bits_base(map, reg, mask, val, NULL, false, true); | |
1194 | } | |
1195 | ||
a6539c32 | 1196 | int regmap_get_val_bytes(struct regmap *map); |
668abc72 | 1197 | int regmap_get_max_register(struct regmap *map); |
a2f776cb | 1198 | int regmap_get_reg_stride(struct regmap *map); |
0d509f2b | 1199 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 1200 | bool regmap_can_raw_write(struct regmap *map); |
f50c9eb4 MP |
1201 | size_t regmap_get_raw_read_max(struct regmap *map); |
1202 | size_t regmap_get_raw_write_max(struct regmap *map); | |
b83a313b | 1203 | |
39a58439 | 1204 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
1205 | int regcache_sync_region(struct regmap *map, unsigned int min, |
1206 | unsigned int max); | |
697e85bc MB |
1207 | int regcache_drop_region(struct regmap *map, unsigned int min, |
1208 | unsigned int max); | |
92afb286 | 1209 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 1210 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 1211 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 1212 | |
154881e5 MB |
1213 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
1214 | const struct regmap_access_table *table); | |
1215 | ||
8019ff6c | 1216 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
22f0d90a | 1217 | int num_regs); |
13ff50c8 NC |
1218 | int regmap_parse_val(struct regmap *map, const void *buf, |
1219 | unsigned int *val); | |
22f0d90a | 1220 | |
76aad392 DC |
1221 | static inline bool regmap_reg_in_range(unsigned int reg, |
1222 | const struct regmap_range *range) | |
1223 | { | |
1224 | return reg >= range->range_min && reg <= range->range_max; | |
1225 | } | |
1226 | ||
1227 | bool regmap_reg_in_ranges(unsigned int reg, | |
1228 | const struct regmap_range *ranges, | |
1229 | unsigned int nranges); | |
1230 | ||
aa2ff9db BG |
1231 | static inline int regmap_set_bits(struct regmap *map, |
1232 | unsigned int reg, unsigned int bits) | |
1233 | { | |
1234 | return regmap_update_bits_base(map, reg, bits, bits, | |
1235 | NULL, false, false); | |
1236 | } | |
1237 | ||
1238 | static inline int regmap_clear_bits(struct regmap *map, | |
1239 | unsigned int reg, unsigned int bits) | |
1240 | { | |
1241 | return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false); | |
1242 | } | |
1243 | ||
1244 | int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits); | |
1245 | ||
67252287 | 1246 | /** |
2cf8e2df | 1247 | * struct reg_field - Description of an register field |
67252287 SK |
1248 | * |
1249 | * @reg: Offset of the register within the regmap bank | |
1250 | * @lsb: lsb of the register field. | |
f27b37f5 | 1251 | * @msb: msb of the register field. |
a0102375 KM |
1252 | * @id_size: port size if it has some ports |
1253 | * @id_offset: address offset for each ports | |
67252287 SK |
1254 | */ |
1255 | struct reg_field { | |
1256 | unsigned int reg; | |
1257 | unsigned int lsb; | |
1258 | unsigned int msb; | |
a0102375 KM |
1259 | unsigned int id_size; |
1260 | unsigned int id_offset; | |
67252287 SK |
1261 | }; |
1262 | ||
1263 | #define REG_FIELD(_reg, _lsb, _msb) { \ | |
1264 | .reg = _reg, \ | |
1265 | .lsb = _lsb, \ | |
1266 | .msb = _msb, \ | |
1267 | } | |
1268 | ||
8baebfc2 VO |
1269 | #define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \ |
1270 | .reg = _reg, \ | |
1271 | .lsb = _lsb, \ | |
1272 | .msb = _msb, \ | |
1273 | .id_size = _size, \ | |
1274 | .id_offset = _offset, \ | |
1275 | } | |
1276 | ||
67252287 SK |
1277 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, |
1278 | struct reg_field reg_field); | |
1279 | void regmap_field_free(struct regmap_field *field); | |
1280 | ||
1281 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
1282 | struct regmap *regmap, struct reg_field reg_field); | |
1283 | void devm_regmap_field_free(struct device *dev, struct regmap_field *field); | |
1284 | ||
ea470b82 SK |
1285 | int regmap_field_bulk_alloc(struct regmap *regmap, |
1286 | struct regmap_field **rm_field, | |
29c34975 | 1287 | const struct reg_field *reg_field, |
ea470b82 SK |
1288 | int num_fields); |
1289 | void regmap_field_bulk_free(struct regmap_field *field); | |
1290 | int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap, | |
1291 | struct regmap_field **field, | |
29c34975 IZ |
1292 | const struct reg_field *reg_field, |
1293 | int num_fields); | |
ea470b82 SK |
1294 | void devm_regmap_field_bulk_free(struct device *dev, |
1295 | struct regmap_field *field); | |
1296 | ||
67252287 | 1297 | int regmap_field_read(struct regmap_field *field, unsigned int *val); |
28972eaa KM |
1298 | int regmap_field_update_bits_base(struct regmap_field *field, |
1299 | unsigned int mask, unsigned int val, | |
1300 | bool *change, bool async, bool force); | |
a0102375 KM |
1301 | int regmap_fields_read(struct regmap_field *field, unsigned int id, |
1302 | unsigned int *val); | |
e126edec KM |
1303 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
1304 | unsigned int mask, unsigned int val, | |
1305 | bool *change, bool async, bool force); | |
4b9e7edb BG |
1306 | |
1307 | static inline int regmap_field_write(struct regmap_field *field, | |
1308 | unsigned int val) | |
1309 | { | |
1310 | return regmap_field_update_bits_base(field, ~0, val, | |
1311 | NULL, false, false); | |
1312 | } | |
1313 | ||
1314 | static inline int regmap_field_force_write(struct regmap_field *field, | |
1315 | unsigned int val) | |
1316 | { | |
1317 | return regmap_field_update_bits_base(field, ~0, val, NULL, false, true); | |
1318 | } | |
1319 | ||
1320 | static inline int regmap_field_update_bits(struct regmap_field *field, | |
1321 | unsigned int mask, unsigned int val) | |
1322 | { | |
1323 | return regmap_field_update_bits_base(field, mask, val, | |
1324 | NULL, false, false); | |
1325 | } | |
1326 | ||
1327 | static inline int | |
1328 | regmap_field_force_update_bits(struct regmap_field *field, | |
1329 | unsigned int mask, unsigned int val) | |
1330 | { | |
1331 | return regmap_field_update_bits_base(field, mask, val, | |
1332 | NULL, false, true); | |
1333 | } | |
1334 | ||
1335 | static inline int regmap_fields_write(struct regmap_field *field, | |
1336 | unsigned int id, unsigned int val) | |
1337 | { | |
1338 | return regmap_fields_update_bits_base(field, id, ~0, val, | |
1339 | NULL, false, false); | |
1340 | } | |
1341 | ||
1342 | static inline int regmap_fields_force_write(struct regmap_field *field, | |
1343 | unsigned int id, unsigned int val) | |
1344 | { | |
1345 | return regmap_fields_update_bits_base(field, id, ~0, val, | |
1346 | NULL, false, true); | |
1347 | } | |
1348 | ||
1349 | static inline int | |
1350 | regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1351 | unsigned int mask, unsigned int val) | |
1352 | { | |
1353 | return regmap_fields_update_bits_base(field, id, mask, val, | |
1354 | NULL, false, false); | |
1355 | } | |
1356 | ||
1357 | static inline int | |
1358 | regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, | |
1359 | unsigned int mask, unsigned int val) | |
1360 | { | |
1361 | return regmap_fields_update_bits_base(field, id, mask, val, | |
1362 | NULL, false, true); | |
1363 | } | |
1364 | ||
1c2928e3 MV |
1365 | /** |
1366 | * struct regmap_irq_type - IRQ type definitions. | |
1367 | * | |
1368 | * @type_reg_offset: Offset register for the irq type setting. | |
1369 | * @type_rising_val: Register value to configure RISING type irq. | |
1370 | * @type_falling_val: Register value to configure FALLING type irq. | |
1371 | * @type_level_low_val: Register value to configure LEVEL_LOW type irq. | |
1372 | * @type_level_high_val: Register value to configure LEVEL_HIGH type irq. | |
1373 | * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types. | |
1374 | */ | |
1375 | struct regmap_irq_type { | |
1376 | unsigned int type_reg_offset; | |
1377 | unsigned int type_reg_mask; | |
1378 | unsigned int type_rising_val; | |
1379 | unsigned int type_falling_val; | |
1380 | unsigned int type_level_low_val; | |
1381 | unsigned int type_level_high_val; | |
1382 | unsigned int types_supported; | |
1383 | }; | |
76aad392 | 1384 | |
f8beab2b | 1385 | /** |
2cf8e2df | 1386 | * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip. |
f8beab2b MB |
1387 | * |
1388 | * @reg_offset: Offset of the status/mask register within the bank | |
1389 | * @mask: Mask used to flag/control the register. | |
1c2928e3 | 1390 | * @type: IRQ trigger type setting details if supported. |
f8beab2b MB |
1391 | */ |
1392 | struct regmap_irq { | |
1393 | unsigned int reg_offset; | |
1394 | unsigned int mask; | |
1c2928e3 | 1395 | struct regmap_irq_type type; |
f8beab2b MB |
1396 | }; |
1397 | ||
b4fe8ba7 QZ |
1398 | #define REGMAP_IRQ_REG(_irq, _off, _mask) \ |
1399 | [_irq] = { .reg_offset = (_off), .mask = (_mask) } | |
1400 | ||
43fac323 TX |
1401 | #define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \ |
1402 | [_id] = { \ | |
1403 | .mask = BIT((_id) % (_reg_bits)), \ | |
1404 | .reg_offset = (_id) / (_reg_bits), \ | |
1405 | } | |
1406 | ||
a2d21848 MV |
1407 | #define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \ |
1408 | { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] } | |
1409 | ||
1410 | struct regmap_irq_sub_irq_map { | |
1411 | unsigned int num_regs; | |
1412 | unsigned int *offset; | |
1413 | }; | |
1414 | ||
f8beab2b | 1415 | /** |
2cf8e2df | 1416 | * struct regmap_irq_chip - Description of a generic regmap irq_chip. |
f8beab2b MB |
1417 | * |
1418 | * @name: Descriptive name for IRQ controller. | |
1419 | * | |
a2d21848 MV |
1420 | * @main_status: Base main status register address. For chips which have |
1421 | * interrupts arranged in separate sub-irq blocks with own IRQ | |
1422 | * registers and which have a main IRQ registers indicating | |
1423 | * sub-irq blocks with unhandled interrupts. For such chips fill | |
1424 | * sub-irq register information in status_base, mask_base and | |
1425 | * ack_base. | |
1426 | * @num_main_status_bits: Should be given to chips where number of meaningfull | |
1427 | * main status bits differs from num_regs. | |
1428 | * @sub_reg_offsets: arrays of mappings from main register bits to sub irq | |
1429 | * registers. First item in array describes the registers | |
1430 | * for first main status bit. Second array for second bit etc. | |
1431 | * Offset is given as sub register status offset to | |
1432 | * status_base. Should contain num_regs arrays. | |
1433 | * Can be provided for chips with more complex mapping than | |
1434 | * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ... | |
1066cfbd GDS |
1435 | * When used with not_fixed_stride, each one-element array |
1436 | * member contains offset calculated as address from each | |
1437 | * peripheral to first peripheral. | |
a2d21848 MV |
1438 | * @num_main_regs: Number of 'main status' irq registers for chips which have |
1439 | * main_status set. | |
1440 | * | |
f8beab2b MB |
1441 | * @status_base: Base status register address. |
1442 | * @mask_base: Base mask register address. | |
a71411db | 1443 | * @mask_writeonly: Base mask register is write only. |
7b7d1968 GZ |
1444 | * @unmask_base: Base unmask register address. for chips who have |
1445 | * separate mask and unmask registers | |
d3233433 AS |
1446 | * @ack_base: Base ack address. If zero then the chip is clear on read. |
1447 | * Using zero value is possible with @use_ack bit. | |
a43fd50d | 1448 | * @wake_base: Base address for wake enables. If zero unsupported. |
7a78479f | 1449 | * @type_base: Base address for irq type. If zero unsupported. |
4c501445 | 1450 | * @virt_reg_base: Base addresses for extra config regs. |
022f926a | 1451 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
2753e6f8 | 1452 | * @init_ack_masked: Ack all masked interrupts once during initalization. |
68622bdf | 1453 | * @mask_invert: Inverted mask register: cleared bits are masked out. |
d3233433 | 1454 | * @use_ack: Use @ack register even if it is zero. |
a650fdd9 | 1455 | * @ack_invert: Inverted ack register: cleared bits for ack. |
3a6f0fb7 | 1456 | * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts. |
68622bdf | 1457 | * @wake_invert: Inverted wake register: cleared bits are wake enabled. |
7a78479f | 1458 | * @type_invert: Invert the type flags. |
bc998a73 BG |
1459 | * @type_in_mask: Use the mask registers for controlling irq type. For |
1460 | * interrupts defining type_rising/falling_mask use mask_base | |
1461 | * for edge configuration and never update bits in type_base. | |
c82ea33e BG |
1462 | * @clear_on_unmask: For chips with interrupts cleared on read: read the status |
1463 | * registers before unmasking interrupts to clear any bits | |
1464 | * set when they were masked. | |
1066cfbd GDS |
1465 | * @not_fixed_stride: Used when chip peripherals are not laid out with fixed |
1466 | * stride. Must be used with sub_reg_offsets containing the | |
1467 | * offsets to each peripheral. | |
bcd23f93 | 1468 | * @status_invert: Inverted status register: cleared bits are active interrupts. |
0c00c50b | 1469 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
1470 | * |
1471 | * @num_regs: Number of registers in each control bank. | |
1472 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
1473 | * assigned based on the index in the array of the interrupt. | |
1474 | * @num_irqs: Number of descriptors. | |
7a78479f | 1475 | * @num_type_reg: Number of type registers. |
4c501445 GDS |
1476 | * @num_virt_regs: Number of non-standard irq configuration registers. |
1477 | * If zero unsupported. | |
7a78479f LD |
1478 | * @type_reg_stride: Stride to use for chips where type registers are not |
1479 | * contiguous. | |
ccc12561 LD |
1480 | * @handle_pre_irq: Driver specific callback to handle interrupt from device |
1481 | * before regmap_irq_handler process the interrupts. | |
1482 | * @handle_post_irq: Driver specific callback to handle interrupt from device | |
1483 | * after handling the interrupts in regmap_irq_handler(). | |
394409aa GDS |
1484 | * @set_type_virt: Driver specific callback to extend regmap_irq_set_type() |
1485 | * and configure virt regs. | |
ccc12561 LD |
1486 | * @irq_drv_data: Driver specific IRQ data which is passed as parameter when |
1487 | * driver specific pre/post interrupt handler is called. | |
2cf8e2df CK |
1488 | * |
1489 | * This is not intended to handle every possible interrupt controller, but | |
1490 | * it should handle a substantial proportion of those that are found in the | |
1491 | * wild. | |
f8beab2b MB |
1492 | */ |
1493 | struct regmap_irq_chip { | |
1494 | const char *name; | |
1495 | ||
a2d21848 MV |
1496 | unsigned int main_status; |
1497 | unsigned int num_main_status_bits; | |
1498 | struct regmap_irq_sub_irq_map *sub_reg_offsets; | |
1499 | int num_main_regs; | |
1500 | ||
f8beab2b MB |
1501 | unsigned int status_base; |
1502 | unsigned int mask_base; | |
7b7d1968 | 1503 | unsigned int unmask_base; |
f8beab2b | 1504 | unsigned int ack_base; |
a43fd50d | 1505 | unsigned int wake_base; |
7a78479f | 1506 | unsigned int type_base; |
4c501445 | 1507 | unsigned int *virt_reg_base; |
022f926a | 1508 | unsigned int irq_reg_stride; |
a71411db | 1509 | bool mask_writeonly:1; |
f484f7a6 PZ |
1510 | bool init_ack_masked:1; |
1511 | bool mask_invert:1; | |
d3233433 | 1512 | bool use_ack:1; |
a650fdd9 | 1513 | bool ack_invert:1; |
3a6f0fb7 | 1514 | bool clear_ack:1; |
f484f7a6 PZ |
1515 | bool wake_invert:1; |
1516 | bool runtime_pm:1; | |
7a78479f | 1517 | bool type_invert:1; |
bc998a73 | 1518 | bool type_in_mask:1; |
c82ea33e | 1519 | bool clear_on_unmask:1; |
1066cfbd | 1520 | bool not_fixed_stride:1; |
bcd23f93 | 1521 | bool status_invert:1; |
f8beab2b MB |
1522 | |
1523 | int num_regs; | |
1524 | ||
1525 | const struct regmap_irq *irqs; | |
1526 | int num_irqs; | |
7a78479f LD |
1527 | |
1528 | int num_type_reg; | |
4c501445 | 1529 | int num_virt_regs; |
7a78479f | 1530 | unsigned int type_reg_stride; |
ccc12561 LD |
1531 | |
1532 | int (*handle_pre_irq)(void *irq_drv_data); | |
1533 | int (*handle_post_irq)(void *irq_drv_data); | |
394409aa GDS |
1534 | int (*set_type_virt)(unsigned int **buf, unsigned int type, |
1535 | unsigned long hwirq, int reg); | |
ccc12561 | 1536 | void *irq_drv_data; |
f8beab2b MB |
1537 | }; |
1538 | ||
1539 | struct regmap_irq_chip_data; | |
1540 | ||
1541 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 1542 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b | 1543 | struct regmap_irq_chip_data **data); |
5cc2013b MW |
1544 | int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, |
1545 | struct regmap *map, int irq, | |
1546 | int irq_flags, int irq_base, | |
1547 | const struct regmap_irq_chip *chip, | |
1548 | struct regmap_irq_chip_data **data); | |
f8beab2b | 1549 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); |
045b9848 LD |
1550 | |
1551 | int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, | |
1552 | int irq_flags, int irq_base, | |
1553 | const struct regmap_irq_chip *chip, | |
1554 | struct regmap_irq_chip_data **data); | |
5cc2013b MW |
1555 | int devm_regmap_add_irq_chip_fwnode(struct device *dev, |
1556 | struct fwnode_handle *fwnode, | |
1557 | struct regmap *map, int irq, | |
1558 | int irq_flags, int irq_base, | |
1559 | const struct regmap_irq_chip *chip, | |
1560 | struct regmap_irq_chip_data **data); | |
045b9848 LD |
1561 | void devm_regmap_del_irq_chip(struct device *dev, int irq, |
1562 | struct regmap_irq_chip_data *data); | |
1563 | ||
209a6006 | 1564 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 1565 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 1566 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 1567 | |
9cde5fcd MB |
1568 | #else |
1569 | ||
1570 | /* | |
1571 | * These stubs should only ever be called by generic code which has | |
1572 | * regmap based facilities, if they ever get called at runtime | |
1573 | * something is going wrong and something probably needs to select | |
1574 | * REGMAP. | |
1575 | */ | |
1576 | ||
1577 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
1578 | unsigned int val) | |
1579 | { | |
1580 | WARN_ONCE(1, "regmap API is disabled"); | |
1581 | return -EINVAL; | |
1582 | } | |
1583 | ||
915f441b MB |
1584 | static inline int regmap_write_async(struct regmap *map, unsigned int reg, |
1585 | unsigned int val) | |
1586 | { | |
1587 | WARN_ONCE(1, "regmap API is disabled"); | |
1588 | return -EINVAL; | |
1589 | } | |
1590 | ||
9cde5fcd MB |
1591 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, |
1592 | const void *val, size_t val_len) | |
1593 | { | |
1594 | WARN_ONCE(1, "regmap API is disabled"); | |
1595 | return -EINVAL; | |
1596 | } | |
1597 | ||
0d509f2b MB |
1598 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
1599 | const void *val, size_t val_len) | |
1600 | { | |
1601 | WARN_ONCE(1, "regmap API is disabled"); | |
1602 | return -EINVAL; | |
1603 | } | |
1604 | ||
cdf6b11d BW |
1605 | static inline int regmap_noinc_write(struct regmap *map, unsigned int reg, |
1606 | const void *val, size_t val_len) | |
1607 | { | |
1608 | WARN_ONCE(1, "regmap API is disabled"); | |
1609 | return -EINVAL; | |
1610 | } | |
1611 | ||
9cde5fcd MB |
1612 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
1613 | const void *val, size_t val_count) | |
1614 | { | |
1615 | WARN_ONCE(1, "regmap API is disabled"); | |
1616 | return -EINVAL; | |
1617 | } | |
1618 | ||
1619 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
1620 | unsigned int *val) | |
1621 | { | |
1622 | WARN_ONCE(1, "regmap API is disabled"); | |
1623 | return -EINVAL; | |
1624 | } | |
1625 | ||
1626 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
1627 | void *val, size_t val_len) | |
1628 | { | |
1629 | WARN_ONCE(1, "regmap API is disabled"); | |
1630 | return -EINVAL; | |
1631 | } | |
1632 | ||
74fe7b55 CDL |
1633 | static inline int regmap_noinc_read(struct regmap *map, unsigned int reg, |
1634 | void *val, size_t val_len) | |
1635 | { | |
1636 | WARN_ONCE(1, "regmap API is disabled"); | |
1637 | return -EINVAL; | |
1638 | } | |
1639 | ||
9cde5fcd MB |
1640 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, |
1641 | void *val, size_t val_count) | |
1642 | { | |
1643 | WARN_ONCE(1, "regmap API is disabled"); | |
1644 | return -EINVAL; | |
1645 | } | |
1646 | ||
91d31b9f KM |
1647 | static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
1648 | unsigned int mask, unsigned int val, | |
1649 | bool *change, bool async, bool force) | |
fd4b7286 KM |
1650 | { |
1651 | WARN_ONCE(1, "regmap API is disabled"); | |
1652 | return -EINVAL; | |
1653 | } | |
1654 | ||
aa2ff9db BG |
1655 | static inline int regmap_set_bits(struct regmap *map, |
1656 | unsigned int reg, unsigned int bits) | |
1657 | { | |
1658 | WARN_ONCE(1, "regmap API is disabled"); | |
1659 | return -EINVAL; | |
1660 | } | |
1661 | ||
1662 | static inline int regmap_clear_bits(struct regmap *map, | |
1663 | unsigned int reg, unsigned int bits) | |
1664 | { | |
1665 | WARN_ONCE(1, "regmap API is disabled"); | |
1666 | return -EINVAL; | |
1667 | } | |
1668 | ||
1669 | static inline int regmap_test_bits(struct regmap *map, | |
1670 | unsigned int reg, unsigned int bits) | |
1671 | { | |
1672 | WARN_ONCE(1, "regmap API is disabled"); | |
1673 | return -EINVAL; | |
1674 | } | |
1675 | ||
28972eaa KM |
1676 | static inline int regmap_field_update_bits_base(struct regmap_field *field, |
1677 | unsigned int mask, unsigned int val, | |
1678 | bool *change, bool async, bool force) | |
915f441b MB |
1679 | { |
1680 | WARN_ONCE(1, "regmap API is disabled"); | |
1681 | return -EINVAL; | |
1682 | } | |
1683 | ||
e126edec KM |
1684 | static inline int regmap_fields_update_bits_base(struct regmap_field *field, |
1685 | unsigned int id, | |
1686 | unsigned int mask, unsigned int val, | |
1687 | bool *change, bool async, bool force) | |
915f441b MB |
1688 | { |
1689 | WARN_ONCE(1, "regmap API is disabled"); | |
1690 | return -EINVAL; | |
1691 | } | |
1692 | ||
4b9e7edb BG |
1693 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, |
1694 | unsigned int mask, unsigned int val) | |
1695 | { | |
1696 | WARN_ONCE(1, "regmap API is disabled"); | |
1697 | return -EINVAL; | |
1698 | } | |
1699 | ||
1700 | static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
1701 | unsigned int mask, unsigned int val) | |
1702 | { | |
1703 | WARN_ONCE(1, "regmap API is disabled"); | |
1704 | return -EINVAL; | |
1705 | } | |
1706 | ||
1707 | static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
1708 | unsigned int mask, unsigned int val, | |
1709 | bool *change) | |
1710 | { | |
1711 | WARN_ONCE(1, "regmap API is disabled"); | |
1712 | return -EINVAL; | |
1713 | } | |
1714 | ||
1715 | static inline int | |
1716 | regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
1717 | unsigned int mask, unsigned int val, | |
1718 | bool *change) | |
1719 | { | |
1720 | WARN_ONCE(1, "regmap API is disabled"); | |
1721 | return -EINVAL; | |
1722 | } | |
1723 | ||
1724 | static inline int regmap_write_bits(struct regmap *map, unsigned int reg, | |
1725 | unsigned int mask, unsigned int val) | |
1726 | { | |
1727 | WARN_ONCE(1, "regmap API is disabled"); | |
1728 | return -EINVAL; | |
1729 | } | |
1730 | ||
1731 | static inline int regmap_field_write(struct regmap_field *field, | |
1732 | unsigned int val) | |
1733 | { | |
1734 | WARN_ONCE(1, "regmap API is disabled"); | |
1735 | return -EINVAL; | |
1736 | } | |
1737 | ||
1738 | static inline int regmap_field_force_write(struct regmap_field *field, | |
1739 | unsigned int val) | |
1740 | { | |
1741 | WARN_ONCE(1, "regmap API is disabled"); | |
1742 | return -EINVAL; | |
1743 | } | |
1744 | ||
1745 | static inline int regmap_field_update_bits(struct regmap_field *field, | |
1746 | unsigned int mask, unsigned int val) | |
1747 | { | |
1748 | WARN_ONCE(1, "regmap API is disabled"); | |
1749 | return -EINVAL; | |
1750 | } | |
1751 | ||
1752 | static inline int | |
1753 | regmap_field_force_update_bits(struct regmap_field *field, | |
1754 | unsigned int mask, unsigned int val) | |
1755 | { | |
1756 | WARN_ONCE(1, "regmap API is disabled"); | |
1757 | return -EINVAL; | |
1758 | } | |
1759 | ||
1760 | static inline int regmap_fields_write(struct regmap_field *field, | |
1761 | unsigned int id, unsigned int val) | |
1762 | { | |
1763 | WARN_ONCE(1, "regmap API is disabled"); | |
1764 | return -EINVAL; | |
1765 | } | |
1766 | ||
1767 | static inline int regmap_fields_force_write(struct regmap_field *field, | |
1768 | unsigned int id, unsigned int val) | |
1769 | { | |
1770 | WARN_ONCE(1, "regmap API is disabled"); | |
1771 | return -EINVAL; | |
1772 | } | |
1773 | ||
1774 | static inline int | |
1775 | regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1776 | unsigned int mask, unsigned int val) | |
1777 | { | |
1778 | WARN_ONCE(1, "regmap API is disabled"); | |
1779 | return -EINVAL; | |
1780 | } | |
1781 | ||
1782 | static inline int | |
1783 | regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, | |
1784 | unsigned int mask, unsigned int val) | |
1785 | { | |
1786 | WARN_ONCE(1, "regmap API is disabled"); | |
1787 | return -EINVAL; | |
1788 | } | |
1789 | ||
9cde5fcd MB |
1790 | static inline int regmap_get_val_bytes(struct regmap *map) |
1791 | { | |
1792 | WARN_ONCE(1, "regmap API is disabled"); | |
1793 | return -EINVAL; | |
1794 | } | |
1795 | ||
668abc72 SK |
1796 | static inline int regmap_get_max_register(struct regmap *map) |
1797 | { | |
1798 | WARN_ONCE(1, "regmap API is disabled"); | |
1799 | return -EINVAL; | |
1800 | } | |
1801 | ||
a2f776cb SK |
1802 | static inline int regmap_get_reg_stride(struct regmap *map) |
1803 | { | |
1804 | WARN_ONCE(1, "regmap API is disabled"); | |
1805 | return -EINVAL; | |
1806 | } | |
1807 | ||
9cde5fcd MB |
1808 | static inline int regcache_sync(struct regmap *map) |
1809 | { | |
1810 | WARN_ONCE(1, "regmap API is disabled"); | |
1811 | return -EINVAL; | |
1812 | } | |
1813 | ||
a313f9f5 MB |
1814 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
1815 | unsigned int max) | |
1816 | { | |
1817 | WARN_ONCE(1, "regmap API is disabled"); | |
1818 | return -EINVAL; | |
1819 | } | |
1820 | ||
697e85bc MB |
1821 | static inline int regcache_drop_region(struct regmap *map, unsigned int min, |
1822 | unsigned int max) | |
1823 | { | |
1824 | WARN_ONCE(1, "regmap API is disabled"); | |
1825 | return -EINVAL; | |
1826 | } | |
1827 | ||
9cde5fcd MB |
1828 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
1829 | { | |
1830 | WARN_ONCE(1, "regmap API is disabled"); | |
1831 | } | |
1832 | ||
1833 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
1834 | { | |
1835 | WARN_ONCE(1, "regmap API is disabled"); | |
1836 | } | |
1837 | ||
1838 | static inline void regcache_mark_dirty(struct regmap *map) | |
1839 | { | |
1840 | WARN_ONCE(1, "regmap API is disabled"); | |
1841 | } | |
1842 | ||
0d509f2b MB |
1843 | static inline void regmap_async_complete(struct regmap *map) |
1844 | { | |
1845 | WARN_ONCE(1, "regmap API is disabled"); | |
1846 | } | |
1847 | ||
9cde5fcd | 1848 | static inline int regmap_register_patch(struct regmap *map, |
a6baa3de | 1849 | const struct reg_sequence *regs, |
9cde5fcd MB |
1850 | int num_regs) |
1851 | { | |
1852 | WARN_ONCE(1, "regmap API is disabled"); | |
1853 | return -EINVAL; | |
1854 | } | |
1855 | ||
13ff50c8 NC |
1856 | static inline int regmap_parse_val(struct regmap *map, const void *buf, |
1857 | unsigned int *val) | |
1858 | { | |
1859 | WARN_ONCE(1, "regmap API is disabled"); | |
1860 | return -EINVAL; | |
1861 | } | |
1862 | ||
72b39f6f MB |
1863 | static inline struct regmap *dev_get_regmap(struct device *dev, |
1864 | const char *name) | |
1865 | { | |
72b39f6f MB |
1866 | return NULL; |
1867 | } | |
1868 | ||
8d7d3972 TT |
1869 | static inline struct device *regmap_get_device(struct regmap *map) |
1870 | { | |
1871 | WARN_ONCE(1, "regmap API is disabled"); | |
1d33dc6b | 1872 | return NULL; |
8d7d3972 TT |
1873 | } |
1874 | ||
9cde5fcd MB |
1875 | #endif |
1876 | ||
b83a313b | 1877 | #endif |