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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
b83a313b MB |
2 | #ifndef __LINUX_REGMAP_H |
3 | #define __LINUX_REGMAP_H | |
4 | ||
5 | /* | |
6 | * Register map access API | |
7 | * | |
8 | * Copyright 2011 Wolfson Microelectronics plc | |
9 | * | |
10 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
b83a313b MB |
11 | */ |
12 | ||
b83a313b | 13 | #include <linux/list.h> |
6863ca62 | 14 | #include <linux/rbtree.h> |
f15cd6d9 | 15 | #include <linux/ktime.h> |
adf08d48 | 16 | #include <linux/delay.h> |
49ccc142 | 17 | #include <linux/err.h> |
3f0fa9a8 | 18 | #include <linux/bug.h> |
3cfe7a74 | 19 | #include <linux/lockdep.h> |
e44ab4e1 | 20 | #include <linux/iopoll.h> |
5cc2013b | 21 | #include <linux/fwnode.h> |
b83a313b | 22 | |
de477254 | 23 | struct module; |
31895662 | 24 | struct clk; |
313162d0 | 25 | struct device; |
12479382 | 26 | struct device_node; |
bf0d29fb | 27 | struct fsi_device; |
9943fa30 | 28 | struct i2c_client; |
6445500b | 29 | struct i3c_device; |
90f790d2 | 30 | struct irq_domain; |
1f89d2fe | 31 | struct mdio_device; |
7d6f7fb0 | 32 | struct slim_device; |
a676f083 | 33 | struct spi_device; |
a01779f8 | 34 | struct spmi_device; |
b83d2ff0 | 35 | struct regmap; |
6863ca62 | 36 | struct regmap_range_cfg; |
67252287 | 37 | struct regmap_field; |
22853223 | 38 | struct snd_ac97; |
7c22ce6e | 39 | struct sdw_slave; |
9943fa30 | 40 | |
7b3c4c37 AL |
41 | /* |
42 | * regmap_mdio address encoding. IEEE 802.3ae clause 45 addresses consist of a | |
43 | * device address and a register address. | |
44 | */ | |
45 | #define REGMAP_MDIO_C45_DEVAD_SHIFT 16 | |
46 | #define REGMAP_MDIO_C45_DEVAD_MASK GENMASK(20, 16) | |
47 | #define REGMAP_MDIO_C45_REGNUM_MASK GENMASK(15, 0) | |
48 | ||
4a670ac3 MC |
49 | /* |
50 | * regmap.reg_shift indicates by how much we must shift registers prior to | |
51 | * performing any operation. It's a signed value, positive numbers means | |
52 | * downshifting the register's address, while negative numbers means upshifting. | |
53 | */ | |
54 | #define REGMAP_UPSHIFT(s) (-(s)) | |
55 | #define REGMAP_DOWNSHIFT(s) (s) | |
56 | ||
9fabe24e DP |
57 | /* An enum of all the supported cache types */ |
58 | enum regcache_type { | |
59 | REGCACHE_NONE, | |
28644c80 | 60 | REGCACHE_RBTREE, |
2ac902ce | 61 | REGCACHE_FLAT, |
f033c26d | 62 | REGCACHE_MAPLE, |
9fabe24e DP |
63 | }; |
64 | ||
bd20eb54 | 65 | /** |
2cf8e2df | 66 | * struct reg_default - Default value for a register. |
bd20eb54 MB |
67 | * |
68 | * @reg: Register address. | |
69 | * @def: Register default value. | |
2cf8e2df CK |
70 | * |
71 | * We use an array of structs rather than a simple array as many modern devices | |
72 | * have very sparse register maps. | |
bd20eb54 MB |
73 | */ |
74 | struct reg_default { | |
75 | unsigned int reg; | |
76 | unsigned int def; | |
77 | }; | |
78 | ||
8019ff6c | 79 | /** |
2cf8e2df | 80 | * struct reg_sequence - An individual write from a sequence of writes. |
8019ff6c NP |
81 | * |
82 | * @reg: Register address. | |
83 | * @def: Register value. | |
2de9d600 | 84 | * @delay_us: Delay to be applied after the register write in microseconds |
2cf8e2df CK |
85 | * |
86 | * Register/value pairs for sequences of writes with an optional delay in | |
87 | * microseconds to be applied after each write. | |
8019ff6c NP |
88 | */ |
89 | struct reg_sequence { | |
90 | unsigned int reg; | |
91 | unsigned int def; | |
2de9d600 | 92 | unsigned int delay_us; |
8019ff6c NP |
93 | }; |
94 | ||
bd3ddb49 MF |
95 | #define REG_SEQ(_reg, _def, _delay_us) { \ |
96 | .reg = _reg, \ | |
97 | .def = _def, \ | |
98 | .delay_us = _delay_us, \ | |
99 | } | |
100 | #define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0) | |
101 | ||
08188ba8 PZ |
102 | /** |
103 | * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs | |
2cf8e2df | 104 | * |
08188ba8 PZ |
105 | * @map: Regmap to read from |
106 | * @addr: Address to poll | |
107 | * @val: Unsigned integer variable to read the value into | |
108 | * @cond: Break condition (usually involving @val) | |
109 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
110 | * tight-loops). Should be less than ~20ms since usleep_range | |
458f69ef | 111 | * is used (see Documentation/timers/timers-howto.rst). |
08188ba8 PZ |
112 | * @timeout_us: Timeout in us, 0 means never timeout |
113 | * | |
114 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read | |
115 | * error return value in case of a error read. In the two former cases, | |
116 | * the last read value at @addr is stored in @val. Must not be called | |
117 | * from atomic context if sleep_us or timeout_us are used. | |
118 | * | |
119 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
120 | */ | |
121 | #define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ | |
122 | ({ \ | |
e44ab4e1 DZ |
123 | int __ret, __tmp; \ |
124 | __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \ | |
125 | sleep_us, timeout_us, false, (map), (addr), &(val)); \ | |
126 | __ret ?: __tmp; \ | |
08188ba8 PZ |
127 | }) |
128 | ||
50816a4c SP |
129 | /** |
130 | * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs | |
131 | * | |
132 | * @map: Regmap to read from | |
133 | * @addr: Address to poll | |
134 | * @val: Unsigned integer variable to read the value into | |
135 | * @cond: Break condition (usually involving @val) | |
136 | * @delay_us: Time to udelay between reads in us (0 tight-loops). | |
137 | * Should be less than ~10us since udelay is used | |
138 | * (see Documentation/timers/timers-howto.rst). | |
139 | * @timeout_us: Timeout in us, 0 means never timeout | |
140 | * | |
141 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read | |
142 | * error return value in case of a error read. In the two former cases, | |
143 | * the last read value at @addr is stored in @val. | |
144 | * | |
145 | * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h. | |
146 | * | |
147 | * Note: In general regmap cannot be used in atomic context. If you want to use | |
148 | * this macro then first setup your regmap for atomic use (flat or no cache | |
149 | * and MMIO regmap). | |
150 | */ | |
151 | #define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \ | |
152 | ({ \ | |
153 | u64 __timeout_us = (timeout_us); \ | |
154 | unsigned long __delay_us = (delay_us); \ | |
155 | ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ | |
156 | int __ret; \ | |
157 | for (;;) { \ | |
158 | __ret = regmap_read((map), (addr), &(val)); \ | |
159 | if (__ret) \ | |
160 | break; \ | |
161 | if (cond) \ | |
162 | break; \ | |
163 | if ((__timeout_us) && \ | |
164 | ktime_compare(ktime_get(), __timeout) > 0) { \ | |
165 | __ret = regmap_read((map), (addr), &(val)); \ | |
166 | break; \ | |
167 | } \ | |
168 | if (__delay_us) \ | |
169 | udelay(__delay_us); \ | |
170 | } \ | |
171 | __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ | |
172 | }) | |
173 | ||
667063ac CYT |
174 | /** |
175 | * regmap_field_read_poll_timeout - Poll until a condition is met or timeout | |
176 | * | |
177 | * @field: Regmap field to read from | |
178 | * @val: Unsigned integer variable to read the value into | |
179 | * @cond: Break condition (usually involving @val) | |
180 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
181 | * tight-loops). Should be less than ~20ms since usleep_range | |
458f69ef | 182 | * is used (see Documentation/timers/timers-howto.rst). |
667063ac CYT |
183 | * @timeout_us: Timeout in us, 0 means never timeout |
184 | * | |
185 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read | |
186 | * error return value in case of a error read. In the two former cases, | |
187 | * the last read value at @addr is stored in @val. Must not be called | |
188 | * from atomic context if sleep_us or timeout_us are used. | |
189 | * | |
190 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
191 | */ | |
192 | #define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \ | |
193 | ({ \ | |
148c01d1 DZ |
194 | int __ret, __tmp; \ |
195 | __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \ | |
196 | sleep_us, timeout_us, false, (field), &(val)); \ | |
197 | __ret ?: __tmp; \ | |
667063ac CYT |
198 | }) |
199 | ||
b83d2ff0 MB |
200 | #ifdef CONFIG_REGMAP |
201 | ||
141eba2e SW |
202 | enum regmap_endian { |
203 | /* Unspecified -> 0 -> Backwards compatible default */ | |
204 | REGMAP_ENDIAN_DEFAULT = 0, | |
205 | REGMAP_ENDIAN_BIG, | |
206 | REGMAP_ENDIAN_LITTLE, | |
207 | REGMAP_ENDIAN_NATIVE, | |
208 | }; | |
209 | ||
76aad392 | 210 | /** |
2cf8e2df CK |
211 | * struct regmap_range - A register range, used for access related checks |
212 | * (readable/writeable/volatile/precious checks) | |
76aad392 DC |
213 | * |
214 | * @range_min: address of first register | |
215 | * @range_max: address of last register | |
216 | */ | |
217 | struct regmap_range { | |
218 | unsigned int range_min; | |
219 | unsigned int range_max; | |
220 | }; | |
221 | ||
6112fe60 LD |
222 | #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } |
223 | ||
2cf8e2df CK |
224 | /** |
225 | * struct regmap_access_table - A table of register ranges for access checks | |
76aad392 DC |
226 | * |
227 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
228 | * @n_yes_ranges: size of the above array | |
229 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
230 | * @n_no_ranges: size of the above array | |
2cf8e2df CK |
231 | * |
232 | * A table of ranges including some yes ranges and some no ranges. | |
233 | * If a register belongs to a no_range, the corresponding check function | |
234 | * will return false. If a register belongs to a yes range, the corresponding | |
235 | * check function will return true. "no_ranges" are searched first. | |
76aad392 DC |
236 | */ |
237 | struct regmap_access_table { | |
238 | const struct regmap_range *yes_ranges; | |
239 | unsigned int n_yes_ranges; | |
240 | const struct regmap_range *no_ranges; | |
241 | unsigned int n_no_ranges; | |
242 | }; | |
243 | ||
0d4529c5 DC |
244 | typedef void (*regmap_lock)(void *); |
245 | typedef void (*regmap_unlock)(void *); | |
246 | ||
dd898b20 | 247 | /** |
2cf8e2df | 248 | * struct regmap_config - Configuration for the register map of a device. |
dd898b20 | 249 | * |
d3c242e1 SW |
250 | * @name: Optional name of the regmap. Useful when a device has multiple |
251 | * register regions. | |
252 | * | |
dd898b20 | 253 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
254 | * @reg_stride: The register address stride. Valid register addresses are a |
255 | * multiple of this value. If set to 0, a value of 1 will be | |
256 | * used. | |
4a670ac3 MC |
257 | * @reg_shift: The number of bits to shift the register before performing any |
258 | * operations. Any positive number will be downshifted, and negative | |
259 | * values will be upshifted | |
0074f3f2 CF |
260 | * @reg_base: Value to be added to every register address before performing any |
261 | * operation. | |
82159ba8 | 262 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 263 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 264 | * |
3566cc9d | 265 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
266 | * can be written to. If this field is NULL but wr_table |
267 | * (see below) is not, the check is performed on such table | |
268 | * (a register is writeable if it belongs to one of the ranges | |
269 | * specified by wr_table). | |
3566cc9d | 270 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
271 | * can be read from. If this field is NULL but rd_table |
272 | * (see below) is not, the check is performed on such table | |
273 | * (a register is readable if it belongs to one of the ranges | |
274 | * specified by rd_table). | |
3566cc9d | 275 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
276 | * value can't be cached. If this field is NULL but |
277 | * volatile_table (see below) is not, the check is performed on | |
278 | * such table (a register is volatile if it belongs to one of | |
279 | * the ranges specified by volatile_table). | |
bdc39644 | 280 | * @precious_reg: Optional callback returning true if the register |
76aad392 | 281 | * should not be read outside of a call from the driver |
bdc39644 | 282 | * (e.g., a clear on read interrupt status register). If this |
76aad392 DC |
283 | * field is NULL but precious_table (see below) is not, the |
284 | * check is performed on such table (a register is precious if | |
285 | * it belongs to one of the ranges specified by precious_table). | |
cdf6b11d BW |
286 | * @writeable_noinc_reg: Optional callback returning true if the register |
287 | * supports multiple write operations without incrementing | |
288 | * the register number. If this field is NULL but | |
289 | * wr_noinc_table (see below) is not, the check is | |
290 | * performed on such table (a register is no increment | |
291 | * writeable if it belongs to one of the ranges specified | |
292 | * by wr_noinc_table). | |
74fe7b55 CDL |
293 | * @readable_noinc_reg: Optional callback returning true if the register |
294 | * supports multiple read operations without incrementing | |
295 | * the register number. If this field is NULL but | |
296 | * rd_noinc_table (see below) is not, the check is | |
297 | * performed on such table (a register is no increment | |
298 | * readable if it belongs to one of the ranges specified | |
299 | * by rd_noinc_table). | |
c9b41fcf | 300 | * @disable_locking: This regmap is either protected by external means or |
6611561a | 301 | * is guaranteed not to be accessed from multiple threads. |
c9b41fcf | 302 | * Don't use any locking mechanisms. |
76aad392 DC |
303 | * @lock: Optional lock callback (overrides regmap's default lock |
304 | * function, based on spinlock or mutex). | |
305 | * @unlock: As above for unlocking. | |
306 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
307 | * functions (ignored in case regular lock/unlock functions | |
308 | * are not overridden). | |
d2a5884a AS |
309 | * @reg_read: Optional callback that if filled will be used to perform |
310 | * all the reads from the registers. Should only be provided for | |
bdc39644 LP |
311 | * devices whose read operation cannot be represented as a simple |
312 | * read operation on a bus such as SPI, I2C, etc. Most of the | |
313 | * devices do not need this. | |
d2a5884a | 314 | * @reg_write: Same as above for writing. |
02d6fdec AS |
315 | * @reg_update_bits: Optional callback that if filled will be used to perform |
316 | * all the update_bits(rmw) operation. Should only be provided | |
317 | * if the function require special handling with lock and reg | |
318 | * handling and the operation cannot be represented as a simple | |
319 | * update_bits operation on a bus such as SPI, I2C, etc. | |
d77e7456 MV |
320 | * @read: Optional callback that if filled will be used to perform all the |
321 | * bulk reads from the registers. Data is returned in the buffer used | |
322 | * to transmit data. | |
323 | * @write: Same as above for writing. | |
324 | * @max_raw_read: Max raw read size that can be used on the device. | |
325 | * @max_raw_write: Max raw write size that can be used on the device. | |
d2a5884a AS |
326 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
327 | * to perform locking. This field is ignored if custom lock/unlock | |
328 | * functions are used (see fields lock/unlock of struct regmap_config). | |
329 | * This field is a duplicate of a similar file in | |
330 | * 'struct regmap_bus' and serves exact same purpose. | |
331 | * Use it only for "no-bus" cases. | |
93ce5576 AS |
332 | * @io_port: Support IO port accessors. Makes sense only when MMIO vs. IO port |
333 | * access can be distinguished. | |
b429fab4 | 334 | * @max_register: Optional, specifies the maximum valid register address. |
76aad392 DC |
335 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
336 | * valid ranges for write access. | |
337 | * @rd_table: As above, for read access. | |
338 | * @volatile_table: As above, for volatile registers. | |
339 | * @precious_table: As above, for precious registers. | |
cdf6b11d | 340 | * @wr_noinc_table: As above, for no increment writeable registers. |
74fe7b55 | 341 | * @rd_noinc_table: As above, for no increment readable registers. |
bd20eb54 MB |
342 | * @reg_defaults: Power on reset values for registers (for use with |
343 | * register cache support). | |
344 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 | 345 | * |
f50e38c9 | 346 | * @read_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 | 347 | * a read. |
f50e38c9 | 348 | * @write_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 | 349 | * a write. If both read_flag_mask and write_flag_mask are |
9bf485c9 AD |
350 | * empty and zero_flag_mask is not set the regmap_bus default |
351 | * masks are used. | |
352 | * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even | |
353 | * if they are both empty. | |
6e1e90ec AR |
354 | * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers. |
355 | * This can avoid load on devices which don't require strict | |
356 | * orderings, but drivers should carefully add any explicit | |
357 | * memory barriers when they may require them. | |
1c96a2f6 DF |
358 | * @use_single_read: If set, converts the bulk read operation into a series of |
359 | * single read operations. This is useful for a device that | |
360 | * does not support bulk read. | |
361 | * @use_single_write: If set, converts the bulk write operation into a series of | |
362 | * single write operations. This is useful for a device that | |
363 | * does not support bulk write. | |
e894c3f4 OAO |
364 | * @can_multi_write: If set, the device supports the multi write mode of bulk |
365 | * write operations, if clear multi write requests will be | |
366 | * split into individual write operations | |
9fabe24e DP |
367 | * |
368 | * @cache_type: The actual cache type. | |
369 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
370 | * register cache support). | |
371 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
372 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
373 | * DEFAULT, the @reg_format_endian_default value from the | |
374 | * regmap bus is used. | |
375 | * @val_format_endian: Endianness for formatted register values. If this is | |
376 | * DEFAULT, the @reg_format_endian_default value from the | |
377 | * regmap bus is used. | |
6863ca62 KG |
378 | * |
379 | * @ranges: Array of configuration entries for virtual address ranges. | |
380 | * @num_ranges: Number of range configuration entries. | |
a4887813 | 381 | * @use_hwlock: Indicate if a hardware spinlock should be used. |
67021f25 | 382 | * @use_raw_spinlock: Indicate if a raw spinlock should be used. |
8698b936 BW |
383 | * @hwlock_id: Specify the hardware spinlock id. |
384 | * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE, | |
385 | * HWLOCK_IRQ or 0. | |
21f8e482 | 386 | * @can_sleep: Optional, specifies whether regmap operations can sleep. |
dd898b20 | 387 | */ |
b83a313b | 388 | struct regmap_config { |
d3c242e1 SW |
389 | const char *name; |
390 | ||
b83a313b | 391 | int reg_bits; |
f01ee60f | 392 | int reg_stride; |
4a670ac3 | 393 | int reg_shift; |
0074f3f2 | 394 | unsigned int reg_base; |
82159ba8 | 395 | int pad_bits; |
b83a313b | 396 | int val_bits; |
2e2ae66d | 397 | |
2e2ae66d MB |
398 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
399 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
400 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 401 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
cdf6b11d | 402 | bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg); |
74fe7b55 | 403 | bool (*readable_noinc_reg)(struct device *dev, unsigned int reg); |
c9b41fcf BG |
404 | |
405 | bool disable_locking; | |
0d4529c5 DC |
406 | regmap_lock lock; |
407 | regmap_unlock unlock; | |
408 | void *lock_arg; | |
bd20eb54 | 409 | |
d2a5884a AS |
410 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
411 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
02d6fdec AS |
412 | int (*reg_update_bits)(void *context, unsigned int reg, |
413 | unsigned int mask, unsigned int val); | |
d77e7456 MV |
414 | /* Bulk read/write */ |
415 | int (*read)(void *context, const void *reg_buf, size_t reg_size, | |
416 | void *val_buf, size_t val_size); | |
417 | int (*write)(void *context, const void *data, size_t count); | |
418 | size_t max_raw_read; | |
419 | size_t max_raw_write; | |
d2a5884a AS |
420 | |
421 | bool fast_io; | |
93ce5576 | 422 | bool io_port; |
d2a5884a | 423 | |
bd20eb54 | 424 | unsigned int max_register; |
76aad392 DC |
425 | const struct regmap_access_table *wr_table; |
426 | const struct regmap_access_table *rd_table; | |
427 | const struct regmap_access_table *volatile_table; | |
428 | const struct regmap_access_table *precious_table; | |
cdf6b11d | 429 | const struct regmap_access_table *wr_noinc_table; |
74fe7b55 | 430 | const struct regmap_access_table *rd_noinc_table; |
720e4616 | 431 | const struct reg_default *reg_defaults; |
9fabe24e DP |
432 | unsigned int num_reg_defaults; |
433 | enum regcache_type cache_type; | |
434 | const void *reg_defaults_raw; | |
435 | unsigned int num_reg_defaults_raw; | |
6f306441 | 436 | |
f50e38c9 TL |
437 | unsigned long read_flag_mask; |
438 | unsigned long write_flag_mask; | |
9bf485c9 | 439 | bool zero_flag_mask; |
2e33caf1 | 440 | |
1c96a2f6 DF |
441 | bool use_single_read; |
442 | bool use_single_write; | |
6e1e90ec | 443 | bool use_relaxed_mmio; |
e894c3f4 | 444 | bool can_multi_write; |
141eba2e SW |
445 | |
446 | enum regmap_endian reg_format_endian; | |
447 | enum regmap_endian val_format_endian; | |
38e23194 | 448 | |
6863ca62 | 449 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 450 | unsigned int num_ranges; |
8698b936 | 451 | |
a4887813 | 452 | bool use_hwlock; |
67021f25 | 453 | bool use_raw_spinlock; |
8698b936 BW |
454 | unsigned int hwlock_id; |
455 | unsigned int hwlock_mode; | |
21f8e482 DO |
456 | |
457 | bool can_sleep; | |
6863ca62 KG |
458 | }; |
459 | ||
460 | /** | |
2cf8e2df CK |
461 | * struct regmap_range_cfg - Configuration for indirectly accessed or paged |
462 | * registers. | |
6863ca62 | 463 | * |
d058bb49 MB |
464 | * @name: Descriptive name for diagnostics |
465 | * | |
6863ca62 KG |
466 | * @range_min: Address of the lowest register address in virtual range. |
467 | * @range_max: Address of the highest register in virtual range. | |
468 | * | |
2cf8e2df | 469 | * @selector_reg: Register with selector field. |
ad5906bd PL |
470 | * @selector_mask: Bit mask for selector value. |
471 | * @selector_shift: Bit shift for selector value. | |
6863ca62 KG |
472 | * |
473 | * @window_start: Address of first (lowest) register in data window. | |
474 | * @window_len: Number of registers in data window. | |
2cf8e2df CK |
475 | * |
476 | * Registers, mapped to this virtual range, are accessed in two steps: | |
477 | * 1. page selector register update; | |
478 | * 2. access through data window registers. | |
6863ca62 KG |
479 | */ |
480 | struct regmap_range_cfg { | |
d058bb49 MB |
481 | const char *name; |
482 | ||
6863ca62 KG |
483 | /* Registers of virtual address range */ |
484 | unsigned int range_min; | |
485 | unsigned int range_max; | |
486 | ||
487 | /* Page selector for indirect addressing */ | |
488 | unsigned int selector_reg; | |
489 | unsigned int selector_mask; | |
490 | int selector_shift; | |
491 | ||
492 | /* Data window (per each page) */ | |
493 | unsigned int window_start; | |
494 | unsigned int window_len; | |
b83a313b MB |
495 | }; |
496 | ||
0d509f2b MB |
497 | struct regmap_async; |
498 | ||
0135bbcc | 499 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 500 | size_t count); |
0135bbcc | 501 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
502 | const void *reg, size_t reg_len, |
503 | const void *val, size_t val_len); | |
0d509f2b MB |
504 | typedef int (*regmap_hw_async_write)(void *context, |
505 | const void *reg, size_t reg_len, | |
506 | const void *val, size_t val_len, | |
507 | struct regmap_async *async); | |
0135bbcc | 508 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
509 | const void *reg_buf, size_t reg_size, |
510 | void *val_buf, size_t val_size); | |
3ac17037 BB |
511 | typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, |
512 | unsigned int *val); | |
c20cc099 LW |
513 | typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg, |
514 | void *val, size_t val_count); | |
3ac17037 BB |
515 | typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, |
516 | unsigned int val); | |
c20cc099 LW |
517 | typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg, |
518 | const void *val, size_t val_count); | |
77792b11 JR |
519 | typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, |
520 | unsigned int mask, unsigned int val); | |
0d509f2b | 521 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 522 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
523 | |
524 | /** | |
2cf8e2df CK |
525 | * struct regmap_bus - Description of a hardware bus for the register map |
526 | * infrastructure. | |
b83a313b | 527 | * |
bacdbe07 | 528 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
529 | * to perform locking. This field is ignored if custom lock/unlock |
530 | * functions are used (see fields lock/unlock of | |
531 | * struct regmap_config). | |
74641458 | 532 | * @free_on_exit: kfree this on exit of regmap |
b83a313b MB |
533 | * @write: Write operation. |
534 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
535 | * if not implemented on a given device. | |
0d509f2b MB |
536 | * @async_write: Write operation which completes asynchronously, optional and |
537 | * must serialise with respect to non-async I/O. | |
c5f58f2d MP |
538 | * @reg_write: Write a single register value to the given register address. This |
539 | * write operation has to complete when returning from the function. | |
c20cc099 LW |
540 | * @reg_write_noinc: Write multiple register value to the same register. This |
541 | * write operation has to complete when returning from the function. | |
2cf8e2df CK |
542 | * @reg_update_bits: Update bits operation to be used against volatile |
543 | * registers, intended for devices supporting some mechanism | |
544 | * for setting clearing bits without having to | |
545 | * read/modify/write. | |
b83a313b MB |
546 | * @read: Read operation. Data is returned in the buffer used to transmit |
547 | * data. | |
c5f58f2d MP |
548 | * @reg_read: Read a single register value from a given register address. |
549 | * @free_context: Free context. | |
0d509f2b | 550 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
551 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
552 | * a read. | |
141eba2e SW |
553 | * @reg_format_endian_default: Default endianness for formatted register |
554 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
555 | * DEFAULT, BIG is assumed. | |
556 | * @val_format_endian_default: Default endianness for formatted register | |
557 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
558 | * DEFAULT, BIG is assumed. | |
adaac459 MP |
559 | * @max_raw_read: Max raw read size that can be used on the bus. |
560 | * @max_raw_write: Max raw write size that can be used on the bus. | |
b83a313b MB |
561 | */ |
562 | struct regmap_bus { | |
bacdbe07 | 563 | bool fast_io; |
74641458 | 564 | bool free_on_exit; |
b83a313b MB |
565 | regmap_hw_write write; |
566 | regmap_hw_gather_write gather_write; | |
0d509f2b | 567 | regmap_hw_async_write async_write; |
3ac17037 | 568 | regmap_hw_reg_write reg_write; |
c20cc099 | 569 | regmap_hw_reg_noinc_write reg_noinc_write; |
77792b11 | 570 | regmap_hw_reg_update_bits reg_update_bits; |
b83a313b | 571 | regmap_hw_read read; |
3ac17037 | 572 | regmap_hw_reg_read reg_read; |
c20cc099 | 573 | regmap_hw_reg_noinc_read reg_noinc_read; |
0135bbcc | 574 | regmap_hw_free_context free_context; |
0d509f2b | 575 | regmap_hw_async_alloc async_alloc; |
b83a313b | 576 | u8 read_flag_mask; |
141eba2e SW |
577 | enum regmap_endian reg_format_endian_default; |
578 | enum regmap_endian val_format_endian_default; | |
adaac459 MP |
579 | size_t max_raw_read; |
580 | size_t max_raw_write; | |
b83a313b MB |
581 | }; |
582 | ||
3cfe7a74 NB |
583 | /* |
584 | * __regmap_init functions. | |
585 | * | |
586 | * These functions take a lock key and name parameter, and should not be called | |
587 | * directly. Instead, use the regmap_init macros that generate a key and name | |
588 | * for each call. | |
589 | */ | |
590 | struct regmap *__regmap_init(struct device *dev, | |
591 | const struct regmap_bus *bus, | |
592 | void *bus_context, | |
593 | const struct regmap_config *config, | |
594 | struct lock_class_key *lock_key, | |
595 | const char *lock_name); | |
596 | struct regmap *__regmap_init_i2c(struct i2c_client *i2c, | |
597 | const struct regmap_config *config, | |
598 | struct lock_class_key *lock_key, | |
599 | const char *lock_name); | |
1f89d2fe SV |
600 | struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev, |
601 | const struct regmap_config *config, | |
602 | struct lock_class_key *lock_key, | |
603 | const char *lock_name); | |
bcf7eac3 AM |
604 | struct regmap *__regmap_init_sccb(struct i2c_client *i2c, |
605 | const struct regmap_config *config, | |
606 | struct lock_class_key *lock_key, | |
607 | const char *lock_name); | |
7d6f7fb0 SK |
608 | struct regmap *__regmap_init_slimbus(struct slim_device *slimbus, |
609 | const struct regmap_config *config, | |
610 | struct lock_class_key *lock_key, | |
611 | const char *lock_name); | |
3cfe7a74 NB |
612 | struct regmap *__regmap_init_spi(struct spi_device *dev, |
613 | const struct regmap_config *config, | |
614 | struct lock_class_key *lock_key, | |
615 | const char *lock_name); | |
616 | struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, | |
617 | const struct regmap_config *config, | |
618 | struct lock_class_key *lock_key, | |
619 | const char *lock_name); | |
620 | struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, | |
621 | const struct regmap_config *config, | |
622 | struct lock_class_key *lock_key, | |
623 | const char *lock_name); | |
cc5d0db3 AM |
624 | struct regmap *__regmap_init_w1(struct device *w1_dev, |
625 | const struct regmap_config *config, | |
626 | struct lock_class_key *lock_key, | |
627 | const char *lock_name); | |
3cfe7a74 NB |
628 | struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
629 | void __iomem *regs, | |
630 | const struct regmap_config *config, | |
631 | struct lock_class_key *lock_key, | |
632 | const char *lock_name); | |
633 | struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, | |
634 | const struct regmap_config *config, | |
635 | struct lock_class_key *lock_key, | |
636 | const char *lock_name); | |
7c22ce6e VK |
637 | struct regmap *__regmap_init_sdw(struct sdw_slave *sdw, |
638 | const struct regmap_config *config, | |
639 | struct lock_class_key *lock_key, | |
640 | const char *lock_name); | |
fb5103f9 PLB |
641 | struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw, |
642 | const struct regmap_config *config, | |
643 | struct lock_class_key *lock_key, | |
644 | const char *lock_name); | |
7f9fb673 XY |
645 | struct regmap *__regmap_init_spi_avmm(struct spi_device *spi, |
646 | const struct regmap_config *config, | |
647 | struct lock_class_key *lock_key, | |
648 | const char *lock_name); | |
bf0d29fb EJ |
649 | struct regmap *__regmap_init_fsi(struct fsi_device *fsi_dev, |
650 | const struct regmap_config *config, | |
651 | struct lock_class_key *lock_key, | |
652 | const char *lock_name); | |
3cfe7a74 NB |
653 | |
654 | struct regmap *__devm_regmap_init(struct device *dev, | |
655 | const struct regmap_bus *bus, | |
656 | void *bus_context, | |
657 | const struct regmap_config *config, | |
658 | struct lock_class_key *lock_key, | |
659 | const char *lock_name); | |
660 | struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, | |
661 | const struct regmap_config *config, | |
662 | struct lock_class_key *lock_key, | |
663 | const char *lock_name); | |
1f89d2fe SV |
664 | struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev, |
665 | const struct regmap_config *config, | |
666 | struct lock_class_key *lock_key, | |
667 | const char *lock_name); | |
bcf7eac3 AM |
668 | struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c, |
669 | const struct regmap_config *config, | |
670 | struct lock_class_key *lock_key, | |
671 | const char *lock_name); | |
3cfe7a74 NB |
672 | struct regmap *__devm_regmap_init_spi(struct spi_device *dev, |
673 | const struct regmap_config *config, | |
674 | struct lock_class_key *lock_key, | |
675 | const char *lock_name); | |
676 | struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, | |
677 | const struct regmap_config *config, | |
678 | struct lock_class_key *lock_key, | |
679 | const char *lock_name); | |
680 | struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, | |
681 | const struct regmap_config *config, | |
682 | struct lock_class_key *lock_key, | |
683 | const char *lock_name); | |
cc5d0db3 AM |
684 | struct regmap *__devm_regmap_init_w1(struct device *w1_dev, |
685 | const struct regmap_config *config, | |
686 | struct lock_class_key *lock_key, | |
687 | const char *lock_name); | |
3cfe7a74 NB |
688 | struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, |
689 | const char *clk_id, | |
690 | void __iomem *regs, | |
691 | const struct regmap_config *config, | |
692 | struct lock_class_key *lock_key, | |
693 | const char *lock_name); | |
694 | struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, | |
695 | const struct regmap_config *config, | |
696 | struct lock_class_key *lock_key, | |
697 | const char *lock_name); | |
7c22ce6e VK |
698 | struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw, |
699 | const struct regmap_config *config, | |
700 | struct lock_class_key *lock_key, | |
701 | const char *lock_name); | |
fb5103f9 PLB |
702 | struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw, |
703 | const struct regmap_config *config, | |
704 | struct lock_class_key *lock_key, | |
705 | const char *lock_name); | |
ed24d568 SK |
706 | struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus, |
707 | const struct regmap_config *config, | |
708 | struct lock_class_key *lock_key, | |
709 | const char *lock_name); | |
6445500b VS |
710 | struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, |
711 | const struct regmap_config *config, | |
712 | struct lock_class_key *lock_key, | |
713 | const char *lock_name); | |
7f9fb673 XY |
714 | struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi, |
715 | const struct regmap_config *config, | |
716 | struct lock_class_key *lock_key, | |
717 | const char *lock_name); | |
bf0d29fb EJ |
718 | struct regmap *__devm_regmap_init_fsi(struct fsi_device *fsi_dev, |
719 | const struct regmap_config *config, | |
720 | struct lock_class_key *lock_key, | |
721 | const char *lock_name); | |
722 | ||
3cfe7a74 NB |
723 | /* |
724 | * Wrapper for regmap_init macros to include a unique lockdep key and name | |
725 | * for each call. No-op if CONFIG_LOCKDEP is not set. | |
726 | * | |
727 | * @fn: Real function to call (in the form __[*_]regmap_init[_*]) | |
728 | * @name: Config variable name (#config in the calling macro) | |
729 | **/ | |
730 | #ifdef CONFIG_LOCKDEP | |
731 | #define __regmap_lockdep_wrapper(fn, name, ...) \ | |
732 | ( \ | |
733 | ({ \ | |
734 | static struct lock_class_key _key; \ | |
735 | fn(__VA_ARGS__, &_key, \ | |
736 | KBUILD_BASENAME ":" \ | |
737 | __stringify(__LINE__) ":" \ | |
738 | "(" name ")->lock"); \ | |
739 | }) \ | |
740 | ) | |
741 | #else | |
742 | #define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) | |
743 | #endif | |
744 | ||
1ed81114 | 745 | /** |
2cf8e2df | 746 | * regmap_init() - Initialise register map |
1ed81114 NB |
747 | * |
748 | * @dev: Device that will be interacted with | |
749 | * @bus: Bus-specific callbacks to use with device | |
750 | * @bus_context: Data passed to bus-specific callbacks | |
751 | * @config: Configuration for register map | |
752 | * | |
753 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
754 | * a struct regmap. This function should generally not be called | |
755 | * directly, it should be called by bus-specific init functions. | |
756 | */ | |
3cfe7a74 NB |
757 | #define regmap_init(dev, bus, bus_context, config) \ |
758 | __regmap_lockdep_wrapper(__regmap_init, #config, \ | |
759 | dev, bus, bus_context, config) | |
6cfec04b | 760 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
3cfe7a74 | 761 | const struct regmap_config *config); |
22853223 | 762 | |
1ed81114 | 763 | /** |
2cf8e2df | 764 | * regmap_init_i2c() - Initialise register map |
1ed81114 NB |
765 | * |
766 | * @i2c: Device that will be interacted with | |
767 | * @config: Configuration for register map | |
768 | * | |
769 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
770 | * a struct regmap. | |
771 | */ | |
3cfe7a74 NB |
772 | #define regmap_init_i2c(i2c, config) \ |
773 | __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ | |
774 | i2c, config) | |
1ed81114 | 775 | |
1f89d2fe SV |
776 | /** |
777 | * regmap_init_mdio() - Initialise register map | |
778 | * | |
779 | * @mdio_dev: Device that will be interacted with | |
780 | * @config: Configuration for register map | |
781 | * | |
782 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
783 | * a struct regmap. | |
784 | */ | |
785 | #define regmap_init_mdio(mdio_dev, config) \ | |
786 | __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \ | |
787 | mdio_dev, config) | |
788 | ||
bcf7eac3 AM |
789 | /** |
790 | * regmap_init_sccb() - Initialise register map | |
791 | * | |
792 | * @i2c: Device that will be interacted with | |
793 | * @config: Configuration for register map | |
794 | * | |
795 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
796 | * a struct regmap. | |
797 | */ | |
798 | #define regmap_init_sccb(i2c, config) \ | |
799 | __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \ | |
800 | i2c, config) | |
801 | ||
7d6f7fb0 SK |
802 | /** |
803 | * regmap_init_slimbus() - Initialise register map | |
804 | * | |
805 | * @slimbus: Device that will be interacted with | |
806 | * @config: Configuration for register map | |
807 | * | |
808 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
809 | * a struct regmap. | |
810 | */ | |
811 | #define regmap_init_slimbus(slimbus, config) \ | |
812 | __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \ | |
813 | slimbus, config) | |
814 | ||
1ed81114 | 815 | /** |
2cf8e2df | 816 | * regmap_init_spi() - Initialise register map |
1ed81114 | 817 | * |
2cf8e2df | 818 | * @dev: Device that will be interacted with |
1ed81114 NB |
819 | * @config: Configuration for register map |
820 | * | |
821 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
822 | * a struct regmap. | |
823 | */ | |
3cfe7a74 NB |
824 | #define regmap_init_spi(dev, config) \ |
825 | __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ | |
826 | dev, config) | |
1ed81114 NB |
827 | |
828 | /** | |
2cf8e2df CK |
829 | * regmap_init_spmi_base() - Create regmap for the Base register space |
830 | * | |
831 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
832 | * @config: Configuration for register map |
833 | * | |
834 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
835 | * a struct regmap. | |
836 | */ | |
3cfe7a74 NB |
837 | #define regmap_init_spmi_base(dev, config) \ |
838 | __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ | |
839 | dev, config) | |
1ed81114 NB |
840 | |
841 | /** | |
2cf8e2df CK |
842 | * regmap_init_spmi_ext() - Create regmap for Ext register space |
843 | * | |
844 | * @dev: Device that will be interacted with | |
1ed81114 NB |
845 | * @config: Configuration for register map |
846 | * | |
847 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
848 | * a struct regmap. | |
849 | */ | |
3cfe7a74 NB |
850 | #define regmap_init_spmi_ext(dev, config) \ |
851 | __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ | |
852 | dev, config) | |
1ed81114 | 853 | |
cc5d0db3 AM |
854 | /** |
855 | * regmap_init_w1() - Initialise register map | |
856 | * | |
857 | * @w1_dev: Device that will be interacted with | |
858 | * @config: Configuration for register map | |
859 | * | |
860 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
861 | * a struct regmap. | |
862 | */ | |
863 | #define regmap_init_w1(w1_dev, config) \ | |
864 | __regmap_lockdep_wrapper(__regmap_init_w1, #config, \ | |
865 | w1_dev, config) | |
866 | ||
1ed81114 | 867 | /** |
2cf8e2df | 868 | * regmap_init_mmio_clk() - Initialise register map with register clock |
1ed81114 NB |
869 | * |
870 | * @dev: Device that will be interacted with | |
871 | * @clk_id: register clock consumer ID | |
872 | * @regs: Pointer to memory-mapped IO region | |
873 | * @config: Configuration for register map | |
874 | * | |
875 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
876 | * a struct regmap. | |
877 | */ | |
3cfe7a74 NB |
878 | #define regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
879 | __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ | |
880 | dev, clk_id, regs, config) | |
878ec67b PZ |
881 | |
882 | /** | |
2cf8e2df | 883 | * regmap_init_mmio() - Initialise register map |
878ec67b PZ |
884 | * |
885 | * @dev: Device that will be interacted with | |
886 | * @regs: Pointer to memory-mapped IO region | |
887 | * @config: Configuration for register map | |
888 | * | |
889 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
890 | * a struct regmap. | |
891 | */ | |
1ed81114 NB |
892 | #define regmap_init_mmio(dev, regs, config) \ |
893 | regmap_init_mmio_clk(dev, NULL, regs, config) | |
894 | ||
895 | /** | |
2cf8e2df | 896 | * regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
897 | * |
898 | * @ac97: Device that will be interacted with | |
899 | * @config: Configuration for register map | |
900 | * | |
901 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
902 | * a struct regmap. | |
903 | */ | |
3cfe7a74 NB |
904 | #define regmap_init_ac97(ac97, config) \ |
905 | __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ | |
906 | ac97, config) | |
22853223 | 907 | bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); |
878ec67b | 908 | |
7c22ce6e VK |
909 | /** |
910 | * regmap_init_sdw() - Initialise register map | |
911 | * | |
912 | * @sdw: Device that will be interacted with | |
913 | * @config: Configuration for register map | |
914 | * | |
915 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
916 | * a struct regmap. | |
917 | */ | |
918 | #define regmap_init_sdw(sdw, config) \ | |
919 | __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \ | |
920 | sdw, config) | |
921 | ||
fb5103f9 PLB |
922 | /** |
923 | * regmap_init_sdw_mbq() - Initialise register map | |
924 | * | |
925 | * @sdw: Device that will be interacted with | |
926 | * @config: Configuration for register map | |
927 | * | |
928 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
929 | * a struct regmap. | |
930 | */ | |
931 | #define regmap_init_sdw_mbq(sdw, config) \ | |
932 | __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \ | |
933 | sdw, config) | |
934 | ||
7f9fb673 XY |
935 | /** |
936 | * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave | |
937 | * to AVMM Bus Bridge | |
938 | * | |
939 | * @spi: Device that will be interacted with | |
940 | * @config: Configuration for register map | |
941 | * | |
942 | * The return value will be an ERR_PTR() on error or a valid pointer | |
943 | * to a struct regmap. | |
944 | */ | |
945 | #define regmap_init_spi_avmm(spi, config) \ | |
946 | __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \ | |
947 | spi, config) | |
7c22ce6e | 948 | |
bf0d29fb EJ |
949 | /** |
950 | * regmap_init_fsi() - Initialise register map | |
951 | * | |
952 | * @fsi_dev: Device that will be interacted with | |
953 | * @config: Configuration for register map | |
954 | * | |
955 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
956 | * a struct regmap. | |
957 | */ | |
958 | #define regmap_init_fsi(fsi_dev, config) \ | |
959 | __regmap_lockdep_wrapper(__regmap_init_fsi, #config, fsi_dev, \ | |
960 | config) | |
961 | ||
1ed81114 | 962 | /** |
2cf8e2df | 963 | * devm_regmap_init() - Initialise managed register map |
1ed81114 NB |
964 | * |
965 | * @dev: Device that will be interacted with | |
966 | * @bus: Bus-specific callbacks to use with device | |
967 | * @bus_context: Data passed to bus-specific callbacks | |
968 | * @config: Configuration for register map | |
969 | * | |
970 | * The return value will be an ERR_PTR() on error or a valid pointer | |
971 | * to a struct regmap. This function should generally not be called | |
972 | * directly, it should be called by bus-specific init functions. The | |
973 | * map will be automatically freed by the device management code. | |
974 | */ | |
3cfe7a74 NB |
975 | #define devm_regmap_init(dev, bus, bus_context, config) \ |
976 | __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ | |
977 | dev, bus, bus_context, config) | |
1ed81114 NB |
978 | |
979 | /** | |
2cf8e2df | 980 | * devm_regmap_init_i2c() - Initialise managed register map |
1ed81114 NB |
981 | * |
982 | * @i2c: Device that will be interacted with | |
983 | * @config: Configuration for register map | |
984 | * | |
985 | * The return value will be an ERR_PTR() on error or a valid pointer | |
986 | * to a struct regmap. The regmap will be automatically freed by the | |
987 | * device management code. | |
988 | */ | |
3cfe7a74 NB |
989 | #define devm_regmap_init_i2c(i2c, config) \ |
990 | __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ | |
991 | i2c, config) | |
1ed81114 | 992 | |
1f89d2fe SV |
993 | /** |
994 | * devm_regmap_init_mdio() - Initialise managed register map | |
995 | * | |
996 | * @mdio_dev: Device that will be interacted with | |
997 | * @config: Configuration for register map | |
998 | * | |
999 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1000 | * to a struct regmap. The regmap will be automatically freed by the | |
1001 | * device management code. | |
1002 | */ | |
1003 | #define devm_regmap_init_mdio(mdio_dev, config) \ | |
1004 | __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \ | |
1005 | mdio_dev, config) | |
1006 | ||
bcf7eac3 AM |
1007 | /** |
1008 | * devm_regmap_init_sccb() - Initialise managed register map | |
1009 | * | |
1010 | * @i2c: Device that will be interacted with | |
1011 | * @config: Configuration for register map | |
1012 | * | |
1013 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1014 | * to a struct regmap. The regmap will be automatically freed by the | |
1015 | * device management code. | |
1016 | */ | |
1017 | #define devm_regmap_init_sccb(i2c, config) \ | |
1018 | __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \ | |
1019 | i2c, config) | |
1020 | ||
1ed81114 | 1021 | /** |
2cf8e2df | 1022 | * devm_regmap_init_spi() - Initialise register map |
1ed81114 | 1023 | * |
2cf8e2df | 1024 | * @dev: Device that will be interacted with |
1ed81114 NB |
1025 | * @config: Configuration for register map |
1026 | * | |
1027 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1028 | * to a struct regmap. The map will be automatically freed by the | |
1029 | * device management code. | |
1030 | */ | |
3cfe7a74 NB |
1031 | #define devm_regmap_init_spi(dev, config) \ |
1032 | __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ | |
1033 | dev, config) | |
1ed81114 NB |
1034 | |
1035 | /** | |
2cf8e2df CK |
1036 | * devm_regmap_init_spmi_base() - Create managed regmap for Base register space |
1037 | * | |
1038 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
1039 | * @config: Configuration for register map |
1040 | * | |
1041 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1042 | * to a struct regmap. The regmap will be automatically freed by the | |
1043 | * device management code. | |
1044 | */ | |
3cfe7a74 NB |
1045 | #define devm_regmap_init_spmi_base(dev, config) \ |
1046 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ | |
1047 | dev, config) | |
1ed81114 NB |
1048 | |
1049 | /** | |
2cf8e2df CK |
1050 | * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space |
1051 | * | |
1052 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
1053 | * @config: Configuration for register map |
1054 | * | |
1055 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1056 | * to a struct regmap. The regmap will be automatically freed by the | |
1057 | * device management code. | |
1058 | */ | |
3cfe7a74 NB |
1059 | #define devm_regmap_init_spmi_ext(dev, config) \ |
1060 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ | |
1061 | dev, config) | |
3cfe7a74 | 1062 | |
cc5d0db3 AM |
1063 | /** |
1064 | * devm_regmap_init_w1() - Initialise managed register map | |
1065 | * | |
1066 | * @w1_dev: Device that will be interacted with | |
1067 | * @config: Configuration for register map | |
1068 | * | |
1069 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1070 | * to a struct regmap. The regmap will be automatically freed by the | |
1071 | * device management code. | |
1072 | */ | |
1073 | #define devm_regmap_init_w1(w1_dev, config) \ | |
1074 | __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \ | |
1075 | w1_dev, config) | |
878ec67b | 1076 | /** |
2cf8e2df | 1077 | * devm_regmap_init_mmio_clk() - Initialise managed register map with clock |
878ec67b PZ |
1078 | * |
1079 | * @dev: Device that will be interacted with | |
1ed81114 | 1080 | * @clk_id: register clock consumer ID |
878ec67b PZ |
1081 | * @regs: Pointer to memory-mapped IO region |
1082 | * @config: Configuration for register map | |
1083 | * | |
1ed81114 NB |
1084 | * The return value will be an ERR_PTR() on error or a valid pointer |
1085 | * to a struct regmap. The regmap will be automatically freed by the | |
1086 | * device management code. | |
878ec67b | 1087 | */ |
1ed81114 NB |
1088 | #define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
1089 | __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ | |
1090 | dev, clk_id, regs, config) | |
878ec67b PZ |
1091 | |
1092 | /** | |
2cf8e2df | 1093 | * devm_regmap_init_mmio() - Initialise managed register map |
878ec67b PZ |
1094 | * |
1095 | * @dev: Device that will be interacted with | |
1096 | * @regs: Pointer to memory-mapped IO region | |
1097 | * @config: Configuration for register map | |
1098 | * | |
1099 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1100 | * to a struct regmap. The regmap will be automatically freed by the | |
1101 | * device management code. | |
1102 | */ | |
3cfe7a74 NB |
1103 | #define devm_regmap_init_mmio(dev, regs, config) \ |
1104 | devm_regmap_init_mmio_clk(dev, NULL, regs, config) | |
c0eb4676 | 1105 | |
1ed81114 | 1106 | /** |
2cf8e2df | 1107 | * devm_regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
1108 | * |
1109 | * @ac97: Device that will be interacted with | |
1110 | * @config: Configuration for register map | |
1111 | * | |
1112 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1113 | * to a struct regmap. The regmap will be automatically freed by the | |
1114 | * device management code. | |
1115 | */ | |
1116 | #define devm_regmap_init_ac97(ac97, config) \ | |
1117 | __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ | |
1118 | ac97, config) | |
c0eb4676 | 1119 | |
7c22ce6e VK |
1120 | /** |
1121 | * devm_regmap_init_sdw() - Initialise managed register map | |
1122 | * | |
1123 | * @sdw: Device that will be interacted with | |
1124 | * @config: Configuration for register map | |
1125 | * | |
1126 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1127 | * to a struct regmap. The regmap will be automatically freed by the | |
1128 | * device management code. | |
1129 | */ | |
1130 | #define devm_regmap_init_sdw(sdw, config) \ | |
1131 | __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \ | |
1132 | sdw, config) | |
1133 | ||
fb5103f9 PLB |
1134 | /** |
1135 | * devm_regmap_init_sdw_mbq() - Initialise managed register map | |
1136 | * | |
1137 | * @sdw: Device that will be interacted with | |
1138 | * @config: Configuration for register map | |
1139 | * | |
1140 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1141 | * to a struct regmap. The regmap will be automatically freed by the | |
1142 | * device management code. | |
1143 | */ | |
1144 | #define devm_regmap_init_sdw_mbq(sdw, config) \ | |
1145 | __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \ | |
1146 | sdw, config) | |
1147 | ||
ed24d568 SK |
1148 | /** |
1149 | * devm_regmap_init_slimbus() - Initialise managed register map | |
1150 | * | |
1151 | * @slimbus: Device that will be interacted with | |
1152 | * @config: Configuration for register map | |
1153 | * | |
1154 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1155 | * to a struct regmap. The regmap will be automatically freed by the | |
1156 | * device management code. | |
1157 | */ | |
1158 | #define devm_regmap_init_slimbus(slimbus, config) \ | |
1159 | __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \ | |
1160 | slimbus, config) | |
6445500b VS |
1161 | |
1162 | /** | |
1163 | * devm_regmap_init_i3c() - Initialise managed register map | |
1164 | * | |
1165 | * @i3c: Device that will be interacted with | |
1166 | * @config: Configuration for register map | |
1167 | * | |
1168 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1169 | * to a struct regmap. The regmap will be automatically freed by the | |
1170 | * device management code. | |
1171 | */ | |
1172 | #define devm_regmap_init_i3c(i3c, config) \ | |
1173 | __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \ | |
1174 | i3c, config) | |
1175 | ||
7f9fb673 XY |
1176 | /** |
1177 | * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave | |
1178 | * to AVMM Bus Bridge | |
1179 | * | |
1180 | * @spi: Device that will be interacted with | |
1181 | * @config: Configuration for register map | |
1182 | * | |
1183 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1184 | * to a struct regmap. The map will be automatically freed by the | |
1185 | * device management code. | |
1186 | */ | |
1187 | #define devm_regmap_init_spi_avmm(spi, config) \ | |
1188 | __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \ | |
1189 | spi, config) | |
1190 | ||
bf0d29fb EJ |
1191 | /** |
1192 | * devm_regmap_init_fsi() - Initialise managed register map | |
1193 | * | |
1194 | * @fsi_dev: Device that will be interacted with | |
1195 | * @config: Configuration for register map | |
1196 | * | |
1197 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1198 | * to a struct regmap. The regmap will be automatically freed by the | |
1199 | * device management code. | |
1200 | */ | |
1201 | #define devm_regmap_init_fsi(fsi_dev, config) \ | |
1202 | __regmap_lockdep_wrapper(__devm_regmap_init_fsi, #config, \ | |
1203 | fsi_dev, config) | |
1204 | ||
31895662 MR |
1205 | int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk); |
1206 | void regmap_mmio_detach_clk(struct regmap *map); | |
b83a313b | 1207 | void regmap_exit(struct regmap *map); |
bf315173 MB |
1208 | int regmap_reinit_cache(struct regmap *map, |
1209 | const struct regmap_config *config); | |
72b39f6f | 1210 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
8d7d3972 | 1211 | struct device *regmap_get_device(struct regmap *map); |
b83a313b | 1212 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
915f441b | 1213 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); |
b83a313b MB |
1214 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
1215 | const void *val, size_t val_len); | |
cdf6b11d BW |
1216 | int regmap_noinc_write(struct regmap *map, unsigned int reg, |
1217 | const void *val, size_t val_len); | |
8eaeb219 LD |
1218 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
1219 | size_t val_count); | |
8019ff6c | 1220 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
e33fabd3 | 1221 | int num_regs); |
1d5b40bc | 1222 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
8019ff6c | 1223 | const struct reg_sequence *regs, |
1d5b40bc | 1224 | int num_regs); |
0d509f2b MB |
1225 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
1226 | const void *val, size_t val_len); | |
b83a313b MB |
1227 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
1228 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
1229 | void *val, size_t val_len); | |
74fe7b55 CDL |
1230 | int regmap_noinc_read(struct regmap *map, unsigned int reg, |
1231 | void *val, size_t val_len); | |
b83a313b MB |
1232 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, |
1233 | size_t val_count); | |
91d31b9f KM |
1234 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
1235 | unsigned int mask, unsigned int val, | |
1236 | bool *change, bool async, bool force); | |
4b9e7edb BG |
1237 | |
1238 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
1239 | unsigned int mask, unsigned int val) | |
1240 | { | |
1241 | return regmap_update_bits_base(map, reg, mask, val, NULL, false, false); | |
1242 | } | |
1243 | ||
1244 | static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
1245 | unsigned int mask, unsigned int val) | |
1246 | { | |
1247 | return regmap_update_bits_base(map, reg, mask, val, NULL, true, false); | |
1248 | } | |
1249 | ||
1250 | static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
1251 | unsigned int mask, unsigned int val, | |
1252 | bool *change) | |
1253 | { | |
1254 | return regmap_update_bits_base(map, reg, mask, val, | |
1255 | change, false, false); | |
1256 | } | |
1257 | ||
1258 | static inline int | |
1259 | regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
1260 | unsigned int mask, unsigned int val, | |
1261 | bool *change) | |
1262 | { | |
1263 | return regmap_update_bits_base(map, reg, mask, val, | |
1264 | change, true, false); | |
1265 | } | |
1266 | ||
1267 | static inline int regmap_write_bits(struct regmap *map, unsigned int reg, | |
1268 | unsigned int mask, unsigned int val) | |
1269 | { | |
1270 | return regmap_update_bits_base(map, reg, mask, val, NULL, false, true); | |
1271 | } | |
1272 | ||
a6539c32 | 1273 | int regmap_get_val_bytes(struct regmap *map); |
668abc72 | 1274 | int regmap_get_max_register(struct regmap *map); |
a2f776cb | 1275 | int regmap_get_reg_stride(struct regmap *map); |
a6d99022 | 1276 | bool regmap_might_sleep(struct regmap *map); |
0d509f2b | 1277 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 1278 | bool regmap_can_raw_write(struct regmap *map); |
f50c9eb4 MP |
1279 | size_t regmap_get_raw_read_max(struct regmap *map); |
1280 | size_t regmap_get_raw_write_max(struct regmap *map); | |
b83a313b | 1281 | |
39a58439 | 1282 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
1283 | int regcache_sync_region(struct regmap *map, unsigned int min, |
1284 | unsigned int max); | |
697e85bc MB |
1285 | int regcache_drop_region(struct regmap *map, unsigned int min, |
1286 | unsigned int max); | |
92afb286 | 1287 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 1288 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 1289 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 1290 | |
154881e5 MB |
1291 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
1292 | const struct regmap_access_table *table); | |
1293 | ||
8019ff6c | 1294 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
22f0d90a | 1295 | int num_regs); |
13ff50c8 NC |
1296 | int regmap_parse_val(struct regmap *map, const void *buf, |
1297 | unsigned int *val); | |
22f0d90a | 1298 | |
76aad392 DC |
1299 | static inline bool regmap_reg_in_range(unsigned int reg, |
1300 | const struct regmap_range *range) | |
1301 | { | |
1302 | return reg >= range->range_min && reg <= range->range_max; | |
1303 | } | |
1304 | ||
1305 | bool regmap_reg_in_ranges(unsigned int reg, | |
1306 | const struct regmap_range *ranges, | |
1307 | unsigned int nranges); | |
1308 | ||
aa2ff9db BG |
1309 | static inline int regmap_set_bits(struct regmap *map, |
1310 | unsigned int reg, unsigned int bits) | |
1311 | { | |
1312 | return regmap_update_bits_base(map, reg, bits, bits, | |
1313 | NULL, false, false); | |
1314 | } | |
1315 | ||
1316 | static inline int regmap_clear_bits(struct regmap *map, | |
1317 | unsigned int reg, unsigned int bits) | |
1318 | { | |
1319 | return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false); | |
1320 | } | |
1321 | ||
1322 | int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits); | |
1323 | ||
67252287 | 1324 | /** |
2cf8e2df | 1325 | * struct reg_field - Description of an register field |
67252287 SK |
1326 | * |
1327 | * @reg: Offset of the register within the regmap bank | |
1328 | * @lsb: lsb of the register field. | |
f27b37f5 | 1329 | * @msb: msb of the register field. |
a0102375 KM |
1330 | * @id_size: port size if it has some ports |
1331 | * @id_offset: address offset for each ports | |
67252287 SK |
1332 | */ |
1333 | struct reg_field { | |
1334 | unsigned int reg; | |
1335 | unsigned int lsb; | |
1336 | unsigned int msb; | |
a0102375 KM |
1337 | unsigned int id_size; |
1338 | unsigned int id_offset; | |
67252287 SK |
1339 | }; |
1340 | ||
1341 | #define REG_FIELD(_reg, _lsb, _msb) { \ | |
1342 | .reg = _reg, \ | |
1343 | .lsb = _lsb, \ | |
1344 | .msb = _msb, \ | |
1345 | } | |
1346 | ||
8baebfc2 VO |
1347 | #define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \ |
1348 | .reg = _reg, \ | |
1349 | .lsb = _lsb, \ | |
1350 | .msb = _msb, \ | |
1351 | .id_size = _size, \ | |
1352 | .id_offset = _offset, \ | |
1353 | } | |
1354 | ||
67252287 SK |
1355 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, |
1356 | struct reg_field reg_field); | |
1357 | void regmap_field_free(struct regmap_field *field); | |
1358 | ||
1359 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
1360 | struct regmap *regmap, struct reg_field reg_field); | |
1361 | void devm_regmap_field_free(struct device *dev, struct regmap_field *field); | |
1362 | ||
ea470b82 SK |
1363 | int regmap_field_bulk_alloc(struct regmap *regmap, |
1364 | struct regmap_field **rm_field, | |
29c34975 | 1365 | const struct reg_field *reg_field, |
ea470b82 SK |
1366 | int num_fields); |
1367 | void regmap_field_bulk_free(struct regmap_field *field); | |
1368 | int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap, | |
1369 | struct regmap_field **field, | |
29c34975 IZ |
1370 | const struct reg_field *reg_field, |
1371 | int num_fields); | |
ea470b82 SK |
1372 | void devm_regmap_field_bulk_free(struct device *dev, |
1373 | struct regmap_field *field); | |
1374 | ||
67252287 | 1375 | int regmap_field_read(struct regmap_field *field, unsigned int *val); |
28972eaa KM |
1376 | int regmap_field_update_bits_base(struct regmap_field *field, |
1377 | unsigned int mask, unsigned int val, | |
1378 | bool *change, bool async, bool force); | |
a0102375 KM |
1379 | int regmap_fields_read(struct regmap_field *field, unsigned int id, |
1380 | unsigned int *val); | |
e126edec KM |
1381 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
1382 | unsigned int mask, unsigned int val, | |
1383 | bool *change, bool async, bool force); | |
4b9e7edb BG |
1384 | |
1385 | static inline int regmap_field_write(struct regmap_field *field, | |
1386 | unsigned int val) | |
1387 | { | |
1388 | return regmap_field_update_bits_base(field, ~0, val, | |
1389 | NULL, false, false); | |
1390 | } | |
1391 | ||
1392 | static inline int regmap_field_force_write(struct regmap_field *field, | |
1393 | unsigned int val) | |
1394 | { | |
1395 | return regmap_field_update_bits_base(field, ~0, val, NULL, false, true); | |
1396 | } | |
1397 | ||
1398 | static inline int regmap_field_update_bits(struct regmap_field *field, | |
1399 | unsigned int mask, unsigned int val) | |
1400 | { | |
1401 | return regmap_field_update_bits_base(field, mask, val, | |
1402 | NULL, false, false); | |
1403 | } | |
1404 | ||
f67be8b7 LC |
1405 | static inline int regmap_field_set_bits(struct regmap_field *field, |
1406 | unsigned int bits) | |
1407 | { | |
1408 | return regmap_field_update_bits_base(field, bits, bits, NULL, false, | |
1409 | false); | |
1410 | } | |
1411 | ||
1412 | static inline int regmap_field_clear_bits(struct regmap_field *field, | |
1413 | unsigned int bits) | |
1414 | { | |
1415 | return regmap_field_update_bits_base(field, bits, 0, NULL, false, | |
1416 | false); | |
1417 | } | |
1418 | ||
1419 | int regmap_field_test_bits(struct regmap_field *field, unsigned int bits); | |
1420 | ||
4b9e7edb BG |
1421 | static inline int |
1422 | regmap_field_force_update_bits(struct regmap_field *field, | |
1423 | unsigned int mask, unsigned int val) | |
1424 | { | |
1425 | return regmap_field_update_bits_base(field, mask, val, | |
1426 | NULL, false, true); | |
1427 | } | |
1428 | ||
1429 | static inline int regmap_fields_write(struct regmap_field *field, | |
1430 | unsigned int id, unsigned int val) | |
1431 | { | |
1432 | return regmap_fields_update_bits_base(field, id, ~0, val, | |
1433 | NULL, false, false); | |
1434 | } | |
1435 | ||
1436 | static inline int regmap_fields_force_write(struct regmap_field *field, | |
1437 | unsigned int id, unsigned int val) | |
1438 | { | |
1439 | return regmap_fields_update_bits_base(field, id, ~0, val, | |
1440 | NULL, false, true); | |
1441 | } | |
1442 | ||
1443 | static inline int | |
1444 | regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1445 | unsigned int mask, unsigned int val) | |
1446 | { | |
1447 | return regmap_fields_update_bits_base(field, id, mask, val, | |
1448 | NULL, false, false); | |
1449 | } | |
1450 | ||
1451 | static inline int | |
1452 | regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, | |
1453 | unsigned int mask, unsigned int val) | |
1454 | { | |
1455 | return regmap_fields_update_bits_base(field, id, mask, val, | |
1456 | NULL, false, true); | |
1457 | } | |
1458 | ||
1c2928e3 MV |
1459 | /** |
1460 | * struct regmap_irq_type - IRQ type definitions. | |
1461 | * | |
1462 | * @type_reg_offset: Offset register for the irq type setting. | |
1463 | * @type_rising_val: Register value to configure RISING type irq. | |
1464 | * @type_falling_val: Register value to configure FALLING type irq. | |
1465 | * @type_level_low_val: Register value to configure LEVEL_LOW type irq. | |
1466 | * @type_level_high_val: Register value to configure LEVEL_HIGH type irq. | |
1467 | * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types. | |
1468 | */ | |
1469 | struct regmap_irq_type { | |
1470 | unsigned int type_reg_offset; | |
1471 | unsigned int type_reg_mask; | |
1472 | unsigned int type_rising_val; | |
1473 | unsigned int type_falling_val; | |
1474 | unsigned int type_level_low_val; | |
1475 | unsigned int type_level_high_val; | |
1476 | unsigned int types_supported; | |
1477 | }; | |
76aad392 | 1478 | |
f8beab2b | 1479 | /** |
2cf8e2df | 1480 | * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip. |
f8beab2b MB |
1481 | * |
1482 | * @reg_offset: Offset of the status/mask register within the bank | |
1483 | * @mask: Mask used to flag/control the register. | |
1c2928e3 | 1484 | * @type: IRQ trigger type setting details if supported. |
f8beab2b MB |
1485 | */ |
1486 | struct regmap_irq { | |
1487 | unsigned int reg_offset; | |
1488 | unsigned int mask; | |
1c2928e3 | 1489 | struct regmap_irq_type type; |
f8beab2b MB |
1490 | }; |
1491 | ||
b4fe8ba7 QZ |
1492 | #define REGMAP_IRQ_REG(_irq, _off, _mask) \ |
1493 | [_irq] = { .reg_offset = (_off), .mask = (_mask) } | |
1494 | ||
43fac323 TX |
1495 | #define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \ |
1496 | [_id] = { \ | |
1497 | .mask = BIT((_id) % (_reg_bits)), \ | |
1498 | .reg_offset = (_id) / (_reg_bits), \ | |
1499 | } | |
1500 | ||
a2d21848 MV |
1501 | #define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \ |
1502 | { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] } | |
1503 | ||
1504 | struct regmap_irq_sub_irq_map { | |
1505 | unsigned int num_regs; | |
1506 | unsigned int *offset; | |
1507 | }; | |
1508 | ||
bdf9b86c AM |
1509 | struct regmap_irq_chip_data; |
1510 | ||
f8beab2b | 1511 | /** |
2cf8e2df | 1512 | * struct regmap_irq_chip - Description of a generic regmap irq_chip. |
f8beab2b MB |
1513 | * |
1514 | * @name: Descriptive name for IRQ controller. | |
1515 | * | |
a2d21848 MV |
1516 | * @main_status: Base main status register address. For chips which have |
1517 | * interrupts arranged in separate sub-irq blocks with own IRQ | |
1518 | * registers and which have a main IRQ registers indicating | |
1519 | * sub-irq blocks with unhandled interrupts. For such chips fill | |
1520 | * sub-irq register information in status_base, mask_base and | |
1521 | * ack_base. | |
1522 | * @num_main_status_bits: Should be given to chips where number of meaningfull | |
1523 | * main status bits differs from num_regs. | |
1524 | * @sub_reg_offsets: arrays of mappings from main register bits to sub irq | |
1525 | * registers. First item in array describes the registers | |
1526 | * for first main status bit. Second array for second bit etc. | |
1527 | * Offset is given as sub register status offset to | |
1528 | * status_base. Should contain num_regs arrays. | |
1529 | * Can be provided for chips with more complex mapping than | |
1530 | * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ... | |
1066cfbd GDS |
1531 | * When used with not_fixed_stride, each one-element array |
1532 | * member contains offset calculated as address from each | |
1533 | * peripheral to first peripheral. | |
a2d21848 MV |
1534 | * @num_main_regs: Number of 'main status' irq registers for chips which have |
1535 | * main_status set. | |
1536 | * | |
f8beab2b | 1537 | * @status_base: Base status register address. |
e8ffb12e AM |
1538 | * @mask_base: Base mask register address. Mask bits are set to 1 when an |
1539 | * interrupt is masked, 0 when unmasked. | |
1540 | * @unmask_base: Base unmask register address. Unmask bits are set to 1 when | |
1541 | * an interrupt is unmasked and 0 when masked. | |
d3233433 AS |
1542 | * @ack_base: Base ack address. If zero then the chip is clear on read. |
1543 | * Using zero value is possible with @use_ack bit. | |
a43fd50d | 1544 | * @wake_base: Base address for wake enables. If zero unsupported. |
9edd4f5a AM |
1545 | * @type_base: Base address for irq type. If zero unsupported. Deprecated, |
1546 | * use @config_base instead. | |
1547 | * @virt_reg_base: Base addresses for extra config regs. Deprecated, use | |
1548 | * @config_base instead. | |
faa87ce9 | 1549 | * @config_base: Base address for IRQ type config regs. If null unsupported. |
022f926a | 1550 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
2753e6f8 | 1551 | * @init_ack_masked: Ack all masked interrupts once during initalization. |
e8ffb12e AM |
1552 | * @mask_unmask_non_inverted: Controls mask bit inversion for chips that set |
1553 | * both @mask_base and @unmask_base. If false, mask and unmask bits are | |
1554 | * inverted (which is deprecated behavior); if true, bits will not be | |
1555 | * inverted and the registers keep their normal behavior. Note that if | |
1556 | * you use only one of @mask_base or @unmask_base, this flag has no | |
1557 | * effect and is unnecessary. Any new drivers that set both @mask_base | |
1558 | * and @unmask_base should set this to true to avoid relying on the | |
1559 | * deprecated behavior. | |
d3233433 | 1560 | * @use_ack: Use @ack register even if it is zero. |
a650fdd9 | 1561 | * @ack_invert: Inverted ack register: cleared bits for ack. |
3a6f0fb7 | 1562 | * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts. |
9b400171 | 1563 | * @status_invert: Inverted status register: cleared bits are active interrupts. |
68622bdf | 1564 | * @wake_invert: Inverted wake register: cleared bits are wake enabled. |
610fdd66 AM |
1565 | * @type_in_mask: Use the mask registers for controlling irq type. Use this if |
1566 | * the hardware provides separate bits for rising/falling edge | |
1567 | * or low/high level interrupts and they should be combined into | |
1568 | * a single logical interrupt. Use &struct regmap_irq_type data | |
1569 | * to define the mask bit for each irq type. | |
c82ea33e BG |
1570 | * @clear_on_unmask: For chips with interrupts cleared on read: read the status |
1571 | * registers before unmasking interrupts to clear any bits | |
1572 | * set when they were masked. | |
9b400171 | 1573 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
1066cfbd | 1574 | * @not_fixed_stride: Used when chip peripherals are not laid out with fixed |
48e014ee AM |
1575 | * stride. Must be used with sub_reg_offsets containing the |
1576 | * offsets to each peripheral. Deprecated; the same thing | |
1577 | * can be accomplished with a @get_irq_reg callback, without | |
1578 | * the need for a @sub_reg_offsets table. | |
4d60cac9 | 1579 | * @no_status: No status register: all interrupts assumed generated by device. |
f8beab2b MB |
1580 | * |
1581 | * @num_regs: Number of registers in each control bank. | |
9b400171 | 1582 | * |
f8beab2b MB |
1583 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are |
1584 | * assigned based on the index in the array of the interrupt. | |
1585 | * @num_irqs: Number of descriptors. | |
9b400171 | 1586 | * |
9edd4f5a AM |
1587 | * @num_type_reg: Number of type registers. Deprecated, use config registers |
1588 | * instead. | |
4c501445 | 1589 | * @num_virt_regs: Number of non-standard irq configuration registers. |
9edd4f5a AM |
1590 | * If zero unsupported. Deprecated, use config registers |
1591 | * instead. | |
faa87ce9 AM |
1592 | * @num_config_bases: Number of config base registers. |
1593 | * @num_config_regs: Number of config registers for each config base register. | |
9b400171 | 1594 | * |
ccc12561 LD |
1595 | * @handle_pre_irq: Driver specific callback to handle interrupt from device |
1596 | * before regmap_irq_handler process the interrupts. | |
1597 | * @handle_post_irq: Driver specific callback to handle interrupt from device | |
1598 | * after handling the interrupts in regmap_irq_handler(). | |
69af4bca WBG |
1599 | * @handle_mask_sync: Callback used to handle IRQ mask syncs. The index will be |
1600 | * in the range [0, num_regs) | |
394409aa | 1601 | * @set_type_virt: Driver specific callback to extend regmap_irq_set_type() |
9edd4f5a AM |
1602 | * and configure virt regs. Deprecated, use @set_type_config |
1603 | * callback and config registers instead. | |
faa87ce9 | 1604 | * @set_type_config: Callback used for configuring irq types. |
bdf9b86c AM |
1605 | * @get_irq_reg: Callback for mapping (base register, index) pairs to register |
1606 | * addresses. The base register will be one of @status_base, | |
1607 | * @mask_base, etc., @main_status, or any of @config_base. | |
1608 | * The index will be in the range [0, num_main_regs[ for the | |
1609 | * main status base, [0, num_type_settings[ for any config | |
1610 | * register base, and [0, num_regs[ for any other base. | |
1611 | * If unspecified then regmap_irq_get_irq_reg_linear() is used. | |
ccc12561 LD |
1612 | * @irq_drv_data: Driver specific IRQ data which is passed as parameter when |
1613 | * driver specific pre/post interrupt handler is called. | |
2cf8e2df CK |
1614 | * |
1615 | * This is not intended to handle every possible interrupt controller, but | |
1616 | * it should handle a substantial proportion of those that are found in the | |
1617 | * wild. | |
f8beab2b MB |
1618 | */ |
1619 | struct regmap_irq_chip { | |
1620 | const char *name; | |
1621 | ||
a2d21848 MV |
1622 | unsigned int main_status; |
1623 | unsigned int num_main_status_bits; | |
1624 | struct regmap_irq_sub_irq_map *sub_reg_offsets; | |
1625 | int num_main_regs; | |
1626 | ||
f8beab2b MB |
1627 | unsigned int status_base; |
1628 | unsigned int mask_base; | |
7b7d1968 | 1629 | unsigned int unmask_base; |
f8beab2b | 1630 | unsigned int ack_base; |
a43fd50d | 1631 | unsigned int wake_base; |
7a78479f | 1632 | unsigned int type_base; |
4c501445 | 1633 | unsigned int *virt_reg_base; |
faa87ce9 | 1634 | const unsigned int *config_base; |
022f926a | 1635 | unsigned int irq_reg_stride; |
445cbd21 | 1636 | unsigned int init_ack_masked:1; |
e8ffb12e | 1637 | unsigned int mask_unmask_non_inverted:1; |
445cbd21 AM |
1638 | unsigned int use_ack:1; |
1639 | unsigned int ack_invert:1; | |
1640 | unsigned int clear_ack:1; | |
9b400171 | 1641 | unsigned int status_invert:1; |
445cbd21 | 1642 | unsigned int wake_invert:1; |
445cbd21 AM |
1643 | unsigned int type_in_mask:1; |
1644 | unsigned int clear_on_unmask:1; | |
9b400171 | 1645 | unsigned int runtime_pm:1; |
445cbd21 | 1646 | unsigned int not_fixed_stride:1; |
4d60cac9 | 1647 | unsigned int no_status:1; |
f8beab2b MB |
1648 | |
1649 | int num_regs; | |
1650 | ||
1651 | const struct regmap_irq *irqs; | |
1652 | int num_irqs; | |
7a78479f LD |
1653 | |
1654 | int num_type_reg; | |
4c501445 | 1655 | int num_virt_regs; |
faa87ce9 AM |
1656 | int num_config_bases; |
1657 | int num_config_regs; | |
ccc12561 LD |
1658 | |
1659 | int (*handle_pre_irq)(void *irq_drv_data); | |
1660 | int (*handle_post_irq)(void *irq_drv_data); | |
69af4bca WBG |
1661 | int (*handle_mask_sync)(struct regmap *map, int index, |
1662 | unsigned int mask_buf_def, | |
1663 | unsigned int mask_buf, void *irq_drv_data); | |
394409aa GDS |
1664 | int (*set_type_virt)(unsigned int **buf, unsigned int type, |
1665 | unsigned long hwirq, int reg); | |
faa87ce9 | 1666 | int (*set_type_config)(unsigned int **buf, unsigned int type, |
7697c64b WBG |
1667 | const struct regmap_irq *irq_data, int idx, |
1668 | void *irq_drv_data); | |
bdf9b86c AM |
1669 | unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data, |
1670 | unsigned int base, int index); | |
ccc12561 | 1671 | void *irq_drv_data; |
f8beab2b MB |
1672 | }; |
1673 | ||
bdf9b86c AM |
1674 | unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data, |
1675 | unsigned int base, int index); | |
faa87ce9 | 1676 | int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type, |
7697c64b WBG |
1677 | const struct regmap_irq *irq_data, |
1678 | int idx, void *irq_drv_data); | |
faa87ce9 | 1679 | |
f8beab2b | 1680 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, |
b026ddbb | 1681 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b | 1682 | struct regmap_irq_chip_data **data); |
5cc2013b MW |
1683 | int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, |
1684 | struct regmap *map, int irq, | |
1685 | int irq_flags, int irq_base, | |
1686 | const struct regmap_irq_chip *chip, | |
1687 | struct regmap_irq_chip_data **data); | |
f8beab2b | 1688 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); |
045b9848 LD |
1689 | |
1690 | int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, | |
1691 | int irq_flags, int irq_base, | |
1692 | const struct regmap_irq_chip *chip, | |
1693 | struct regmap_irq_chip_data **data); | |
5cc2013b MW |
1694 | int devm_regmap_add_irq_chip_fwnode(struct device *dev, |
1695 | struct fwnode_handle *fwnode, | |
1696 | struct regmap *map, int irq, | |
1697 | int irq_flags, int irq_base, | |
1698 | const struct regmap_irq_chip *chip, | |
1699 | struct regmap_irq_chip_data **data); | |
045b9848 LD |
1700 | void devm_regmap_del_irq_chip(struct device *dev, int irq, |
1701 | struct regmap_irq_chip_data *data); | |
1702 | ||
209a6006 | 1703 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 1704 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 1705 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 1706 | |
9cde5fcd MB |
1707 | #else |
1708 | ||
1709 | /* | |
1710 | * These stubs should only ever be called by generic code which has | |
1711 | * regmap based facilities, if they ever get called at runtime | |
1712 | * something is going wrong and something probably needs to select | |
1713 | * REGMAP. | |
1714 | */ | |
1715 | ||
1716 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
1717 | unsigned int val) | |
1718 | { | |
1719 | WARN_ONCE(1, "regmap API is disabled"); | |
1720 | return -EINVAL; | |
1721 | } | |
1722 | ||
915f441b MB |
1723 | static inline int regmap_write_async(struct regmap *map, unsigned int reg, |
1724 | unsigned int val) | |
1725 | { | |
1726 | WARN_ONCE(1, "regmap API is disabled"); | |
1727 | return -EINVAL; | |
1728 | } | |
1729 | ||
9cde5fcd MB |
1730 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, |
1731 | const void *val, size_t val_len) | |
1732 | { | |
1733 | WARN_ONCE(1, "regmap API is disabled"); | |
1734 | return -EINVAL; | |
1735 | } | |
1736 | ||
0d509f2b MB |
1737 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
1738 | const void *val, size_t val_len) | |
1739 | { | |
1740 | WARN_ONCE(1, "regmap API is disabled"); | |
1741 | return -EINVAL; | |
1742 | } | |
1743 | ||
cdf6b11d BW |
1744 | static inline int regmap_noinc_write(struct regmap *map, unsigned int reg, |
1745 | const void *val, size_t val_len) | |
1746 | { | |
1747 | WARN_ONCE(1, "regmap API is disabled"); | |
1748 | return -EINVAL; | |
1749 | } | |
1750 | ||
9cde5fcd MB |
1751 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
1752 | const void *val, size_t val_count) | |
1753 | { | |
1754 | WARN_ONCE(1, "regmap API is disabled"); | |
1755 | return -EINVAL; | |
1756 | } | |
1757 | ||
1758 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
1759 | unsigned int *val) | |
1760 | { | |
1761 | WARN_ONCE(1, "regmap API is disabled"); | |
1762 | return -EINVAL; | |
1763 | } | |
1764 | ||
1765 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
1766 | void *val, size_t val_len) | |
1767 | { | |
1768 | WARN_ONCE(1, "regmap API is disabled"); | |
1769 | return -EINVAL; | |
1770 | } | |
1771 | ||
74fe7b55 CDL |
1772 | static inline int regmap_noinc_read(struct regmap *map, unsigned int reg, |
1773 | void *val, size_t val_len) | |
1774 | { | |
1775 | WARN_ONCE(1, "regmap API is disabled"); | |
1776 | return -EINVAL; | |
1777 | } | |
1778 | ||
9cde5fcd MB |
1779 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, |
1780 | void *val, size_t val_count) | |
1781 | { | |
1782 | WARN_ONCE(1, "regmap API is disabled"); | |
1783 | return -EINVAL; | |
1784 | } | |
1785 | ||
91d31b9f KM |
1786 | static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
1787 | unsigned int mask, unsigned int val, | |
1788 | bool *change, bool async, bool force) | |
fd4b7286 KM |
1789 | { |
1790 | WARN_ONCE(1, "regmap API is disabled"); | |
1791 | return -EINVAL; | |
1792 | } | |
1793 | ||
aa2ff9db BG |
1794 | static inline int regmap_set_bits(struct regmap *map, |
1795 | unsigned int reg, unsigned int bits) | |
1796 | { | |
1797 | WARN_ONCE(1, "regmap API is disabled"); | |
1798 | return -EINVAL; | |
1799 | } | |
1800 | ||
1801 | static inline int regmap_clear_bits(struct regmap *map, | |
1802 | unsigned int reg, unsigned int bits) | |
1803 | { | |
1804 | WARN_ONCE(1, "regmap API is disabled"); | |
1805 | return -EINVAL; | |
1806 | } | |
1807 | ||
1808 | static inline int regmap_test_bits(struct regmap *map, | |
1809 | unsigned int reg, unsigned int bits) | |
1810 | { | |
1811 | WARN_ONCE(1, "regmap API is disabled"); | |
1812 | return -EINVAL; | |
1813 | } | |
1814 | ||
28972eaa KM |
1815 | static inline int regmap_field_update_bits_base(struct regmap_field *field, |
1816 | unsigned int mask, unsigned int val, | |
1817 | bool *change, bool async, bool force) | |
915f441b MB |
1818 | { |
1819 | WARN_ONCE(1, "regmap API is disabled"); | |
1820 | return -EINVAL; | |
1821 | } | |
1822 | ||
e126edec KM |
1823 | static inline int regmap_fields_update_bits_base(struct regmap_field *field, |
1824 | unsigned int id, | |
1825 | unsigned int mask, unsigned int val, | |
1826 | bool *change, bool async, bool force) | |
915f441b MB |
1827 | { |
1828 | WARN_ONCE(1, "regmap API is disabled"); | |
1829 | return -EINVAL; | |
1830 | } | |
1831 | ||
4b9e7edb BG |
1832 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, |
1833 | unsigned int mask, unsigned int val) | |
1834 | { | |
1835 | WARN_ONCE(1, "regmap API is disabled"); | |
1836 | return -EINVAL; | |
1837 | } | |
1838 | ||
1839 | static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
1840 | unsigned int mask, unsigned int val) | |
1841 | { | |
1842 | WARN_ONCE(1, "regmap API is disabled"); | |
1843 | return -EINVAL; | |
1844 | } | |
1845 | ||
1846 | static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
1847 | unsigned int mask, unsigned int val, | |
1848 | bool *change) | |
1849 | { | |
1850 | WARN_ONCE(1, "regmap API is disabled"); | |
1851 | return -EINVAL; | |
1852 | } | |
1853 | ||
1854 | static inline int | |
1855 | regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
1856 | unsigned int mask, unsigned int val, | |
1857 | bool *change) | |
1858 | { | |
1859 | WARN_ONCE(1, "regmap API is disabled"); | |
1860 | return -EINVAL; | |
1861 | } | |
1862 | ||
1863 | static inline int regmap_write_bits(struct regmap *map, unsigned int reg, | |
1864 | unsigned int mask, unsigned int val) | |
1865 | { | |
1866 | WARN_ONCE(1, "regmap API is disabled"); | |
1867 | return -EINVAL; | |
1868 | } | |
1869 | ||
1870 | static inline int regmap_field_write(struct regmap_field *field, | |
1871 | unsigned int val) | |
1872 | { | |
1873 | WARN_ONCE(1, "regmap API is disabled"); | |
1874 | return -EINVAL; | |
1875 | } | |
1876 | ||
1877 | static inline int regmap_field_force_write(struct regmap_field *field, | |
1878 | unsigned int val) | |
1879 | { | |
1880 | WARN_ONCE(1, "regmap API is disabled"); | |
1881 | return -EINVAL; | |
1882 | } | |
1883 | ||
1884 | static inline int regmap_field_update_bits(struct regmap_field *field, | |
1885 | unsigned int mask, unsigned int val) | |
1886 | { | |
1887 | WARN_ONCE(1, "regmap API is disabled"); | |
1888 | return -EINVAL; | |
1889 | } | |
1890 | ||
1891 | static inline int | |
1892 | regmap_field_force_update_bits(struct regmap_field *field, | |
1893 | unsigned int mask, unsigned int val) | |
1894 | { | |
1895 | WARN_ONCE(1, "regmap API is disabled"); | |
1896 | return -EINVAL; | |
1897 | } | |
1898 | ||
f67be8b7 LC |
1899 | static inline int regmap_field_set_bits(struct regmap_field *field, |
1900 | unsigned int bits) | |
1901 | { | |
1902 | WARN_ONCE(1, "regmap API is disabled"); | |
1903 | return -EINVAL; | |
1904 | } | |
1905 | ||
1906 | static inline int regmap_field_clear_bits(struct regmap_field *field, | |
1907 | unsigned int bits) | |
1908 | { | |
1909 | WARN_ONCE(1, "regmap API is disabled"); | |
1910 | return -EINVAL; | |
1911 | } | |
1912 | ||
1913 | static inline int regmap_field_test_bits(struct regmap_field *field, | |
1914 | unsigned int bits) | |
1915 | { | |
1916 | WARN_ONCE(1, "regmap API is disabled"); | |
1917 | return -EINVAL; | |
1918 | } | |
1919 | ||
4b9e7edb BG |
1920 | static inline int regmap_fields_write(struct regmap_field *field, |
1921 | unsigned int id, unsigned int val) | |
1922 | { | |
1923 | WARN_ONCE(1, "regmap API is disabled"); | |
1924 | return -EINVAL; | |
1925 | } | |
1926 | ||
1927 | static inline int regmap_fields_force_write(struct regmap_field *field, | |
1928 | unsigned int id, unsigned int val) | |
1929 | { | |
1930 | WARN_ONCE(1, "regmap API is disabled"); | |
1931 | return -EINVAL; | |
1932 | } | |
1933 | ||
1934 | static inline int | |
1935 | regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1936 | unsigned int mask, unsigned int val) | |
1937 | { | |
1938 | WARN_ONCE(1, "regmap API is disabled"); | |
1939 | return -EINVAL; | |
1940 | } | |
1941 | ||
1942 | static inline int | |
1943 | regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, | |
1944 | unsigned int mask, unsigned int val) | |
1945 | { | |
1946 | WARN_ONCE(1, "regmap API is disabled"); | |
1947 | return -EINVAL; | |
1948 | } | |
1949 | ||
9cde5fcd MB |
1950 | static inline int regmap_get_val_bytes(struct regmap *map) |
1951 | { | |
1952 | WARN_ONCE(1, "regmap API is disabled"); | |
1953 | return -EINVAL; | |
1954 | } | |
1955 | ||
668abc72 SK |
1956 | static inline int regmap_get_max_register(struct regmap *map) |
1957 | { | |
1958 | WARN_ONCE(1, "regmap API is disabled"); | |
1959 | return -EINVAL; | |
1960 | } | |
1961 | ||
a2f776cb SK |
1962 | static inline int regmap_get_reg_stride(struct regmap *map) |
1963 | { | |
1964 | WARN_ONCE(1, "regmap API is disabled"); | |
1965 | return -EINVAL; | |
1966 | } | |
1967 | ||
a6d99022 MW |
1968 | static inline bool regmap_might_sleep(struct regmap *map) |
1969 | { | |
1970 | WARN_ONCE(1, "regmap API is disabled"); | |
1971 | return true; | |
1972 | } | |
1973 | ||
9cde5fcd MB |
1974 | static inline int regcache_sync(struct regmap *map) |
1975 | { | |
1976 | WARN_ONCE(1, "regmap API is disabled"); | |
1977 | return -EINVAL; | |
1978 | } | |
1979 | ||
a313f9f5 MB |
1980 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
1981 | unsigned int max) | |
1982 | { | |
1983 | WARN_ONCE(1, "regmap API is disabled"); | |
1984 | return -EINVAL; | |
1985 | } | |
1986 | ||
697e85bc MB |
1987 | static inline int regcache_drop_region(struct regmap *map, unsigned int min, |
1988 | unsigned int max) | |
1989 | { | |
1990 | WARN_ONCE(1, "regmap API is disabled"); | |
1991 | return -EINVAL; | |
1992 | } | |
1993 | ||
9cde5fcd MB |
1994 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
1995 | { | |
1996 | WARN_ONCE(1, "regmap API is disabled"); | |
1997 | } | |
1998 | ||
1999 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
2000 | { | |
2001 | WARN_ONCE(1, "regmap API is disabled"); | |
2002 | } | |
2003 | ||
2004 | static inline void regcache_mark_dirty(struct regmap *map) | |
2005 | { | |
2006 | WARN_ONCE(1, "regmap API is disabled"); | |
2007 | } | |
2008 | ||
0d509f2b MB |
2009 | static inline void regmap_async_complete(struct regmap *map) |
2010 | { | |
2011 | WARN_ONCE(1, "regmap API is disabled"); | |
2012 | } | |
2013 | ||
9cde5fcd | 2014 | static inline int regmap_register_patch(struct regmap *map, |
a6baa3de | 2015 | const struct reg_sequence *regs, |
9cde5fcd MB |
2016 | int num_regs) |
2017 | { | |
2018 | WARN_ONCE(1, "regmap API is disabled"); | |
2019 | return -EINVAL; | |
2020 | } | |
2021 | ||
13ff50c8 NC |
2022 | static inline int regmap_parse_val(struct regmap *map, const void *buf, |
2023 | unsigned int *val) | |
2024 | { | |
2025 | WARN_ONCE(1, "regmap API is disabled"); | |
2026 | return -EINVAL; | |
2027 | } | |
2028 | ||
72b39f6f MB |
2029 | static inline struct regmap *dev_get_regmap(struct device *dev, |
2030 | const char *name) | |
2031 | { | |
72b39f6f MB |
2032 | return NULL; |
2033 | } | |
2034 | ||
8d7d3972 TT |
2035 | static inline struct device *regmap_get_device(struct regmap *map) |
2036 | { | |
2037 | WARN_ONCE(1, "regmap API is disabled"); | |
1d33dc6b | 2038 | return NULL; |
8d7d3972 TT |
2039 | } |
2040 | ||
9cde5fcd MB |
2041 | #endif |
2042 | ||
b83a313b | 2043 | #endif |