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1 | #ifndef __LINUX_REGMAP_H |
2 | #define __LINUX_REGMAP_H | |
3 | ||
4 | /* | |
5 | * Register map access API | |
6 | * | |
7 | * Copyright 2011 Wolfson Microelectronics plc | |
8 | * | |
9 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
b83a313b | 16 | #include <linux/list.h> |
6863ca62 | 17 | #include <linux/rbtree.h> |
b83a313b | 18 | |
de477254 | 19 | struct module; |
313162d0 | 20 | struct device; |
9943fa30 | 21 | struct i2c_client; |
90f790d2 | 22 | struct irq_domain; |
a676f083 | 23 | struct spi_device; |
b83d2ff0 | 24 | struct regmap; |
6863ca62 | 25 | struct regmap_range_cfg; |
9943fa30 | 26 | |
9fabe24e DP |
27 | /* An enum of all the supported cache types */ |
28 | enum regcache_type { | |
29 | REGCACHE_NONE, | |
28644c80 | 30 | REGCACHE_RBTREE, |
2ac902ce MB |
31 | REGCACHE_COMPRESSED, |
32 | REGCACHE_FLAT, | |
9fabe24e DP |
33 | }; |
34 | ||
bd20eb54 MB |
35 | /** |
36 | * Default value for a register. We use an array of structs rather | |
37 | * than a simple array as many modern devices have very sparse | |
38 | * register maps. | |
39 | * | |
40 | * @reg: Register address. | |
41 | * @def: Register default value. | |
42 | */ | |
43 | struct reg_default { | |
44 | unsigned int reg; | |
45 | unsigned int def; | |
46 | }; | |
47 | ||
b83d2ff0 MB |
48 | #ifdef CONFIG_REGMAP |
49 | ||
141eba2e SW |
50 | enum regmap_endian { |
51 | /* Unspecified -> 0 -> Backwards compatible default */ | |
52 | REGMAP_ENDIAN_DEFAULT = 0, | |
53 | REGMAP_ENDIAN_BIG, | |
54 | REGMAP_ENDIAN_LITTLE, | |
55 | REGMAP_ENDIAN_NATIVE, | |
56 | }; | |
57 | ||
76aad392 DC |
58 | /** |
59 | * A register range, used for access related checks | |
60 | * (readable/writeable/volatile/precious checks) | |
61 | * | |
62 | * @range_min: address of first register | |
63 | * @range_max: address of last register | |
64 | */ | |
65 | struct regmap_range { | |
66 | unsigned int range_min; | |
67 | unsigned int range_max; | |
68 | }; | |
69 | ||
70 | /* | |
71 | * A table of ranges including some yes ranges and some no ranges. | |
72 | * If a register belongs to a no_range, the corresponding check function | |
73 | * will return false. If a register belongs to a yes range, the corresponding | |
74 | * check function will return true. "no_ranges" are searched first. | |
75 | * | |
76 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
77 | * @n_yes_ranges: size of the above array | |
78 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
79 | * @n_no_ranges: size of the above array | |
80 | */ | |
81 | struct regmap_access_table { | |
82 | const struct regmap_range *yes_ranges; | |
83 | unsigned int n_yes_ranges; | |
84 | const struct regmap_range *no_ranges; | |
85 | unsigned int n_no_ranges; | |
86 | }; | |
87 | ||
0d4529c5 DC |
88 | typedef void (*regmap_lock)(void *); |
89 | typedef void (*regmap_unlock)(void *); | |
90 | ||
dd898b20 MB |
91 | /** |
92 | * Configuration for the register map of a device. | |
93 | * | |
d3c242e1 SW |
94 | * @name: Optional name of the regmap. Useful when a device has multiple |
95 | * register regions. | |
96 | * | |
dd898b20 | 97 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
98 | * @reg_stride: The register address stride. Valid register addresses are a |
99 | * multiple of this value. If set to 0, a value of 1 will be | |
100 | * used. | |
82159ba8 | 101 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 102 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 103 | * |
3566cc9d | 104 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
105 | * can be written to. If this field is NULL but wr_table |
106 | * (see below) is not, the check is performed on such table | |
107 | * (a register is writeable if it belongs to one of the ranges | |
108 | * specified by wr_table). | |
3566cc9d | 109 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
110 | * can be read from. If this field is NULL but rd_table |
111 | * (see below) is not, the check is performed on such table | |
112 | * (a register is readable if it belongs to one of the ranges | |
113 | * specified by rd_table). | |
3566cc9d | 114 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
115 | * value can't be cached. If this field is NULL but |
116 | * volatile_table (see below) is not, the check is performed on | |
117 | * such table (a register is volatile if it belongs to one of | |
118 | * the ranges specified by volatile_table). | |
3566cc9d | 119 | * @precious_reg: Optional callback returning true if the rgister |
76aad392 DC |
120 | * should not be read outside of a call from the driver |
121 | * (eg, a clear on read interrupt status register). If this | |
122 | * field is NULL but precious_table (see below) is not, the | |
123 | * check is performed on such table (a register is precious if | |
124 | * it belongs to one of the ranges specified by precious_table). | |
125 | * @lock: Optional lock callback (overrides regmap's default lock | |
126 | * function, based on spinlock or mutex). | |
127 | * @unlock: As above for unlocking. | |
128 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
129 | * functions (ignored in case regular lock/unlock functions | |
130 | * are not overridden). | |
d2a5884a AS |
131 | * @reg_read: Optional callback that if filled will be used to perform |
132 | * all the reads from the registers. Should only be provided for | |
133 | * devices whos read operation cannot be represented as a simple read | |
134 | * operation on a bus such as SPI, I2C, etc. Most of the devices do | |
135 | * not need this. | |
136 | * @reg_write: Same as above for writing. | |
137 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex | |
138 | * to perform locking. This field is ignored if custom lock/unlock | |
139 | * functions are used (see fields lock/unlock of struct regmap_config). | |
140 | * This field is a duplicate of a similar file in | |
141 | * 'struct regmap_bus' and serves exact same purpose. | |
142 | * Use it only for "no-bus" cases. | |
bd20eb54 | 143 | * @max_register: Optional, specifies the maximum valid register index. |
76aad392 DC |
144 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
145 | * valid ranges for write access. | |
146 | * @rd_table: As above, for read access. | |
147 | * @volatile_table: As above, for volatile registers. | |
148 | * @precious_table: As above, for precious registers. | |
bd20eb54 MB |
149 | * @reg_defaults: Power on reset values for registers (for use with |
150 | * register cache support). | |
151 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 LPC |
152 | * |
153 | * @read_flag_mask: Mask to be set in the top byte of the register when doing | |
154 | * a read. | |
155 | * @write_flag_mask: Mask to be set in the top byte of the register when doing | |
156 | * a write. If both read_flag_mask and write_flag_mask are | |
157 | * empty the regmap_bus default masks are used. | |
2e33caf1 AJ |
158 | * @use_single_rw: If set, converts the bulk read and write operations into |
159 | * a series of single read and write operations. This is useful | |
160 | * for device that does not support bulk read and write. | |
9fabe24e DP |
161 | * |
162 | * @cache_type: The actual cache type. | |
163 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
164 | * register cache support). | |
165 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
166 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
167 | * DEFAULT, the @reg_format_endian_default value from the | |
168 | * regmap bus is used. | |
169 | * @val_format_endian: Endianness for formatted register values. If this is | |
170 | * DEFAULT, the @reg_format_endian_default value from the | |
171 | * regmap bus is used. | |
6863ca62 KG |
172 | * |
173 | * @ranges: Array of configuration entries for virtual address ranges. | |
174 | * @num_ranges: Number of range configuration entries. | |
dd898b20 | 175 | */ |
b83a313b | 176 | struct regmap_config { |
d3c242e1 SW |
177 | const char *name; |
178 | ||
b83a313b | 179 | int reg_bits; |
f01ee60f | 180 | int reg_stride; |
82159ba8 | 181 | int pad_bits; |
b83a313b | 182 | int val_bits; |
2e2ae66d | 183 | |
2e2ae66d MB |
184 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
185 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
186 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 187 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
0d4529c5 DC |
188 | regmap_lock lock; |
189 | regmap_unlock unlock; | |
190 | void *lock_arg; | |
bd20eb54 | 191 | |
d2a5884a AS |
192 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
193 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
194 | ||
195 | bool fast_io; | |
196 | ||
bd20eb54 | 197 | unsigned int max_register; |
76aad392 DC |
198 | const struct regmap_access_table *wr_table; |
199 | const struct regmap_access_table *rd_table; | |
200 | const struct regmap_access_table *volatile_table; | |
201 | const struct regmap_access_table *precious_table; | |
720e4616 | 202 | const struct reg_default *reg_defaults; |
9fabe24e DP |
203 | unsigned int num_reg_defaults; |
204 | enum regcache_type cache_type; | |
205 | const void *reg_defaults_raw; | |
206 | unsigned int num_reg_defaults_raw; | |
6f306441 LPC |
207 | |
208 | u8 read_flag_mask; | |
209 | u8 write_flag_mask; | |
2e33caf1 AJ |
210 | |
211 | bool use_single_rw; | |
141eba2e SW |
212 | |
213 | enum regmap_endian reg_format_endian; | |
214 | enum regmap_endian val_format_endian; | |
38e23194 | 215 | |
6863ca62 | 216 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 217 | unsigned int num_ranges; |
6863ca62 KG |
218 | }; |
219 | ||
220 | /** | |
221 | * Configuration for indirectly accessed or paged registers. | |
222 | * Registers, mapped to this virtual range, are accessed in two steps: | |
223 | * 1. page selector register update; | |
224 | * 2. access through data window registers. | |
225 | * | |
d058bb49 MB |
226 | * @name: Descriptive name for diagnostics |
227 | * | |
6863ca62 KG |
228 | * @range_min: Address of the lowest register address in virtual range. |
229 | * @range_max: Address of the highest register in virtual range. | |
230 | * | |
231 | * @page_sel_reg: Register with selector field. | |
232 | * @page_sel_mask: Bit shift for selector value. | |
233 | * @page_sel_shift: Bit mask for selector value. | |
234 | * | |
235 | * @window_start: Address of first (lowest) register in data window. | |
236 | * @window_len: Number of registers in data window. | |
237 | */ | |
238 | struct regmap_range_cfg { | |
d058bb49 MB |
239 | const char *name; |
240 | ||
6863ca62 KG |
241 | /* Registers of virtual address range */ |
242 | unsigned int range_min; | |
243 | unsigned int range_max; | |
244 | ||
245 | /* Page selector for indirect addressing */ | |
246 | unsigned int selector_reg; | |
247 | unsigned int selector_mask; | |
248 | int selector_shift; | |
249 | ||
250 | /* Data window (per each page) */ | |
251 | unsigned int window_start; | |
252 | unsigned int window_len; | |
b83a313b MB |
253 | }; |
254 | ||
0d509f2b MB |
255 | struct regmap_async; |
256 | ||
0135bbcc | 257 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 258 | size_t count); |
0135bbcc | 259 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
260 | const void *reg, size_t reg_len, |
261 | const void *val, size_t val_len); | |
0d509f2b MB |
262 | typedef int (*regmap_hw_async_write)(void *context, |
263 | const void *reg, size_t reg_len, | |
264 | const void *val, size_t val_len, | |
265 | struct regmap_async *async); | |
0135bbcc | 266 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
267 | const void *reg_buf, size_t reg_size, |
268 | void *val_buf, size_t val_size); | |
0d509f2b | 269 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 270 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
271 | |
272 | /** | |
273 | * Description of a hardware bus for the register map infrastructure. | |
274 | * | |
bacdbe07 | 275 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
276 | * to perform locking. This field is ignored if custom lock/unlock |
277 | * functions are used (see fields lock/unlock of | |
278 | * struct regmap_config). | |
b83a313b MB |
279 | * @write: Write operation. |
280 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
281 | * if not implemented on a given device. | |
0d509f2b MB |
282 | * @async_write: Write operation which completes asynchronously, optional and |
283 | * must serialise with respect to non-async I/O. | |
b83a313b MB |
284 | * @read: Read operation. Data is returned in the buffer used to transmit |
285 | * data. | |
0d509f2b | 286 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
287 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
288 | * a read. | |
141eba2e SW |
289 | * @reg_format_endian_default: Default endianness for formatted register |
290 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
291 | * DEFAULT, BIG is assumed. | |
292 | * @val_format_endian_default: Default endianness for formatted register | |
293 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
294 | * DEFAULT, BIG is assumed. | |
0d509f2b | 295 | * @async_size: Size of struct used for async work. |
b83a313b MB |
296 | */ |
297 | struct regmap_bus { | |
bacdbe07 | 298 | bool fast_io; |
b83a313b MB |
299 | regmap_hw_write write; |
300 | regmap_hw_gather_write gather_write; | |
0d509f2b | 301 | regmap_hw_async_write async_write; |
b83a313b | 302 | regmap_hw_read read; |
0135bbcc | 303 | regmap_hw_free_context free_context; |
0d509f2b | 304 | regmap_hw_async_alloc async_alloc; |
b83a313b | 305 | u8 read_flag_mask; |
141eba2e SW |
306 | enum regmap_endian reg_format_endian_default; |
307 | enum regmap_endian val_format_endian_default; | |
b83a313b MB |
308 | }; |
309 | ||
310 | struct regmap *regmap_init(struct device *dev, | |
311 | const struct regmap_bus *bus, | |
0135bbcc | 312 | void *bus_context, |
b83a313b | 313 | const struct regmap_config *config); |
9943fa30 MB |
314 | struct regmap *regmap_init_i2c(struct i2c_client *i2c, |
315 | const struct regmap_config *config); | |
a676f083 MB |
316 | struct regmap *regmap_init_spi(struct spi_device *dev, |
317 | const struct regmap_config *config); | |
878ec67b PZ |
318 | struct regmap *regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
319 | void __iomem *regs, | |
320 | const struct regmap_config *config); | |
a676f083 | 321 | |
c0eb4676 MB |
322 | struct regmap *devm_regmap_init(struct device *dev, |
323 | const struct regmap_bus *bus, | |
0135bbcc | 324 | void *bus_context, |
c0eb4676 MB |
325 | const struct regmap_config *config); |
326 | struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, | |
327 | const struct regmap_config *config); | |
328 | struct regmap *devm_regmap_init_spi(struct spi_device *dev, | |
329 | const struct regmap_config *config); | |
878ec67b PZ |
330 | struct regmap *devm_regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
331 | void __iomem *regs, | |
332 | const struct regmap_config *config); | |
333 | ||
334 | /** | |
335 | * regmap_init_mmio(): Initialise register map | |
336 | * | |
337 | * @dev: Device that will be interacted with | |
338 | * @regs: Pointer to memory-mapped IO region | |
339 | * @config: Configuration for register map | |
340 | * | |
341 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
342 | * a struct regmap. | |
343 | */ | |
344 | static inline struct regmap *regmap_init_mmio(struct device *dev, | |
345 | void __iomem *regs, | |
346 | const struct regmap_config *config) | |
347 | { | |
348 | return regmap_init_mmio_clk(dev, NULL, regs, config); | |
349 | } | |
350 | ||
351 | /** | |
352 | * devm_regmap_init_mmio(): Initialise managed register map | |
353 | * | |
354 | * @dev: Device that will be interacted with | |
355 | * @regs: Pointer to memory-mapped IO region | |
356 | * @config: Configuration for register map | |
357 | * | |
358 | * The return value will be an ERR_PTR() on error or a valid pointer | |
359 | * to a struct regmap. The regmap will be automatically freed by the | |
360 | * device management code. | |
361 | */ | |
362 | static inline struct regmap *devm_regmap_init_mmio(struct device *dev, | |
363 | void __iomem *regs, | |
364 | const struct regmap_config *config) | |
365 | { | |
366 | return devm_regmap_init_mmio_clk(dev, NULL, regs, config); | |
367 | } | |
c0eb4676 | 368 | |
b83a313b | 369 | void regmap_exit(struct regmap *map); |
bf315173 MB |
370 | int regmap_reinit_cache(struct regmap *map, |
371 | const struct regmap_config *config); | |
72b39f6f | 372 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
b83a313b MB |
373 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
374 | int regmap_raw_write(struct regmap *map, unsigned int reg, | |
375 | const void *val, size_t val_len); | |
8eaeb219 LD |
376 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
377 | size_t val_count); | |
0d509f2b MB |
378 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
379 | const void *val, size_t val_len); | |
b83a313b MB |
380 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
381 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
382 | void *val, size_t val_len); | |
383 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
384 | size_t val_count); | |
385 | int regmap_update_bits(struct regmap *map, unsigned int reg, | |
386 | unsigned int mask, unsigned int val); | |
018690d3 MB |
387 | int regmap_update_bits_check(struct regmap *map, unsigned int reg, |
388 | unsigned int mask, unsigned int val, | |
389 | bool *change); | |
a6539c32 | 390 | int regmap_get_val_bytes(struct regmap *map); |
0d509f2b | 391 | int regmap_async_complete(struct regmap *map); |
b83a313b | 392 | |
39a58439 | 393 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
394 | int regcache_sync_region(struct regmap *map, unsigned int min, |
395 | unsigned int max); | |
92afb286 | 396 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 397 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 398 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 399 | |
22f0d90a MB |
400 | int regmap_register_patch(struct regmap *map, const struct reg_default *regs, |
401 | int num_regs); | |
402 | ||
76aad392 DC |
403 | static inline bool regmap_reg_in_range(unsigned int reg, |
404 | const struct regmap_range *range) | |
405 | { | |
406 | return reg >= range->range_min && reg <= range->range_max; | |
407 | } | |
408 | ||
409 | bool regmap_reg_in_ranges(unsigned int reg, | |
410 | const struct regmap_range *ranges, | |
411 | unsigned int nranges); | |
412 | ||
f8beab2b MB |
413 | /** |
414 | * Description of an IRQ for the generic regmap irq_chip. | |
415 | * | |
416 | * @reg_offset: Offset of the status/mask register within the bank | |
417 | * @mask: Mask used to flag/control the register. | |
418 | */ | |
419 | struct regmap_irq { | |
420 | unsigned int reg_offset; | |
421 | unsigned int mask; | |
422 | }; | |
423 | ||
424 | /** | |
425 | * Description of a generic regmap irq_chip. This is not intended to | |
426 | * handle every possible interrupt controller, but it should handle a | |
427 | * substantial proportion of those that are found in the wild. | |
428 | * | |
429 | * @name: Descriptive name for IRQ controller. | |
430 | * | |
431 | * @status_base: Base status register address. | |
432 | * @mask_base: Base mask register address. | |
433 | * @ack_base: Base ack address. If zero then the chip is clear on read. | |
a43fd50d | 434 | * @wake_base: Base address for wake enables. If zero unsupported. |
022f926a | 435 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
0c00c50b | 436 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
437 | * |
438 | * @num_regs: Number of registers in each control bank. | |
439 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
440 | * assigned based on the index in the array of the interrupt. | |
441 | * @num_irqs: Number of descriptors. | |
442 | */ | |
443 | struct regmap_irq_chip { | |
444 | const char *name; | |
445 | ||
446 | unsigned int status_base; | |
447 | unsigned int mask_base; | |
448 | unsigned int ack_base; | |
a43fd50d | 449 | unsigned int wake_base; |
022f926a | 450 | unsigned int irq_reg_stride; |
36ac914b | 451 | unsigned int mask_invert; |
9442490a | 452 | unsigned int wake_invert; |
0c00c50b | 453 | bool runtime_pm; |
f8beab2b MB |
454 | |
455 | int num_regs; | |
456 | ||
457 | const struct regmap_irq *irqs; | |
458 | int num_irqs; | |
459 | }; | |
460 | ||
461 | struct regmap_irq_chip_data; | |
462 | ||
463 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 464 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b MB |
465 | struct regmap_irq_chip_data **data); |
466 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); | |
209a6006 | 467 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 468 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 469 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 470 | |
9cde5fcd MB |
471 | #else |
472 | ||
473 | /* | |
474 | * These stubs should only ever be called by generic code which has | |
475 | * regmap based facilities, if they ever get called at runtime | |
476 | * something is going wrong and something probably needs to select | |
477 | * REGMAP. | |
478 | */ | |
479 | ||
480 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
481 | unsigned int val) | |
482 | { | |
483 | WARN_ONCE(1, "regmap API is disabled"); | |
484 | return -EINVAL; | |
485 | } | |
486 | ||
487 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, | |
488 | const void *val, size_t val_len) | |
489 | { | |
490 | WARN_ONCE(1, "regmap API is disabled"); | |
491 | return -EINVAL; | |
492 | } | |
493 | ||
0d509f2b MB |
494 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
495 | const void *val, size_t val_len) | |
496 | { | |
497 | WARN_ONCE(1, "regmap API is disabled"); | |
498 | return -EINVAL; | |
499 | } | |
500 | ||
9cde5fcd MB |
501 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
502 | const void *val, size_t val_count) | |
503 | { | |
504 | WARN_ONCE(1, "regmap API is disabled"); | |
505 | return -EINVAL; | |
506 | } | |
507 | ||
508 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
509 | unsigned int *val) | |
510 | { | |
511 | WARN_ONCE(1, "regmap API is disabled"); | |
512 | return -EINVAL; | |
513 | } | |
514 | ||
515 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
516 | void *val, size_t val_len) | |
517 | { | |
518 | WARN_ONCE(1, "regmap API is disabled"); | |
519 | return -EINVAL; | |
520 | } | |
521 | ||
522 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, | |
523 | void *val, size_t val_count) | |
524 | { | |
525 | WARN_ONCE(1, "regmap API is disabled"); | |
526 | return -EINVAL; | |
527 | } | |
528 | ||
529 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
530 | unsigned int mask, unsigned int val) | |
531 | { | |
532 | WARN_ONCE(1, "regmap API is disabled"); | |
533 | return -EINVAL; | |
534 | } | |
535 | ||
536 | static inline int regmap_update_bits_check(struct regmap *map, | |
537 | unsigned int reg, | |
538 | unsigned int mask, unsigned int val, | |
539 | bool *change) | |
540 | { | |
541 | WARN_ONCE(1, "regmap API is disabled"); | |
542 | return -EINVAL; | |
543 | } | |
544 | ||
545 | static inline int regmap_get_val_bytes(struct regmap *map) | |
546 | { | |
547 | WARN_ONCE(1, "regmap API is disabled"); | |
548 | return -EINVAL; | |
549 | } | |
550 | ||
551 | static inline int regcache_sync(struct regmap *map) | |
552 | { | |
553 | WARN_ONCE(1, "regmap API is disabled"); | |
554 | return -EINVAL; | |
555 | } | |
556 | ||
a313f9f5 MB |
557 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
558 | unsigned int max) | |
559 | { | |
560 | WARN_ONCE(1, "regmap API is disabled"); | |
561 | return -EINVAL; | |
562 | } | |
563 | ||
9cde5fcd MB |
564 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
565 | { | |
566 | WARN_ONCE(1, "regmap API is disabled"); | |
567 | } | |
568 | ||
569 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
570 | { | |
571 | WARN_ONCE(1, "regmap API is disabled"); | |
572 | } | |
573 | ||
574 | static inline void regcache_mark_dirty(struct regmap *map) | |
575 | { | |
576 | WARN_ONCE(1, "regmap API is disabled"); | |
577 | } | |
578 | ||
0d509f2b MB |
579 | static inline void regmap_async_complete(struct regmap *map) |
580 | { | |
581 | WARN_ONCE(1, "regmap API is disabled"); | |
582 | } | |
583 | ||
9cde5fcd MB |
584 | static inline int regmap_register_patch(struct regmap *map, |
585 | const struct reg_default *regs, | |
586 | int num_regs) | |
587 | { | |
588 | WARN_ONCE(1, "regmap API is disabled"); | |
589 | return -EINVAL; | |
590 | } | |
591 | ||
72b39f6f MB |
592 | static inline struct regmap *dev_get_regmap(struct device *dev, |
593 | const char *name) | |
594 | { | |
72b39f6f MB |
595 | return NULL; |
596 | } | |
597 | ||
9cde5fcd MB |
598 | #endif |
599 | ||
b83a313b | 600 | #endif |