Merge git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf
[linux-block.git] / include / linux / regmap.h
CommitLineData
d2912cb1 1/* SPDX-License-Identifier: GPL-2.0-only */
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2#ifndef __LINUX_REGMAP_H
3#define __LINUX_REGMAP_H
4
5/*
6 * Register map access API
7 *
8 * Copyright 2011 Wolfson Microelectronics plc
9 *
10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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11 */
12
b83a313b 13#include <linux/list.h>
6863ca62 14#include <linux/rbtree.h>
f15cd6d9 15#include <linux/ktime.h>
adf08d48 16#include <linux/delay.h>
49ccc142 17#include <linux/err.h>
3f0fa9a8 18#include <linux/bug.h>
3cfe7a74 19#include <linux/lockdep.h>
e44ab4e1 20#include <linux/iopoll.h>
5cc2013b 21#include <linux/fwnode.h>
b83a313b 22
de477254 23struct module;
31895662 24struct clk;
313162d0 25struct device;
12479382 26struct device_node;
9943fa30 27struct i2c_client;
6445500b 28struct i3c_device;
90f790d2 29struct irq_domain;
1f89d2fe 30struct mdio_device;
7d6f7fb0 31struct slim_device;
a676f083 32struct spi_device;
a01779f8 33struct spmi_device;
b83d2ff0 34struct regmap;
6863ca62 35struct regmap_range_cfg;
67252287 36struct regmap_field;
22853223 37struct snd_ac97;
7c22ce6e 38struct sdw_slave;
9943fa30 39
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40/* An enum of all the supported cache types */
41enum regcache_type {
42 REGCACHE_NONE,
28644c80 43 REGCACHE_RBTREE,
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44 REGCACHE_COMPRESSED,
45 REGCACHE_FLAT,
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46};
47
bd20eb54 48/**
2cf8e2df 49 * struct reg_default - Default value for a register.
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50 *
51 * @reg: Register address.
52 * @def: Register default value.
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53 *
54 * We use an array of structs rather than a simple array as many modern devices
55 * have very sparse register maps.
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56 */
57struct reg_default {
58 unsigned int reg;
59 unsigned int def;
60};
61
8019ff6c 62/**
2cf8e2df 63 * struct reg_sequence - An individual write from a sequence of writes.
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64 *
65 * @reg: Register address.
66 * @def: Register value.
2de9d600 67 * @delay_us: Delay to be applied after the register write in microseconds
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68 *
69 * Register/value pairs for sequences of writes with an optional delay in
70 * microseconds to be applied after each write.
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71 */
72struct reg_sequence {
73 unsigned int reg;
74 unsigned int def;
2de9d600 75 unsigned int delay_us;
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76};
77
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78#define REG_SEQ(_reg, _def, _delay_us) { \
79 .reg = _reg, \
80 .def = _def, \
81 .delay_us = _delay_us, \
82 }
83#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0)
84
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85/**
86 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
2cf8e2df 87 *
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88 * @map: Regmap to read from
89 * @addr: Address to poll
90 * @val: Unsigned integer variable to read the value into
91 * @cond: Break condition (usually involving @val)
92 * @sleep_us: Maximum time to sleep between reads in us (0
93 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 94 * is used (see Documentation/timers/timers-howto.rst).
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95 * @timeout_us: Timeout in us, 0 means never timeout
96 *
97 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
98 * error return value in case of a error read. In the two former cases,
99 * the last read value at @addr is stored in @val. Must not be called
100 * from atomic context if sleep_us or timeout_us are used.
101 *
102 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
103 */
104#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
105({ \
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106 int __ret, __tmp; \
107 __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
108 sleep_us, timeout_us, false, (map), (addr), &(val)); \
109 __ret ?: __tmp; \
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110})
111
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112/**
113 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
114 *
115 * @map: Regmap to read from
116 * @addr: Address to poll
117 * @val: Unsigned integer variable to read the value into
118 * @cond: Break condition (usually involving @val)
119 * @delay_us: Time to udelay between reads in us (0 tight-loops).
120 * Should be less than ~10us since udelay is used
121 * (see Documentation/timers/timers-howto.rst).
122 * @timeout_us: Timeout in us, 0 means never timeout
123 *
124 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
125 * error return value in case of a error read. In the two former cases,
126 * the last read value at @addr is stored in @val.
127 *
128 * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
129 *
130 * Note: In general regmap cannot be used in atomic context. If you want to use
131 * this macro then first setup your regmap for atomic use (flat or no cache
132 * and MMIO regmap).
133 */
134#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
135({ \
136 u64 __timeout_us = (timeout_us); \
137 unsigned long __delay_us = (delay_us); \
138 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
139 int __ret; \
140 for (;;) { \
141 __ret = regmap_read((map), (addr), &(val)); \
142 if (__ret) \
143 break; \
144 if (cond) \
145 break; \
146 if ((__timeout_us) && \
147 ktime_compare(ktime_get(), __timeout) > 0) { \
148 __ret = regmap_read((map), (addr), &(val)); \
149 break; \
150 } \
151 if (__delay_us) \
152 udelay(__delay_us); \
153 } \
154 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
155})
156
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157/**
158 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
159 *
160 * @field: Regmap field to read from
161 * @val: Unsigned integer variable to read the value into
162 * @cond: Break condition (usually involving @val)
163 * @sleep_us: Maximum time to sleep between reads in us (0
164 * tight-loops). Should be less than ~20ms since usleep_range
458f69ef 165 * is used (see Documentation/timers/timers-howto.rst).
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166 * @timeout_us: Timeout in us, 0 means never timeout
167 *
168 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
169 * error return value in case of a error read. In the two former cases,
170 * the last read value at @addr is stored in @val. Must not be called
171 * from atomic context if sleep_us or timeout_us are used.
172 *
173 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
174 */
175#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
176({ \
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177 int __ret, __tmp; \
178 __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
179 sleep_us, timeout_us, false, (field), &(val)); \
180 __ret ?: __tmp; \
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181})
182
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183#ifdef CONFIG_REGMAP
184
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185enum regmap_endian {
186 /* Unspecified -> 0 -> Backwards compatible default */
187 REGMAP_ENDIAN_DEFAULT = 0,
188 REGMAP_ENDIAN_BIG,
189 REGMAP_ENDIAN_LITTLE,
190 REGMAP_ENDIAN_NATIVE,
191};
192
76aad392 193/**
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194 * struct regmap_range - A register range, used for access related checks
195 * (readable/writeable/volatile/precious checks)
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196 *
197 * @range_min: address of first register
198 * @range_max: address of last register
199 */
200struct regmap_range {
201 unsigned int range_min;
202 unsigned int range_max;
203};
204
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205#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }
206
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207/**
208 * struct regmap_access_table - A table of register ranges for access checks
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209 *
210 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
211 * @n_yes_ranges: size of the above array
212 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
213 * @n_no_ranges: size of the above array
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214 *
215 * A table of ranges including some yes ranges and some no ranges.
216 * If a register belongs to a no_range, the corresponding check function
217 * will return false. If a register belongs to a yes range, the corresponding
218 * check function will return true. "no_ranges" are searched first.
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219 */
220struct regmap_access_table {
221 const struct regmap_range *yes_ranges;
222 unsigned int n_yes_ranges;
223 const struct regmap_range *no_ranges;
224 unsigned int n_no_ranges;
225};
226
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227typedef void (*regmap_lock)(void *);
228typedef void (*regmap_unlock)(void *);
229
dd898b20 230/**
2cf8e2df 231 * struct regmap_config - Configuration for the register map of a device.
dd898b20 232 *
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233 * @name: Optional name of the regmap. Useful when a device has multiple
234 * register regions.
235 *
dd898b20 236 * @reg_bits: Number of bits in a register address, mandatory.
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237 * @reg_stride: The register address stride. Valid register addresses are a
238 * multiple of this value. If set to 0, a value of 1 will be
239 * used.
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240 * @reg_downshift: The number of bits to downshift the register before
241 * performing any operations.
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242 * @reg_base: Value to be added to every register address before performing any
243 * operation.
82159ba8 244 * @pad_bits: Number of bits of padding between register and value.
dd898b20 245 * @val_bits: Number of bits in a register value, mandatory.
2e2ae66d 246 *
3566cc9d 247 * @writeable_reg: Optional callback returning true if the register
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248 * can be written to. If this field is NULL but wr_table
249 * (see below) is not, the check is performed on such table
250 * (a register is writeable if it belongs to one of the ranges
251 * specified by wr_table).
3566cc9d 252 * @readable_reg: Optional callback returning true if the register
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253 * can be read from. If this field is NULL but rd_table
254 * (see below) is not, the check is performed on such table
255 * (a register is readable if it belongs to one of the ranges
256 * specified by rd_table).
3566cc9d 257 * @volatile_reg: Optional callback returning true if the register
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258 * value can't be cached. If this field is NULL but
259 * volatile_table (see below) is not, the check is performed on
260 * such table (a register is volatile if it belongs to one of
261 * the ranges specified by volatile_table).
bdc39644 262 * @precious_reg: Optional callback returning true if the register
76aad392 263 * should not be read outside of a call from the driver
bdc39644 264 * (e.g., a clear on read interrupt status register). If this
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265 * field is NULL but precious_table (see below) is not, the
266 * check is performed on such table (a register is precious if
267 * it belongs to one of the ranges specified by precious_table).
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268 * @writeable_noinc_reg: Optional callback returning true if the register
269 * supports multiple write operations without incrementing
270 * the register number. If this field is NULL but
271 * wr_noinc_table (see below) is not, the check is
272 * performed on such table (a register is no increment
273 * writeable if it belongs to one of the ranges specified
274 * by wr_noinc_table).
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275 * @readable_noinc_reg: Optional callback returning true if the register
276 * supports multiple read operations without incrementing
277 * the register number. If this field is NULL but
278 * rd_noinc_table (see below) is not, the check is
279 * performed on such table (a register is no increment
280 * readable if it belongs to one of the ranges specified
281 * by rd_noinc_table).
c9b41fcf 282 * @disable_locking: This regmap is either protected by external means or
6611561a 283 * is guaranteed not to be accessed from multiple threads.
c9b41fcf 284 * Don't use any locking mechanisms.
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285 * @lock: Optional lock callback (overrides regmap's default lock
286 * function, based on spinlock or mutex).
287 * @unlock: As above for unlocking.
288 * @lock_arg: this field is passed as the only argument of lock/unlock
289 * functions (ignored in case regular lock/unlock functions
290 * are not overridden).
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291 * @reg_read: Optional callback that if filled will be used to perform
292 * all the reads from the registers. Should only be provided for
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293 * devices whose read operation cannot be represented as a simple
294 * read operation on a bus such as SPI, I2C, etc. Most of the
295 * devices do not need this.
d2a5884a 296 * @reg_write: Same as above for writing.
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297 * @reg_update_bits: Optional callback that if filled will be used to perform
298 * all the update_bits(rmw) operation. Should only be provided
299 * if the function require special handling with lock and reg
300 * handling and the operation cannot be represented as a simple
301 * update_bits operation on a bus such as SPI, I2C, etc.
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302 * @read: Optional callback that if filled will be used to perform all the
303 * bulk reads from the registers. Data is returned in the buffer used
304 * to transmit data.
305 * @write: Same as above for writing.
306 * @max_raw_read: Max raw read size that can be used on the device.
307 * @max_raw_write: Max raw write size that can be used on the device.
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308 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
309 * to perform locking. This field is ignored if custom lock/unlock
310 * functions are used (see fields lock/unlock of struct regmap_config).
311 * This field is a duplicate of a similar file in
312 * 'struct regmap_bus' and serves exact same purpose.
313 * Use it only for "no-bus" cases.
b429fab4 314 * @max_register: Optional, specifies the maximum valid register address.
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315 * @wr_table: Optional, points to a struct regmap_access_table specifying
316 * valid ranges for write access.
317 * @rd_table: As above, for read access.
318 * @volatile_table: As above, for volatile registers.
319 * @precious_table: As above, for precious registers.
cdf6b11d 320 * @wr_noinc_table: As above, for no increment writeable registers.
74fe7b55 321 * @rd_noinc_table: As above, for no increment readable registers.
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322 * @reg_defaults: Power on reset values for registers (for use with
323 * register cache support).
324 * @num_reg_defaults: Number of elements in reg_defaults.
6f306441 325 *
f50e38c9 326 * @read_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 327 * a read.
f50e38c9 328 * @write_flag_mask: Mask to be set in the top bytes of the register when doing
6f306441 329 * a write. If both read_flag_mask and write_flag_mask are
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330 * empty and zero_flag_mask is not set the regmap_bus default
331 * masks are used.
332 * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
333 * if they are both empty.
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334 * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers.
335 * This can avoid load on devices which don't require strict
336 * orderings, but drivers should carefully add any explicit
337 * memory barriers when they may require them.
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338 * @use_single_read: If set, converts the bulk read operation into a series of
339 * single read operations. This is useful for a device that
340 * does not support bulk read.
341 * @use_single_write: If set, converts the bulk write operation into a series of
342 * single write operations. This is useful for a device that
343 * does not support bulk write.
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344 * @can_multi_write: If set, the device supports the multi write mode of bulk
345 * write operations, if clear multi write requests will be
346 * split into individual write operations
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347 *
348 * @cache_type: The actual cache type.
349 * @reg_defaults_raw: Power on reset values for registers (for use with
350 * register cache support).
351 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
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352 * @reg_format_endian: Endianness for formatted register addresses. If this is
353 * DEFAULT, the @reg_format_endian_default value from the
354 * regmap bus is used.
355 * @val_format_endian: Endianness for formatted register values. If this is
356 * DEFAULT, the @reg_format_endian_default value from the
357 * regmap bus is used.
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358 *
359 * @ranges: Array of configuration entries for virtual address ranges.
360 * @num_ranges: Number of range configuration entries.
a4887813 361 * @use_hwlock: Indicate if a hardware spinlock should be used.
67021f25 362 * @use_raw_spinlock: Indicate if a raw spinlock should be used.
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363 * @hwlock_id: Specify the hardware spinlock id.
364 * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
365 * HWLOCK_IRQ or 0.
21f8e482 366 * @can_sleep: Optional, specifies whether regmap operations can sleep.
dd898b20 367 */
b83a313b 368struct regmap_config {
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369 const char *name;
370
b83a313b 371 int reg_bits;
f01ee60f 372 int reg_stride;
86fc59ef 373 int reg_downshift;
0074f3f2 374 unsigned int reg_base;
82159ba8 375 int pad_bits;
b83a313b 376 int val_bits;
2e2ae66d 377
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378 bool (*writeable_reg)(struct device *dev, unsigned int reg);
379 bool (*readable_reg)(struct device *dev, unsigned int reg);
380 bool (*volatile_reg)(struct device *dev, unsigned int reg);
18694886 381 bool (*precious_reg)(struct device *dev, unsigned int reg);
cdf6b11d 382 bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
74fe7b55 383 bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);
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384
385 bool disable_locking;
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386 regmap_lock lock;
387 regmap_unlock unlock;
388 void *lock_arg;
bd20eb54 389
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390 int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
391 int (*reg_write)(void *context, unsigned int reg, unsigned int val);
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392 int (*reg_update_bits)(void *context, unsigned int reg,
393 unsigned int mask, unsigned int val);
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394 /* Bulk read/write */
395 int (*read)(void *context, const void *reg_buf, size_t reg_size,
396 void *val_buf, size_t val_size);
397 int (*write)(void *context, const void *data, size_t count);
398 size_t max_raw_read;
399 size_t max_raw_write;
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400
401 bool fast_io;
402
bd20eb54 403 unsigned int max_register;
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404 const struct regmap_access_table *wr_table;
405 const struct regmap_access_table *rd_table;
406 const struct regmap_access_table *volatile_table;
407 const struct regmap_access_table *precious_table;
cdf6b11d 408 const struct regmap_access_table *wr_noinc_table;
74fe7b55 409 const struct regmap_access_table *rd_noinc_table;
720e4616 410 const struct reg_default *reg_defaults;
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411 unsigned int num_reg_defaults;
412 enum regcache_type cache_type;
413 const void *reg_defaults_raw;
414 unsigned int num_reg_defaults_raw;
6f306441 415
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416 unsigned long read_flag_mask;
417 unsigned long write_flag_mask;
9bf485c9 418 bool zero_flag_mask;
2e33caf1 419
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420 bool use_single_read;
421 bool use_single_write;
6e1e90ec 422 bool use_relaxed_mmio;
e894c3f4 423 bool can_multi_write;
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424
425 enum regmap_endian reg_format_endian;
426 enum regmap_endian val_format_endian;
38e23194 427
6863ca62 428 const struct regmap_range_cfg *ranges;
e3549cd0 429 unsigned int num_ranges;
8698b936 430
a4887813 431 bool use_hwlock;
67021f25 432 bool use_raw_spinlock;
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433 unsigned int hwlock_id;
434 unsigned int hwlock_mode;
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435
436 bool can_sleep;
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437};
438
439/**
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440 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
441 * registers.
6863ca62 442 *
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443 * @name: Descriptive name for diagnostics
444 *
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445 * @range_min: Address of the lowest register address in virtual range.
446 * @range_max: Address of the highest register in virtual range.
447 *
2cf8e2df 448 * @selector_reg: Register with selector field.
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449 * @selector_mask: Bit mask for selector value.
450 * @selector_shift: Bit shift for selector value.
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451 *
452 * @window_start: Address of first (lowest) register in data window.
453 * @window_len: Number of registers in data window.
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454 *
455 * Registers, mapped to this virtual range, are accessed in two steps:
456 * 1. page selector register update;
457 * 2. access through data window registers.
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458 */
459struct regmap_range_cfg {
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460 const char *name;
461
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462 /* Registers of virtual address range */
463 unsigned int range_min;
464 unsigned int range_max;
465
466 /* Page selector for indirect addressing */
467 unsigned int selector_reg;
468 unsigned int selector_mask;
469 int selector_shift;
470
471 /* Data window (per each page) */
472 unsigned int window_start;
473 unsigned int window_len;
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474};
475
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476struct regmap_async;
477
0135bbcc 478typedef int (*regmap_hw_write)(void *context, const void *data,
b83a313b 479 size_t count);
0135bbcc 480typedef int (*regmap_hw_gather_write)(void *context,
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481 const void *reg, size_t reg_len,
482 const void *val, size_t val_len);
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483typedef int (*regmap_hw_async_write)(void *context,
484 const void *reg, size_t reg_len,
485 const void *val, size_t val_len,
486 struct regmap_async *async);
0135bbcc 487typedef int (*regmap_hw_read)(void *context,
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488 const void *reg_buf, size_t reg_size,
489 void *val_buf, size_t val_size);
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490typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
491 unsigned int *val);
492typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
493 unsigned int val);
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494typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
495 unsigned int mask, unsigned int val);
0d509f2b 496typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
0135bbcc 497typedef void (*regmap_hw_free_context)(void *context);
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498
499/**
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500 * struct regmap_bus - Description of a hardware bus for the register map
501 * infrastructure.
b83a313b 502 *
bacdbe07 503 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
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504 * to perform locking. This field is ignored if custom lock/unlock
505 * functions are used (see fields lock/unlock of
506 * struct regmap_config).
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507 * @write: Write operation.
508 * @gather_write: Write operation with split register/value, return -ENOTSUPP
509 * if not implemented on a given device.
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510 * @async_write: Write operation which completes asynchronously, optional and
511 * must serialise with respect to non-async I/O.
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512 * @reg_write: Write a single register value to the given register address. This
513 * write operation has to complete when returning from the function.
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514 * @reg_update_bits: Update bits operation to be used against volatile
515 * registers, intended for devices supporting some mechanism
516 * for setting clearing bits without having to
517 * read/modify/write.
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518 * @read: Read operation. Data is returned in the buffer used to transmit
519 * data.
c5f58f2d
MP
520 * @reg_read: Read a single register value from a given register address.
521 * @free_context: Free context.
0d509f2b 522 * @async_alloc: Allocate a regmap_async() structure.
b83a313b
MB
523 * @read_flag_mask: Mask to be set in the top byte of the register when doing
524 * a read.
141eba2e
SW
525 * @reg_format_endian_default: Default endianness for formatted register
526 * addresses. Used when the regmap_config specifies DEFAULT. If this is
527 * DEFAULT, BIG is assumed.
528 * @val_format_endian_default: Default endianness for formatted register
529 * values. Used when the regmap_config specifies DEFAULT. If this is
530 * DEFAULT, BIG is assumed.
adaac459
MP
531 * @max_raw_read: Max raw read size that can be used on the bus.
532 * @max_raw_write: Max raw write size that can be used on the bus.
ea030ca6 533 * @free_on_exit: kfree this on exit of regmap
b83a313b
MB
534 */
535struct regmap_bus {
bacdbe07 536 bool fast_io;
b83a313b
MB
537 regmap_hw_write write;
538 regmap_hw_gather_write gather_write;
0d509f2b 539 regmap_hw_async_write async_write;
3ac17037 540 regmap_hw_reg_write reg_write;
77792b11 541 regmap_hw_reg_update_bits reg_update_bits;
b83a313b 542 regmap_hw_read read;
3ac17037 543 regmap_hw_reg_read reg_read;
0135bbcc 544 regmap_hw_free_context free_context;
0d509f2b 545 regmap_hw_async_alloc async_alloc;
b83a313b 546 u8 read_flag_mask;
141eba2e
SW
547 enum regmap_endian reg_format_endian_default;
548 enum regmap_endian val_format_endian_default;
adaac459
MP
549 size_t max_raw_read;
550 size_t max_raw_write;
ea030ca6 551 bool free_on_exit;
b83a313b
MB
552};
553
3cfe7a74
NB
554/*
555 * __regmap_init functions.
556 *
557 * These functions take a lock key and name parameter, and should not be called
558 * directly. Instead, use the regmap_init macros that generate a key and name
559 * for each call.
560 */
561struct regmap *__regmap_init(struct device *dev,
562 const struct regmap_bus *bus,
563 void *bus_context,
564 const struct regmap_config *config,
565 struct lock_class_key *lock_key,
566 const char *lock_name);
567struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
568 const struct regmap_config *config,
569 struct lock_class_key *lock_key,
570 const char *lock_name);
1f89d2fe
SV
571struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
572 const struct regmap_config *config,
573 struct lock_class_key *lock_key,
574 const char *lock_name);
bcf7eac3
AM
575struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
576 const struct regmap_config *config,
577 struct lock_class_key *lock_key,
578 const char *lock_name);
7d6f7fb0
SK
579struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
580 const struct regmap_config *config,
581 struct lock_class_key *lock_key,
582 const char *lock_name);
3cfe7a74
NB
583struct regmap *__regmap_init_spi(struct spi_device *dev,
584 const struct regmap_config *config,
585 struct lock_class_key *lock_key,
586 const char *lock_name);
587struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
588 const struct regmap_config *config,
589 struct lock_class_key *lock_key,
590 const char *lock_name);
591struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
592 const struct regmap_config *config,
593 struct lock_class_key *lock_key,
594 const char *lock_name);
cc5d0db3
AM
595struct regmap *__regmap_init_w1(struct device *w1_dev,
596 const struct regmap_config *config,
597 struct lock_class_key *lock_key,
598 const char *lock_name);
3cfe7a74
NB
599struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
600 void __iomem *regs,
601 const struct regmap_config *config,
602 struct lock_class_key *lock_key,
603 const char *lock_name);
604struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
605 const struct regmap_config *config,
606 struct lock_class_key *lock_key,
607 const char *lock_name);
7c22ce6e
VK
608struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
609 const struct regmap_config *config,
610 struct lock_class_key *lock_key,
611 const char *lock_name);
fb5103f9
PLB
612struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
613 const struct regmap_config *config,
614 struct lock_class_key *lock_key,
615 const char *lock_name);
7f9fb673
XY
616struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
617 const struct regmap_config *config,
618 struct lock_class_key *lock_key,
619 const char *lock_name);
3cfe7a74
NB
620
621struct regmap *__devm_regmap_init(struct device *dev,
622 const struct regmap_bus *bus,
623 void *bus_context,
624 const struct regmap_config *config,
625 struct lock_class_key *lock_key,
626 const char *lock_name);
627struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
628 const struct regmap_config *config,
629 struct lock_class_key *lock_key,
630 const char *lock_name);
1f89d2fe
SV
631struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
632 const struct regmap_config *config,
633 struct lock_class_key *lock_key,
634 const char *lock_name);
bcf7eac3
AM
635struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
636 const struct regmap_config *config,
637 struct lock_class_key *lock_key,
638 const char *lock_name);
3cfe7a74
NB
639struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
640 const struct regmap_config *config,
641 struct lock_class_key *lock_key,
642 const char *lock_name);
643struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
644 const struct regmap_config *config,
645 struct lock_class_key *lock_key,
646 const char *lock_name);
647struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
648 const struct regmap_config *config,
649 struct lock_class_key *lock_key,
650 const char *lock_name);
cc5d0db3
AM
651struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
652 const struct regmap_config *config,
653 struct lock_class_key *lock_key,
654 const char *lock_name);
3cfe7a74
NB
655struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
656 const char *clk_id,
657 void __iomem *regs,
658 const struct regmap_config *config,
659 struct lock_class_key *lock_key,
660 const char *lock_name);
661struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
662 const struct regmap_config *config,
663 struct lock_class_key *lock_key,
664 const char *lock_name);
7c22ce6e
VK
665struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
666 const struct regmap_config *config,
667 struct lock_class_key *lock_key,
668 const char *lock_name);
fb5103f9
PLB
669struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
670 const struct regmap_config *config,
671 struct lock_class_key *lock_key,
672 const char *lock_name);
ed24d568
SK
673struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
674 const struct regmap_config *config,
675 struct lock_class_key *lock_key,
676 const char *lock_name);
6445500b
VS
677struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
678 const struct regmap_config *config,
679 struct lock_class_key *lock_key,
680 const char *lock_name);
7f9fb673
XY
681struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
682 const struct regmap_config *config,
683 struct lock_class_key *lock_key,
684 const char *lock_name);
3cfe7a74
NB
685/*
686 * Wrapper for regmap_init macros to include a unique lockdep key and name
687 * for each call. No-op if CONFIG_LOCKDEP is not set.
688 *
689 * @fn: Real function to call (in the form __[*_]regmap_init[_*])
690 * @name: Config variable name (#config in the calling macro)
691 **/
692#ifdef CONFIG_LOCKDEP
693#define __regmap_lockdep_wrapper(fn, name, ...) \
694( \
695 ({ \
696 static struct lock_class_key _key; \
697 fn(__VA_ARGS__, &_key, \
698 KBUILD_BASENAME ":" \
699 __stringify(__LINE__) ":" \
700 "(" name ")->lock"); \
701 }) \
702)
703#else
704#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
705#endif
706
1ed81114 707/**
2cf8e2df 708 * regmap_init() - Initialise register map
1ed81114
NB
709 *
710 * @dev: Device that will be interacted with
711 * @bus: Bus-specific callbacks to use with device
712 * @bus_context: Data passed to bus-specific callbacks
713 * @config: Configuration for register map
714 *
715 * The return value will be an ERR_PTR() on error or a valid pointer to
716 * a struct regmap. This function should generally not be called
717 * directly, it should be called by bus-specific init functions.
718 */
3cfe7a74
NB
719#define regmap_init(dev, bus, bus_context, config) \
720 __regmap_lockdep_wrapper(__regmap_init, #config, \
721 dev, bus, bus_context, config)
6cfec04b 722int regmap_attach_dev(struct device *dev, struct regmap *map,
3cfe7a74 723 const struct regmap_config *config);
22853223 724
1ed81114 725/**
2cf8e2df 726 * regmap_init_i2c() - Initialise register map
1ed81114
NB
727 *
728 * @i2c: Device that will be interacted with
729 * @config: Configuration for register map
730 *
731 * The return value will be an ERR_PTR() on error or a valid pointer to
732 * a struct regmap.
733 */
3cfe7a74
NB
734#define regmap_init_i2c(i2c, config) \
735 __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
736 i2c, config)
1ed81114 737
1f89d2fe
SV
738/**
739 * regmap_init_mdio() - Initialise register map
740 *
741 * @mdio_dev: Device that will be interacted with
742 * @config: Configuration for register map
743 *
744 * The return value will be an ERR_PTR() on error or a valid pointer to
745 * a struct regmap.
746 */
747#define regmap_init_mdio(mdio_dev, config) \
748 __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \
749 mdio_dev, config)
750
bcf7eac3
AM
751/**
752 * regmap_init_sccb() - Initialise register map
753 *
754 * @i2c: Device that will be interacted with
755 * @config: Configuration for register map
756 *
757 * The return value will be an ERR_PTR() on error or a valid pointer to
758 * a struct regmap.
759 */
760#define regmap_init_sccb(i2c, config) \
761 __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \
762 i2c, config)
763
7d6f7fb0
SK
764/**
765 * regmap_init_slimbus() - Initialise register map
766 *
767 * @slimbus: Device that will be interacted with
768 * @config: Configuration for register map
769 *
770 * The return value will be an ERR_PTR() on error or a valid pointer to
771 * a struct regmap.
772 */
773#define regmap_init_slimbus(slimbus, config) \
774 __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
775 slimbus, config)
776
1ed81114 777/**
2cf8e2df 778 * regmap_init_spi() - Initialise register map
1ed81114 779 *
2cf8e2df 780 * @dev: Device that will be interacted with
1ed81114
NB
781 * @config: Configuration for register map
782 *
783 * The return value will be an ERR_PTR() on error or a valid pointer to
784 * a struct regmap.
785 */
3cfe7a74
NB
786#define regmap_init_spi(dev, config) \
787 __regmap_lockdep_wrapper(__regmap_init_spi, #config, \
788 dev, config)
1ed81114
NB
789
790/**
2cf8e2df
CK
791 * regmap_init_spmi_base() - Create regmap for the Base register space
792 *
793 * @dev: SPMI device that will be interacted with
1ed81114
NB
794 * @config: Configuration for register map
795 *
796 * The return value will be an ERR_PTR() on error or a valid pointer to
797 * a struct regmap.
798 */
3cfe7a74
NB
799#define regmap_init_spmi_base(dev, config) \
800 __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \
801 dev, config)
1ed81114
NB
802
803/**
2cf8e2df
CK
804 * regmap_init_spmi_ext() - Create regmap for Ext register space
805 *
806 * @dev: Device that will be interacted with
1ed81114
NB
807 * @config: Configuration for register map
808 *
809 * The return value will be an ERR_PTR() on error or a valid pointer to
810 * a struct regmap.
811 */
3cfe7a74
NB
812#define regmap_init_spmi_ext(dev, config) \
813 __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \
814 dev, config)
1ed81114 815
cc5d0db3
AM
816/**
817 * regmap_init_w1() - Initialise register map
818 *
819 * @w1_dev: Device that will be interacted with
820 * @config: Configuration for register map
821 *
822 * The return value will be an ERR_PTR() on error or a valid pointer to
823 * a struct regmap.
824 */
825#define regmap_init_w1(w1_dev, config) \
826 __regmap_lockdep_wrapper(__regmap_init_w1, #config, \
827 w1_dev, config)
828
1ed81114 829/**
2cf8e2df 830 * regmap_init_mmio_clk() - Initialise register map with register clock
1ed81114
NB
831 *
832 * @dev: Device that will be interacted with
833 * @clk_id: register clock consumer ID
834 * @regs: Pointer to memory-mapped IO region
835 * @config: Configuration for register map
836 *
837 * The return value will be an ERR_PTR() on error or a valid pointer to
838 * a struct regmap.
839 */
3cfe7a74
NB
840#define regmap_init_mmio_clk(dev, clk_id, regs, config) \
841 __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \
842 dev, clk_id, regs, config)
878ec67b
PZ
843
844/**
2cf8e2df 845 * regmap_init_mmio() - Initialise register map
878ec67b
PZ
846 *
847 * @dev: Device that will be interacted with
848 * @regs: Pointer to memory-mapped IO region
849 * @config: Configuration for register map
850 *
851 * The return value will be an ERR_PTR() on error or a valid pointer to
852 * a struct regmap.
853 */
1ed81114
NB
854#define regmap_init_mmio(dev, regs, config) \
855 regmap_init_mmio_clk(dev, NULL, regs, config)
856
857/**
2cf8e2df 858 * regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
859 *
860 * @ac97: Device that will be interacted with
861 * @config: Configuration for register map
862 *
863 * The return value will be an ERR_PTR() on error or a valid pointer to
864 * a struct regmap.
865 */
3cfe7a74
NB
866#define regmap_init_ac97(ac97, config) \
867 __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \
868 ac97, config)
22853223 869bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);
878ec67b 870
7c22ce6e
VK
871/**
872 * regmap_init_sdw() - Initialise register map
873 *
874 * @sdw: Device that will be interacted with
875 * @config: Configuration for register map
876 *
877 * The return value will be an ERR_PTR() on error or a valid pointer to
878 * a struct regmap.
879 */
880#define regmap_init_sdw(sdw, config) \
881 __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \
882 sdw, config)
883
fb5103f9
PLB
884/**
885 * regmap_init_sdw_mbq() - Initialise register map
886 *
887 * @sdw: Device that will be interacted with
888 * @config: Configuration for register map
889 *
890 * The return value will be an ERR_PTR() on error or a valid pointer to
891 * a struct regmap.
892 */
893#define regmap_init_sdw_mbq(sdw, config) \
894 __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
895 sdw, config)
896
7f9fb673
XY
897/**
898 * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
899 * to AVMM Bus Bridge
900 *
901 * @spi: Device that will be interacted with
902 * @config: Configuration for register map
903 *
904 * The return value will be an ERR_PTR() on error or a valid pointer
905 * to a struct regmap.
906 */
907#define regmap_init_spi_avmm(spi, config) \
908 __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \
909 spi, config)
7c22ce6e 910
1ed81114 911/**
2cf8e2df 912 * devm_regmap_init() - Initialise managed register map
1ed81114
NB
913 *
914 * @dev: Device that will be interacted with
915 * @bus: Bus-specific callbacks to use with device
916 * @bus_context: Data passed to bus-specific callbacks
917 * @config: Configuration for register map
918 *
919 * The return value will be an ERR_PTR() on error or a valid pointer
920 * to a struct regmap. This function should generally not be called
921 * directly, it should be called by bus-specific init functions. The
922 * map will be automatically freed by the device management code.
923 */
3cfe7a74
NB
924#define devm_regmap_init(dev, bus, bus_context, config) \
925 __regmap_lockdep_wrapper(__devm_regmap_init, #config, \
926 dev, bus, bus_context, config)
1ed81114
NB
927
928/**
2cf8e2df 929 * devm_regmap_init_i2c() - Initialise managed register map
1ed81114
NB
930 *
931 * @i2c: Device that will be interacted with
932 * @config: Configuration for register map
933 *
934 * The return value will be an ERR_PTR() on error or a valid pointer
935 * to a struct regmap. The regmap will be automatically freed by the
936 * device management code.
937 */
3cfe7a74
NB
938#define devm_regmap_init_i2c(i2c, config) \
939 __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \
940 i2c, config)
1ed81114 941
1f89d2fe
SV
942/**
943 * devm_regmap_init_mdio() - Initialise managed register map
944 *
945 * @mdio_dev: Device that will be interacted with
946 * @config: Configuration for register map
947 *
948 * The return value will be an ERR_PTR() on error or a valid pointer
949 * to a struct regmap. The regmap will be automatically freed by the
950 * device management code.
951 */
952#define devm_regmap_init_mdio(mdio_dev, config) \
953 __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \
954 mdio_dev, config)
955
bcf7eac3
AM
956/**
957 * devm_regmap_init_sccb() - Initialise managed register map
958 *
959 * @i2c: Device that will be interacted with
960 * @config: Configuration for register map
961 *
962 * The return value will be an ERR_PTR() on error or a valid pointer
963 * to a struct regmap. The regmap will be automatically freed by the
964 * device management code.
965 */
966#define devm_regmap_init_sccb(i2c, config) \
967 __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \
968 i2c, config)
969
1ed81114 970/**
2cf8e2df 971 * devm_regmap_init_spi() - Initialise register map
1ed81114 972 *
2cf8e2df 973 * @dev: Device that will be interacted with
1ed81114
NB
974 * @config: Configuration for register map
975 *
976 * The return value will be an ERR_PTR() on error or a valid pointer
977 * to a struct regmap. The map will be automatically freed by the
978 * device management code.
979 */
3cfe7a74
NB
980#define devm_regmap_init_spi(dev, config) \
981 __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \
982 dev, config)
1ed81114
NB
983
984/**
2cf8e2df
CK
985 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
986 *
987 * @dev: SPMI device that will be interacted with
1ed81114
NB
988 * @config: Configuration for register map
989 *
990 * The return value will be an ERR_PTR() on error or a valid pointer
991 * to a struct regmap. The regmap will be automatically freed by the
992 * device management code.
993 */
3cfe7a74
NB
994#define devm_regmap_init_spmi_base(dev, config) \
995 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \
996 dev, config)
1ed81114
NB
997
998/**
2cf8e2df
CK
999 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
1000 *
1001 * @dev: SPMI device that will be interacted with
1ed81114
NB
1002 * @config: Configuration for register map
1003 *
1004 * The return value will be an ERR_PTR() on error or a valid pointer
1005 * to a struct regmap. The regmap will be automatically freed by the
1006 * device management code.
1007 */
3cfe7a74
NB
1008#define devm_regmap_init_spmi_ext(dev, config) \
1009 __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \
1010 dev, config)
3cfe7a74 1011
cc5d0db3
AM
1012/**
1013 * devm_regmap_init_w1() - Initialise managed register map
1014 *
1015 * @w1_dev: Device that will be interacted with
1016 * @config: Configuration for register map
1017 *
1018 * The return value will be an ERR_PTR() on error or a valid pointer
1019 * to a struct regmap. The regmap will be automatically freed by the
1020 * device management code.
1021 */
1022#define devm_regmap_init_w1(w1_dev, config) \
1023 __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \
1024 w1_dev, config)
878ec67b 1025/**
2cf8e2df 1026 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
878ec67b
PZ
1027 *
1028 * @dev: Device that will be interacted with
1ed81114 1029 * @clk_id: register clock consumer ID
878ec67b
PZ
1030 * @regs: Pointer to memory-mapped IO region
1031 * @config: Configuration for register map
1032 *
1ed81114
NB
1033 * The return value will be an ERR_PTR() on error or a valid pointer
1034 * to a struct regmap. The regmap will be automatically freed by the
1035 * device management code.
878ec67b 1036 */
1ed81114
NB
1037#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \
1038 __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \
1039 dev, clk_id, regs, config)
878ec67b
PZ
1040
1041/**
2cf8e2df 1042 * devm_regmap_init_mmio() - Initialise managed register map
878ec67b
PZ
1043 *
1044 * @dev: Device that will be interacted with
1045 * @regs: Pointer to memory-mapped IO region
1046 * @config: Configuration for register map
1047 *
1048 * The return value will be an ERR_PTR() on error or a valid pointer
1049 * to a struct regmap. The regmap will be automatically freed by the
1050 * device management code.
1051 */
3cfe7a74
NB
1052#define devm_regmap_init_mmio(dev, regs, config) \
1053 devm_regmap_init_mmio_clk(dev, NULL, regs, config)
c0eb4676 1054
1ed81114 1055/**
2cf8e2df 1056 * devm_regmap_init_ac97() - Initialise AC'97 register map
1ed81114
NB
1057 *
1058 * @ac97: Device that will be interacted with
1059 * @config: Configuration for register map
1060 *
1061 * The return value will be an ERR_PTR() on error or a valid pointer
1062 * to a struct regmap. The regmap will be automatically freed by the
1063 * device management code.
1064 */
1065#define devm_regmap_init_ac97(ac97, config) \
1066 __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \
1067 ac97, config)
c0eb4676 1068
7c22ce6e
VK
1069/**
1070 * devm_regmap_init_sdw() - Initialise managed register map
1071 *
1072 * @sdw: Device that will be interacted with
1073 * @config: Configuration for register map
1074 *
1075 * The return value will be an ERR_PTR() on error or a valid pointer
1076 * to a struct regmap. The regmap will be automatically freed by the
1077 * device management code.
1078 */
1079#define devm_regmap_init_sdw(sdw, config) \
1080 __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \
1081 sdw, config)
1082
fb5103f9
PLB
1083/**
1084 * devm_regmap_init_sdw_mbq() - Initialise managed register map
1085 *
1086 * @sdw: Device that will be interacted with
1087 * @config: Configuration for register map
1088 *
1089 * The return value will be an ERR_PTR() on error or a valid pointer
1090 * to a struct regmap. The regmap will be automatically freed by the
1091 * device management code.
1092 */
1093#define devm_regmap_init_sdw_mbq(sdw, config) \
1094 __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
1095 sdw, config)
1096
ed24d568
SK
1097/**
1098 * devm_regmap_init_slimbus() - Initialise managed register map
1099 *
1100 * @slimbus: Device that will be interacted with
1101 * @config: Configuration for register map
1102 *
1103 * The return value will be an ERR_PTR() on error or a valid pointer
1104 * to a struct regmap. The regmap will be automatically freed by the
1105 * device management code.
1106 */
1107#define devm_regmap_init_slimbus(slimbus, config) \
1108 __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \
1109 slimbus, config)
6445500b
VS
1110
1111/**
1112 * devm_regmap_init_i3c() - Initialise managed register map
1113 *
1114 * @i3c: Device that will be interacted with
1115 * @config: Configuration for register map
1116 *
1117 * The return value will be an ERR_PTR() on error or a valid pointer
1118 * to a struct regmap. The regmap will be automatically freed by the
1119 * device management code.
1120 */
1121#define devm_regmap_init_i3c(i3c, config) \
1122 __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \
1123 i3c, config)
1124
7f9fb673
XY
1125/**
1126 * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
1127 * to AVMM Bus Bridge
1128 *
1129 * @spi: Device that will be interacted with
1130 * @config: Configuration for register map
1131 *
1132 * The return value will be an ERR_PTR() on error or a valid pointer
1133 * to a struct regmap. The map will be automatically freed by the
1134 * device management code.
1135 */
1136#define devm_regmap_init_spi_avmm(spi, config) \
1137 __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \
1138 spi, config)
1139
31895662
MR
1140int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
1141void regmap_mmio_detach_clk(struct regmap *map);
b83a313b 1142void regmap_exit(struct regmap *map);
bf315173
MB
1143int regmap_reinit_cache(struct regmap *map,
1144 const struct regmap_config *config);
72b39f6f 1145struct regmap *dev_get_regmap(struct device *dev, const char *name);
8d7d3972 1146struct device *regmap_get_device(struct regmap *map);
b83a313b 1147int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
915f441b 1148int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
b83a313b
MB
1149int regmap_raw_write(struct regmap *map, unsigned int reg,
1150 const void *val, size_t val_len);
cdf6b11d
BW
1151int regmap_noinc_write(struct regmap *map, unsigned int reg,
1152 const void *val, size_t val_len);
8eaeb219
LD
1153int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1154 size_t val_count);
8019ff6c 1155int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
e33fabd3 1156 int num_regs);
1d5b40bc 1157int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 1158 const struct reg_sequence *regs,
1d5b40bc 1159 int num_regs);
0d509f2b
MB
1160int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1161 const void *val, size_t val_len);
b83a313b
MB
1162int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
1163int regmap_raw_read(struct regmap *map, unsigned int reg,
1164 void *val, size_t val_len);
74fe7b55
CDL
1165int regmap_noinc_read(struct regmap *map, unsigned int reg,
1166 void *val, size_t val_len);
b83a313b
MB
1167int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1168 size_t val_count);
91d31b9f
KM
1169int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1170 unsigned int mask, unsigned int val,
1171 bool *change, bool async, bool force);
4b9e7edb
BG
1172
1173static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1174 unsigned int mask, unsigned int val)
1175{
1176 return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
1177}
1178
1179static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1180 unsigned int mask, unsigned int val)
1181{
1182 return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
1183}
1184
1185static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1186 unsigned int mask, unsigned int val,
1187 bool *change)
1188{
1189 return regmap_update_bits_base(map, reg, mask, val,
1190 change, false, false);
1191}
1192
1193static inline int
1194regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1195 unsigned int mask, unsigned int val,
1196 bool *change)
1197{
1198 return regmap_update_bits_base(map, reg, mask, val,
1199 change, true, false);
1200}
1201
1202static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1203 unsigned int mask, unsigned int val)
1204{
1205 return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
1206}
1207
a6539c32 1208int regmap_get_val_bytes(struct regmap *map);
668abc72 1209int regmap_get_max_register(struct regmap *map);
a2f776cb 1210int regmap_get_reg_stride(struct regmap *map);
0d509f2b 1211int regmap_async_complete(struct regmap *map);
221ad7f2 1212bool regmap_can_raw_write(struct regmap *map);
f50c9eb4
MP
1213size_t regmap_get_raw_read_max(struct regmap *map);
1214size_t regmap_get_raw_write_max(struct regmap *map);
b83a313b 1215
39a58439 1216int regcache_sync(struct regmap *map);
4d4cfd16
MB
1217int regcache_sync_region(struct regmap *map, unsigned int min,
1218 unsigned int max);
697e85bc
MB
1219int regcache_drop_region(struct regmap *map, unsigned int min,
1220 unsigned int max);
92afb286 1221void regcache_cache_only(struct regmap *map, bool enable);
6eb0f5e0 1222void regcache_cache_bypass(struct regmap *map, bool enable);
8ae0d7e8 1223void regcache_mark_dirty(struct regmap *map);
92afb286 1224
154881e5
MB
1225bool regmap_check_range_table(struct regmap *map, unsigned int reg,
1226 const struct regmap_access_table *table);
1227
8019ff6c 1228int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a 1229 int num_regs);
13ff50c8
NC
1230int regmap_parse_val(struct regmap *map, const void *buf,
1231 unsigned int *val);
22f0d90a 1232
76aad392
DC
1233static inline bool regmap_reg_in_range(unsigned int reg,
1234 const struct regmap_range *range)
1235{
1236 return reg >= range->range_min && reg <= range->range_max;
1237}
1238
1239bool regmap_reg_in_ranges(unsigned int reg,
1240 const struct regmap_range *ranges,
1241 unsigned int nranges);
1242
aa2ff9db
BG
1243static inline int regmap_set_bits(struct regmap *map,
1244 unsigned int reg, unsigned int bits)
1245{
1246 return regmap_update_bits_base(map, reg, bits, bits,
1247 NULL, false, false);
1248}
1249
1250static inline int regmap_clear_bits(struct regmap *map,
1251 unsigned int reg, unsigned int bits)
1252{
1253 return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
1254}
1255
1256int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
1257
67252287 1258/**
2cf8e2df 1259 * struct reg_field - Description of an register field
67252287
SK
1260 *
1261 * @reg: Offset of the register within the regmap bank
1262 * @lsb: lsb of the register field.
f27b37f5 1263 * @msb: msb of the register field.
a0102375
KM
1264 * @id_size: port size if it has some ports
1265 * @id_offset: address offset for each ports
67252287
SK
1266 */
1267struct reg_field {
1268 unsigned int reg;
1269 unsigned int lsb;
1270 unsigned int msb;
a0102375
KM
1271 unsigned int id_size;
1272 unsigned int id_offset;
67252287
SK
1273};
1274
1275#define REG_FIELD(_reg, _lsb, _msb) { \
1276 .reg = _reg, \
1277 .lsb = _lsb, \
1278 .msb = _msb, \
1279 }
1280
8baebfc2
VO
1281#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \
1282 .reg = _reg, \
1283 .lsb = _lsb, \
1284 .msb = _msb, \
1285 .id_size = _size, \
1286 .id_offset = _offset, \
1287 }
1288
67252287
SK
1289struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1290 struct reg_field reg_field);
1291void regmap_field_free(struct regmap_field *field);
1292
1293struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1294 struct regmap *regmap, struct reg_field reg_field);
1295void devm_regmap_field_free(struct device *dev, struct regmap_field *field);
1296
ea470b82
SK
1297int regmap_field_bulk_alloc(struct regmap *regmap,
1298 struct regmap_field **rm_field,
29c34975 1299 const struct reg_field *reg_field,
ea470b82
SK
1300 int num_fields);
1301void regmap_field_bulk_free(struct regmap_field *field);
1302int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
1303 struct regmap_field **field,
29c34975
IZ
1304 const struct reg_field *reg_field,
1305 int num_fields);
ea470b82
SK
1306void devm_regmap_field_bulk_free(struct device *dev,
1307 struct regmap_field *field);
1308
67252287 1309int regmap_field_read(struct regmap_field *field, unsigned int *val);
28972eaa
KM
1310int regmap_field_update_bits_base(struct regmap_field *field,
1311 unsigned int mask, unsigned int val,
1312 bool *change, bool async, bool force);
a0102375
KM
1313int regmap_fields_read(struct regmap_field *field, unsigned int id,
1314 unsigned int *val);
e126edec
KM
1315int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1316 unsigned int mask, unsigned int val,
1317 bool *change, bool async, bool force);
4b9e7edb
BG
1318
1319static inline int regmap_field_write(struct regmap_field *field,
1320 unsigned int val)
1321{
1322 return regmap_field_update_bits_base(field, ~0, val,
1323 NULL, false, false);
1324}
1325
1326static inline int regmap_field_force_write(struct regmap_field *field,
1327 unsigned int val)
1328{
1329 return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
1330}
1331
1332static inline int regmap_field_update_bits(struct regmap_field *field,
1333 unsigned int mask, unsigned int val)
1334{
1335 return regmap_field_update_bits_base(field, mask, val,
1336 NULL, false, false);
1337}
1338
f67be8b7
LC
1339static inline int regmap_field_set_bits(struct regmap_field *field,
1340 unsigned int bits)
1341{
1342 return regmap_field_update_bits_base(field, bits, bits, NULL, false,
1343 false);
1344}
1345
1346static inline int regmap_field_clear_bits(struct regmap_field *field,
1347 unsigned int bits)
1348{
1349 return regmap_field_update_bits_base(field, bits, 0, NULL, false,
1350 false);
1351}
1352
1353int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);
1354
4b9e7edb
BG
1355static inline int
1356regmap_field_force_update_bits(struct regmap_field *field,
1357 unsigned int mask, unsigned int val)
1358{
1359 return regmap_field_update_bits_base(field, mask, val,
1360 NULL, false, true);
1361}
1362
1363static inline int regmap_fields_write(struct regmap_field *field,
1364 unsigned int id, unsigned int val)
1365{
1366 return regmap_fields_update_bits_base(field, id, ~0, val,
1367 NULL, false, false);
1368}
1369
1370static inline int regmap_fields_force_write(struct regmap_field *field,
1371 unsigned int id, unsigned int val)
1372{
1373 return regmap_fields_update_bits_base(field, id, ~0, val,
1374 NULL, false, true);
1375}
1376
1377static inline int
1378regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1379 unsigned int mask, unsigned int val)
1380{
1381 return regmap_fields_update_bits_base(field, id, mask, val,
1382 NULL, false, false);
1383}
1384
1385static inline int
1386regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1387 unsigned int mask, unsigned int val)
1388{
1389 return regmap_fields_update_bits_base(field, id, mask, val,
1390 NULL, false, true);
1391}
1392
1c2928e3
MV
1393/**
1394 * struct regmap_irq_type - IRQ type definitions.
1395 *
1396 * @type_reg_offset: Offset register for the irq type setting.
1397 * @type_rising_val: Register value to configure RISING type irq.
1398 * @type_falling_val: Register value to configure FALLING type irq.
1399 * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
1400 * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
1401 * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
1402 */
1403struct regmap_irq_type {
1404 unsigned int type_reg_offset;
1405 unsigned int type_reg_mask;
1406 unsigned int type_rising_val;
1407 unsigned int type_falling_val;
1408 unsigned int type_level_low_val;
1409 unsigned int type_level_high_val;
1410 unsigned int types_supported;
1411};
76aad392 1412
f8beab2b 1413/**
2cf8e2df 1414 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
f8beab2b
MB
1415 *
1416 * @reg_offset: Offset of the status/mask register within the bank
1417 * @mask: Mask used to flag/control the register.
1c2928e3 1418 * @type: IRQ trigger type setting details if supported.
f8beab2b
MB
1419 */
1420struct regmap_irq {
1421 unsigned int reg_offset;
1422 unsigned int mask;
1c2928e3 1423 struct regmap_irq_type type;
f8beab2b
MB
1424};
1425
b4fe8ba7
QZ
1426#define REGMAP_IRQ_REG(_irq, _off, _mask) \
1427 [_irq] = { .reg_offset = (_off), .mask = (_mask) }
1428
43fac323
TX
1429#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
1430 [_id] = { \
1431 .mask = BIT((_id) % (_reg_bits)), \
1432 .reg_offset = (_id) / (_reg_bits), \
1433 }
1434
a2d21848
MV
1435#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \
1436 { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }
1437
1438struct regmap_irq_sub_irq_map {
1439 unsigned int num_regs;
1440 unsigned int *offset;
1441};
1442
bdf9b86c
AM
1443struct regmap_irq_chip_data;
1444
f8beab2b 1445/**
2cf8e2df 1446 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
f8beab2b
MB
1447 *
1448 * @name: Descriptive name for IRQ controller.
1449 *
a2d21848
MV
1450 * @main_status: Base main status register address. For chips which have
1451 * interrupts arranged in separate sub-irq blocks with own IRQ
1452 * registers and which have a main IRQ registers indicating
1453 * sub-irq blocks with unhandled interrupts. For such chips fill
1454 * sub-irq register information in status_base, mask_base and
1455 * ack_base.
1456 * @num_main_status_bits: Should be given to chips where number of meaningfull
1457 * main status bits differs from num_regs.
1458 * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
1459 * registers. First item in array describes the registers
1460 * for first main status bit. Second array for second bit etc.
1461 * Offset is given as sub register status offset to
1462 * status_base. Should contain num_regs arrays.
1463 * Can be provided for chips with more complex mapping than
1464 * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1066cfbd
GDS
1465 * When used with not_fixed_stride, each one-element array
1466 * member contains offset calculated as address from each
1467 * peripheral to first peripheral.
a2d21848
MV
1468 * @num_main_regs: Number of 'main status' irq registers for chips which have
1469 * main_status set.
1470 *
f8beab2b 1471 * @status_base: Base status register address.
e8ffb12e
AM
1472 * @mask_base: Base mask register address. Mask bits are set to 1 when an
1473 * interrupt is masked, 0 when unmasked.
1474 * @unmask_base: Base unmask register address. Unmask bits are set to 1 when
1475 * an interrupt is unmasked and 0 when masked.
d3233433
AS
1476 * @ack_base: Base ack address. If zero then the chip is clear on read.
1477 * Using zero value is possible with @use_ack bit.
a43fd50d 1478 * @wake_base: Base address for wake enables. If zero unsupported.
9edd4f5a
AM
1479 * @type_base: Base address for irq type. If zero unsupported. Deprecated,
1480 * use @config_base instead.
1481 * @virt_reg_base: Base addresses for extra config regs. Deprecated, use
1482 * @config_base instead.
faa87ce9 1483 * @config_base: Base address for IRQ type config regs. If null unsupported.
022f926a 1484 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
2753e6f8 1485 * @init_ack_masked: Ack all masked interrupts once during initalization.
68622bdf 1486 * @mask_invert: Inverted mask register: cleared bits are masked out.
e8ffb12e
AM
1487 * Deprecated; prefer describing an inverted mask register as
1488 * an unmask register.
1489 * @mask_unmask_non_inverted: Controls mask bit inversion for chips that set
1490 * both @mask_base and @unmask_base. If false, mask and unmask bits are
1491 * inverted (which is deprecated behavior); if true, bits will not be
1492 * inverted and the registers keep their normal behavior. Note that if
1493 * you use only one of @mask_base or @unmask_base, this flag has no
1494 * effect and is unnecessary. Any new drivers that set both @mask_base
1495 * and @unmask_base should set this to true to avoid relying on the
1496 * deprecated behavior.
d3233433 1497 * @use_ack: Use @ack register even if it is zero.
a650fdd9 1498 * @ack_invert: Inverted ack register: cleared bits for ack.
3a6f0fb7 1499 * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
68622bdf 1500 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
9edd4f5a
AM
1501 * @type_invert: Invert the type flags. Deprecated, use config registers
1502 * instead.
610fdd66
AM
1503 * @type_in_mask: Use the mask registers for controlling irq type. Use this if
1504 * the hardware provides separate bits for rising/falling edge
1505 * or low/high level interrupts and they should be combined into
1506 * a single logical interrupt. Use &struct regmap_irq_type data
1507 * to define the mask bit for each irq type.
c82ea33e
BG
1508 * @clear_on_unmask: For chips with interrupts cleared on read: read the status
1509 * registers before unmasking interrupts to clear any bits
1510 * set when they were masked.
1066cfbd 1511 * @not_fixed_stride: Used when chip peripherals are not laid out with fixed
48e014ee
AM
1512 * stride. Must be used with sub_reg_offsets containing the
1513 * offsets to each peripheral. Deprecated; the same thing
1514 * can be accomplished with a @get_irq_reg callback, without
1515 * the need for a @sub_reg_offsets table.
bcd23f93 1516 * @status_invert: Inverted status register: cleared bits are active interrupts.
0c00c50b 1517 * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
f8beab2b
MB
1518 *
1519 * @num_regs: Number of registers in each control bank.
1520 * @irqs: Descriptors for individual IRQs. Interrupt numbers are
1521 * assigned based on the index in the array of the interrupt.
1522 * @num_irqs: Number of descriptors.
9edd4f5a
AM
1523 * @num_type_reg: Number of type registers. Deprecated, use config registers
1524 * instead.
4c501445 1525 * @num_virt_regs: Number of non-standard irq configuration registers.
9edd4f5a
AM
1526 * If zero unsupported. Deprecated, use config registers
1527 * instead.
faa87ce9
AM
1528 * @num_config_bases: Number of config base registers.
1529 * @num_config_regs: Number of config registers for each config base register.
ccc12561
LD
1530 * @handle_pre_irq: Driver specific callback to handle interrupt from device
1531 * before regmap_irq_handler process the interrupts.
1532 * @handle_post_irq: Driver specific callback to handle interrupt from device
1533 * after handling the interrupts in regmap_irq_handler().
394409aa 1534 * @set_type_virt: Driver specific callback to extend regmap_irq_set_type()
9edd4f5a
AM
1535 * and configure virt regs. Deprecated, use @set_type_config
1536 * callback and config registers instead.
faa87ce9 1537 * @set_type_config: Callback used for configuring irq types.
bdf9b86c
AM
1538 * @get_irq_reg: Callback for mapping (base register, index) pairs to register
1539 * addresses. The base register will be one of @status_base,
1540 * @mask_base, etc., @main_status, or any of @config_base.
1541 * The index will be in the range [0, num_main_regs[ for the
1542 * main status base, [0, num_type_settings[ for any config
1543 * register base, and [0, num_regs[ for any other base.
1544 * If unspecified then regmap_irq_get_irq_reg_linear() is used.
ccc12561
LD
1545 * @irq_drv_data: Driver specific IRQ data which is passed as parameter when
1546 * driver specific pre/post interrupt handler is called.
2cf8e2df
CK
1547 *
1548 * This is not intended to handle every possible interrupt controller, but
1549 * it should handle a substantial proportion of those that are found in the
1550 * wild.
f8beab2b
MB
1551 */
1552struct regmap_irq_chip {
1553 const char *name;
1554
a2d21848
MV
1555 unsigned int main_status;
1556 unsigned int num_main_status_bits;
1557 struct regmap_irq_sub_irq_map *sub_reg_offsets;
1558 int num_main_regs;
1559
f8beab2b
MB
1560 unsigned int status_base;
1561 unsigned int mask_base;
7b7d1968 1562 unsigned int unmask_base;
f8beab2b 1563 unsigned int ack_base;
a43fd50d 1564 unsigned int wake_base;
7a78479f 1565 unsigned int type_base;
4c501445 1566 unsigned int *virt_reg_base;
faa87ce9 1567 const unsigned int *config_base;
022f926a 1568 unsigned int irq_reg_stride;
445cbd21
AM
1569 unsigned int init_ack_masked:1;
1570 unsigned int mask_invert:1;
e8ffb12e 1571 unsigned int mask_unmask_non_inverted:1;
445cbd21
AM
1572 unsigned int use_ack:1;
1573 unsigned int ack_invert:1;
1574 unsigned int clear_ack:1;
1575 unsigned int wake_invert:1;
1576 unsigned int runtime_pm:1;
1577 unsigned int type_invert:1;
1578 unsigned int type_in_mask:1;
1579 unsigned int clear_on_unmask:1;
1580 unsigned int not_fixed_stride:1;
1581 unsigned int status_invert:1;
f8beab2b
MB
1582
1583 int num_regs;
1584
1585 const struct regmap_irq *irqs;
1586 int num_irqs;
7a78479f
LD
1587
1588 int num_type_reg;
4c501445 1589 int num_virt_regs;
faa87ce9
AM
1590 int num_config_bases;
1591 int num_config_regs;
ccc12561
LD
1592
1593 int (*handle_pre_irq)(void *irq_drv_data);
1594 int (*handle_post_irq)(void *irq_drv_data);
394409aa
GDS
1595 int (*set_type_virt)(unsigned int **buf, unsigned int type,
1596 unsigned long hwirq, int reg);
faa87ce9
AM
1597 int (*set_type_config)(unsigned int **buf, unsigned int type,
1598 const struct regmap_irq *irq_data, int idx);
bdf9b86c
AM
1599 unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
1600 unsigned int base, int index);
ccc12561 1601 void *irq_drv_data;
f8beab2b
MB
1602};
1603
bdf9b86c
AM
1604unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
1605 unsigned int base, int index);
faa87ce9
AM
1606int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
1607 const struct regmap_irq *irq_data, int idx);
1608
f8beab2b 1609int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
b026ddbb 1610 int irq_base, const struct regmap_irq_chip *chip,
f8beab2b 1611 struct regmap_irq_chip_data **data);
5cc2013b
MW
1612int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
1613 struct regmap *map, int irq,
1614 int irq_flags, int irq_base,
1615 const struct regmap_irq_chip *chip,
1616 struct regmap_irq_chip_data **data);
f8beab2b 1617void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
045b9848
LD
1618
1619int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
1620 int irq_flags, int irq_base,
1621 const struct regmap_irq_chip *chip,
1622 struct regmap_irq_chip_data **data);
5cc2013b
MW
1623int devm_regmap_add_irq_chip_fwnode(struct device *dev,
1624 struct fwnode_handle *fwnode,
1625 struct regmap *map, int irq,
1626 int irq_flags, int irq_base,
1627 const struct regmap_irq_chip *chip,
1628 struct regmap_irq_chip_data **data);
045b9848
LD
1629void devm_regmap_del_irq_chip(struct device *dev, int irq,
1630 struct regmap_irq_chip_data *data);
1631
209a6006 1632int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
4af8be67 1633int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
90f790d2 1634struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
92afb286 1635
9cde5fcd
MB
1636#else
1637
1638/*
1639 * These stubs should only ever be called by generic code which has
1640 * regmap based facilities, if they ever get called at runtime
1641 * something is going wrong and something probably needs to select
1642 * REGMAP.
1643 */
1644
1645static inline int regmap_write(struct regmap *map, unsigned int reg,
1646 unsigned int val)
1647{
1648 WARN_ONCE(1, "regmap API is disabled");
1649 return -EINVAL;
1650}
1651
915f441b
MB
1652static inline int regmap_write_async(struct regmap *map, unsigned int reg,
1653 unsigned int val)
1654{
1655 WARN_ONCE(1, "regmap API is disabled");
1656 return -EINVAL;
1657}
1658
9cde5fcd
MB
1659static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
1660 const void *val, size_t val_len)
1661{
1662 WARN_ONCE(1, "regmap API is disabled");
1663 return -EINVAL;
1664}
1665
0d509f2b
MB
1666static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1667 const void *val, size_t val_len)
1668{
1669 WARN_ONCE(1, "regmap API is disabled");
1670 return -EINVAL;
1671}
1672
cdf6b11d
BW
1673static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
1674 const void *val, size_t val_len)
1675{
1676 WARN_ONCE(1, "regmap API is disabled");
1677 return -EINVAL;
1678}
1679
9cde5fcd
MB
1680static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
1681 const void *val, size_t val_count)
1682{
1683 WARN_ONCE(1, "regmap API is disabled");
1684 return -EINVAL;
1685}
1686
1687static inline int regmap_read(struct regmap *map, unsigned int reg,
1688 unsigned int *val)
1689{
1690 WARN_ONCE(1, "regmap API is disabled");
1691 return -EINVAL;
1692}
1693
1694static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
1695 void *val, size_t val_len)
1696{
1697 WARN_ONCE(1, "regmap API is disabled");
1698 return -EINVAL;
1699}
1700
74fe7b55
CDL
1701static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
1702 void *val, size_t val_len)
1703{
1704 WARN_ONCE(1, "regmap API is disabled");
1705 return -EINVAL;
1706}
1707
9cde5fcd
MB
1708static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
1709 void *val, size_t val_count)
1710{
1711 WARN_ONCE(1, "regmap API is disabled");
1712 return -EINVAL;
1713}
1714
91d31b9f
KM
1715static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1716 unsigned int mask, unsigned int val,
1717 bool *change, bool async, bool force)
fd4b7286
KM
1718{
1719 WARN_ONCE(1, "regmap API is disabled");
1720 return -EINVAL;
1721}
1722
aa2ff9db
BG
1723static inline int regmap_set_bits(struct regmap *map,
1724 unsigned int reg, unsigned int bits)
1725{
1726 WARN_ONCE(1, "regmap API is disabled");
1727 return -EINVAL;
1728}
1729
1730static inline int regmap_clear_bits(struct regmap *map,
1731 unsigned int reg, unsigned int bits)
1732{
1733 WARN_ONCE(1, "regmap API is disabled");
1734 return -EINVAL;
1735}
1736
1737static inline int regmap_test_bits(struct regmap *map,
1738 unsigned int reg, unsigned int bits)
1739{
1740 WARN_ONCE(1, "regmap API is disabled");
1741 return -EINVAL;
1742}
1743
28972eaa
KM
1744static inline int regmap_field_update_bits_base(struct regmap_field *field,
1745 unsigned int mask, unsigned int val,
1746 bool *change, bool async, bool force)
915f441b
MB
1747{
1748 WARN_ONCE(1, "regmap API is disabled");
1749 return -EINVAL;
1750}
1751
e126edec
KM
1752static inline int regmap_fields_update_bits_base(struct regmap_field *field,
1753 unsigned int id,
1754 unsigned int mask, unsigned int val,
1755 bool *change, bool async, bool force)
915f441b
MB
1756{
1757 WARN_ONCE(1, "regmap API is disabled");
1758 return -EINVAL;
1759}
1760
4b9e7edb
BG
1761static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
1762 unsigned int mask, unsigned int val)
1763{
1764 WARN_ONCE(1, "regmap API is disabled");
1765 return -EINVAL;
1766}
1767
1768static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
1769 unsigned int mask, unsigned int val)
1770{
1771 WARN_ONCE(1, "regmap API is disabled");
1772 return -EINVAL;
1773}
1774
1775static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1776 unsigned int mask, unsigned int val,
1777 bool *change)
1778{
1779 WARN_ONCE(1, "regmap API is disabled");
1780 return -EINVAL;
1781}
1782
1783static inline int
1784regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
1785 unsigned int mask, unsigned int val,
1786 bool *change)
1787{
1788 WARN_ONCE(1, "regmap API is disabled");
1789 return -EINVAL;
1790}
1791
1792static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
1793 unsigned int mask, unsigned int val)
1794{
1795 WARN_ONCE(1, "regmap API is disabled");
1796 return -EINVAL;
1797}
1798
1799static inline int regmap_field_write(struct regmap_field *field,
1800 unsigned int val)
1801{
1802 WARN_ONCE(1, "regmap API is disabled");
1803 return -EINVAL;
1804}
1805
1806static inline int regmap_field_force_write(struct regmap_field *field,
1807 unsigned int val)
1808{
1809 WARN_ONCE(1, "regmap API is disabled");
1810 return -EINVAL;
1811}
1812
1813static inline int regmap_field_update_bits(struct regmap_field *field,
1814 unsigned int mask, unsigned int val)
1815{
1816 WARN_ONCE(1, "regmap API is disabled");
1817 return -EINVAL;
1818}
1819
1820static inline int
1821regmap_field_force_update_bits(struct regmap_field *field,
1822 unsigned int mask, unsigned int val)
1823{
1824 WARN_ONCE(1, "regmap API is disabled");
1825 return -EINVAL;
1826}
1827
f67be8b7
LC
1828static inline int regmap_field_set_bits(struct regmap_field *field,
1829 unsigned int bits)
1830{
1831 WARN_ONCE(1, "regmap API is disabled");
1832 return -EINVAL;
1833}
1834
1835static inline int regmap_field_clear_bits(struct regmap_field *field,
1836 unsigned int bits)
1837{
1838 WARN_ONCE(1, "regmap API is disabled");
1839 return -EINVAL;
1840}
1841
1842static inline int regmap_field_test_bits(struct regmap_field *field,
1843 unsigned int bits)
1844{
1845 WARN_ONCE(1, "regmap API is disabled");
1846 return -EINVAL;
1847}
1848
4b9e7edb
BG
1849static inline int regmap_fields_write(struct regmap_field *field,
1850 unsigned int id, unsigned int val)
1851{
1852 WARN_ONCE(1, "regmap API is disabled");
1853 return -EINVAL;
1854}
1855
1856static inline int regmap_fields_force_write(struct regmap_field *field,
1857 unsigned int id, unsigned int val)
1858{
1859 WARN_ONCE(1, "regmap API is disabled");
1860 return -EINVAL;
1861}
1862
1863static inline int
1864regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1865 unsigned int mask, unsigned int val)
1866{
1867 WARN_ONCE(1, "regmap API is disabled");
1868 return -EINVAL;
1869}
1870
1871static inline int
1872regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
1873 unsigned int mask, unsigned int val)
1874{
1875 WARN_ONCE(1, "regmap API is disabled");
1876 return -EINVAL;
1877}
1878
9cde5fcd
MB
1879static inline int regmap_get_val_bytes(struct regmap *map)
1880{
1881 WARN_ONCE(1, "regmap API is disabled");
1882 return -EINVAL;
1883}
1884
668abc72
SK
1885static inline int regmap_get_max_register(struct regmap *map)
1886{
1887 WARN_ONCE(1, "regmap API is disabled");
1888 return -EINVAL;
1889}
1890
a2f776cb
SK
1891static inline int regmap_get_reg_stride(struct regmap *map)
1892{
1893 WARN_ONCE(1, "regmap API is disabled");
1894 return -EINVAL;
1895}
1896
9cde5fcd
MB
1897static inline int regcache_sync(struct regmap *map)
1898{
1899 WARN_ONCE(1, "regmap API is disabled");
1900 return -EINVAL;
1901}
1902
a313f9f5
MB
1903static inline int regcache_sync_region(struct regmap *map, unsigned int min,
1904 unsigned int max)
1905{
1906 WARN_ONCE(1, "regmap API is disabled");
1907 return -EINVAL;
1908}
1909
697e85bc
MB
1910static inline int regcache_drop_region(struct regmap *map, unsigned int min,
1911 unsigned int max)
1912{
1913 WARN_ONCE(1, "regmap API is disabled");
1914 return -EINVAL;
1915}
1916
9cde5fcd
MB
1917static inline void regcache_cache_only(struct regmap *map, bool enable)
1918{
1919 WARN_ONCE(1, "regmap API is disabled");
1920}
1921
1922static inline void regcache_cache_bypass(struct regmap *map, bool enable)
1923{
1924 WARN_ONCE(1, "regmap API is disabled");
1925}
1926
1927static inline void regcache_mark_dirty(struct regmap *map)
1928{
1929 WARN_ONCE(1, "regmap API is disabled");
1930}
1931
0d509f2b
MB
1932static inline void regmap_async_complete(struct regmap *map)
1933{
1934 WARN_ONCE(1, "regmap API is disabled");
1935}
1936
9cde5fcd 1937static inline int regmap_register_patch(struct regmap *map,
a6baa3de 1938 const struct reg_sequence *regs,
9cde5fcd
MB
1939 int num_regs)
1940{
1941 WARN_ONCE(1, "regmap API is disabled");
1942 return -EINVAL;
1943}
1944
13ff50c8
NC
1945static inline int regmap_parse_val(struct regmap *map, const void *buf,
1946 unsigned int *val)
1947{
1948 WARN_ONCE(1, "regmap API is disabled");
1949 return -EINVAL;
1950}
1951
72b39f6f
MB
1952static inline struct regmap *dev_get_regmap(struct device *dev,
1953 const char *name)
1954{
72b39f6f
MB
1955 return NULL;
1956}
1957
8d7d3972
TT
1958static inline struct device *regmap_get_device(struct regmap *map)
1959{
1960 WARN_ONCE(1, "regmap API is disabled");
1d33dc6b 1961 return NULL;
8d7d3972
TT
1962}
1963
9cde5fcd
MB
1964#endif
1965
b83a313b 1966#endif