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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
b83a313b MB |
2 | #ifndef __LINUX_REGMAP_H |
3 | #define __LINUX_REGMAP_H | |
4 | ||
5 | /* | |
6 | * Register map access API | |
7 | * | |
8 | * Copyright 2011 Wolfson Microelectronics plc | |
9 | * | |
10 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
b83a313b MB |
11 | */ |
12 | ||
b83a313b | 13 | #include <linux/list.h> |
6863ca62 | 14 | #include <linux/rbtree.h> |
f15cd6d9 | 15 | #include <linux/ktime.h> |
adf08d48 | 16 | #include <linux/delay.h> |
49ccc142 | 17 | #include <linux/err.h> |
3f0fa9a8 | 18 | #include <linux/bug.h> |
3cfe7a74 | 19 | #include <linux/lockdep.h> |
e44ab4e1 | 20 | #include <linux/iopoll.h> |
5cc2013b | 21 | #include <linux/fwnode.h> |
b83a313b | 22 | |
de477254 | 23 | struct module; |
31895662 | 24 | struct clk; |
313162d0 | 25 | struct device; |
12479382 | 26 | struct device_node; |
9943fa30 | 27 | struct i2c_client; |
6445500b | 28 | struct i3c_device; |
90f790d2 | 29 | struct irq_domain; |
7d6f7fb0 | 30 | struct slim_device; |
a676f083 | 31 | struct spi_device; |
a01779f8 | 32 | struct spmi_device; |
b83d2ff0 | 33 | struct regmap; |
6863ca62 | 34 | struct regmap_range_cfg; |
67252287 | 35 | struct regmap_field; |
22853223 | 36 | struct snd_ac97; |
7c22ce6e | 37 | struct sdw_slave; |
9943fa30 | 38 | |
9fabe24e DP |
39 | /* An enum of all the supported cache types */ |
40 | enum regcache_type { | |
41 | REGCACHE_NONE, | |
28644c80 | 42 | REGCACHE_RBTREE, |
2ac902ce MB |
43 | REGCACHE_COMPRESSED, |
44 | REGCACHE_FLAT, | |
9fabe24e DP |
45 | }; |
46 | ||
bd20eb54 | 47 | /** |
2cf8e2df | 48 | * struct reg_default - Default value for a register. |
bd20eb54 MB |
49 | * |
50 | * @reg: Register address. | |
51 | * @def: Register default value. | |
2cf8e2df CK |
52 | * |
53 | * We use an array of structs rather than a simple array as many modern devices | |
54 | * have very sparse register maps. | |
bd20eb54 MB |
55 | */ |
56 | struct reg_default { | |
57 | unsigned int reg; | |
58 | unsigned int def; | |
59 | }; | |
60 | ||
8019ff6c | 61 | /** |
2cf8e2df | 62 | * struct reg_sequence - An individual write from a sequence of writes. |
8019ff6c NP |
63 | * |
64 | * @reg: Register address. | |
65 | * @def: Register value. | |
2de9d600 | 66 | * @delay_us: Delay to be applied after the register write in microseconds |
2cf8e2df CK |
67 | * |
68 | * Register/value pairs for sequences of writes with an optional delay in | |
69 | * microseconds to be applied after each write. | |
8019ff6c NP |
70 | */ |
71 | struct reg_sequence { | |
72 | unsigned int reg; | |
73 | unsigned int def; | |
2de9d600 | 74 | unsigned int delay_us; |
8019ff6c NP |
75 | }; |
76 | ||
bd3ddb49 MF |
77 | #define REG_SEQ(_reg, _def, _delay_us) { \ |
78 | .reg = _reg, \ | |
79 | .def = _def, \ | |
80 | .delay_us = _delay_us, \ | |
81 | } | |
82 | #define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0) | |
83 | ||
08188ba8 PZ |
84 | /** |
85 | * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs | |
2cf8e2df | 86 | * |
08188ba8 PZ |
87 | * @map: Regmap to read from |
88 | * @addr: Address to poll | |
89 | * @val: Unsigned integer variable to read the value into | |
90 | * @cond: Break condition (usually involving @val) | |
91 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
92 | * tight-loops). Should be less than ~20ms since usleep_range | |
458f69ef | 93 | * is used (see Documentation/timers/timers-howto.rst). |
08188ba8 PZ |
94 | * @timeout_us: Timeout in us, 0 means never timeout |
95 | * | |
96 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read | |
97 | * error return value in case of a error read. In the two former cases, | |
98 | * the last read value at @addr is stored in @val. Must not be called | |
99 | * from atomic context if sleep_us or timeout_us are used. | |
100 | * | |
101 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
102 | */ | |
103 | #define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ | |
104 | ({ \ | |
e44ab4e1 DZ |
105 | int __ret, __tmp; \ |
106 | __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \ | |
107 | sleep_us, timeout_us, false, (map), (addr), &(val)); \ | |
108 | __ret ?: __tmp; \ | |
08188ba8 PZ |
109 | }) |
110 | ||
50816a4c SP |
111 | /** |
112 | * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs | |
113 | * | |
114 | * @map: Regmap to read from | |
115 | * @addr: Address to poll | |
116 | * @val: Unsigned integer variable to read the value into | |
117 | * @cond: Break condition (usually involving @val) | |
118 | * @delay_us: Time to udelay between reads in us (0 tight-loops). | |
119 | * Should be less than ~10us since udelay is used | |
120 | * (see Documentation/timers/timers-howto.rst). | |
121 | * @timeout_us: Timeout in us, 0 means never timeout | |
122 | * | |
123 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read | |
124 | * error return value in case of a error read. In the two former cases, | |
125 | * the last read value at @addr is stored in @val. | |
126 | * | |
127 | * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h. | |
128 | * | |
129 | * Note: In general regmap cannot be used in atomic context. If you want to use | |
130 | * this macro then first setup your regmap for atomic use (flat or no cache | |
131 | * and MMIO regmap). | |
132 | */ | |
133 | #define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \ | |
134 | ({ \ | |
135 | u64 __timeout_us = (timeout_us); \ | |
136 | unsigned long __delay_us = (delay_us); \ | |
137 | ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ | |
138 | int __ret; \ | |
139 | for (;;) { \ | |
140 | __ret = regmap_read((map), (addr), &(val)); \ | |
141 | if (__ret) \ | |
142 | break; \ | |
143 | if (cond) \ | |
144 | break; \ | |
145 | if ((__timeout_us) && \ | |
146 | ktime_compare(ktime_get(), __timeout) > 0) { \ | |
147 | __ret = regmap_read((map), (addr), &(val)); \ | |
148 | break; \ | |
149 | } \ | |
150 | if (__delay_us) \ | |
151 | udelay(__delay_us); \ | |
152 | } \ | |
153 | __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ | |
154 | }) | |
155 | ||
667063ac CYT |
156 | /** |
157 | * regmap_field_read_poll_timeout - Poll until a condition is met or timeout | |
158 | * | |
159 | * @field: Regmap field to read from | |
160 | * @val: Unsigned integer variable to read the value into | |
161 | * @cond: Break condition (usually involving @val) | |
162 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
163 | * tight-loops). Should be less than ~20ms since usleep_range | |
458f69ef | 164 | * is used (see Documentation/timers/timers-howto.rst). |
667063ac CYT |
165 | * @timeout_us: Timeout in us, 0 means never timeout |
166 | * | |
167 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read | |
168 | * error return value in case of a error read. In the two former cases, | |
169 | * the last read value at @addr is stored in @val. Must not be called | |
170 | * from atomic context if sleep_us or timeout_us are used. | |
171 | * | |
172 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
173 | */ | |
174 | #define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \ | |
175 | ({ \ | |
148c01d1 DZ |
176 | int __ret, __tmp; \ |
177 | __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \ | |
178 | sleep_us, timeout_us, false, (field), &(val)); \ | |
179 | __ret ?: __tmp; \ | |
667063ac CYT |
180 | }) |
181 | ||
b83d2ff0 MB |
182 | #ifdef CONFIG_REGMAP |
183 | ||
141eba2e SW |
184 | enum regmap_endian { |
185 | /* Unspecified -> 0 -> Backwards compatible default */ | |
186 | REGMAP_ENDIAN_DEFAULT = 0, | |
187 | REGMAP_ENDIAN_BIG, | |
188 | REGMAP_ENDIAN_LITTLE, | |
189 | REGMAP_ENDIAN_NATIVE, | |
190 | }; | |
191 | ||
76aad392 | 192 | /** |
2cf8e2df CK |
193 | * struct regmap_range - A register range, used for access related checks |
194 | * (readable/writeable/volatile/precious checks) | |
76aad392 DC |
195 | * |
196 | * @range_min: address of first register | |
197 | * @range_max: address of last register | |
198 | */ | |
199 | struct regmap_range { | |
200 | unsigned int range_min; | |
201 | unsigned int range_max; | |
202 | }; | |
203 | ||
6112fe60 LD |
204 | #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } |
205 | ||
2cf8e2df CK |
206 | /** |
207 | * struct regmap_access_table - A table of register ranges for access checks | |
76aad392 DC |
208 | * |
209 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
210 | * @n_yes_ranges: size of the above array | |
211 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
212 | * @n_no_ranges: size of the above array | |
2cf8e2df CK |
213 | * |
214 | * A table of ranges including some yes ranges and some no ranges. | |
215 | * If a register belongs to a no_range, the corresponding check function | |
216 | * will return false. If a register belongs to a yes range, the corresponding | |
217 | * check function will return true. "no_ranges" are searched first. | |
76aad392 DC |
218 | */ |
219 | struct regmap_access_table { | |
220 | const struct regmap_range *yes_ranges; | |
221 | unsigned int n_yes_ranges; | |
222 | const struct regmap_range *no_ranges; | |
223 | unsigned int n_no_ranges; | |
224 | }; | |
225 | ||
0d4529c5 DC |
226 | typedef void (*regmap_lock)(void *); |
227 | typedef void (*regmap_unlock)(void *); | |
228 | ||
dd898b20 | 229 | /** |
2cf8e2df | 230 | * struct regmap_config - Configuration for the register map of a device. |
dd898b20 | 231 | * |
d3c242e1 SW |
232 | * @name: Optional name of the regmap. Useful when a device has multiple |
233 | * register regions. | |
234 | * | |
dd898b20 | 235 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
236 | * @reg_stride: The register address stride. Valid register addresses are a |
237 | * multiple of this value. If set to 0, a value of 1 will be | |
238 | * used. | |
82159ba8 | 239 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 240 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 241 | * |
3566cc9d | 242 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
243 | * can be written to. If this field is NULL but wr_table |
244 | * (see below) is not, the check is performed on such table | |
245 | * (a register is writeable if it belongs to one of the ranges | |
246 | * specified by wr_table). | |
3566cc9d | 247 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
248 | * can be read from. If this field is NULL but rd_table |
249 | * (see below) is not, the check is performed on such table | |
250 | * (a register is readable if it belongs to one of the ranges | |
251 | * specified by rd_table). | |
3566cc9d | 252 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
253 | * value can't be cached. If this field is NULL but |
254 | * volatile_table (see below) is not, the check is performed on | |
255 | * such table (a register is volatile if it belongs to one of | |
256 | * the ranges specified by volatile_table). | |
bdc39644 | 257 | * @precious_reg: Optional callback returning true if the register |
76aad392 | 258 | * should not be read outside of a call from the driver |
bdc39644 | 259 | * (e.g., a clear on read interrupt status register). If this |
76aad392 DC |
260 | * field is NULL but precious_table (see below) is not, the |
261 | * check is performed on such table (a register is precious if | |
262 | * it belongs to one of the ranges specified by precious_table). | |
cdf6b11d BW |
263 | * @writeable_noinc_reg: Optional callback returning true if the register |
264 | * supports multiple write operations without incrementing | |
265 | * the register number. If this field is NULL but | |
266 | * wr_noinc_table (see below) is not, the check is | |
267 | * performed on such table (a register is no increment | |
268 | * writeable if it belongs to one of the ranges specified | |
269 | * by wr_noinc_table). | |
74fe7b55 CDL |
270 | * @readable_noinc_reg: Optional callback returning true if the register |
271 | * supports multiple read operations without incrementing | |
272 | * the register number. If this field is NULL but | |
273 | * rd_noinc_table (see below) is not, the check is | |
274 | * performed on such table (a register is no increment | |
275 | * readable if it belongs to one of the ranges specified | |
276 | * by rd_noinc_table). | |
c9b41fcf | 277 | * @disable_locking: This regmap is either protected by external means or |
6611561a | 278 | * is guaranteed not to be accessed from multiple threads. |
c9b41fcf | 279 | * Don't use any locking mechanisms. |
76aad392 DC |
280 | * @lock: Optional lock callback (overrides regmap's default lock |
281 | * function, based on spinlock or mutex). | |
282 | * @unlock: As above for unlocking. | |
283 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
284 | * functions (ignored in case regular lock/unlock functions | |
285 | * are not overridden). | |
d2a5884a AS |
286 | * @reg_read: Optional callback that if filled will be used to perform |
287 | * all the reads from the registers. Should only be provided for | |
bdc39644 LP |
288 | * devices whose read operation cannot be represented as a simple |
289 | * read operation on a bus such as SPI, I2C, etc. Most of the | |
290 | * devices do not need this. | |
d2a5884a AS |
291 | * @reg_write: Same as above for writing. |
292 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex | |
293 | * to perform locking. This field is ignored if custom lock/unlock | |
294 | * functions are used (see fields lock/unlock of struct regmap_config). | |
295 | * This field is a duplicate of a similar file in | |
296 | * 'struct regmap_bus' and serves exact same purpose. | |
297 | * Use it only for "no-bus" cases. | |
b429fab4 | 298 | * @max_register: Optional, specifies the maximum valid register address. |
76aad392 DC |
299 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
300 | * valid ranges for write access. | |
301 | * @rd_table: As above, for read access. | |
302 | * @volatile_table: As above, for volatile registers. | |
303 | * @precious_table: As above, for precious registers. | |
cdf6b11d | 304 | * @wr_noinc_table: As above, for no increment writeable registers. |
74fe7b55 | 305 | * @rd_noinc_table: As above, for no increment readable registers. |
bd20eb54 MB |
306 | * @reg_defaults: Power on reset values for registers (for use with |
307 | * register cache support). | |
308 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 | 309 | * |
f50e38c9 | 310 | * @read_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 | 311 | * a read. |
f50e38c9 | 312 | * @write_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 | 313 | * a write. If both read_flag_mask and write_flag_mask are |
9bf485c9 AD |
314 | * empty and zero_flag_mask is not set the regmap_bus default |
315 | * masks are used. | |
316 | * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even | |
317 | * if they are both empty. | |
1c96a2f6 DF |
318 | * @use_single_read: If set, converts the bulk read operation into a series of |
319 | * single read operations. This is useful for a device that | |
320 | * does not support bulk read. | |
321 | * @use_single_write: If set, converts the bulk write operation into a series of | |
322 | * single write operations. This is useful for a device that | |
323 | * does not support bulk write. | |
e894c3f4 OAO |
324 | * @can_multi_write: If set, the device supports the multi write mode of bulk |
325 | * write operations, if clear multi write requests will be | |
326 | * split into individual write operations | |
9fabe24e DP |
327 | * |
328 | * @cache_type: The actual cache type. | |
329 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
330 | * register cache support). | |
331 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
332 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
333 | * DEFAULT, the @reg_format_endian_default value from the | |
334 | * regmap bus is used. | |
335 | * @val_format_endian: Endianness for formatted register values. If this is | |
336 | * DEFAULT, the @reg_format_endian_default value from the | |
337 | * regmap bus is used. | |
6863ca62 KG |
338 | * |
339 | * @ranges: Array of configuration entries for virtual address ranges. | |
340 | * @num_ranges: Number of range configuration entries. | |
a4887813 | 341 | * @use_hwlock: Indicate if a hardware spinlock should be used. |
8698b936 BW |
342 | * @hwlock_id: Specify the hardware spinlock id. |
343 | * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE, | |
344 | * HWLOCK_IRQ or 0. | |
dd898b20 | 345 | */ |
b83a313b | 346 | struct regmap_config { |
d3c242e1 SW |
347 | const char *name; |
348 | ||
b83a313b | 349 | int reg_bits; |
f01ee60f | 350 | int reg_stride; |
82159ba8 | 351 | int pad_bits; |
b83a313b | 352 | int val_bits; |
2e2ae66d | 353 | |
2e2ae66d MB |
354 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
355 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
356 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 357 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
cdf6b11d | 358 | bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg); |
74fe7b55 | 359 | bool (*readable_noinc_reg)(struct device *dev, unsigned int reg); |
c9b41fcf BG |
360 | |
361 | bool disable_locking; | |
0d4529c5 DC |
362 | regmap_lock lock; |
363 | regmap_unlock unlock; | |
364 | void *lock_arg; | |
bd20eb54 | 365 | |
d2a5884a AS |
366 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
367 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
368 | ||
369 | bool fast_io; | |
370 | ||
bd20eb54 | 371 | unsigned int max_register; |
76aad392 DC |
372 | const struct regmap_access_table *wr_table; |
373 | const struct regmap_access_table *rd_table; | |
374 | const struct regmap_access_table *volatile_table; | |
375 | const struct regmap_access_table *precious_table; | |
cdf6b11d | 376 | const struct regmap_access_table *wr_noinc_table; |
74fe7b55 | 377 | const struct regmap_access_table *rd_noinc_table; |
720e4616 | 378 | const struct reg_default *reg_defaults; |
9fabe24e DP |
379 | unsigned int num_reg_defaults; |
380 | enum regcache_type cache_type; | |
381 | const void *reg_defaults_raw; | |
382 | unsigned int num_reg_defaults_raw; | |
6f306441 | 383 | |
f50e38c9 TL |
384 | unsigned long read_flag_mask; |
385 | unsigned long write_flag_mask; | |
9bf485c9 | 386 | bool zero_flag_mask; |
2e33caf1 | 387 | |
1c96a2f6 DF |
388 | bool use_single_read; |
389 | bool use_single_write; | |
e894c3f4 | 390 | bool can_multi_write; |
141eba2e SW |
391 | |
392 | enum regmap_endian reg_format_endian; | |
393 | enum regmap_endian val_format_endian; | |
38e23194 | 394 | |
6863ca62 | 395 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 396 | unsigned int num_ranges; |
8698b936 | 397 | |
a4887813 | 398 | bool use_hwlock; |
8698b936 BW |
399 | unsigned int hwlock_id; |
400 | unsigned int hwlock_mode; | |
6863ca62 KG |
401 | }; |
402 | ||
403 | /** | |
2cf8e2df CK |
404 | * struct regmap_range_cfg - Configuration for indirectly accessed or paged |
405 | * registers. | |
6863ca62 | 406 | * |
d058bb49 MB |
407 | * @name: Descriptive name for diagnostics |
408 | * | |
6863ca62 KG |
409 | * @range_min: Address of the lowest register address in virtual range. |
410 | * @range_max: Address of the highest register in virtual range. | |
411 | * | |
2cf8e2df | 412 | * @selector_reg: Register with selector field. |
ad5906bd PL |
413 | * @selector_mask: Bit mask for selector value. |
414 | * @selector_shift: Bit shift for selector value. | |
6863ca62 KG |
415 | * |
416 | * @window_start: Address of first (lowest) register in data window. | |
417 | * @window_len: Number of registers in data window. | |
2cf8e2df CK |
418 | * |
419 | * Registers, mapped to this virtual range, are accessed in two steps: | |
420 | * 1. page selector register update; | |
421 | * 2. access through data window registers. | |
6863ca62 KG |
422 | */ |
423 | struct regmap_range_cfg { | |
d058bb49 MB |
424 | const char *name; |
425 | ||
6863ca62 KG |
426 | /* Registers of virtual address range */ |
427 | unsigned int range_min; | |
428 | unsigned int range_max; | |
429 | ||
430 | /* Page selector for indirect addressing */ | |
431 | unsigned int selector_reg; | |
432 | unsigned int selector_mask; | |
433 | int selector_shift; | |
434 | ||
435 | /* Data window (per each page) */ | |
436 | unsigned int window_start; | |
437 | unsigned int window_len; | |
b83a313b MB |
438 | }; |
439 | ||
0d509f2b MB |
440 | struct regmap_async; |
441 | ||
0135bbcc | 442 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 443 | size_t count); |
0135bbcc | 444 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
445 | const void *reg, size_t reg_len, |
446 | const void *val, size_t val_len); | |
0d509f2b MB |
447 | typedef int (*regmap_hw_async_write)(void *context, |
448 | const void *reg, size_t reg_len, | |
449 | const void *val, size_t val_len, | |
450 | struct regmap_async *async); | |
0135bbcc | 451 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
452 | const void *reg_buf, size_t reg_size, |
453 | void *val_buf, size_t val_size); | |
3ac17037 BB |
454 | typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, |
455 | unsigned int *val); | |
456 | typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, | |
457 | unsigned int val); | |
77792b11 JR |
458 | typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, |
459 | unsigned int mask, unsigned int val); | |
0d509f2b | 460 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 461 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
462 | |
463 | /** | |
2cf8e2df CK |
464 | * struct regmap_bus - Description of a hardware bus for the register map |
465 | * infrastructure. | |
b83a313b | 466 | * |
bacdbe07 | 467 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
468 | * to perform locking. This field is ignored if custom lock/unlock |
469 | * functions are used (see fields lock/unlock of | |
470 | * struct regmap_config). | |
b83a313b MB |
471 | * @write: Write operation. |
472 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
473 | * if not implemented on a given device. | |
0d509f2b MB |
474 | * @async_write: Write operation which completes asynchronously, optional and |
475 | * must serialise with respect to non-async I/O. | |
c5f58f2d MP |
476 | * @reg_write: Write a single register value to the given register address. This |
477 | * write operation has to complete when returning from the function. | |
2cf8e2df CK |
478 | * @reg_update_bits: Update bits operation to be used against volatile |
479 | * registers, intended for devices supporting some mechanism | |
480 | * for setting clearing bits without having to | |
481 | * read/modify/write. | |
b83a313b MB |
482 | * @read: Read operation. Data is returned in the buffer used to transmit |
483 | * data. | |
c5f58f2d MP |
484 | * @reg_read: Read a single register value from a given register address. |
485 | * @free_context: Free context. | |
0d509f2b | 486 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
487 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
488 | * a read. | |
141eba2e SW |
489 | * @reg_format_endian_default: Default endianness for formatted register |
490 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
491 | * DEFAULT, BIG is assumed. | |
492 | * @val_format_endian_default: Default endianness for formatted register | |
493 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
494 | * DEFAULT, BIG is assumed. | |
adaac459 MP |
495 | * @max_raw_read: Max raw read size that can be used on the bus. |
496 | * @max_raw_write: Max raw write size that can be used on the bus. | |
b83a313b MB |
497 | */ |
498 | struct regmap_bus { | |
bacdbe07 | 499 | bool fast_io; |
b83a313b MB |
500 | regmap_hw_write write; |
501 | regmap_hw_gather_write gather_write; | |
0d509f2b | 502 | regmap_hw_async_write async_write; |
3ac17037 | 503 | regmap_hw_reg_write reg_write; |
77792b11 | 504 | regmap_hw_reg_update_bits reg_update_bits; |
b83a313b | 505 | regmap_hw_read read; |
3ac17037 | 506 | regmap_hw_reg_read reg_read; |
0135bbcc | 507 | regmap_hw_free_context free_context; |
0d509f2b | 508 | regmap_hw_async_alloc async_alloc; |
b83a313b | 509 | u8 read_flag_mask; |
141eba2e SW |
510 | enum regmap_endian reg_format_endian_default; |
511 | enum regmap_endian val_format_endian_default; | |
adaac459 MP |
512 | size_t max_raw_read; |
513 | size_t max_raw_write; | |
b83a313b MB |
514 | }; |
515 | ||
3cfe7a74 NB |
516 | /* |
517 | * __regmap_init functions. | |
518 | * | |
519 | * These functions take a lock key and name parameter, and should not be called | |
520 | * directly. Instead, use the regmap_init macros that generate a key and name | |
521 | * for each call. | |
522 | */ | |
523 | struct regmap *__regmap_init(struct device *dev, | |
524 | const struct regmap_bus *bus, | |
525 | void *bus_context, | |
526 | const struct regmap_config *config, | |
527 | struct lock_class_key *lock_key, | |
528 | const char *lock_name); | |
529 | struct regmap *__regmap_init_i2c(struct i2c_client *i2c, | |
530 | const struct regmap_config *config, | |
531 | struct lock_class_key *lock_key, | |
532 | const char *lock_name); | |
bcf7eac3 AM |
533 | struct regmap *__regmap_init_sccb(struct i2c_client *i2c, |
534 | const struct regmap_config *config, | |
535 | struct lock_class_key *lock_key, | |
536 | const char *lock_name); | |
7d6f7fb0 SK |
537 | struct regmap *__regmap_init_slimbus(struct slim_device *slimbus, |
538 | const struct regmap_config *config, | |
539 | struct lock_class_key *lock_key, | |
540 | const char *lock_name); | |
3cfe7a74 NB |
541 | struct regmap *__regmap_init_spi(struct spi_device *dev, |
542 | const struct regmap_config *config, | |
543 | struct lock_class_key *lock_key, | |
544 | const char *lock_name); | |
545 | struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, | |
546 | const struct regmap_config *config, | |
547 | struct lock_class_key *lock_key, | |
548 | const char *lock_name); | |
549 | struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, | |
550 | const struct regmap_config *config, | |
551 | struct lock_class_key *lock_key, | |
552 | const char *lock_name); | |
cc5d0db3 AM |
553 | struct regmap *__regmap_init_w1(struct device *w1_dev, |
554 | const struct regmap_config *config, | |
555 | struct lock_class_key *lock_key, | |
556 | const char *lock_name); | |
3cfe7a74 NB |
557 | struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
558 | void __iomem *regs, | |
559 | const struct regmap_config *config, | |
560 | struct lock_class_key *lock_key, | |
561 | const char *lock_name); | |
562 | struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, | |
563 | const struct regmap_config *config, | |
564 | struct lock_class_key *lock_key, | |
565 | const char *lock_name); | |
7c22ce6e VK |
566 | struct regmap *__regmap_init_sdw(struct sdw_slave *sdw, |
567 | const struct regmap_config *config, | |
568 | struct lock_class_key *lock_key, | |
569 | const char *lock_name); | |
3cfe7a74 NB |
570 | |
571 | struct regmap *__devm_regmap_init(struct device *dev, | |
572 | const struct regmap_bus *bus, | |
573 | void *bus_context, | |
574 | const struct regmap_config *config, | |
575 | struct lock_class_key *lock_key, | |
576 | const char *lock_name); | |
577 | struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, | |
578 | const struct regmap_config *config, | |
579 | struct lock_class_key *lock_key, | |
580 | const char *lock_name); | |
bcf7eac3 AM |
581 | struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c, |
582 | const struct regmap_config *config, | |
583 | struct lock_class_key *lock_key, | |
584 | const char *lock_name); | |
3cfe7a74 NB |
585 | struct regmap *__devm_regmap_init_spi(struct spi_device *dev, |
586 | const struct regmap_config *config, | |
587 | struct lock_class_key *lock_key, | |
588 | const char *lock_name); | |
589 | struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, | |
590 | const struct regmap_config *config, | |
591 | struct lock_class_key *lock_key, | |
592 | const char *lock_name); | |
593 | struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, | |
594 | const struct regmap_config *config, | |
595 | struct lock_class_key *lock_key, | |
596 | const char *lock_name); | |
cc5d0db3 AM |
597 | struct regmap *__devm_regmap_init_w1(struct device *w1_dev, |
598 | const struct regmap_config *config, | |
599 | struct lock_class_key *lock_key, | |
600 | const char *lock_name); | |
3cfe7a74 NB |
601 | struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, |
602 | const char *clk_id, | |
603 | void __iomem *regs, | |
604 | const struct regmap_config *config, | |
605 | struct lock_class_key *lock_key, | |
606 | const char *lock_name); | |
607 | struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, | |
608 | const struct regmap_config *config, | |
609 | struct lock_class_key *lock_key, | |
610 | const char *lock_name); | |
7c22ce6e VK |
611 | struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw, |
612 | const struct regmap_config *config, | |
613 | struct lock_class_key *lock_key, | |
614 | const char *lock_name); | |
ed24d568 SK |
615 | struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus, |
616 | const struct regmap_config *config, | |
617 | struct lock_class_key *lock_key, | |
618 | const char *lock_name); | |
6445500b VS |
619 | struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, |
620 | const struct regmap_config *config, | |
621 | struct lock_class_key *lock_key, | |
622 | const char *lock_name); | |
3cfe7a74 NB |
623 | /* |
624 | * Wrapper for regmap_init macros to include a unique lockdep key and name | |
625 | * for each call. No-op if CONFIG_LOCKDEP is not set. | |
626 | * | |
627 | * @fn: Real function to call (in the form __[*_]regmap_init[_*]) | |
628 | * @name: Config variable name (#config in the calling macro) | |
629 | **/ | |
630 | #ifdef CONFIG_LOCKDEP | |
631 | #define __regmap_lockdep_wrapper(fn, name, ...) \ | |
632 | ( \ | |
633 | ({ \ | |
634 | static struct lock_class_key _key; \ | |
635 | fn(__VA_ARGS__, &_key, \ | |
636 | KBUILD_BASENAME ":" \ | |
637 | __stringify(__LINE__) ":" \ | |
638 | "(" name ")->lock"); \ | |
639 | }) \ | |
640 | ) | |
641 | #else | |
642 | #define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) | |
643 | #endif | |
644 | ||
1ed81114 | 645 | /** |
2cf8e2df | 646 | * regmap_init() - Initialise register map |
1ed81114 NB |
647 | * |
648 | * @dev: Device that will be interacted with | |
649 | * @bus: Bus-specific callbacks to use with device | |
650 | * @bus_context: Data passed to bus-specific callbacks | |
651 | * @config: Configuration for register map | |
652 | * | |
653 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
654 | * a struct regmap. This function should generally not be called | |
655 | * directly, it should be called by bus-specific init functions. | |
656 | */ | |
3cfe7a74 NB |
657 | #define regmap_init(dev, bus, bus_context, config) \ |
658 | __regmap_lockdep_wrapper(__regmap_init, #config, \ | |
659 | dev, bus, bus_context, config) | |
6cfec04b | 660 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
3cfe7a74 | 661 | const struct regmap_config *config); |
22853223 | 662 | |
1ed81114 | 663 | /** |
2cf8e2df | 664 | * regmap_init_i2c() - Initialise register map |
1ed81114 NB |
665 | * |
666 | * @i2c: Device that will be interacted with | |
667 | * @config: Configuration for register map | |
668 | * | |
669 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
670 | * a struct regmap. | |
671 | */ | |
3cfe7a74 NB |
672 | #define regmap_init_i2c(i2c, config) \ |
673 | __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ | |
674 | i2c, config) | |
1ed81114 | 675 | |
bcf7eac3 AM |
676 | /** |
677 | * regmap_init_sccb() - Initialise register map | |
678 | * | |
679 | * @i2c: Device that will be interacted with | |
680 | * @config: Configuration for register map | |
681 | * | |
682 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
683 | * a struct regmap. | |
684 | */ | |
685 | #define regmap_init_sccb(i2c, config) \ | |
686 | __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \ | |
687 | i2c, config) | |
688 | ||
7d6f7fb0 SK |
689 | /** |
690 | * regmap_init_slimbus() - Initialise register map | |
691 | * | |
692 | * @slimbus: Device that will be interacted with | |
693 | * @config: Configuration for register map | |
694 | * | |
695 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
696 | * a struct regmap. | |
697 | */ | |
698 | #define regmap_init_slimbus(slimbus, config) \ | |
699 | __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \ | |
700 | slimbus, config) | |
701 | ||
1ed81114 | 702 | /** |
2cf8e2df | 703 | * regmap_init_spi() - Initialise register map |
1ed81114 | 704 | * |
2cf8e2df | 705 | * @dev: Device that will be interacted with |
1ed81114 NB |
706 | * @config: Configuration for register map |
707 | * | |
708 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
709 | * a struct regmap. | |
710 | */ | |
3cfe7a74 NB |
711 | #define regmap_init_spi(dev, config) \ |
712 | __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ | |
713 | dev, config) | |
1ed81114 NB |
714 | |
715 | /** | |
2cf8e2df CK |
716 | * regmap_init_spmi_base() - Create regmap for the Base register space |
717 | * | |
718 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
719 | * @config: Configuration for register map |
720 | * | |
721 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
722 | * a struct regmap. | |
723 | */ | |
3cfe7a74 NB |
724 | #define regmap_init_spmi_base(dev, config) \ |
725 | __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ | |
726 | dev, config) | |
1ed81114 NB |
727 | |
728 | /** | |
2cf8e2df CK |
729 | * regmap_init_spmi_ext() - Create regmap for Ext register space |
730 | * | |
731 | * @dev: Device that will be interacted with | |
1ed81114 NB |
732 | * @config: Configuration for register map |
733 | * | |
734 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
735 | * a struct regmap. | |
736 | */ | |
3cfe7a74 NB |
737 | #define regmap_init_spmi_ext(dev, config) \ |
738 | __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ | |
739 | dev, config) | |
1ed81114 | 740 | |
cc5d0db3 AM |
741 | /** |
742 | * regmap_init_w1() - Initialise register map | |
743 | * | |
744 | * @w1_dev: Device that will be interacted with | |
745 | * @config: Configuration for register map | |
746 | * | |
747 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
748 | * a struct regmap. | |
749 | */ | |
750 | #define regmap_init_w1(w1_dev, config) \ | |
751 | __regmap_lockdep_wrapper(__regmap_init_w1, #config, \ | |
752 | w1_dev, config) | |
753 | ||
1ed81114 | 754 | /** |
2cf8e2df | 755 | * regmap_init_mmio_clk() - Initialise register map with register clock |
1ed81114 NB |
756 | * |
757 | * @dev: Device that will be interacted with | |
758 | * @clk_id: register clock consumer ID | |
759 | * @regs: Pointer to memory-mapped IO region | |
760 | * @config: Configuration for register map | |
761 | * | |
762 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
763 | * a struct regmap. | |
764 | */ | |
3cfe7a74 NB |
765 | #define regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
766 | __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ | |
767 | dev, clk_id, regs, config) | |
878ec67b PZ |
768 | |
769 | /** | |
2cf8e2df | 770 | * regmap_init_mmio() - Initialise register map |
878ec67b PZ |
771 | * |
772 | * @dev: Device that will be interacted with | |
773 | * @regs: Pointer to memory-mapped IO region | |
774 | * @config: Configuration for register map | |
775 | * | |
776 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
777 | * a struct regmap. | |
778 | */ | |
1ed81114 NB |
779 | #define regmap_init_mmio(dev, regs, config) \ |
780 | regmap_init_mmio_clk(dev, NULL, regs, config) | |
781 | ||
782 | /** | |
2cf8e2df | 783 | * regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
784 | * |
785 | * @ac97: Device that will be interacted with | |
786 | * @config: Configuration for register map | |
787 | * | |
788 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
789 | * a struct regmap. | |
790 | */ | |
3cfe7a74 NB |
791 | #define regmap_init_ac97(ac97, config) \ |
792 | __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ | |
793 | ac97, config) | |
22853223 | 794 | bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); |
878ec67b | 795 | |
7c22ce6e VK |
796 | /** |
797 | * regmap_init_sdw() - Initialise register map | |
798 | * | |
799 | * @sdw: Device that will be interacted with | |
800 | * @config: Configuration for register map | |
801 | * | |
802 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
803 | * a struct regmap. | |
804 | */ | |
805 | #define regmap_init_sdw(sdw, config) \ | |
806 | __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \ | |
807 | sdw, config) | |
808 | ||
809 | ||
1ed81114 | 810 | /** |
2cf8e2df | 811 | * devm_regmap_init() - Initialise managed register map |
1ed81114 NB |
812 | * |
813 | * @dev: Device that will be interacted with | |
814 | * @bus: Bus-specific callbacks to use with device | |
815 | * @bus_context: Data passed to bus-specific callbacks | |
816 | * @config: Configuration for register map | |
817 | * | |
818 | * The return value will be an ERR_PTR() on error or a valid pointer | |
819 | * to a struct regmap. This function should generally not be called | |
820 | * directly, it should be called by bus-specific init functions. The | |
821 | * map will be automatically freed by the device management code. | |
822 | */ | |
3cfe7a74 NB |
823 | #define devm_regmap_init(dev, bus, bus_context, config) \ |
824 | __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ | |
825 | dev, bus, bus_context, config) | |
1ed81114 NB |
826 | |
827 | /** | |
2cf8e2df | 828 | * devm_regmap_init_i2c() - Initialise managed register map |
1ed81114 NB |
829 | * |
830 | * @i2c: Device that will be interacted with | |
831 | * @config: Configuration for register map | |
832 | * | |
833 | * The return value will be an ERR_PTR() on error or a valid pointer | |
834 | * to a struct regmap. The regmap will be automatically freed by the | |
835 | * device management code. | |
836 | */ | |
3cfe7a74 NB |
837 | #define devm_regmap_init_i2c(i2c, config) \ |
838 | __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ | |
839 | i2c, config) | |
1ed81114 | 840 | |
bcf7eac3 AM |
841 | /** |
842 | * devm_regmap_init_sccb() - Initialise managed register map | |
843 | * | |
844 | * @i2c: Device that will be interacted with | |
845 | * @config: Configuration for register map | |
846 | * | |
847 | * The return value will be an ERR_PTR() on error or a valid pointer | |
848 | * to a struct regmap. The regmap will be automatically freed by the | |
849 | * device management code. | |
850 | */ | |
851 | #define devm_regmap_init_sccb(i2c, config) \ | |
852 | __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \ | |
853 | i2c, config) | |
854 | ||
1ed81114 | 855 | /** |
2cf8e2df | 856 | * devm_regmap_init_spi() - Initialise register map |
1ed81114 | 857 | * |
2cf8e2df | 858 | * @dev: Device that will be interacted with |
1ed81114 NB |
859 | * @config: Configuration for register map |
860 | * | |
861 | * The return value will be an ERR_PTR() on error or a valid pointer | |
862 | * to a struct regmap. The map will be automatically freed by the | |
863 | * device management code. | |
864 | */ | |
3cfe7a74 NB |
865 | #define devm_regmap_init_spi(dev, config) \ |
866 | __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ | |
867 | dev, config) | |
1ed81114 NB |
868 | |
869 | /** | |
2cf8e2df CK |
870 | * devm_regmap_init_spmi_base() - Create managed regmap for Base register space |
871 | * | |
872 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
873 | * @config: Configuration for register map |
874 | * | |
875 | * The return value will be an ERR_PTR() on error or a valid pointer | |
876 | * to a struct regmap. The regmap will be automatically freed by the | |
877 | * device management code. | |
878 | */ | |
3cfe7a74 NB |
879 | #define devm_regmap_init_spmi_base(dev, config) \ |
880 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ | |
881 | dev, config) | |
1ed81114 NB |
882 | |
883 | /** | |
2cf8e2df CK |
884 | * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space |
885 | * | |
886 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
887 | * @config: Configuration for register map |
888 | * | |
889 | * The return value will be an ERR_PTR() on error or a valid pointer | |
890 | * to a struct regmap. The regmap will be automatically freed by the | |
891 | * device management code. | |
892 | */ | |
3cfe7a74 NB |
893 | #define devm_regmap_init_spmi_ext(dev, config) \ |
894 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ | |
895 | dev, config) | |
3cfe7a74 | 896 | |
cc5d0db3 AM |
897 | /** |
898 | * devm_regmap_init_w1() - Initialise managed register map | |
899 | * | |
900 | * @w1_dev: Device that will be interacted with | |
901 | * @config: Configuration for register map | |
902 | * | |
903 | * The return value will be an ERR_PTR() on error or a valid pointer | |
904 | * to a struct regmap. The regmap will be automatically freed by the | |
905 | * device management code. | |
906 | */ | |
907 | #define devm_regmap_init_w1(w1_dev, config) \ | |
908 | __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \ | |
909 | w1_dev, config) | |
878ec67b | 910 | /** |
2cf8e2df | 911 | * devm_regmap_init_mmio_clk() - Initialise managed register map with clock |
878ec67b PZ |
912 | * |
913 | * @dev: Device that will be interacted with | |
1ed81114 | 914 | * @clk_id: register clock consumer ID |
878ec67b PZ |
915 | * @regs: Pointer to memory-mapped IO region |
916 | * @config: Configuration for register map | |
917 | * | |
1ed81114 NB |
918 | * The return value will be an ERR_PTR() on error or a valid pointer |
919 | * to a struct regmap. The regmap will be automatically freed by the | |
920 | * device management code. | |
878ec67b | 921 | */ |
1ed81114 NB |
922 | #define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
923 | __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ | |
924 | dev, clk_id, regs, config) | |
878ec67b PZ |
925 | |
926 | /** | |
2cf8e2df | 927 | * devm_regmap_init_mmio() - Initialise managed register map |
878ec67b PZ |
928 | * |
929 | * @dev: Device that will be interacted with | |
930 | * @regs: Pointer to memory-mapped IO region | |
931 | * @config: Configuration for register map | |
932 | * | |
933 | * The return value will be an ERR_PTR() on error or a valid pointer | |
934 | * to a struct regmap. The regmap will be automatically freed by the | |
935 | * device management code. | |
936 | */ | |
3cfe7a74 NB |
937 | #define devm_regmap_init_mmio(dev, regs, config) \ |
938 | devm_regmap_init_mmio_clk(dev, NULL, regs, config) | |
c0eb4676 | 939 | |
1ed81114 | 940 | /** |
2cf8e2df | 941 | * devm_regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
942 | * |
943 | * @ac97: Device that will be interacted with | |
944 | * @config: Configuration for register map | |
945 | * | |
946 | * The return value will be an ERR_PTR() on error or a valid pointer | |
947 | * to a struct regmap. The regmap will be automatically freed by the | |
948 | * device management code. | |
949 | */ | |
950 | #define devm_regmap_init_ac97(ac97, config) \ | |
951 | __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ | |
952 | ac97, config) | |
c0eb4676 | 953 | |
7c22ce6e VK |
954 | /** |
955 | * devm_regmap_init_sdw() - Initialise managed register map | |
956 | * | |
957 | * @sdw: Device that will be interacted with | |
958 | * @config: Configuration for register map | |
959 | * | |
960 | * The return value will be an ERR_PTR() on error or a valid pointer | |
961 | * to a struct regmap. The regmap will be automatically freed by the | |
962 | * device management code. | |
963 | */ | |
964 | #define devm_regmap_init_sdw(sdw, config) \ | |
965 | __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \ | |
966 | sdw, config) | |
967 | ||
ed24d568 SK |
968 | /** |
969 | * devm_regmap_init_slimbus() - Initialise managed register map | |
970 | * | |
971 | * @slimbus: Device that will be interacted with | |
972 | * @config: Configuration for register map | |
973 | * | |
974 | * The return value will be an ERR_PTR() on error or a valid pointer | |
975 | * to a struct regmap. The regmap will be automatically freed by the | |
976 | * device management code. | |
977 | */ | |
978 | #define devm_regmap_init_slimbus(slimbus, config) \ | |
979 | __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \ | |
980 | slimbus, config) | |
6445500b VS |
981 | |
982 | /** | |
983 | * devm_regmap_init_i3c() - Initialise managed register map | |
984 | * | |
985 | * @i3c: Device that will be interacted with | |
986 | * @config: Configuration for register map | |
987 | * | |
988 | * The return value will be an ERR_PTR() on error or a valid pointer | |
989 | * to a struct regmap. The regmap will be automatically freed by the | |
990 | * device management code. | |
991 | */ | |
992 | #define devm_regmap_init_i3c(i3c, config) \ | |
993 | __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \ | |
994 | i3c, config) | |
995 | ||
31895662 MR |
996 | int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk); |
997 | void regmap_mmio_detach_clk(struct regmap *map); | |
b83a313b | 998 | void regmap_exit(struct regmap *map); |
bf315173 MB |
999 | int regmap_reinit_cache(struct regmap *map, |
1000 | const struct regmap_config *config); | |
72b39f6f | 1001 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
8d7d3972 | 1002 | struct device *regmap_get_device(struct regmap *map); |
b83a313b | 1003 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
915f441b | 1004 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); |
b83a313b MB |
1005 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
1006 | const void *val, size_t val_len); | |
cdf6b11d BW |
1007 | int regmap_noinc_write(struct regmap *map, unsigned int reg, |
1008 | const void *val, size_t val_len); | |
8eaeb219 LD |
1009 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
1010 | size_t val_count); | |
8019ff6c | 1011 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
e33fabd3 | 1012 | int num_regs); |
1d5b40bc | 1013 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
8019ff6c | 1014 | const struct reg_sequence *regs, |
1d5b40bc | 1015 | int num_regs); |
0d509f2b MB |
1016 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
1017 | const void *val, size_t val_len); | |
b83a313b MB |
1018 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
1019 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
1020 | void *val, size_t val_len); | |
74fe7b55 CDL |
1021 | int regmap_noinc_read(struct regmap *map, unsigned int reg, |
1022 | void *val, size_t val_len); | |
b83a313b MB |
1023 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, |
1024 | size_t val_count); | |
91d31b9f KM |
1025 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
1026 | unsigned int mask, unsigned int val, | |
1027 | bool *change, bool async, bool force); | |
4b9e7edb BG |
1028 | |
1029 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
1030 | unsigned int mask, unsigned int val) | |
1031 | { | |
1032 | return regmap_update_bits_base(map, reg, mask, val, NULL, false, false); | |
1033 | } | |
1034 | ||
1035 | static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
1036 | unsigned int mask, unsigned int val) | |
1037 | { | |
1038 | return regmap_update_bits_base(map, reg, mask, val, NULL, true, false); | |
1039 | } | |
1040 | ||
1041 | static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
1042 | unsigned int mask, unsigned int val, | |
1043 | bool *change) | |
1044 | { | |
1045 | return regmap_update_bits_base(map, reg, mask, val, | |
1046 | change, false, false); | |
1047 | } | |
1048 | ||
1049 | static inline int | |
1050 | regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
1051 | unsigned int mask, unsigned int val, | |
1052 | bool *change) | |
1053 | { | |
1054 | return regmap_update_bits_base(map, reg, mask, val, | |
1055 | change, true, false); | |
1056 | } | |
1057 | ||
1058 | static inline int regmap_write_bits(struct regmap *map, unsigned int reg, | |
1059 | unsigned int mask, unsigned int val) | |
1060 | { | |
1061 | return regmap_update_bits_base(map, reg, mask, val, NULL, false, true); | |
1062 | } | |
1063 | ||
a6539c32 | 1064 | int regmap_get_val_bytes(struct regmap *map); |
668abc72 | 1065 | int regmap_get_max_register(struct regmap *map); |
a2f776cb | 1066 | int regmap_get_reg_stride(struct regmap *map); |
0d509f2b | 1067 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 1068 | bool regmap_can_raw_write(struct regmap *map); |
f50c9eb4 MP |
1069 | size_t regmap_get_raw_read_max(struct regmap *map); |
1070 | size_t regmap_get_raw_write_max(struct regmap *map); | |
b83a313b | 1071 | |
39a58439 | 1072 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
1073 | int regcache_sync_region(struct regmap *map, unsigned int min, |
1074 | unsigned int max); | |
697e85bc MB |
1075 | int regcache_drop_region(struct regmap *map, unsigned int min, |
1076 | unsigned int max); | |
92afb286 | 1077 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 1078 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 1079 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 1080 | |
154881e5 MB |
1081 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
1082 | const struct regmap_access_table *table); | |
1083 | ||
8019ff6c | 1084 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
22f0d90a | 1085 | int num_regs); |
13ff50c8 NC |
1086 | int regmap_parse_val(struct regmap *map, const void *buf, |
1087 | unsigned int *val); | |
22f0d90a | 1088 | |
76aad392 DC |
1089 | static inline bool regmap_reg_in_range(unsigned int reg, |
1090 | const struct regmap_range *range) | |
1091 | { | |
1092 | return reg >= range->range_min && reg <= range->range_max; | |
1093 | } | |
1094 | ||
1095 | bool regmap_reg_in_ranges(unsigned int reg, | |
1096 | const struct regmap_range *ranges, | |
1097 | unsigned int nranges); | |
1098 | ||
aa2ff9db BG |
1099 | static inline int regmap_set_bits(struct regmap *map, |
1100 | unsigned int reg, unsigned int bits) | |
1101 | { | |
1102 | return regmap_update_bits_base(map, reg, bits, bits, | |
1103 | NULL, false, false); | |
1104 | } | |
1105 | ||
1106 | static inline int regmap_clear_bits(struct regmap *map, | |
1107 | unsigned int reg, unsigned int bits) | |
1108 | { | |
1109 | return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false); | |
1110 | } | |
1111 | ||
1112 | int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits); | |
1113 | ||
67252287 | 1114 | /** |
2cf8e2df | 1115 | * struct reg_field - Description of an register field |
67252287 SK |
1116 | * |
1117 | * @reg: Offset of the register within the regmap bank | |
1118 | * @lsb: lsb of the register field. | |
f27b37f5 | 1119 | * @msb: msb of the register field. |
a0102375 KM |
1120 | * @id_size: port size if it has some ports |
1121 | * @id_offset: address offset for each ports | |
67252287 SK |
1122 | */ |
1123 | struct reg_field { | |
1124 | unsigned int reg; | |
1125 | unsigned int lsb; | |
1126 | unsigned int msb; | |
a0102375 KM |
1127 | unsigned int id_size; |
1128 | unsigned int id_offset; | |
67252287 SK |
1129 | }; |
1130 | ||
1131 | #define REG_FIELD(_reg, _lsb, _msb) { \ | |
1132 | .reg = _reg, \ | |
1133 | .lsb = _lsb, \ | |
1134 | .msb = _msb, \ | |
1135 | } | |
1136 | ||
8baebfc2 VO |
1137 | #define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \ |
1138 | .reg = _reg, \ | |
1139 | .lsb = _lsb, \ | |
1140 | .msb = _msb, \ | |
1141 | .id_size = _size, \ | |
1142 | .id_offset = _offset, \ | |
1143 | } | |
1144 | ||
67252287 SK |
1145 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, |
1146 | struct reg_field reg_field); | |
1147 | void regmap_field_free(struct regmap_field *field); | |
1148 | ||
1149 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
1150 | struct regmap *regmap, struct reg_field reg_field); | |
1151 | void devm_regmap_field_free(struct device *dev, struct regmap_field *field); | |
1152 | ||
1153 | int regmap_field_read(struct regmap_field *field, unsigned int *val); | |
28972eaa KM |
1154 | int regmap_field_update_bits_base(struct regmap_field *field, |
1155 | unsigned int mask, unsigned int val, | |
1156 | bool *change, bool async, bool force); | |
a0102375 KM |
1157 | int regmap_fields_read(struct regmap_field *field, unsigned int id, |
1158 | unsigned int *val); | |
e126edec KM |
1159 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
1160 | unsigned int mask, unsigned int val, | |
1161 | bool *change, bool async, bool force); | |
4b9e7edb BG |
1162 | |
1163 | static inline int regmap_field_write(struct regmap_field *field, | |
1164 | unsigned int val) | |
1165 | { | |
1166 | return regmap_field_update_bits_base(field, ~0, val, | |
1167 | NULL, false, false); | |
1168 | } | |
1169 | ||
1170 | static inline int regmap_field_force_write(struct regmap_field *field, | |
1171 | unsigned int val) | |
1172 | { | |
1173 | return regmap_field_update_bits_base(field, ~0, val, NULL, false, true); | |
1174 | } | |
1175 | ||
1176 | static inline int regmap_field_update_bits(struct regmap_field *field, | |
1177 | unsigned int mask, unsigned int val) | |
1178 | { | |
1179 | return regmap_field_update_bits_base(field, mask, val, | |
1180 | NULL, false, false); | |
1181 | } | |
1182 | ||
1183 | static inline int | |
1184 | regmap_field_force_update_bits(struct regmap_field *field, | |
1185 | unsigned int mask, unsigned int val) | |
1186 | { | |
1187 | return regmap_field_update_bits_base(field, mask, val, | |
1188 | NULL, false, true); | |
1189 | } | |
1190 | ||
1191 | static inline int regmap_fields_write(struct regmap_field *field, | |
1192 | unsigned int id, unsigned int val) | |
1193 | { | |
1194 | return regmap_fields_update_bits_base(field, id, ~0, val, | |
1195 | NULL, false, false); | |
1196 | } | |
1197 | ||
1198 | static inline int regmap_fields_force_write(struct regmap_field *field, | |
1199 | unsigned int id, unsigned int val) | |
1200 | { | |
1201 | return regmap_fields_update_bits_base(field, id, ~0, val, | |
1202 | NULL, false, true); | |
1203 | } | |
1204 | ||
1205 | static inline int | |
1206 | regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1207 | unsigned int mask, unsigned int val) | |
1208 | { | |
1209 | return regmap_fields_update_bits_base(field, id, mask, val, | |
1210 | NULL, false, false); | |
1211 | } | |
1212 | ||
1213 | static inline int | |
1214 | regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, | |
1215 | unsigned int mask, unsigned int val) | |
1216 | { | |
1217 | return regmap_fields_update_bits_base(field, id, mask, val, | |
1218 | NULL, false, true); | |
1219 | } | |
1220 | ||
1c2928e3 MV |
1221 | /** |
1222 | * struct regmap_irq_type - IRQ type definitions. | |
1223 | * | |
1224 | * @type_reg_offset: Offset register for the irq type setting. | |
1225 | * @type_rising_val: Register value to configure RISING type irq. | |
1226 | * @type_falling_val: Register value to configure FALLING type irq. | |
1227 | * @type_level_low_val: Register value to configure LEVEL_LOW type irq. | |
1228 | * @type_level_high_val: Register value to configure LEVEL_HIGH type irq. | |
1229 | * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types. | |
1230 | */ | |
1231 | struct regmap_irq_type { | |
1232 | unsigned int type_reg_offset; | |
1233 | unsigned int type_reg_mask; | |
1234 | unsigned int type_rising_val; | |
1235 | unsigned int type_falling_val; | |
1236 | unsigned int type_level_low_val; | |
1237 | unsigned int type_level_high_val; | |
1238 | unsigned int types_supported; | |
1239 | }; | |
76aad392 | 1240 | |
f8beab2b | 1241 | /** |
2cf8e2df | 1242 | * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip. |
f8beab2b MB |
1243 | * |
1244 | * @reg_offset: Offset of the status/mask register within the bank | |
1245 | * @mask: Mask used to flag/control the register. | |
1c2928e3 | 1246 | * @type: IRQ trigger type setting details if supported. |
f8beab2b MB |
1247 | */ |
1248 | struct regmap_irq { | |
1249 | unsigned int reg_offset; | |
1250 | unsigned int mask; | |
1c2928e3 | 1251 | struct regmap_irq_type type; |
f8beab2b MB |
1252 | }; |
1253 | ||
b4fe8ba7 QZ |
1254 | #define REGMAP_IRQ_REG(_irq, _off, _mask) \ |
1255 | [_irq] = { .reg_offset = (_off), .mask = (_mask) } | |
1256 | ||
43fac323 TX |
1257 | #define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \ |
1258 | [_id] = { \ | |
1259 | .mask = BIT((_id) % (_reg_bits)), \ | |
1260 | .reg_offset = (_id) / (_reg_bits), \ | |
1261 | } | |
1262 | ||
a2d21848 MV |
1263 | #define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \ |
1264 | { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] } | |
1265 | ||
1266 | struct regmap_irq_sub_irq_map { | |
1267 | unsigned int num_regs; | |
1268 | unsigned int *offset; | |
1269 | }; | |
1270 | ||
f8beab2b | 1271 | /** |
2cf8e2df | 1272 | * struct regmap_irq_chip - Description of a generic regmap irq_chip. |
f8beab2b MB |
1273 | * |
1274 | * @name: Descriptive name for IRQ controller. | |
1275 | * | |
a2d21848 MV |
1276 | * @main_status: Base main status register address. For chips which have |
1277 | * interrupts arranged in separate sub-irq blocks with own IRQ | |
1278 | * registers and which have a main IRQ registers indicating | |
1279 | * sub-irq blocks with unhandled interrupts. For such chips fill | |
1280 | * sub-irq register information in status_base, mask_base and | |
1281 | * ack_base. | |
1282 | * @num_main_status_bits: Should be given to chips where number of meaningfull | |
1283 | * main status bits differs from num_regs. | |
1284 | * @sub_reg_offsets: arrays of mappings from main register bits to sub irq | |
1285 | * registers. First item in array describes the registers | |
1286 | * for first main status bit. Second array for second bit etc. | |
1287 | * Offset is given as sub register status offset to | |
1288 | * status_base. Should contain num_regs arrays. | |
1289 | * Can be provided for chips with more complex mapping than | |
1290 | * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ... | |
1291 | * @num_main_regs: Number of 'main status' irq registers for chips which have | |
1292 | * main_status set. | |
1293 | * | |
f8beab2b MB |
1294 | * @status_base: Base status register address. |
1295 | * @mask_base: Base mask register address. | |
a71411db | 1296 | * @mask_writeonly: Base mask register is write only. |
7b7d1968 GZ |
1297 | * @unmask_base: Base unmask register address. for chips who have |
1298 | * separate mask and unmask registers | |
d3233433 AS |
1299 | * @ack_base: Base ack address. If zero then the chip is clear on read. |
1300 | * Using zero value is possible with @use_ack bit. | |
a43fd50d | 1301 | * @wake_base: Base address for wake enables. If zero unsupported. |
7a78479f | 1302 | * @type_base: Base address for irq type. If zero unsupported. |
022f926a | 1303 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
2753e6f8 | 1304 | * @init_ack_masked: Ack all masked interrupts once during initalization. |
68622bdf | 1305 | * @mask_invert: Inverted mask register: cleared bits are masked out. |
d3233433 | 1306 | * @use_ack: Use @ack register even if it is zero. |
a650fdd9 | 1307 | * @ack_invert: Inverted ack register: cleared bits for ack. |
68622bdf | 1308 | * @wake_invert: Inverted wake register: cleared bits are wake enabled. |
7a78479f | 1309 | * @type_invert: Invert the type flags. |
bc998a73 BG |
1310 | * @type_in_mask: Use the mask registers for controlling irq type. For |
1311 | * interrupts defining type_rising/falling_mask use mask_base | |
1312 | * for edge configuration and never update bits in type_base. | |
c82ea33e BG |
1313 | * @clear_on_unmask: For chips with interrupts cleared on read: read the status |
1314 | * registers before unmasking interrupts to clear any bits | |
1315 | * set when they were masked. | |
0c00c50b | 1316 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
1317 | * |
1318 | * @num_regs: Number of registers in each control bank. | |
1319 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
1320 | * assigned based on the index in the array of the interrupt. | |
1321 | * @num_irqs: Number of descriptors. | |
7a78479f LD |
1322 | * @num_type_reg: Number of type registers. |
1323 | * @type_reg_stride: Stride to use for chips where type registers are not | |
1324 | * contiguous. | |
ccc12561 LD |
1325 | * @handle_pre_irq: Driver specific callback to handle interrupt from device |
1326 | * before regmap_irq_handler process the interrupts. | |
1327 | * @handle_post_irq: Driver specific callback to handle interrupt from device | |
1328 | * after handling the interrupts in regmap_irq_handler(). | |
1329 | * @irq_drv_data: Driver specific IRQ data which is passed as parameter when | |
1330 | * driver specific pre/post interrupt handler is called. | |
2cf8e2df CK |
1331 | * |
1332 | * This is not intended to handle every possible interrupt controller, but | |
1333 | * it should handle a substantial proportion of those that are found in the | |
1334 | * wild. | |
f8beab2b MB |
1335 | */ |
1336 | struct regmap_irq_chip { | |
1337 | const char *name; | |
1338 | ||
a2d21848 MV |
1339 | unsigned int main_status; |
1340 | unsigned int num_main_status_bits; | |
1341 | struct regmap_irq_sub_irq_map *sub_reg_offsets; | |
1342 | int num_main_regs; | |
1343 | ||
f8beab2b MB |
1344 | unsigned int status_base; |
1345 | unsigned int mask_base; | |
7b7d1968 | 1346 | unsigned int unmask_base; |
f8beab2b | 1347 | unsigned int ack_base; |
a43fd50d | 1348 | unsigned int wake_base; |
7a78479f | 1349 | unsigned int type_base; |
022f926a | 1350 | unsigned int irq_reg_stride; |
a71411db | 1351 | bool mask_writeonly:1; |
f484f7a6 PZ |
1352 | bool init_ack_masked:1; |
1353 | bool mask_invert:1; | |
d3233433 | 1354 | bool use_ack:1; |
a650fdd9 | 1355 | bool ack_invert:1; |
f484f7a6 PZ |
1356 | bool wake_invert:1; |
1357 | bool runtime_pm:1; | |
7a78479f | 1358 | bool type_invert:1; |
bc998a73 | 1359 | bool type_in_mask:1; |
c82ea33e | 1360 | bool clear_on_unmask:1; |
f8beab2b MB |
1361 | |
1362 | int num_regs; | |
1363 | ||
1364 | const struct regmap_irq *irqs; | |
1365 | int num_irqs; | |
7a78479f LD |
1366 | |
1367 | int num_type_reg; | |
1368 | unsigned int type_reg_stride; | |
ccc12561 LD |
1369 | |
1370 | int (*handle_pre_irq)(void *irq_drv_data); | |
1371 | int (*handle_post_irq)(void *irq_drv_data); | |
1372 | void *irq_drv_data; | |
f8beab2b MB |
1373 | }; |
1374 | ||
1375 | struct regmap_irq_chip_data; | |
1376 | ||
1377 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 1378 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b | 1379 | struct regmap_irq_chip_data **data); |
5cc2013b MW |
1380 | int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, |
1381 | struct regmap *map, int irq, | |
1382 | int irq_flags, int irq_base, | |
1383 | const struct regmap_irq_chip *chip, | |
1384 | struct regmap_irq_chip_data **data); | |
f8beab2b | 1385 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); |
045b9848 LD |
1386 | |
1387 | int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, | |
1388 | int irq_flags, int irq_base, | |
1389 | const struct regmap_irq_chip *chip, | |
1390 | struct regmap_irq_chip_data **data); | |
5cc2013b MW |
1391 | int devm_regmap_add_irq_chip_fwnode(struct device *dev, |
1392 | struct fwnode_handle *fwnode, | |
1393 | struct regmap *map, int irq, | |
1394 | int irq_flags, int irq_base, | |
1395 | const struct regmap_irq_chip *chip, | |
1396 | struct regmap_irq_chip_data **data); | |
045b9848 LD |
1397 | void devm_regmap_del_irq_chip(struct device *dev, int irq, |
1398 | struct regmap_irq_chip_data *data); | |
1399 | ||
209a6006 | 1400 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 1401 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 1402 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 1403 | |
9cde5fcd MB |
1404 | #else |
1405 | ||
1406 | /* | |
1407 | * These stubs should only ever be called by generic code which has | |
1408 | * regmap based facilities, if they ever get called at runtime | |
1409 | * something is going wrong and something probably needs to select | |
1410 | * REGMAP. | |
1411 | */ | |
1412 | ||
1413 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
1414 | unsigned int val) | |
1415 | { | |
1416 | WARN_ONCE(1, "regmap API is disabled"); | |
1417 | return -EINVAL; | |
1418 | } | |
1419 | ||
915f441b MB |
1420 | static inline int regmap_write_async(struct regmap *map, unsigned int reg, |
1421 | unsigned int val) | |
1422 | { | |
1423 | WARN_ONCE(1, "regmap API is disabled"); | |
1424 | return -EINVAL; | |
1425 | } | |
1426 | ||
9cde5fcd MB |
1427 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, |
1428 | const void *val, size_t val_len) | |
1429 | { | |
1430 | WARN_ONCE(1, "regmap API is disabled"); | |
1431 | return -EINVAL; | |
1432 | } | |
1433 | ||
0d509f2b MB |
1434 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
1435 | const void *val, size_t val_len) | |
1436 | { | |
1437 | WARN_ONCE(1, "regmap API is disabled"); | |
1438 | return -EINVAL; | |
1439 | } | |
1440 | ||
cdf6b11d BW |
1441 | static inline int regmap_noinc_write(struct regmap *map, unsigned int reg, |
1442 | const void *val, size_t val_len) | |
1443 | { | |
1444 | WARN_ONCE(1, "regmap API is disabled"); | |
1445 | return -EINVAL; | |
1446 | } | |
1447 | ||
9cde5fcd MB |
1448 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
1449 | const void *val, size_t val_count) | |
1450 | { | |
1451 | WARN_ONCE(1, "regmap API is disabled"); | |
1452 | return -EINVAL; | |
1453 | } | |
1454 | ||
1455 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
1456 | unsigned int *val) | |
1457 | { | |
1458 | WARN_ONCE(1, "regmap API is disabled"); | |
1459 | return -EINVAL; | |
1460 | } | |
1461 | ||
1462 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
1463 | void *val, size_t val_len) | |
1464 | { | |
1465 | WARN_ONCE(1, "regmap API is disabled"); | |
1466 | return -EINVAL; | |
1467 | } | |
1468 | ||
74fe7b55 CDL |
1469 | static inline int regmap_noinc_read(struct regmap *map, unsigned int reg, |
1470 | void *val, size_t val_len) | |
1471 | { | |
1472 | WARN_ONCE(1, "regmap API is disabled"); | |
1473 | return -EINVAL; | |
1474 | } | |
1475 | ||
9cde5fcd MB |
1476 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, |
1477 | void *val, size_t val_count) | |
1478 | { | |
1479 | WARN_ONCE(1, "regmap API is disabled"); | |
1480 | return -EINVAL; | |
1481 | } | |
1482 | ||
91d31b9f KM |
1483 | static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
1484 | unsigned int mask, unsigned int val, | |
1485 | bool *change, bool async, bool force) | |
fd4b7286 KM |
1486 | { |
1487 | WARN_ONCE(1, "regmap API is disabled"); | |
1488 | return -EINVAL; | |
1489 | } | |
1490 | ||
aa2ff9db BG |
1491 | static inline int regmap_set_bits(struct regmap *map, |
1492 | unsigned int reg, unsigned int bits) | |
1493 | { | |
1494 | WARN_ONCE(1, "regmap API is disabled"); | |
1495 | return -EINVAL; | |
1496 | } | |
1497 | ||
1498 | static inline int regmap_clear_bits(struct regmap *map, | |
1499 | unsigned int reg, unsigned int bits) | |
1500 | { | |
1501 | WARN_ONCE(1, "regmap API is disabled"); | |
1502 | return -EINVAL; | |
1503 | } | |
1504 | ||
1505 | static inline int regmap_test_bits(struct regmap *map, | |
1506 | unsigned int reg, unsigned int bits) | |
1507 | { | |
1508 | WARN_ONCE(1, "regmap API is disabled"); | |
1509 | return -EINVAL; | |
1510 | } | |
1511 | ||
28972eaa KM |
1512 | static inline int regmap_field_update_bits_base(struct regmap_field *field, |
1513 | unsigned int mask, unsigned int val, | |
1514 | bool *change, bool async, bool force) | |
915f441b MB |
1515 | { |
1516 | WARN_ONCE(1, "regmap API is disabled"); | |
1517 | return -EINVAL; | |
1518 | } | |
1519 | ||
e126edec KM |
1520 | static inline int regmap_fields_update_bits_base(struct regmap_field *field, |
1521 | unsigned int id, | |
1522 | unsigned int mask, unsigned int val, | |
1523 | bool *change, bool async, bool force) | |
915f441b MB |
1524 | { |
1525 | WARN_ONCE(1, "regmap API is disabled"); | |
1526 | return -EINVAL; | |
1527 | } | |
1528 | ||
4b9e7edb BG |
1529 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, |
1530 | unsigned int mask, unsigned int val) | |
1531 | { | |
1532 | WARN_ONCE(1, "regmap API is disabled"); | |
1533 | return -EINVAL; | |
1534 | } | |
1535 | ||
1536 | static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
1537 | unsigned int mask, unsigned int val) | |
1538 | { | |
1539 | WARN_ONCE(1, "regmap API is disabled"); | |
1540 | return -EINVAL; | |
1541 | } | |
1542 | ||
1543 | static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
1544 | unsigned int mask, unsigned int val, | |
1545 | bool *change) | |
1546 | { | |
1547 | WARN_ONCE(1, "regmap API is disabled"); | |
1548 | return -EINVAL; | |
1549 | } | |
1550 | ||
1551 | static inline int | |
1552 | regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
1553 | unsigned int mask, unsigned int val, | |
1554 | bool *change) | |
1555 | { | |
1556 | WARN_ONCE(1, "regmap API is disabled"); | |
1557 | return -EINVAL; | |
1558 | } | |
1559 | ||
1560 | static inline int regmap_write_bits(struct regmap *map, unsigned int reg, | |
1561 | unsigned int mask, unsigned int val) | |
1562 | { | |
1563 | WARN_ONCE(1, "regmap API is disabled"); | |
1564 | return -EINVAL; | |
1565 | } | |
1566 | ||
1567 | static inline int regmap_field_write(struct regmap_field *field, | |
1568 | unsigned int val) | |
1569 | { | |
1570 | WARN_ONCE(1, "regmap API is disabled"); | |
1571 | return -EINVAL; | |
1572 | } | |
1573 | ||
1574 | static inline int regmap_field_force_write(struct regmap_field *field, | |
1575 | unsigned int val) | |
1576 | { | |
1577 | WARN_ONCE(1, "regmap API is disabled"); | |
1578 | return -EINVAL; | |
1579 | } | |
1580 | ||
1581 | static inline int regmap_field_update_bits(struct regmap_field *field, | |
1582 | unsigned int mask, unsigned int val) | |
1583 | { | |
1584 | WARN_ONCE(1, "regmap API is disabled"); | |
1585 | return -EINVAL; | |
1586 | } | |
1587 | ||
1588 | static inline int | |
1589 | regmap_field_force_update_bits(struct regmap_field *field, | |
1590 | unsigned int mask, unsigned int val) | |
1591 | { | |
1592 | WARN_ONCE(1, "regmap API is disabled"); | |
1593 | return -EINVAL; | |
1594 | } | |
1595 | ||
1596 | static inline int regmap_fields_write(struct regmap_field *field, | |
1597 | unsigned int id, unsigned int val) | |
1598 | { | |
1599 | WARN_ONCE(1, "regmap API is disabled"); | |
1600 | return -EINVAL; | |
1601 | } | |
1602 | ||
1603 | static inline int regmap_fields_force_write(struct regmap_field *field, | |
1604 | unsigned int id, unsigned int val) | |
1605 | { | |
1606 | WARN_ONCE(1, "regmap API is disabled"); | |
1607 | return -EINVAL; | |
1608 | } | |
1609 | ||
1610 | static inline int | |
1611 | regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1612 | unsigned int mask, unsigned int val) | |
1613 | { | |
1614 | WARN_ONCE(1, "regmap API is disabled"); | |
1615 | return -EINVAL; | |
1616 | } | |
1617 | ||
1618 | static inline int | |
1619 | regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, | |
1620 | unsigned int mask, unsigned int val) | |
1621 | { | |
1622 | WARN_ONCE(1, "regmap API is disabled"); | |
1623 | return -EINVAL; | |
1624 | } | |
1625 | ||
9cde5fcd MB |
1626 | static inline int regmap_get_val_bytes(struct regmap *map) |
1627 | { | |
1628 | WARN_ONCE(1, "regmap API is disabled"); | |
1629 | return -EINVAL; | |
1630 | } | |
1631 | ||
668abc72 SK |
1632 | static inline int regmap_get_max_register(struct regmap *map) |
1633 | { | |
1634 | WARN_ONCE(1, "regmap API is disabled"); | |
1635 | return -EINVAL; | |
1636 | } | |
1637 | ||
a2f776cb SK |
1638 | static inline int regmap_get_reg_stride(struct regmap *map) |
1639 | { | |
1640 | WARN_ONCE(1, "regmap API is disabled"); | |
1641 | return -EINVAL; | |
1642 | } | |
1643 | ||
9cde5fcd MB |
1644 | static inline int regcache_sync(struct regmap *map) |
1645 | { | |
1646 | WARN_ONCE(1, "regmap API is disabled"); | |
1647 | return -EINVAL; | |
1648 | } | |
1649 | ||
a313f9f5 MB |
1650 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
1651 | unsigned int max) | |
1652 | { | |
1653 | WARN_ONCE(1, "regmap API is disabled"); | |
1654 | return -EINVAL; | |
1655 | } | |
1656 | ||
697e85bc MB |
1657 | static inline int regcache_drop_region(struct regmap *map, unsigned int min, |
1658 | unsigned int max) | |
1659 | { | |
1660 | WARN_ONCE(1, "regmap API is disabled"); | |
1661 | return -EINVAL; | |
1662 | } | |
1663 | ||
9cde5fcd MB |
1664 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
1665 | { | |
1666 | WARN_ONCE(1, "regmap API is disabled"); | |
1667 | } | |
1668 | ||
1669 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
1670 | { | |
1671 | WARN_ONCE(1, "regmap API is disabled"); | |
1672 | } | |
1673 | ||
1674 | static inline void regcache_mark_dirty(struct regmap *map) | |
1675 | { | |
1676 | WARN_ONCE(1, "regmap API is disabled"); | |
1677 | } | |
1678 | ||
0d509f2b MB |
1679 | static inline void regmap_async_complete(struct regmap *map) |
1680 | { | |
1681 | WARN_ONCE(1, "regmap API is disabled"); | |
1682 | } | |
1683 | ||
9cde5fcd | 1684 | static inline int regmap_register_patch(struct regmap *map, |
a6baa3de | 1685 | const struct reg_sequence *regs, |
9cde5fcd MB |
1686 | int num_regs) |
1687 | { | |
1688 | WARN_ONCE(1, "regmap API is disabled"); | |
1689 | return -EINVAL; | |
1690 | } | |
1691 | ||
13ff50c8 NC |
1692 | static inline int regmap_parse_val(struct regmap *map, const void *buf, |
1693 | unsigned int *val) | |
1694 | { | |
1695 | WARN_ONCE(1, "regmap API is disabled"); | |
1696 | return -EINVAL; | |
1697 | } | |
1698 | ||
72b39f6f MB |
1699 | static inline struct regmap *dev_get_regmap(struct device *dev, |
1700 | const char *name) | |
1701 | { | |
72b39f6f MB |
1702 | return NULL; |
1703 | } | |
1704 | ||
8d7d3972 TT |
1705 | static inline struct device *regmap_get_device(struct regmap *map) |
1706 | { | |
1707 | WARN_ONCE(1, "regmap API is disabled"); | |
1d33dc6b | 1708 | return NULL; |
8d7d3972 TT |
1709 | } |
1710 | ||
9cde5fcd MB |
1711 | #endif |
1712 | ||
b83a313b | 1713 | #endif |