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1 | #ifndef __LINUX_REGMAP_H |
2 | #define __LINUX_REGMAP_H | |
3 | ||
4 | /* | |
5 | * Register map access API | |
6 | * | |
7 | * Copyright 2011 Wolfson Microelectronics plc | |
8 | * | |
9 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
b83a313b | 16 | #include <linux/list.h> |
6863ca62 | 17 | #include <linux/rbtree.h> |
adf08d48 | 18 | #include <linux/delay.h> |
49ccc142 | 19 | #include <linux/err.h> |
3f0fa9a8 | 20 | #include <linux/bug.h> |
3cfe7a74 | 21 | #include <linux/lockdep.h> |
b83a313b | 22 | |
de477254 | 23 | struct module; |
313162d0 | 24 | struct device; |
9943fa30 | 25 | struct i2c_client; |
90f790d2 | 26 | struct irq_domain; |
a676f083 | 27 | struct spi_device; |
a01779f8 | 28 | struct spmi_device; |
b83d2ff0 | 29 | struct regmap; |
6863ca62 | 30 | struct regmap_range_cfg; |
67252287 | 31 | struct regmap_field; |
22853223 | 32 | struct snd_ac97; |
9943fa30 | 33 | |
9fabe24e DP |
34 | /* An enum of all the supported cache types */ |
35 | enum regcache_type { | |
36 | REGCACHE_NONE, | |
28644c80 | 37 | REGCACHE_RBTREE, |
2ac902ce MB |
38 | REGCACHE_COMPRESSED, |
39 | REGCACHE_FLAT, | |
9fabe24e DP |
40 | }; |
41 | ||
bd20eb54 | 42 | /** |
2cf8e2df | 43 | * struct reg_default - Default value for a register. |
bd20eb54 MB |
44 | * |
45 | * @reg: Register address. | |
46 | * @def: Register default value. | |
2cf8e2df CK |
47 | * |
48 | * We use an array of structs rather than a simple array as many modern devices | |
49 | * have very sparse register maps. | |
bd20eb54 MB |
50 | */ |
51 | struct reg_default { | |
52 | unsigned int reg; | |
53 | unsigned int def; | |
54 | }; | |
55 | ||
8019ff6c | 56 | /** |
2cf8e2df | 57 | * struct reg_sequence - An individual write from a sequence of writes. |
8019ff6c NP |
58 | * |
59 | * @reg: Register address. | |
60 | * @def: Register value. | |
2de9d600 | 61 | * @delay_us: Delay to be applied after the register write in microseconds |
2cf8e2df CK |
62 | * |
63 | * Register/value pairs for sequences of writes with an optional delay in | |
64 | * microseconds to be applied after each write. | |
8019ff6c NP |
65 | */ |
66 | struct reg_sequence { | |
67 | unsigned int reg; | |
68 | unsigned int def; | |
2de9d600 | 69 | unsigned int delay_us; |
8019ff6c NP |
70 | }; |
71 | ||
ca7a9446 KM |
72 | #define regmap_update_bits(map, reg, mask, val) \ |
73 | regmap_update_bits_base(map, reg, mask, val, NULL, false, false) | |
30ed9cb7 KM |
74 | #define regmap_update_bits_async(map, reg, mask, val)\ |
75 | regmap_update_bits_base(map, reg, mask, val, NULL, true, false) | |
98c2dc48 KM |
76 | #define regmap_update_bits_check(map, reg, mask, val, change)\ |
77 | regmap_update_bits_base(map, reg, mask, val, change, false, false) | |
89d8d4b8 KM |
78 | #define regmap_update_bits_check_async(map, reg, mask, val, change)\ |
79 | regmap_update_bits_base(map, reg, mask, val, change, true, false) | |
ca7a9446 | 80 | |
b821957a KM |
81 | #define regmap_write_bits(map, reg, mask, val) \ |
82 | regmap_update_bits_base(map, reg, mask, val, NULL, false, true) | |
83 | ||
3674124b KM |
84 | #define regmap_field_write(field, val) \ |
85 | regmap_field_update_bits_base(field, ~0, val, NULL, false, false) | |
489061bb KM |
86 | #define regmap_field_force_write(field, val) \ |
87 | regmap_field_update_bits_base(field, ~0, val, NULL, false, true) | |
721ed64d KM |
88 | #define regmap_field_update_bits(field, mask, val)\ |
89 | regmap_field_update_bits_base(field, mask, val, NULL, false, false) | |
489061bb KM |
90 | #define regmap_field_force_update_bits(field, mask, val) \ |
91 | regmap_field_update_bits_base(field, mask, val, NULL, false, true) | |
3674124b | 92 | |
bbf2c46f KM |
93 | #define regmap_fields_write(field, id, val) \ |
94 | regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, false) | |
e6ef243f KM |
95 | #define regmap_fields_force_write(field, id, val) \ |
96 | regmap_fields_update_bits_base(field, id, ~0, val, NULL, false, true) | |
48138609 KM |
97 | #define regmap_fields_update_bits(field, id, mask, val)\ |
98 | regmap_fields_update_bits_base(field, id, mask, val, NULL, false, false) | |
e6ef243f KM |
99 | #define regmap_fields_force_update_bits(field, id, mask, val) \ |
100 | regmap_fields_update_bits_base(field, id, mask, val, NULL, false, true) | |
bbf2c46f | 101 | |
08188ba8 PZ |
102 | /** |
103 | * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs | |
2cf8e2df | 104 | * |
08188ba8 PZ |
105 | * @map: Regmap to read from |
106 | * @addr: Address to poll | |
107 | * @val: Unsigned integer variable to read the value into | |
108 | * @cond: Break condition (usually involving @val) | |
109 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
110 | * tight-loops). Should be less than ~20ms since usleep_range | |
111 | * is used (see Documentation/timers/timers-howto.txt). | |
112 | * @timeout_us: Timeout in us, 0 means never timeout | |
113 | * | |
114 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read | |
115 | * error return value in case of a error read. In the two former cases, | |
116 | * the last read value at @addr is stored in @val. Must not be called | |
117 | * from atomic context if sleep_us or timeout_us are used. | |
118 | * | |
119 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
120 | */ | |
121 | #define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ | |
122 | ({ \ | |
1b0c22e4 AB |
123 | u64 __timeout_us = (timeout_us); \ |
124 | unsigned long __sleep_us = (sleep_us); \ | |
125 | ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ | |
780b1350 | 126 | int __ret; \ |
1b0c22e4 | 127 | might_sleep_if(__sleep_us); \ |
08188ba8 | 128 | for (;;) { \ |
780b1350 RS |
129 | __ret = regmap_read((map), (addr), &(val)); \ |
130 | if (__ret) \ | |
08188ba8 PZ |
131 | break; \ |
132 | if (cond) \ | |
133 | break; \ | |
1b0c22e4 | 134 | if ((__timeout_us) && \ |
780b1350 RS |
135 | ktime_compare(ktime_get(), __timeout) > 0) { \ |
136 | __ret = regmap_read((map), (addr), &(val)); \ | |
08188ba8 PZ |
137 | break; \ |
138 | } \ | |
1b0c22e4 AB |
139 | if (__sleep_us) \ |
140 | usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ | |
08188ba8 | 141 | } \ |
780b1350 | 142 | __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ |
08188ba8 PZ |
143 | }) |
144 | ||
667063ac CYT |
145 | /** |
146 | * regmap_field_read_poll_timeout - Poll until a condition is met or timeout | |
147 | * | |
148 | * @field: Regmap field to read from | |
149 | * @val: Unsigned integer variable to read the value into | |
150 | * @cond: Break condition (usually involving @val) | |
151 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
152 | * tight-loops). Should be less than ~20ms since usleep_range | |
153 | * is used (see Documentation/timers/timers-howto.txt). | |
154 | * @timeout_us: Timeout in us, 0 means never timeout | |
155 | * | |
156 | * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read | |
157 | * error return value in case of a error read. In the two former cases, | |
158 | * the last read value at @addr is stored in @val. Must not be called | |
159 | * from atomic context if sleep_us or timeout_us are used. | |
160 | * | |
161 | * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. | |
162 | */ | |
163 | #define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \ | |
164 | ({ \ | |
1b0c22e4 AB |
165 | u64 __timeout_us = (timeout_us); \ |
166 | unsigned long __sleep_us = (sleep_us); \ | |
167 | ktime_t timeout = ktime_add_us(ktime_get(), __timeout_us); \ | |
667063ac | 168 | int pollret; \ |
1b0c22e4 | 169 | might_sleep_if(__sleep_us); \ |
667063ac CYT |
170 | for (;;) { \ |
171 | pollret = regmap_field_read((field), &(val)); \ | |
172 | if (pollret) \ | |
173 | break; \ | |
174 | if (cond) \ | |
175 | break; \ | |
1b0c22e4 | 176 | if (__timeout_us && ktime_compare(ktime_get(), timeout) > 0) { \ |
667063ac CYT |
177 | pollret = regmap_field_read((field), &(val)); \ |
178 | break; \ | |
179 | } \ | |
1b0c22e4 AB |
180 | if (__sleep_us) \ |
181 | usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ | |
667063ac CYT |
182 | } \ |
183 | pollret ?: ((cond) ? 0 : -ETIMEDOUT); \ | |
184 | }) | |
185 | ||
b83d2ff0 MB |
186 | #ifdef CONFIG_REGMAP |
187 | ||
141eba2e SW |
188 | enum regmap_endian { |
189 | /* Unspecified -> 0 -> Backwards compatible default */ | |
190 | REGMAP_ENDIAN_DEFAULT = 0, | |
191 | REGMAP_ENDIAN_BIG, | |
192 | REGMAP_ENDIAN_LITTLE, | |
193 | REGMAP_ENDIAN_NATIVE, | |
194 | }; | |
195 | ||
76aad392 | 196 | /** |
2cf8e2df CK |
197 | * struct regmap_range - A register range, used for access related checks |
198 | * (readable/writeable/volatile/precious checks) | |
76aad392 DC |
199 | * |
200 | * @range_min: address of first register | |
201 | * @range_max: address of last register | |
202 | */ | |
203 | struct regmap_range { | |
204 | unsigned int range_min; | |
205 | unsigned int range_max; | |
206 | }; | |
207 | ||
6112fe60 LD |
208 | #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } |
209 | ||
2cf8e2df CK |
210 | /** |
211 | * struct regmap_access_table - A table of register ranges for access checks | |
76aad392 DC |
212 | * |
213 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
214 | * @n_yes_ranges: size of the above array | |
215 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
216 | * @n_no_ranges: size of the above array | |
2cf8e2df CK |
217 | * |
218 | * A table of ranges including some yes ranges and some no ranges. | |
219 | * If a register belongs to a no_range, the corresponding check function | |
220 | * will return false. If a register belongs to a yes range, the corresponding | |
221 | * check function will return true. "no_ranges" are searched first. | |
76aad392 DC |
222 | */ |
223 | struct regmap_access_table { | |
224 | const struct regmap_range *yes_ranges; | |
225 | unsigned int n_yes_ranges; | |
226 | const struct regmap_range *no_ranges; | |
227 | unsigned int n_no_ranges; | |
228 | }; | |
229 | ||
0d4529c5 DC |
230 | typedef void (*regmap_lock)(void *); |
231 | typedef void (*regmap_unlock)(void *); | |
232 | ||
dd898b20 | 233 | /** |
2cf8e2df | 234 | * struct regmap_config - Configuration for the register map of a device. |
dd898b20 | 235 | * |
d3c242e1 SW |
236 | * @name: Optional name of the regmap. Useful when a device has multiple |
237 | * register regions. | |
238 | * | |
dd898b20 | 239 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
240 | * @reg_stride: The register address stride. Valid register addresses are a |
241 | * multiple of this value. If set to 0, a value of 1 will be | |
242 | * used. | |
82159ba8 | 243 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 244 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 245 | * |
3566cc9d | 246 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
247 | * can be written to. If this field is NULL but wr_table |
248 | * (see below) is not, the check is performed on such table | |
249 | * (a register is writeable if it belongs to one of the ranges | |
250 | * specified by wr_table). | |
3566cc9d | 251 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
252 | * can be read from. If this field is NULL but rd_table |
253 | * (see below) is not, the check is performed on such table | |
254 | * (a register is readable if it belongs to one of the ranges | |
255 | * specified by rd_table). | |
3566cc9d | 256 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
257 | * value can't be cached. If this field is NULL but |
258 | * volatile_table (see below) is not, the check is performed on | |
259 | * such table (a register is volatile if it belongs to one of | |
260 | * the ranges specified by volatile_table). | |
bdc39644 | 261 | * @precious_reg: Optional callback returning true if the register |
76aad392 | 262 | * should not be read outside of a call from the driver |
bdc39644 | 263 | * (e.g., a clear on read interrupt status register). If this |
76aad392 DC |
264 | * field is NULL but precious_table (see below) is not, the |
265 | * check is performed on such table (a register is precious if | |
266 | * it belongs to one of the ranges specified by precious_table). | |
267 | * @lock: Optional lock callback (overrides regmap's default lock | |
268 | * function, based on spinlock or mutex). | |
269 | * @unlock: As above for unlocking. | |
270 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
271 | * functions (ignored in case regular lock/unlock functions | |
272 | * are not overridden). | |
d2a5884a AS |
273 | * @reg_read: Optional callback that if filled will be used to perform |
274 | * all the reads from the registers. Should only be provided for | |
bdc39644 LP |
275 | * devices whose read operation cannot be represented as a simple |
276 | * read operation on a bus such as SPI, I2C, etc. Most of the | |
277 | * devices do not need this. | |
d2a5884a AS |
278 | * @reg_write: Same as above for writing. |
279 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex | |
280 | * to perform locking. This field is ignored if custom lock/unlock | |
281 | * functions are used (see fields lock/unlock of struct regmap_config). | |
282 | * This field is a duplicate of a similar file in | |
283 | * 'struct regmap_bus' and serves exact same purpose. | |
284 | * Use it only for "no-bus" cases. | |
b429fab4 | 285 | * @max_register: Optional, specifies the maximum valid register address. |
76aad392 DC |
286 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
287 | * valid ranges for write access. | |
288 | * @rd_table: As above, for read access. | |
289 | * @volatile_table: As above, for volatile registers. | |
290 | * @precious_table: As above, for precious registers. | |
bd20eb54 MB |
291 | * @reg_defaults: Power on reset values for registers (for use with |
292 | * register cache support). | |
293 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 | 294 | * |
f50e38c9 | 295 | * @read_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 | 296 | * a read. |
f50e38c9 | 297 | * @write_flag_mask: Mask to be set in the top bytes of the register when doing |
6f306441 LPC |
298 | * a write. If both read_flag_mask and write_flag_mask are |
299 | * empty the regmap_bus default masks are used. | |
2e33caf1 AJ |
300 | * @use_single_rw: If set, converts the bulk read and write operations into |
301 | * a series of single read and write operations. This is useful | |
302 | * for device that does not support bulk read and write. | |
e894c3f4 OAO |
303 | * @can_multi_write: If set, the device supports the multi write mode of bulk |
304 | * write operations, if clear multi write requests will be | |
305 | * split into individual write operations | |
9fabe24e DP |
306 | * |
307 | * @cache_type: The actual cache type. | |
308 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
309 | * register cache support). | |
310 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
311 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
312 | * DEFAULT, the @reg_format_endian_default value from the | |
313 | * regmap bus is used. | |
314 | * @val_format_endian: Endianness for formatted register values. If this is | |
315 | * DEFAULT, the @reg_format_endian_default value from the | |
316 | * regmap bus is used. | |
6863ca62 KG |
317 | * |
318 | * @ranges: Array of configuration entries for virtual address ranges. | |
319 | * @num_ranges: Number of range configuration entries. | |
8698b936 BW |
320 | * @hwlock_id: Specify the hardware spinlock id. |
321 | * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE, | |
322 | * HWLOCK_IRQ or 0. | |
dd898b20 | 323 | */ |
b83a313b | 324 | struct regmap_config { |
d3c242e1 SW |
325 | const char *name; |
326 | ||
b83a313b | 327 | int reg_bits; |
f01ee60f | 328 | int reg_stride; |
82159ba8 | 329 | int pad_bits; |
b83a313b | 330 | int val_bits; |
2e2ae66d | 331 | |
2e2ae66d MB |
332 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
333 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
334 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 335 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
0d4529c5 DC |
336 | regmap_lock lock; |
337 | regmap_unlock unlock; | |
338 | void *lock_arg; | |
bd20eb54 | 339 | |
d2a5884a AS |
340 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
341 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
342 | ||
343 | bool fast_io; | |
344 | ||
bd20eb54 | 345 | unsigned int max_register; |
76aad392 DC |
346 | const struct regmap_access_table *wr_table; |
347 | const struct regmap_access_table *rd_table; | |
348 | const struct regmap_access_table *volatile_table; | |
349 | const struct regmap_access_table *precious_table; | |
720e4616 | 350 | const struct reg_default *reg_defaults; |
9fabe24e DP |
351 | unsigned int num_reg_defaults; |
352 | enum regcache_type cache_type; | |
353 | const void *reg_defaults_raw; | |
354 | unsigned int num_reg_defaults_raw; | |
6f306441 | 355 | |
f50e38c9 TL |
356 | unsigned long read_flag_mask; |
357 | unsigned long write_flag_mask; | |
2e33caf1 AJ |
358 | |
359 | bool use_single_rw; | |
e894c3f4 | 360 | bool can_multi_write; |
141eba2e SW |
361 | |
362 | enum regmap_endian reg_format_endian; | |
363 | enum regmap_endian val_format_endian; | |
38e23194 | 364 | |
6863ca62 | 365 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 366 | unsigned int num_ranges; |
8698b936 BW |
367 | |
368 | unsigned int hwlock_id; | |
369 | unsigned int hwlock_mode; | |
6863ca62 KG |
370 | }; |
371 | ||
372 | /** | |
2cf8e2df CK |
373 | * struct regmap_range_cfg - Configuration for indirectly accessed or paged |
374 | * registers. | |
6863ca62 | 375 | * |
d058bb49 MB |
376 | * @name: Descriptive name for diagnostics |
377 | * | |
6863ca62 KG |
378 | * @range_min: Address of the lowest register address in virtual range. |
379 | * @range_max: Address of the highest register in virtual range. | |
380 | * | |
2cf8e2df CK |
381 | * @selector_reg: Register with selector field. |
382 | * @selector_mask: Bit shift for selector value. | |
383 | * @selector_shift: Bit mask for selector value. | |
6863ca62 KG |
384 | * |
385 | * @window_start: Address of first (lowest) register in data window. | |
386 | * @window_len: Number of registers in data window. | |
2cf8e2df CK |
387 | * |
388 | * Registers, mapped to this virtual range, are accessed in two steps: | |
389 | * 1. page selector register update; | |
390 | * 2. access through data window registers. | |
6863ca62 KG |
391 | */ |
392 | struct regmap_range_cfg { | |
d058bb49 MB |
393 | const char *name; |
394 | ||
6863ca62 KG |
395 | /* Registers of virtual address range */ |
396 | unsigned int range_min; | |
397 | unsigned int range_max; | |
398 | ||
399 | /* Page selector for indirect addressing */ | |
400 | unsigned int selector_reg; | |
401 | unsigned int selector_mask; | |
402 | int selector_shift; | |
403 | ||
404 | /* Data window (per each page) */ | |
405 | unsigned int window_start; | |
406 | unsigned int window_len; | |
b83a313b MB |
407 | }; |
408 | ||
0d509f2b MB |
409 | struct regmap_async; |
410 | ||
0135bbcc | 411 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 412 | size_t count); |
0135bbcc | 413 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
414 | const void *reg, size_t reg_len, |
415 | const void *val, size_t val_len); | |
0d509f2b MB |
416 | typedef int (*regmap_hw_async_write)(void *context, |
417 | const void *reg, size_t reg_len, | |
418 | const void *val, size_t val_len, | |
419 | struct regmap_async *async); | |
0135bbcc | 420 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
421 | const void *reg_buf, size_t reg_size, |
422 | void *val_buf, size_t val_size); | |
3ac17037 BB |
423 | typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, |
424 | unsigned int *val); | |
425 | typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, | |
426 | unsigned int val); | |
77792b11 JR |
427 | typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, |
428 | unsigned int mask, unsigned int val); | |
0d509f2b | 429 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 430 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
431 | |
432 | /** | |
2cf8e2df CK |
433 | * struct regmap_bus - Description of a hardware bus for the register map |
434 | * infrastructure. | |
b83a313b | 435 | * |
bacdbe07 | 436 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
437 | * to perform locking. This field is ignored if custom lock/unlock |
438 | * functions are used (see fields lock/unlock of | |
439 | * struct regmap_config). | |
b83a313b MB |
440 | * @write: Write operation. |
441 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
442 | * if not implemented on a given device. | |
0d509f2b MB |
443 | * @async_write: Write operation which completes asynchronously, optional and |
444 | * must serialise with respect to non-async I/O. | |
c5f58f2d MP |
445 | * @reg_write: Write a single register value to the given register address. This |
446 | * write operation has to complete when returning from the function. | |
2cf8e2df CK |
447 | * @reg_update_bits: Update bits operation to be used against volatile |
448 | * registers, intended for devices supporting some mechanism | |
449 | * for setting clearing bits without having to | |
450 | * read/modify/write. | |
b83a313b MB |
451 | * @read: Read operation. Data is returned in the buffer used to transmit |
452 | * data. | |
c5f58f2d MP |
453 | * @reg_read: Read a single register value from a given register address. |
454 | * @free_context: Free context. | |
0d509f2b | 455 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
456 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
457 | * a read. | |
141eba2e SW |
458 | * @reg_format_endian_default: Default endianness for formatted register |
459 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
460 | * DEFAULT, BIG is assumed. | |
461 | * @val_format_endian_default: Default endianness for formatted register | |
462 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
463 | * DEFAULT, BIG is assumed. | |
adaac459 MP |
464 | * @max_raw_read: Max raw read size that can be used on the bus. |
465 | * @max_raw_write: Max raw write size that can be used on the bus. | |
b83a313b MB |
466 | */ |
467 | struct regmap_bus { | |
bacdbe07 | 468 | bool fast_io; |
b83a313b MB |
469 | regmap_hw_write write; |
470 | regmap_hw_gather_write gather_write; | |
0d509f2b | 471 | regmap_hw_async_write async_write; |
3ac17037 | 472 | regmap_hw_reg_write reg_write; |
77792b11 | 473 | regmap_hw_reg_update_bits reg_update_bits; |
b83a313b | 474 | regmap_hw_read read; |
3ac17037 | 475 | regmap_hw_reg_read reg_read; |
0135bbcc | 476 | regmap_hw_free_context free_context; |
0d509f2b | 477 | regmap_hw_async_alloc async_alloc; |
b83a313b | 478 | u8 read_flag_mask; |
141eba2e SW |
479 | enum regmap_endian reg_format_endian_default; |
480 | enum regmap_endian val_format_endian_default; | |
adaac459 MP |
481 | size_t max_raw_read; |
482 | size_t max_raw_write; | |
b83a313b MB |
483 | }; |
484 | ||
3cfe7a74 NB |
485 | /* |
486 | * __regmap_init functions. | |
487 | * | |
488 | * These functions take a lock key and name parameter, and should not be called | |
489 | * directly. Instead, use the regmap_init macros that generate a key and name | |
490 | * for each call. | |
491 | */ | |
492 | struct regmap *__regmap_init(struct device *dev, | |
493 | const struct regmap_bus *bus, | |
494 | void *bus_context, | |
495 | const struct regmap_config *config, | |
496 | struct lock_class_key *lock_key, | |
497 | const char *lock_name); | |
498 | struct regmap *__regmap_init_i2c(struct i2c_client *i2c, | |
499 | const struct regmap_config *config, | |
500 | struct lock_class_key *lock_key, | |
501 | const char *lock_name); | |
502 | struct regmap *__regmap_init_spi(struct spi_device *dev, | |
503 | const struct regmap_config *config, | |
504 | struct lock_class_key *lock_key, | |
505 | const char *lock_name); | |
506 | struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, | |
507 | const struct regmap_config *config, | |
508 | struct lock_class_key *lock_key, | |
509 | const char *lock_name); | |
510 | struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, | |
511 | const struct regmap_config *config, | |
512 | struct lock_class_key *lock_key, | |
513 | const char *lock_name); | |
cc5d0db3 AM |
514 | struct regmap *__regmap_init_w1(struct device *w1_dev, |
515 | const struct regmap_config *config, | |
516 | struct lock_class_key *lock_key, | |
517 | const char *lock_name); | |
3cfe7a74 NB |
518 | struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
519 | void __iomem *regs, | |
520 | const struct regmap_config *config, | |
521 | struct lock_class_key *lock_key, | |
522 | const char *lock_name); | |
523 | struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, | |
524 | const struct regmap_config *config, | |
525 | struct lock_class_key *lock_key, | |
526 | const char *lock_name); | |
527 | ||
528 | struct regmap *__devm_regmap_init(struct device *dev, | |
529 | const struct regmap_bus *bus, | |
530 | void *bus_context, | |
531 | const struct regmap_config *config, | |
532 | struct lock_class_key *lock_key, | |
533 | const char *lock_name); | |
534 | struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, | |
535 | const struct regmap_config *config, | |
536 | struct lock_class_key *lock_key, | |
537 | const char *lock_name); | |
538 | struct regmap *__devm_regmap_init_spi(struct spi_device *dev, | |
539 | const struct regmap_config *config, | |
540 | struct lock_class_key *lock_key, | |
541 | const char *lock_name); | |
542 | struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, | |
543 | const struct regmap_config *config, | |
544 | struct lock_class_key *lock_key, | |
545 | const char *lock_name); | |
546 | struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, | |
547 | const struct regmap_config *config, | |
548 | struct lock_class_key *lock_key, | |
549 | const char *lock_name); | |
cc5d0db3 AM |
550 | struct regmap *__devm_regmap_init_w1(struct device *w1_dev, |
551 | const struct regmap_config *config, | |
552 | struct lock_class_key *lock_key, | |
553 | const char *lock_name); | |
3cfe7a74 NB |
554 | struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, |
555 | const char *clk_id, | |
556 | void __iomem *regs, | |
557 | const struct regmap_config *config, | |
558 | struct lock_class_key *lock_key, | |
559 | const char *lock_name); | |
560 | struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, | |
561 | const struct regmap_config *config, | |
562 | struct lock_class_key *lock_key, | |
563 | const char *lock_name); | |
22853223 | 564 | |
3cfe7a74 NB |
565 | /* |
566 | * Wrapper for regmap_init macros to include a unique lockdep key and name | |
567 | * for each call. No-op if CONFIG_LOCKDEP is not set. | |
568 | * | |
569 | * @fn: Real function to call (in the form __[*_]regmap_init[_*]) | |
570 | * @name: Config variable name (#config in the calling macro) | |
571 | **/ | |
572 | #ifdef CONFIG_LOCKDEP | |
573 | #define __regmap_lockdep_wrapper(fn, name, ...) \ | |
574 | ( \ | |
575 | ({ \ | |
576 | static struct lock_class_key _key; \ | |
577 | fn(__VA_ARGS__, &_key, \ | |
578 | KBUILD_BASENAME ":" \ | |
579 | __stringify(__LINE__) ":" \ | |
580 | "(" name ")->lock"); \ | |
581 | }) \ | |
582 | ) | |
583 | #else | |
584 | #define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) | |
585 | #endif | |
586 | ||
1ed81114 | 587 | /** |
2cf8e2df | 588 | * regmap_init() - Initialise register map |
1ed81114 NB |
589 | * |
590 | * @dev: Device that will be interacted with | |
591 | * @bus: Bus-specific callbacks to use with device | |
592 | * @bus_context: Data passed to bus-specific callbacks | |
593 | * @config: Configuration for register map | |
594 | * | |
595 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
596 | * a struct regmap. This function should generally not be called | |
597 | * directly, it should be called by bus-specific init functions. | |
598 | */ | |
3cfe7a74 NB |
599 | #define regmap_init(dev, bus, bus_context, config) \ |
600 | __regmap_lockdep_wrapper(__regmap_init, #config, \ | |
601 | dev, bus, bus_context, config) | |
6cfec04b | 602 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
3cfe7a74 | 603 | const struct regmap_config *config); |
22853223 | 604 | |
1ed81114 | 605 | /** |
2cf8e2df | 606 | * regmap_init_i2c() - Initialise register map |
1ed81114 NB |
607 | * |
608 | * @i2c: Device that will be interacted with | |
609 | * @config: Configuration for register map | |
610 | * | |
611 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
612 | * a struct regmap. | |
613 | */ | |
3cfe7a74 NB |
614 | #define regmap_init_i2c(i2c, config) \ |
615 | __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ | |
616 | i2c, config) | |
1ed81114 NB |
617 | |
618 | /** | |
2cf8e2df | 619 | * regmap_init_spi() - Initialise register map |
1ed81114 | 620 | * |
2cf8e2df | 621 | * @dev: Device that will be interacted with |
1ed81114 NB |
622 | * @config: Configuration for register map |
623 | * | |
624 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
625 | * a struct regmap. | |
626 | */ | |
3cfe7a74 NB |
627 | #define regmap_init_spi(dev, config) \ |
628 | __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ | |
629 | dev, config) | |
1ed81114 NB |
630 | |
631 | /** | |
2cf8e2df CK |
632 | * regmap_init_spmi_base() - Create regmap for the Base register space |
633 | * | |
634 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
635 | * @config: Configuration for register map |
636 | * | |
637 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
638 | * a struct regmap. | |
639 | */ | |
3cfe7a74 NB |
640 | #define regmap_init_spmi_base(dev, config) \ |
641 | __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ | |
642 | dev, config) | |
1ed81114 NB |
643 | |
644 | /** | |
2cf8e2df CK |
645 | * regmap_init_spmi_ext() - Create regmap for Ext register space |
646 | * | |
647 | * @dev: Device that will be interacted with | |
1ed81114 NB |
648 | * @config: Configuration for register map |
649 | * | |
650 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
651 | * a struct regmap. | |
652 | */ | |
3cfe7a74 NB |
653 | #define regmap_init_spmi_ext(dev, config) \ |
654 | __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ | |
655 | dev, config) | |
1ed81114 | 656 | |
cc5d0db3 AM |
657 | /** |
658 | * regmap_init_w1() - Initialise register map | |
659 | * | |
660 | * @w1_dev: Device that will be interacted with | |
661 | * @config: Configuration for register map | |
662 | * | |
663 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
664 | * a struct regmap. | |
665 | */ | |
666 | #define regmap_init_w1(w1_dev, config) \ | |
667 | __regmap_lockdep_wrapper(__regmap_init_w1, #config, \ | |
668 | w1_dev, config) | |
669 | ||
1ed81114 | 670 | /** |
2cf8e2df | 671 | * regmap_init_mmio_clk() - Initialise register map with register clock |
1ed81114 NB |
672 | * |
673 | * @dev: Device that will be interacted with | |
674 | * @clk_id: register clock consumer ID | |
675 | * @regs: Pointer to memory-mapped IO region | |
676 | * @config: Configuration for register map | |
677 | * | |
678 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
679 | * a struct regmap. | |
680 | */ | |
3cfe7a74 NB |
681 | #define regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
682 | __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ | |
683 | dev, clk_id, regs, config) | |
878ec67b PZ |
684 | |
685 | /** | |
2cf8e2df | 686 | * regmap_init_mmio() - Initialise register map |
878ec67b PZ |
687 | * |
688 | * @dev: Device that will be interacted with | |
689 | * @regs: Pointer to memory-mapped IO region | |
690 | * @config: Configuration for register map | |
691 | * | |
692 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
693 | * a struct regmap. | |
694 | */ | |
1ed81114 NB |
695 | #define regmap_init_mmio(dev, regs, config) \ |
696 | regmap_init_mmio_clk(dev, NULL, regs, config) | |
697 | ||
698 | /** | |
2cf8e2df | 699 | * regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
700 | * |
701 | * @ac97: Device that will be interacted with | |
702 | * @config: Configuration for register map | |
703 | * | |
704 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
705 | * a struct regmap. | |
706 | */ | |
3cfe7a74 NB |
707 | #define regmap_init_ac97(ac97, config) \ |
708 | __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ | |
709 | ac97, config) | |
22853223 | 710 | bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); |
878ec67b | 711 | |
1ed81114 | 712 | /** |
2cf8e2df | 713 | * devm_regmap_init() - Initialise managed register map |
1ed81114 NB |
714 | * |
715 | * @dev: Device that will be interacted with | |
716 | * @bus: Bus-specific callbacks to use with device | |
717 | * @bus_context: Data passed to bus-specific callbacks | |
718 | * @config: Configuration for register map | |
719 | * | |
720 | * The return value will be an ERR_PTR() on error or a valid pointer | |
721 | * to a struct regmap. This function should generally not be called | |
722 | * directly, it should be called by bus-specific init functions. The | |
723 | * map will be automatically freed by the device management code. | |
724 | */ | |
3cfe7a74 NB |
725 | #define devm_regmap_init(dev, bus, bus_context, config) \ |
726 | __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ | |
727 | dev, bus, bus_context, config) | |
1ed81114 NB |
728 | |
729 | /** | |
2cf8e2df | 730 | * devm_regmap_init_i2c() - Initialise managed register map |
1ed81114 NB |
731 | * |
732 | * @i2c: Device that will be interacted with | |
733 | * @config: Configuration for register map | |
734 | * | |
735 | * The return value will be an ERR_PTR() on error or a valid pointer | |
736 | * to a struct regmap. The regmap will be automatically freed by the | |
737 | * device management code. | |
738 | */ | |
3cfe7a74 NB |
739 | #define devm_regmap_init_i2c(i2c, config) \ |
740 | __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ | |
741 | i2c, config) | |
1ed81114 NB |
742 | |
743 | /** | |
2cf8e2df | 744 | * devm_regmap_init_spi() - Initialise register map |
1ed81114 | 745 | * |
2cf8e2df | 746 | * @dev: Device that will be interacted with |
1ed81114 NB |
747 | * @config: Configuration for register map |
748 | * | |
749 | * The return value will be an ERR_PTR() on error or a valid pointer | |
750 | * to a struct regmap. The map will be automatically freed by the | |
751 | * device management code. | |
752 | */ | |
3cfe7a74 NB |
753 | #define devm_regmap_init_spi(dev, config) \ |
754 | __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ | |
755 | dev, config) | |
1ed81114 NB |
756 | |
757 | /** | |
2cf8e2df CK |
758 | * devm_regmap_init_spmi_base() - Create managed regmap for Base register space |
759 | * | |
760 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
761 | * @config: Configuration for register map |
762 | * | |
763 | * The return value will be an ERR_PTR() on error or a valid pointer | |
764 | * to a struct regmap. The regmap will be automatically freed by the | |
765 | * device management code. | |
766 | */ | |
3cfe7a74 NB |
767 | #define devm_regmap_init_spmi_base(dev, config) \ |
768 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ | |
769 | dev, config) | |
1ed81114 NB |
770 | |
771 | /** | |
2cf8e2df CK |
772 | * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space |
773 | * | |
774 | * @dev: SPMI device that will be interacted with | |
1ed81114 NB |
775 | * @config: Configuration for register map |
776 | * | |
777 | * The return value will be an ERR_PTR() on error or a valid pointer | |
778 | * to a struct regmap. The regmap will be automatically freed by the | |
779 | * device management code. | |
780 | */ | |
3cfe7a74 NB |
781 | #define devm_regmap_init_spmi_ext(dev, config) \ |
782 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ | |
783 | dev, config) | |
3cfe7a74 | 784 | |
cc5d0db3 AM |
785 | /** |
786 | * devm_regmap_init_w1() - Initialise managed register map | |
787 | * | |
788 | * @w1_dev: Device that will be interacted with | |
789 | * @config: Configuration for register map | |
790 | * | |
791 | * The return value will be an ERR_PTR() on error or a valid pointer | |
792 | * to a struct regmap. The regmap will be automatically freed by the | |
793 | * device management code. | |
794 | */ | |
795 | #define devm_regmap_init_w1(w1_dev, config) \ | |
796 | __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \ | |
797 | w1_dev, config) | |
878ec67b | 798 | /** |
2cf8e2df | 799 | * devm_regmap_init_mmio_clk() - Initialise managed register map with clock |
878ec67b PZ |
800 | * |
801 | * @dev: Device that will be interacted with | |
1ed81114 | 802 | * @clk_id: register clock consumer ID |
878ec67b PZ |
803 | * @regs: Pointer to memory-mapped IO region |
804 | * @config: Configuration for register map | |
805 | * | |
1ed81114 NB |
806 | * The return value will be an ERR_PTR() on error or a valid pointer |
807 | * to a struct regmap. The regmap will be automatically freed by the | |
808 | * device management code. | |
878ec67b | 809 | */ |
1ed81114 NB |
810 | #define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
811 | __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ | |
812 | dev, clk_id, regs, config) | |
878ec67b PZ |
813 | |
814 | /** | |
2cf8e2df | 815 | * devm_regmap_init_mmio() - Initialise managed register map |
878ec67b PZ |
816 | * |
817 | * @dev: Device that will be interacted with | |
818 | * @regs: Pointer to memory-mapped IO region | |
819 | * @config: Configuration for register map | |
820 | * | |
821 | * The return value will be an ERR_PTR() on error or a valid pointer | |
822 | * to a struct regmap. The regmap will be automatically freed by the | |
823 | * device management code. | |
824 | */ | |
3cfe7a74 NB |
825 | #define devm_regmap_init_mmio(dev, regs, config) \ |
826 | devm_regmap_init_mmio_clk(dev, NULL, regs, config) | |
c0eb4676 | 827 | |
1ed81114 | 828 | /** |
2cf8e2df | 829 | * devm_regmap_init_ac97() - Initialise AC'97 register map |
1ed81114 NB |
830 | * |
831 | * @ac97: Device that will be interacted with | |
832 | * @config: Configuration for register map | |
833 | * | |
834 | * The return value will be an ERR_PTR() on error or a valid pointer | |
835 | * to a struct regmap. The regmap will be automatically freed by the | |
836 | * device management code. | |
837 | */ | |
838 | #define devm_regmap_init_ac97(ac97, config) \ | |
839 | __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ | |
840 | ac97, config) | |
c0eb4676 | 841 | |
b83a313b | 842 | void regmap_exit(struct regmap *map); |
bf315173 MB |
843 | int regmap_reinit_cache(struct regmap *map, |
844 | const struct regmap_config *config); | |
72b39f6f | 845 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
8d7d3972 | 846 | struct device *regmap_get_device(struct regmap *map); |
b83a313b | 847 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
915f441b | 848 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); |
b83a313b MB |
849 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
850 | const void *val, size_t val_len); | |
8eaeb219 LD |
851 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
852 | size_t val_count); | |
8019ff6c | 853 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
e33fabd3 | 854 | int num_regs); |
1d5b40bc | 855 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
8019ff6c | 856 | const struct reg_sequence *regs, |
1d5b40bc | 857 | int num_regs); |
0d509f2b MB |
858 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
859 | const void *val, size_t val_len); | |
b83a313b MB |
860 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
861 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
862 | void *val, size_t val_len); | |
863 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
864 | size_t val_count); | |
91d31b9f KM |
865 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
866 | unsigned int mask, unsigned int val, | |
867 | bool *change, bool async, bool force); | |
a6539c32 | 868 | int regmap_get_val_bytes(struct regmap *map); |
668abc72 | 869 | int regmap_get_max_register(struct regmap *map); |
a2f776cb | 870 | int regmap_get_reg_stride(struct regmap *map); |
0d509f2b | 871 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 872 | bool regmap_can_raw_write(struct regmap *map); |
f50c9eb4 MP |
873 | size_t regmap_get_raw_read_max(struct regmap *map); |
874 | size_t regmap_get_raw_write_max(struct regmap *map); | |
b83a313b | 875 | |
39a58439 | 876 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
877 | int regcache_sync_region(struct regmap *map, unsigned int min, |
878 | unsigned int max); | |
697e85bc MB |
879 | int regcache_drop_region(struct regmap *map, unsigned int min, |
880 | unsigned int max); | |
92afb286 | 881 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 882 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 883 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 884 | |
154881e5 MB |
885 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
886 | const struct regmap_access_table *table); | |
887 | ||
8019ff6c | 888 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
22f0d90a | 889 | int num_regs); |
13ff50c8 NC |
890 | int regmap_parse_val(struct regmap *map, const void *buf, |
891 | unsigned int *val); | |
22f0d90a | 892 | |
76aad392 DC |
893 | static inline bool regmap_reg_in_range(unsigned int reg, |
894 | const struct regmap_range *range) | |
895 | { | |
896 | return reg >= range->range_min && reg <= range->range_max; | |
897 | } | |
898 | ||
899 | bool regmap_reg_in_ranges(unsigned int reg, | |
900 | const struct regmap_range *ranges, | |
901 | unsigned int nranges); | |
902 | ||
67252287 | 903 | /** |
2cf8e2df | 904 | * struct reg_field - Description of an register field |
67252287 SK |
905 | * |
906 | * @reg: Offset of the register within the regmap bank | |
907 | * @lsb: lsb of the register field. | |
f27b37f5 | 908 | * @msb: msb of the register field. |
a0102375 KM |
909 | * @id_size: port size if it has some ports |
910 | * @id_offset: address offset for each ports | |
67252287 SK |
911 | */ |
912 | struct reg_field { | |
913 | unsigned int reg; | |
914 | unsigned int lsb; | |
915 | unsigned int msb; | |
a0102375 KM |
916 | unsigned int id_size; |
917 | unsigned int id_offset; | |
67252287 SK |
918 | }; |
919 | ||
920 | #define REG_FIELD(_reg, _lsb, _msb) { \ | |
921 | .reg = _reg, \ | |
922 | .lsb = _lsb, \ | |
923 | .msb = _msb, \ | |
924 | } | |
925 | ||
926 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
927 | struct reg_field reg_field); | |
928 | void regmap_field_free(struct regmap_field *field); | |
929 | ||
930 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
931 | struct regmap *regmap, struct reg_field reg_field); | |
932 | void devm_regmap_field_free(struct device *dev, struct regmap_field *field); | |
933 | ||
934 | int regmap_field_read(struct regmap_field *field, unsigned int *val); | |
28972eaa KM |
935 | int regmap_field_update_bits_base(struct regmap_field *field, |
936 | unsigned int mask, unsigned int val, | |
937 | bool *change, bool async, bool force); | |
a0102375 KM |
938 | int regmap_fields_read(struct regmap_field *field, unsigned int id, |
939 | unsigned int *val); | |
e126edec KM |
940 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
941 | unsigned int mask, unsigned int val, | |
942 | bool *change, bool async, bool force); | |
76aad392 | 943 | |
f8beab2b | 944 | /** |
2cf8e2df | 945 | * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip. |
f8beab2b MB |
946 | * |
947 | * @reg_offset: Offset of the status/mask register within the bank | |
948 | * @mask: Mask used to flag/control the register. | |
7a78479f LD |
949 | * @type_reg_offset: Offset register for the irq type setting. |
950 | * @type_rising_mask: Mask bit to configure RISING type irq. | |
951 | * @type_falling_mask: Mask bit to configure FALLING type irq. | |
f8beab2b MB |
952 | */ |
953 | struct regmap_irq { | |
954 | unsigned int reg_offset; | |
955 | unsigned int mask; | |
7a78479f LD |
956 | unsigned int type_reg_offset; |
957 | unsigned int type_rising_mask; | |
958 | unsigned int type_falling_mask; | |
f8beab2b MB |
959 | }; |
960 | ||
b4fe8ba7 QZ |
961 | #define REGMAP_IRQ_REG(_irq, _off, _mask) \ |
962 | [_irq] = { .reg_offset = (_off), .mask = (_mask) } | |
963 | ||
f8beab2b | 964 | /** |
2cf8e2df | 965 | * struct regmap_irq_chip - Description of a generic regmap irq_chip. |
f8beab2b MB |
966 | * |
967 | * @name: Descriptive name for IRQ controller. | |
968 | * | |
969 | * @status_base: Base status register address. | |
970 | * @mask_base: Base mask register address. | |
a71411db | 971 | * @mask_writeonly: Base mask register is write only. |
7b7d1968 GZ |
972 | * @unmask_base: Base unmask register address. for chips who have |
973 | * separate mask and unmask registers | |
d3233433 AS |
974 | * @ack_base: Base ack address. If zero then the chip is clear on read. |
975 | * Using zero value is possible with @use_ack bit. | |
a43fd50d | 976 | * @wake_base: Base address for wake enables. If zero unsupported. |
7a78479f | 977 | * @type_base: Base address for irq type. If zero unsupported. |
022f926a | 978 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
2753e6f8 | 979 | * @init_ack_masked: Ack all masked interrupts once during initalization. |
68622bdf | 980 | * @mask_invert: Inverted mask register: cleared bits are masked out. |
d3233433 | 981 | * @use_ack: Use @ack register even if it is zero. |
a650fdd9 | 982 | * @ack_invert: Inverted ack register: cleared bits for ack. |
68622bdf | 983 | * @wake_invert: Inverted wake register: cleared bits are wake enabled. |
7a78479f | 984 | * @type_invert: Invert the type flags. |
0c00c50b | 985 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
986 | * |
987 | * @num_regs: Number of registers in each control bank. | |
988 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
989 | * assigned based on the index in the array of the interrupt. | |
990 | * @num_irqs: Number of descriptors. | |
7a78479f LD |
991 | * @num_type_reg: Number of type registers. |
992 | * @type_reg_stride: Stride to use for chips where type registers are not | |
993 | * contiguous. | |
ccc12561 LD |
994 | * @handle_pre_irq: Driver specific callback to handle interrupt from device |
995 | * before regmap_irq_handler process the interrupts. | |
996 | * @handle_post_irq: Driver specific callback to handle interrupt from device | |
997 | * after handling the interrupts in regmap_irq_handler(). | |
998 | * @irq_drv_data: Driver specific IRQ data which is passed as parameter when | |
999 | * driver specific pre/post interrupt handler is called. | |
2cf8e2df CK |
1000 | * |
1001 | * This is not intended to handle every possible interrupt controller, but | |
1002 | * it should handle a substantial proportion of those that are found in the | |
1003 | * wild. | |
f8beab2b MB |
1004 | */ |
1005 | struct regmap_irq_chip { | |
1006 | const char *name; | |
1007 | ||
1008 | unsigned int status_base; | |
1009 | unsigned int mask_base; | |
7b7d1968 | 1010 | unsigned int unmask_base; |
f8beab2b | 1011 | unsigned int ack_base; |
a43fd50d | 1012 | unsigned int wake_base; |
7a78479f | 1013 | unsigned int type_base; |
022f926a | 1014 | unsigned int irq_reg_stride; |
a71411db | 1015 | bool mask_writeonly:1; |
f484f7a6 PZ |
1016 | bool init_ack_masked:1; |
1017 | bool mask_invert:1; | |
d3233433 | 1018 | bool use_ack:1; |
a650fdd9 | 1019 | bool ack_invert:1; |
f484f7a6 PZ |
1020 | bool wake_invert:1; |
1021 | bool runtime_pm:1; | |
7a78479f | 1022 | bool type_invert:1; |
f8beab2b MB |
1023 | |
1024 | int num_regs; | |
1025 | ||
1026 | const struct regmap_irq *irqs; | |
1027 | int num_irqs; | |
7a78479f LD |
1028 | |
1029 | int num_type_reg; | |
1030 | unsigned int type_reg_stride; | |
ccc12561 LD |
1031 | |
1032 | int (*handle_pre_irq)(void *irq_drv_data); | |
1033 | int (*handle_post_irq)(void *irq_drv_data); | |
1034 | void *irq_drv_data; | |
f8beab2b MB |
1035 | }; |
1036 | ||
1037 | struct regmap_irq_chip_data; | |
1038 | ||
1039 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 1040 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b MB |
1041 | struct regmap_irq_chip_data **data); |
1042 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); | |
045b9848 LD |
1043 | |
1044 | int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, | |
1045 | int irq_flags, int irq_base, | |
1046 | const struct regmap_irq_chip *chip, | |
1047 | struct regmap_irq_chip_data **data); | |
1048 | void devm_regmap_del_irq_chip(struct device *dev, int irq, | |
1049 | struct regmap_irq_chip_data *data); | |
1050 | ||
209a6006 | 1051 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 1052 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 1053 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 1054 | |
9cde5fcd MB |
1055 | #else |
1056 | ||
1057 | /* | |
1058 | * These stubs should only ever be called by generic code which has | |
1059 | * regmap based facilities, if they ever get called at runtime | |
1060 | * something is going wrong and something probably needs to select | |
1061 | * REGMAP. | |
1062 | */ | |
1063 | ||
1064 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
1065 | unsigned int val) | |
1066 | { | |
1067 | WARN_ONCE(1, "regmap API is disabled"); | |
1068 | return -EINVAL; | |
1069 | } | |
1070 | ||
915f441b MB |
1071 | static inline int regmap_write_async(struct regmap *map, unsigned int reg, |
1072 | unsigned int val) | |
1073 | { | |
1074 | WARN_ONCE(1, "regmap API is disabled"); | |
1075 | return -EINVAL; | |
1076 | } | |
1077 | ||
9cde5fcd MB |
1078 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, |
1079 | const void *val, size_t val_len) | |
1080 | { | |
1081 | WARN_ONCE(1, "regmap API is disabled"); | |
1082 | return -EINVAL; | |
1083 | } | |
1084 | ||
0d509f2b MB |
1085 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
1086 | const void *val, size_t val_len) | |
1087 | { | |
1088 | WARN_ONCE(1, "regmap API is disabled"); | |
1089 | return -EINVAL; | |
1090 | } | |
1091 | ||
9cde5fcd MB |
1092 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
1093 | const void *val, size_t val_count) | |
1094 | { | |
1095 | WARN_ONCE(1, "regmap API is disabled"); | |
1096 | return -EINVAL; | |
1097 | } | |
1098 | ||
1099 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
1100 | unsigned int *val) | |
1101 | { | |
1102 | WARN_ONCE(1, "regmap API is disabled"); | |
1103 | return -EINVAL; | |
1104 | } | |
1105 | ||
1106 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
1107 | void *val, size_t val_len) | |
1108 | { | |
1109 | WARN_ONCE(1, "regmap API is disabled"); | |
1110 | return -EINVAL; | |
1111 | } | |
1112 | ||
1113 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, | |
1114 | void *val, size_t val_count) | |
1115 | { | |
1116 | WARN_ONCE(1, "regmap API is disabled"); | |
1117 | return -EINVAL; | |
1118 | } | |
1119 | ||
91d31b9f KM |
1120 | static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
1121 | unsigned int mask, unsigned int val, | |
1122 | bool *change, bool async, bool force) | |
fd4b7286 KM |
1123 | { |
1124 | WARN_ONCE(1, "regmap API is disabled"); | |
1125 | return -EINVAL; | |
1126 | } | |
1127 | ||
28972eaa KM |
1128 | static inline int regmap_field_update_bits_base(struct regmap_field *field, |
1129 | unsigned int mask, unsigned int val, | |
1130 | bool *change, bool async, bool force) | |
915f441b MB |
1131 | { |
1132 | WARN_ONCE(1, "regmap API is disabled"); | |
1133 | return -EINVAL; | |
1134 | } | |
1135 | ||
e126edec KM |
1136 | static inline int regmap_fields_update_bits_base(struct regmap_field *field, |
1137 | unsigned int id, | |
1138 | unsigned int mask, unsigned int val, | |
1139 | bool *change, bool async, bool force) | |
915f441b MB |
1140 | { |
1141 | WARN_ONCE(1, "regmap API is disabled"); | |
1142 | return -EINVAL; | |
1143 | } | |
1144 | ||
9cde5fcd MB |
1145 | static inline int regmap_get_val_bytes(struct regmap *map) |
1146 | { | |
1147 | WARN_ONCE(1, "regmap API is disabled"); | |
1148 | return -EINVAL; | |
1149 | } | |
1150 | ||
668abc72 SK |
1151 | static inline int regmap_get_max_register(struct regmap *map) |
1152 | { | |
1153 | WARN_ONCE(1, "regmap API is disabled"); | |
1154 | return -EINVAL; | |
1155 | } | |
1156 | ||
a2f776cb SK |
1157 | static inline int regmap_get_reg_stride(struct regmap *map) |
1158 | { | |
1159 | WARN_ONCE(1, "regmap API is disabled"); | |
1160 | return -EINVAL; | |
1161 | } | |
1162 | ||
9cde5fcd MB |
1163 | static inline int regcache_sync(struct regmap *map) |
1164 | { | |
1165 | WARN_ONCE(1, "regmap API is disabled"); | |
1166 | return -EINVAL; | |
1167 | } | |
1168 | ||
a313f9f5 MB |
1169 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
1170 | unsigned int max) | |
1171 | { | |
1172 | WARN_ONCE(1, "regmap API is disabled"); | |
1173 | return -EINVAL; | |
1174 | } | |
1175 | ||
697e85bc MB |
1176 | static inline int regcache_drop_region(struct regmap *map, unsigned int min, |
1177 | unsigned int max) | |
1178 | { | |
1179 | WARN_ONCE(1, "regmap API is disabled"); | |
1180 | return -EINVAL; | |
1181 | } | |
1182 | ||
9cde5fcd MB |
1183 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
1184 | { | |
1185 | WARN_ONCE(1, "regmap API is disabled"); | |
1186 | } | |
1187 | ||
1188 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
1189 | { | |
1190 | WARN_ONCE(1, "regmap API is disabled"); | |
1191 | } | |
1192 | ||
1193 | static inline void regcache_mark_dirty(struct regmap *map) | |
1194 | { | |
1195 | WARN_ONCE(1, "regmap API is disabled"); | |
1196 | } | |
1197 | ||
0d509f2b MB |
1198 | static inline void regmap_async_complete(struct regmap *map) |
1199 | { | |
1200 | WARN_ONCE(1, "regmap API is disabled"); | |
1201 | } | |
1202 | ||
9cde5fcd | 1203 | static inline int regmap_register_patch(struct regmap *map, |
a6baa3de | 1204 | const struct reg_sequence *regs, |
9cde5fcd MB |
1205 | int num_regs) |
1206 | { | |
1207 | WARN_ONCE(1, "regmap API is disabled"); | |
1208 | return -EINVAL; | |
1209 | } | |
1210 | ||
13ff50c8 NC |
1211 | static inline int regmap_parse_val(struct regmap *map, const void *buf, |
1212 | unsigned int *val) | |
1213 | { | |
1214 | WARN_ONCE(1, "regmap API is disabled"); | |
1215 | return -EINVAL; | |
1216 | } | |
1217 | ||
72b39f6f MB |
1218 | static inline struct regmap *dev_get_regmap(struct device *dev, |
1219 | const char *name) | |
1220 | { | |
72b39f6f MB |
1221 | return NULL; |
1222 | } | |
1223 | ||
8d7d3972 TT |
1224 | static inline struct device *regmap_get_device(struct regmap *map) |
1225 | { | |
1226 | WARN_ONCE(1, "regmap API is disabled"); | |
1d33dc6b | 1227 | return NULL; |
8d7d3972 TT |
1228 | } |
1229 | ||
9cde5fcd MB |
1230 | #endif |
1231 | ||
b83a313b | 1232 | #endif |