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e8db0be1 JP |
1 | #ifndef _LINUX_PM_QOS_H |
2 | #define _LINUX_PM_QOS_H | |
d82b3518 MG |
3 | /* interface for the pm_qos_power infrastructure of the linux kernel. |
4 | * | |
bf1db69f | 5 | * Mark Gross <mgross@linux.intel.com> |
d82b3518 | 6 | */ |
82f68251 | 7 | #include <linux/plist.h> |
d82b3518 MG |
8 | #include <linux/notifier.h> |
9 | #include <linux/miscdevice.h> | |
1a9a9152 | 10 | #include <linux/device.h> |
d82b3518 | 11 | |
d031e1de AF |
12 | enum { |
13 | PM_QOS_RESERVED = 0, | |
14 | PM_QOS_CPU_DMA_LATENCY, | |
15 | PM_QOS_NETWORK_LATENCY, | |
16 | PM_QOS_NETWORK_THROUGHPUT, | |
17 | ||
18 | /* insert new class ID */ | |
19 | PM_QOS_NUM_CLASSES, | |
20 | }; | |
d82b3518 | 21 | |
d82b3518 MG |
22 | #define PM_QOS_DEFAULT_VALUE -1 |
23 | ||
333c5ae9 TC |
24 | #define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) |
25 | #define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC) | |
26 | #define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0 | |
91ff4cb8 | 27 | #define PM_QOS_DEV_LAT_DEFAULT_VALUE 0 |
333c5ae9 | 28 | |
cc749986 JP |
29 | struct pm_qos_request { |
30 | struct plist_node node; | |
82f68251 JB |
31 | int pm_qos_class; |
32 | }; | |
d82b3518 | 33 | |
91ff4cb8 JP |
34 | struct dev_pm_qos_request { |
35 | struct plist_node node; | |
36 | struct device *dev; | |
37 | }; | |
38 | ||
4e1779ba JP |
39 | enum pm_qos_type { |
40 | PM_QOS_UNITIALIZED, | |
41 | PM_QOS_MAX, /* return the largest value */ | |
42 | PM_QOS_MIN /* return the smallest value */ | |
43 | }; | |
44 | ||
45 | /* | |
46 | * Note: The lockless read path depends on the CPU accessing | |
47 | * target_value atomically. Atomic access is only guaranteed on all CPU | |
48 | * types linux supports for 32 bit quantites | |
49 | */ | |
50 | struct pm_qos_constraints { | |
51 | struct plist_head list; | |
52 | s32 target_value; /* Do not change to 64 bit */ | |
53 | s32 default_value; | |
54 | enum pm_qos_type type; | |
55 | struct blocking_notifier_head *notifiers; | |
56 | }; | |
57 | ||
abe98ec2 JP |
58 | /* Action requested to pm_qos_update_target */ |
59 | enum pm_qos_req_action { | |
60 | PM_QOS_ADD_REQ, /* Add a new request */ | |
61 | PM_QOS_UPDATE_REQ, /* Update an existing request */ | |
62 | PM_QOS_REMOVE_REQ /* Remove an existing request */ | |
63 | }; | |
64 | ||
91ff4cb8 JP |
65 | static inline int dev_pm_qos_request_active(struct dev_pm_qos_request *req) |
66 | { | |
67 | return req->dev != 0; | |
68 | } | |
69 | ||
e8db0be1 | 70 | #ifdef CONFIG_PM |
abe98ec2 JP |
71 | int pm_qos_update_target(struct pm_qos_constraints *c, struct plist_node *node, |
72 | enum pm_qos_req_action action, int value); | |
cc749986 JP |
73 | void pm_qos_add_request(struct pm_qos_request *req, int pm_qos_class, |
74 | s32 value); | |
75 | void pm_qos_update_request(struct pm_qos_request *req, | |
e8db0be1 | 76 | s32 new_value); |
cc749986 | 77 | void pm_qos_remove_request(struct pm_qos_request *req); |
d82b3518 | 78 | |
ed77134b MG |
79 | int pm_qos_request(int pm_qos_class); |
80 | int pm_qos_add_notifier(int pm_qos_class, struct notifier_block *notifier); | |
81 | int pm_qos_remove_notifier(int pm_qos_class, struct notifier_block *notifier); | |
cc749986 | 82 | int pm_qos_request_active(struct pm_qos_request *req); |
b66213cd | 83 | s32 pm_qos_read_value(struct pm_qos_constraints *c); |
91ff4cb8 | 84 | |
00dc9ad1 | 85 | s32 __dev_pm_qos_read_value(struct device *dev); |
1a9a9152 | 86 | s32 dev_pm_qos_read_value(struct device *dev); |
91ff4cb8 JP |
87 | int dev_pm_qos_add_request(struct device *dev, struct dev_pm_qos_request *req, |
88 | s32 value); | |
89 | int dev_pm_qos_update_request(struct dev_pm_qos_request *req, s32 new_value); | |
90 | int dev_pm_qos_remove_request(struct dev_pm_qos_request *req); | |
91 | int dev_pm_qos_add_notifier(struct device *dev, | |
92 | struct notifier_block *notifier); | |
93 | int dev_pm_qos_remove_notifier(struct device *dev, | |
94 | struct notifier_block *notifier); | |
b66213cd JP |
95 | int dev_pm_qos_add_global_notifier(struct notifier_block *notifier); |
96 | int dev_pm_qos_remove_global_notifier(struct notifier_block *notifier); | |
91ff4cb8 JP |
97 | void dev_pm_qos_constraints_init(struct device *dev); |
98 | void dev_pm_qos_constraints_destroy(struct device *dev); | |
40a5f8be RW |
99 | int dev_pm_qos_add_ancestor_request(struct device *dev, |
100 | struct dev_pm_qos_request *req, s32 value); | |
e8db0be1 | 101 | #else |
abe98ec2 JP |
102 | static inline int pm_qos_update_target(struct pm_qos_constraints *c, |
103 | struct plist_node *node, | |
104 | enum pm_qos_req_action action, | |
105 | int value) | |
106 | { return 0; } | |
cc749986 | 107 | static inline void pm_qos_add_request(struct pm_qos_request *req, |
e8db0be1 JP |
108 | int pm_qos_class, s32 value) |
109 | { return; } | |
cc749986 | 110 | static inline void pm_qos_update_request(struct pm_qos_request *req, |
e8db0be1 JP |
111 | s32 new_value) |
112 | { return; } | |
cc749986 | 113 | static inline void pm_qos_remove_request(struct pm_qos_request *req) |
e8db0be1 JP |
114 | { return; } |
115 | ||
116 | static inline int pm_qos_request(int pm_qos_class) | |
d020283d VP |
117 | { |
118 | switch (pm_qos_class) { | |
119 | case PM_QOS_CPU_DMA_LATENCY: | |
120 | return PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; | |
121 | case PM_QOS_NETWORK_LATENCY: | |
122 | return PM_QOS_NETWORK_LAT_DEFAULT_VALUE; | |
123 | case PM_QOS_NETWORK_THROUGHPUT: | |
124 | return PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE; | |
125 | default: | |
126 | return PM_QOS_DEFAULT_VALUE; | |
127 | } | |
128 | } | |
129 | ||
e8db0be1 JP |
130 | static inline int pm_qos_add_notifier(int pm_qos_class, |
131 | struct notifier_block *notifier) | |
132 | { return 0; } | |
133 | static inline int pm_qos_remove_notifier(int pm_qos_class, | |
134 | struct notifier_block *notifier) | |
135 | { return 0; } | |
cc749986 | 136 | static inline int pm_qos_request_active(struct pm_qos_request *req) |
e8db0be1 | 137 | { return 0; } |
b66213cd JP |
138 | static inline s32 pm_qos_read_value(struct pm_qos_constraints *c) |
139 | { return 0; } | |
91ff4cb8 | 140 | |
00dc9ad1 RW |
141 | static inline s32 __dev_pm_qos_read_value(struct device *dev) |
142 | { return 0; } | |
1a9a9152 RW |
143 | static inline s32 dev_pm_qos_read_value(struct device *dev) |
144 | { return 0; } | |
91ff4cb8 JP |
145 | static inline int dev_pm_qos_add_request(struct device *dev, |
146 | struct dev_pm_qos_request *req, | |
147 | s32 value) | |
148 | { return 0; } | |
149 | static inline int dev_pm_qos_update_request(struct dev_pm_qos_request *req, | |
150 | s32 new_value) | |
151 | { return 0; } | |
152 | static inline int dev_pm_qos_remove_request(struct dev_pm_qos_request *req) | |
153 | { return 0; } | |
154 | static inline int dev_pm_qos_add_notifier(struct device *dev, | |
155 | struct notifier_block *notifier) | |
156 | { return 0; } | |
157 | static inline int dev_pm_qos_remove_notifier(struct device *dev, | |
158 | struct notifier_block *notifier) | |
159 | { return 0; } | |
b66213cd JP |
160 | static inline int dev_pm_qos_add_global_notifier( |
161 | struct notifier_block *notifier) | |
162 | { return 0; } | |
163 | static inline int dev_pm_qos_remove_global_notifier( | |
164 | struct notifier_block *notifier) | |
165 | { return 0; } | |
91ff4cb8 | 166 | static inline void dev_pm_qos_constraints_init(struct device *dev) |
1a9a9152 RW |
167 | { |
168 | dev->power.power_state = PMSG_ON; | |
169 | } | |
91ff4cb8 | 170 | static inline void dev_pm_qos_constraints_destroy(struct device *dev) |
1a9a9152 RW |
171 | { |
172 | dev->power.power_state = PMSG_INVALID; | |
173 | } | |
40a5f8be RW |
174 | static inline int dev_pm_qos_add_ancestor_request(struct device *dev, |
175 | struct dev_pm_qos_request *req, s32 value) | |
176 | { return 0; } | |
e8db0be1 | 177 | #endif |
d82b3518 | 178 | |
82f68251 | 179 | #endif |