projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| caab277b | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 40fc3bb5 JH |
2 | /* |
| 3 | * DMTIMER platform data for TI OMAP platforms | |
| 4 | * | |
| 5 | * Copyright (C) 2012 Texas Instruments | |
| 6 | * Author: Jon Hunter <jon-hunter@ti.com> | |
| 40fc3bb5 JH |
7 | */ |
| 8 | ||
| 9 | #ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__ | |
| 10 | #define __PLATFORM_DATA_DMTIMER_OMAP_H__ | |
| 11 | ||
| a7f249e3 K |
12 | struct omap_dm_timer_ops { |
| 13 | struct omap_dm_timer *(*request_by_node)(struct device_node *np); | |
| 14 | struct omap_dm_timer *(*request_specific)(int timer_id); | |
| 15 | struct omap_dm_timer *(*request)(void); | |
| 16 | ||
| 17 | int (*free)(struct omap_dm_timer *timer); | |
| 18 | ||
| 19 | void (*enable)(struct omap_dm_timer *timer); | |
| 20 | void (*disable)(struct omap_dm_timer *timer); | |
| 21 | ||
| 22 | int (*get_irq)(struct omap_dm_timer *timer); | |
| 23 | int (*set_int_enable)(struct omap_dm_timer *timer, | |
| 24 | unsigned int value); | |
| 25 | int (*set_int_disable)(struct omap_dm_timer *timer, u32 mask); | |
| 26 | ||
| 27 | struct clk *(*get_fclk)(struct omap_dm_timer *timer); | |
| 28 | ||
| 29 | int (*start)(struct omap_dm_timer *timer); | |
| 30 | int (*stop)(struct omap_dm_timer *timer); | |
| 31 | int (*set_source)(struct omap_dm_timer *timer, int source); | |
| 32 | ||
| 02e6d546 | 33 | int (*set_load)(struct omap_dm_timer *timer, unsigned int value); |
| a7f249e3 K |
34 | int (*set_match)(struct omap_dm_timer *timer, int enable, |
| 35 | unsigned int match); | |
| 36 | int (*set_pwm)(struct omap_dm_timer *timer, int def_on, | |
| 02e6d546 | 37 | int toggle, int trigger, int autoreload); |
| 92fd8686 | 38 | int (*get_pwm_status)(struct omap_dm_timer *timer); |
| a7f249e3 K |
39 | int (*set_prescaler)(struct omap_dm_timer *timer, int prescaler); |
| 40 | ||
| 41 | unsigned int (*read_counter)(struct omap_dm_timer *timer); | |
| 42 | int (*write_counter)(struct omap_dm_timer *timer, | |
| 43 | unsigned int value); | |
| 44 | unsigned int (*read_status)(struct omap_dm_timer *timer); | |
| 45 | int (*write_status)(struct omap_dm_timer *timer, | |
| 46 | unsigned int value); | |
| 47 | }; | |
| 48 | ||
| 40fc3bb5 JH |
49 | struct dmtimer_platform_data { |
| 50 | /* set_timer_src - Only used for OMAP1 devices */ | |
| 51 | int (*set_timer_src)(struct platform_device *pdev, int source); | |
| 52 | u32 timer_capability; | |
| 53 | u32 timer_errata; | |
| 54 | int (*get_context_loss_count)(struct device *); | |
| a7f249e3 | 55 | const struct omap_dm_timer_ops *timer_ops; |
| 40fc3bb5 JH |
56 | }; |
| 57 | ||
| 58 | #endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */ |