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fee10bd2 NSR |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * ARM PL353 SMC Driver Header | |
4 | * | |
5 | * Copyright (C) 2012 - 2018 Xilinx, Inc | |
6 | */ | |
7 | ||
8 | #ifndef __LINUX_PL353_SMC_H | |
9 | #define __LINUX_PL353_SMC_H | |
10 | ||
11 | enum pl353_smc_ecc_mode { | |
12 | PL353_SMC_ECCMODE_BYPASS = 0, | |
13 | PL353_SMC_ECCMODE_APB = 1, | |
14 | PL353_SMC_ECCMODE_MEM = 2 | |
15 | }; | |
16 | ||
17 | enum pl353_smc_mem_width { | |
18 | PL353_SMC_MEM_WIDTH_8 = 0, | |
19 | PL353_SMC_MEM_WIDTH_16 = 1 | |
20 | }; | |
21 | ||
22 | u32 pl353_smc_get_ecc_val(int ecc_reg); | |
23 | bool pl353_smc_ecc_is_busy(void); | |
24 | int pl353_smc_get_nand_int_status_raw(void); | |
25 | void pl353_smc_clr_nand_int(void); | |
26 | int pl353_smc_set_ecc_mode(enum pl353_smc_ecc_mode mode); | |
27 | int pl353_smc_set_ecc_pg_size(unsigned int pg_sz); | |
28 | int pl353_smc_set_buswidth(unsigned int bw); | |
29 | void pl353_smc_set_cycles(u32 timings[]); | |
30 | #endif |