Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Interface the pinctrl subsystem | |
3 | * | |
4 | * Copyright (C) 2011 ST-Ericsson SA | |
5 | * Written on behalf of Linaro for ST-Ericsson | |
6 | * This interface is used in the core to keep track of pins. | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
10 | * License terms: GNU General Public License (GPL) version 2 | |
11 | */ | |
12 | #ifndef __LINUX_PINCTRL_PINCTRL_H | |
13 | #define __LINUX_PINCTRL_PINCTRL_H | |
14 | ||
15 | #ifdef CONFIG_PINCTRL | |
16 | ||
17 | #include <linux/radix-tree.h> | |
18 | #include <linux/spinlock.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/seq_file.h> | |
21 | ||
22 | struct pinctrl_dev; | |
23 | struct pinmux_ops; | |
24 | struct gpio_chip; | |
25 | ||
26 | /** | |
27 | * struct pinctrl_pin_desc - boards/machines provide information on their | |
28 | * pins, pads or other muxable units in this struct | |
29 | * @number: unique pin number from the global pin number space | |
30 | * @name: a name for this pin | |
31 | */ | |
32 | struct pinctrl_pin_desc { | |
33 | unsigned number; | |
34 | const char *name; | |
35 | }; | |
36 | ||
37 | /* Convenience macro to define a single named or anonymous pin descriptor */ | |
38 | #define PINCTRL_PIN(a, b) { .number = a, .name = b } | |
39 | #define PINCTRL_PIN_ANON(a) { .number = a } | |
40 | ||
41 | /** | |
42 | * struct pinctrl_gpio_range - each pin controller can provide subranges of | |
43 | * the GPIO number space to be handled by the controller | |
44 | * @node: list node for internal use | |
45 | * @name: a name for the chip in this range | |
46 | * @id: an ID number for the chip in this range | |
47 | * @base: base offset of the GPIO range | |
48 | * @npins: number of pins in the GPIO range, including the base number | |
49 | * @gc: an optional pointer to a gpio_chip | |
50 | */ | |
51 | struct pinctrl_gpio_range { | |
52 | struct list_head node; | |
53 | const char *name; | |
54 | unsigned int id; | |
55 | unsigned int base; | |
56 | unsigned int npins; | |
57 | struct gpio_chip *gc; | |
58 | }; | |
59 | ||
60 | /** | |
61 | * struct pinctrl_ops - global pin control operations, to be implemented by | |
62 | * pin controller drivers. | |
63 | * @list_groups: list the number of selectable named groups available | |
64 | * in this pinmux driver, the core will begin on 0 and call this | |
65 | * repeatedly as long as it returns >= 0 to enumerate the groups | |
66 | * @get_group_name: return the group name of the pin group | |
67 | * @get_group_pins: return an array of pins corresponding to a certain | |
68 | * group selector @pins, and the size of the array in @num_pins | |
69 | * @pin_dbg_show: optional debugfs display hook that will provide per-device | |
70 | * info for a certain pin in debugfs | |
71 | */ | |
72 | struct pinctrl_ops { | |
73 | int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector); | |
74 | const char *(*get_group_name) (struct pinctrl_dev *pctldev, | |
75 | unsigned selector); | |
76 | int (*get_group_pins) (struct pinctrl_dev *pctldev, | |
77 | unsigned selector, | |
a5818a8b SW |
78 | const unsigned **pins, |
79 | unsigned *num_pins); | |
2744e8af LW |
80 | void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, |
81 | unsigned offset); | |
82 | }; | |
83 | ||
84 | /** | |
85 | * struct pinctrl_desc - pin controller descriptor, register this to pin | |
86 | * control subsystem | |
87 | * @name: name for the pin controller | |
88 | * @pins: an array of pin descriptors describing all the pins handled by | |
89 | * this pin controller | |
90 | * @npins: number of descriptors in the array, usually just ARRAY_SIZE() | |
91 | * of the pins field above | |
92 | * @maxpin: since pin spaces may be sparse, there can he "holes" in the | |
93 | * pin range, this attribute gives the maximum pin number in the | |
94 | * total range. This should not be lower than npins for example, | |
95 | * but may be equal to npins if you have no holes in the pin range. | |
96 | * @pctlops: pin control operation vtable, to support global concepts like | |
97 | * grouping of pins, this is optional. | |
98 | * @pmxops: pinmux operation vtable, if you support pinmuxing in your driver | |
99 | * @owner: module providing the pin controller, used for refcounting | |
100 | */ | |
101 | struct pinctrl_desc { | |
102 | const char *name; | |
103 | struct pinctrl_pin_desc const *pins; | |
104 | unsigned int npins; | |
105 | unsigned int maxpin; | |
106 | struct pinctrl_ops *pctlops; | |
107 | struct pinmux_ops *pmxops; | |
108 | struct module *owner; | |
109 | }; | |
110 | ||
111 | /* External interface to pin controller */ | |
112 | extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
113 | struct device *dev, void *driver_data); | |
114 | extern void pinctrl_unregister(struct pinctrl_dev *pctldev); | |
115 | extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin); | |
116 | extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
117 | struct pinctrl_gpio_range *range); | |
118 | extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
119 | struct pinctrl_gpio_range *range); | |
120 | extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); | |
121 | extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); | |
122 | #else | |
123 | ||
e0e20753 | 124 | struct pinctrl_dev; |
2744e8af LW |
125 | |
126 | /* Sufficiently stupid default function when pinctrl is not in use */ | |
127 | static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
128 | { | |
129 | return pin >= 0; | |
130 | } | |
131 | ||
132 | #endif /* !CONFIG_PINCTRL */ | |
133 | ||
134 | #endif /* __LINUX_PINCTRL_PINCTRL_H */ |