tipc: fix a potental access after delete in tipc_sk_join()
[linux-block.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
bac83c65 22#include <linux/mdio.h>
13df29f6 23#include <linux/mii.h>
3e3aaf64 24#include <linux/module.h>
13df29f6
MR
25#include <linux/timer.h>
26#include <linux/workqueue.h>
8626d3b4 27#include <linux/mod_devicetable.h>
00db8189 28
60063497 29#include <linux/atomic.h>
0ac49527 30
e9fbdf17 31#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
32 SUPPORTED_TP | \
33 SUPPORTED_MII)
34
e9fbdf17
FF
35#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
36 SUPPORTED_10baseT_Full)
37
38#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
39 SUPPORTED_100baseT_Full)
40
41#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
42 SUPPORTED_1000baseT_Full)
43
e9fbdf17
FF
44#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
45 PHY_100BT_FEATURES | \
46 PHY_DEFAULT_FEATURES)
47
48#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
49 PHY_1000BT_FEATURES)
50
51
c5e38a94
AF
52/*
53 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
AF
54 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
55 * the attached driver handles the interrupt
56 */
57#define PHY_POLL -1
58#define PHY_IGNORE_INTERRUPT -2
59
60#define PHY_HAS_INTERRUPT 0x00000001
1b86f702 61#define PHY_IS_INTERNAL 0x00000002
a9668491 62#define PHY_RST_AFTER_CLK_EN 0x00000004
a9049e0c 63#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 64
e8a2b6a4
AF
65/* Interface Mode definitions */
66typedef enum {
4157ef1b 67 PHY_INTERFACE_MODE_NA,
735d8a18 68 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
AF
69 PHY_INTERFACE_MODE_MII,
70 PHY_INTERFACE_MODE_GMII,
71 PHY_INTERFACE_MODE_SGMII,
72 PHY_INTERFACE_MODE_TBI,
2cc70ba4 73 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
74 PHY_INTERFACE_MODE_RMII,
75 PHY_INTERFACE_MODE_RGMII,
a999589c 76 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
77 PHY_INTERFACE_MODE_RGMII_RXID,
78 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
79 PHY_INTERFACE_MODE_RTBI,
80 PHY_INTERFACE_MODE_SMII,
898dd0bd 81 PHY_INTERFACE_MODE_XGMII,
fd70f72c 82 PHY_INTERFACE_MODE_MOCA,
b9d12085 83 PHY_INTERFACE_MODE_QSGMII,
572de608 84 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
85 PHY_INTERFACE_MODE_1000BASEX,
86 PHY_INTERFACE_MODE_2500BASEX,
87 PHY_INTERFACE_MODE_RXAUI,
c125ca09
RK
88 PHY_INTERFACE_MODE_XAUI,
89 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
90 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 91 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
92} phy_interface_t;
93
1f9127ca
ZB
94/**
95 * phy_supported_speeds - return all speeds currently supported by a phy device
96 * @phy: The phy device to return supported speeds of.
97 * @speeds: buffer to store supported speeds in.
98 * @size: size of speeds buffer.
99 *
100 * Description: Returns the number of supported speeds, and
101 * fills the speeds * buffer with the supported speeds. If speeds buffer is
102 * too small to contain * all currently supported speeds, will return as
103 * many speeds as can fit.
104 */
105unsigned int phy_supported_speeds(struct phy_device *phy,
106 unsigned int *speeds,
107 unsigned int size);
108
8a2fe56e
FF
109/**
110 * It maps 'enum phy_interface_t' found in include/linux/phy.h
111 * into the device tree binding of 'phy-mode', so that Ethernet
112 * device driver can get phy interface from device tree.
113 */
114static inline const char *phy_modes(phy_interface_t interface)
115{
116 switch (interface) {
117 case PHY_INTERFACE_MODE_NA:
118 return "";
735d8a18
FF
119 case PHY_INTERFACE_MODE_INTERNAL:
120 return "internal";
8a2fe56e
FF
121 case PHY_INTERFACE_MODE_MII:
122 return "mii";
123 case PHY_INTERFACE_MODE_GMII:
124 return "gmii";
125 case PHY_INTERFACE_MODE_SGMII:
126 return "sgmii";
127 case PHY_INTERFACE_MODE_TBI:
128 return "tbi";
129 case PHY_INTERFACE_MODE_REVMII:
130 return "rev-mii";
131 case PHY_INTERFACE_MODE_RMII:
132 return "rmii";
133 case PHY_INTERFACE_MODE_RGMII:
134 return "rgmii";
135 case PHY_INTERFACE_MODE_RGMII_ID:
136 return "rgmii-id";
137 case PHY_INTERFACE_MODE_RGMII_RXID:
138 return "rgmii-rxid";
139 case PHY_INTERFACE_MODE_RGMII_TXID:
140 return "rgmii-txid";
141 case PHY_INTERFACE_MODE_RTBI:
142 return "rtbi";
143 case PHY_INTERFACE_MODE_SMII:
144 return "smii";
145 case PHY_INTERFACE_MODE_XGMII:
146 return "xgmii";
fd70f72c
FF
147 case PHY_INTERFACE_MODE_MOCA:
148 return "moca";
b9d12085
TP
149 case PHY_INTERFACE_MODE_QSGMII:
150 return "qsgmii";
572de608
SW
151 case PHY_INTERFACE_MODE_TRGMII:
152 return "trgmii";
55601a88
AL
153 case PHY_INTERFACE_MODE_1000BASEX:
154 return "1000base-x";
155 case PHY_INTERFACE_MODE_2500BASEX:
156 return "2500base-x";
157 case PHY_INTERFACE_MODE_RXAUI:
158 return "rxaui";
c125ca09
RK
159 case PHY_INTERFACE_MODE_XAUI:
160 return "xaui";
161 case PHY_INTERFACE_MODE_10GKR:
162 return "10gbase-kr";
8a2fe56e
FF
163 default:
164 return "unknown";
165 }
166}
167
00db8189 168
e8a2b6a4 169#define PHY_INIT_TIMEOUT 100000
00db8189
AF
170#define PHY_STATE_TIME 1
171#define PHY_FORCE_TIMEOUT 10
172#define PHY_AN_TIMEOUT 10
173
e8a2b6a4 174#define PHY_MAX_ADDR 32
00db8189 175
a4d00f17 176/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
9d9326d3
AF
177#define PHY_ID_FMT "%s:%02x"
178
4567d686 179#define MII_BUS_ID_SIZE 61
a4d00f17 180
abf35df2
JG
181/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
182 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
183#define MII_ADDR_C45 (1<<30)
184
313162d0 185struct device;
9525ae83 186struct phylink;
313162d0
PG
187struct sk_buff;
188
c5e38a94
AF
189/*
190 * The Bus class for PHYs. Devices which provide access to
191 * PHYs should register using this structure
192 */
00db8189 193struct mii_bus {
3e3aaf64 194 struct module *owner;
00db8189 195 const char *name;
9d9326d3 196 char id[MII_BUS_ID_SIZE];
00db8189 197 void *priv;
ccaa953e
AL
198 int (*read)(struct mii_bus *bus, int addr, int regnum);
199 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
00db8189
AF
200 int (*reset)(struct mii_bus *bus);
201
c5e38a94
AF
202 /*
203 * A lock to ensure that only one thing can read/write
204 * the MDIO bus at a time
205 */
35b5f6b1 206 struct mutex mdio_lock;
00db8189 207
18ee49dd 208 struct device *parent;
46abc021
LB
209 enum {
210 MDIOBUS_ALLOCATED = 1,
211 MDIOBUS_REGISTERED,
212 MDIOBUS_UNREGISTERED,
213 MDIOBUS_RELEASED,
214 } state;
215 struct device dev;
00db8189
AF
216
217 /* list of all PHYs on bus */
7f854420 218 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 219
c6883996 220 /* PHY addresses to be ignored when probing */
f896424c
MP
221 u32 phy_mask;
222
922f2dd1
FF
223 /* PHY addresses to ignore the TA/read failure */
224 u32 phy_ignore_ta_mask;
225
c5e38a94 226 /*
e7f4dc35
AL
227 * An array of interrupts, each PHY's interrupt at the index
228 * matching its address
c5e38a94 229 */
e7f4dc35 230 int irq[PHY_MAX_ADDR];
69226896
RQ
231
232 /* GPIO reset pulse width in microseconds */
233 int reset_delay_us;
d396e84c
SS
234 /* RESET GPIO descriptor pointer */
235 struct gpio_desc *reset_gpiod;
00db8189 236};
46abc021 237#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 238
eb8a54a7
TT
239struct mii_bus *mdiobus_alloc_size(size_t);
240static inline struct mii_bus *mdiobus_alloc(void)
241{
242 return mdiobus_alloc_size(0);
243}
244
3e3aaf64
RK
245int __mdiobus_register(struct mii_bus *bus, struct module *owner);
246#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
247void mdiobus_unregister(struct mii_bus *bus);
248void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
249struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
250static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
251{
252 return devm_mdiobus_alloc_size(dev, 0);
253}
254
255void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 256struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 257
e8a2b6a4
AF
258#define PHY_INTERRUPT_DISABLED 0x0
259#define PHY_INTERRUPT_ENABLED 0x80000000
00db8189
AF
260
261/* PHY state machine states:
262 *
263 * DOWN: PHY device and driver are not ready for anything. probe
264 * should be called if and only if the PHY is in this state,
265 * given that the PHY device exists.
266 * - PHY driver probe function will, depending on the PHY, set
267 * the state to STARTING or READY
268 *
269 * STARTING: PHY device is coming up, and the ethernet driver is
270 * not ready. PHY drivers may set this in the probe function.
271 * If they do, they are responsible for making sure the state is
272 * eventually set to indicate whether the PHY is UP or READY,
273 * depending on the state when the PHY is done starting up.
274 * - PHY driver will set the state to READY
275 * - start will set the state to PENDING
276 *
277 * READY: PHY is ready to send and receive packets, but the
278 * controller is not. By default, PHYs which do not implement
279 * probe will be set to this state by phy_probe(). If the PHY
280 * driver knows the PHY is ready, and the PHY state is STARTING,
281 * then it sets this STATE.
282 * - start will set the state to UP
283 *
284 * PENDING: PHY device is coming up, but the ethernet driver is
285 * ready. phy_start will set this state if the PHY state is
286 * STARTING.
287 * - PHY driver will set the state to UP when the PHY is ready
288 *
289 * UP: The PHY and attached device are ready to do work.
290 * Interrupts should be started here.
291 * - timer moves to AN
292 *
293 * AN: The PHY is currently negotiating the link state. Link is
294 * therefore down for now. phy_timer will set this state when it
295 * detects the state is UP. config_aneg will set this state
296 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
297 * - If autonegotiation finishes, but there's no link, it sets
298 * the state to NOLINK.
299 * - If aneg finishes with link, it sets the state to RUNNING,
300 * and calls adjust_link
301 * - If autonegotiation did not finish after an arbitrary amount
302 * of time, autonegotiation should be tried again if the PHY
303 * supports "magic" autonegotiation (back to AN)
304 * - If it didn't finish, and no magic_aneg, move to FORCING.
305 *
306 * NOLINK: PHY is up, but not currently plugged in.
307 * - If the timer notes that the link comes back, we move to RUNNING
308 * - config_aneg moves to AN
309 * - phy_stop moves to HALTED
310 *
311 * FORCING: PHY is being configured with forced settings
312 * - if link is up, move to RUNNING
313 * - If link is down, we drop to the next highest setting, and
314 * retry (FORCING) after a timeout
315 * - phy_stop moves to HALTED
316 *
317 * RUNNING: PHY is currently up, running, and possibly sending
318 * and/or receiving packets
319 * - timer will set CHANGELINK if we're polling (this ensures the
320 * link state is polled every other cycle of this state machine,
321 * which makes it every other second)
322 * - irq will set CHANGELINK
323 * - config_aneg will set AN
324 * - phy_stop moves to HALTED
325 *
326 * CHANGELINK: PHY experienced a change in link state
327 * - timer moves to RUNNING if link
328 * - timer moves to NOLINK if the link is down
329 * - phy_stop moves to HALTED
330 *
331 * HALTED: PHY is up, but no polling or interrupts are done. Or
332 * PHY is in an error state.
333 *
334 * - phy_start moves to RESUMING
335 *
336 * RESUMING: PHY was halted, but now wants to run again.
337 * - If we are forcing, or aneg is done, timer moves to RUNNING
338 * - If aneg is not done, timer moves to AN
339 * - phy_stop moves to HALTED
340 */
341enum phy_state {
4017b4d3 342 PHY_DOWN = 0,
00db8189
AF
343 PHY_STARTING,
344 PHY_READY,
345 PHY_PENDING,
346 PHY_UP,
347 PHY_AN,
348 PHY_RUNNING,
349 PHY_NOLINK,
350 PHY_FORCING,
351 PHY_CHANGELINK,
352 PHY_HALTED,
353 PHY_RESUMING
354};
355
ac28b9f8
DD
356/**
357 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
358 * @devices_in_package: Bit vector of devices present.
359 * @device_ids: The device identifer for each present device.
360 */
361struct phy_c45_device_ids {
362 u32 devices_in_package;
363 u32 device_ids[8];
364};
c1f19b51 365
00db8189
AF
366/* phy_device: An instance of a PHY
367 *
368 * drv: Pointer to the driver for this PHY instance
00db8189 369 * phy_id: UID for this device found during discovery
ac28b9f8
DD
370 * c45_ids: 802.3-c45 Device Identifers if is_c45.
371 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 372 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 373 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 374 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 375 * suspended: Set to true if this phy has been suspended successfully.
a3995460 376 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 377 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
378 * state: state of the PHY for management purposes
379 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
380 * link_timeout: The number of timer firings to wait before the
381 * giving up on the current attempt at acquiring a link
382 * irq: IRQ number of the PHY's interrupt (-1 if none)
383 * phy_timer: The timer for handling the state machine
664fcf12 384 * phy_queue: A work_queue for the phy_mac_interrupt
00db8189
AF
385 * attached_dev: The attached enet driver's device instance ptr
386 * adjust_link: Callback for the enet controller to respond to
387 * changes in the link state.
00db8189 388 *
114002bc
FF
389 * speed, duplex, pause, supported, advertising, lp_advertising,
390 * and autoneg are used like in mii_if_info
00db8189
AF
391 *
392 * interrupts currently only supports enabled or disabled,
393 * but could be changed in the future to support enabling
394 * and disabling specific interrupts
395 *
396 * Contains some infrastructure for polling and interrupt
397 * handling, as well as handling shifts in PHY hardware state
398 */
399struct phy_device {
e5a03bfd
AL
400 struct mdio_device mdio;
401
00db8189
AF
402 /* Information about the PHY type */
403 /* And management functions */
404 struct phy_driver *drv;
405
00db8189
AF
406 u32 phy_id;
407
ac28b9f8
DD
408 struct phy_c45_device_ids c45_ids;
409 bool is_c45;
4284b6a5 410 bool is_internal;
5a11dd7d 411 bool is_pseudo_fixed_link;
b0ae009f 412 bool has_fixups;
8a477a6f 413 bool suspended;
a3995460 414 bool sysfs_links;
f0f9b4ed 415 bool loopback_enabled;
ac28b9f8 416
00db8189
AF
417 enum phy_state state;
418
419 u32 dev_flags;
420
e8a2b6a4
AF
421 phy_interface_t interface;
422
c5e38a94
AF
423 /*
424 * forced speed & duplex (no autoneg)
00db8189
AF
425 * partner speed & duplex & pause (autoneg)
426 */
427 int speed;
428 int duplex;
429 int pause;
430 int asym_pause;
431
432 /* The most recently read link state */
433 int link;
434
435 /* Enabled Interrupts */
436 u32 interrupts;
437
438 /* Union of PHY and Attached devices' supported modes */
439 /* See mii.h for more info */
440 u32 supported;
441 u32 advertising;
114002bc 442 u32 lp_advertising;
00db8189 443
d853d145 444 /* Energy efficient ethernet modes which should be prohibited */
445 u32 eee_broken_modes;
446
00db8189
AF
447 int autoneg;
448
449 int link_timeout;
450
2e0bc452
ZB
451#ifdef CONFIG_LED_TRIGGER_PHY
452 struct phy_led_trigger *phy_led_triggers;
453 unsigned int phy_num_led_triggers;
454 struct phy_led_trigger *last_triggered;
3928ee64
MS
455
456 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
457#endif
458
c5e38a94
AF
459 /*
460 * Interrupt number for this PHY
461 * -1 means no interrupt
462 */
00db8189
AF
463 int irq;
464
465 /* private data pointer */
466 /* For use by PHYs to maintain extra state */
467 void *priv;
468
469 /* Interrupt and Polling infrastructure */
470 struct work_struct phy_queue;
a390d1f3 471 struct delayed_work state_queue;
00db8189 472
35b5f6b1 473 struct mutex lock;
00db8189 474
9525ae83 475 struct phylink *phylink;
00db8189
AF
476 struct net_device *attached_dev;
477
634ec36c 478 u8 mdix;
f4ed2fe3 479 u8 mdix_ctrl;
634ec36c 480
a81497be 481 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 482 void (*adjust_link)(struct net_device *dev);
00db8189 483};
e5a03bfd
AL
484#define to_phy_device(d) container_of(to_mdio_device(d), \
485 struct phy_device, mdio)
00db8189
AF
486
487/* struct phy_driver: Driver structure for a particular PHY type
488 *
a9049e0c 489 * driver_data: static driver data
00db8189
AF
490 * phy_id: The result of reading the UID registers of this PHY
491 * type, and ANDing them with the phy_id_mask. This driver
492 * only works for PHYs with IDs which match this field
493 * name: The friendly name of this PHY type
494 * phy_id_mask: Defines the important bits of the phy_id
495 * features: A list of features (speed, duplex, etc) supported
496 * by this PHY
497 * flags: A bitfield defining certain other features this PHY
498 * supports (like interrupts)
499 *
00fde795
HK
500 * All functions are optional. If config_aneg or read_status
501 * are not implemented, the phy core uses the genphy versions.
502 * Note that none of these functions should be called from
503 * interrupt time. The goal is for the bus read/write functions
504 * to be able to block when the bus transaction is happening,
505 * and be freed up by an interrupt (The MPC85xx has this ability,
506 * though it is not currently supported in the driver).
00db8189
AF
507 */
508struct phy_driver {
a9049e0c 509 struct mdio_driver_common mdiodrv;
00db8189
AF
510 u32 phy_id;
511 char *name;
511e3036 512 u32 phy_id_mask;
00db8189
AF
513 u32 features;
514 u32 flags;
860f6e9e 515 const void *driver_data;
00db8189 516
c5e38a94 517 /*
9df81dd7
FF
518 * Called to issue a PHY software reset
519 */
520 int (*soft_reset)(struct phy_device *phydev);
521
522 /*
c5e38a94
AF
523 * Called to initialize the PHY,
524 * including after a reset
525 */
00db8189
AF
526 int (*config_init)(struct phy_device *phydev);
527
c5e38a94
AF
528 /*
529 * Called during discovery. Used to set
530 * up device-specific structures, if any
531 */
00db8189
AF
532 int (*probe)(struct phy_device *phydev);
533
534 /* PHY Power Management */
535 int (*suspend)(struct phy_device *phydev);
536 int (*resume)(struct phy_device *phydev);
537
c5e38a94
AF
538 /*
539 * Configures the advertisement and resets
00db8189
AF
540 * autonegotiation if phydev->autoneg is on,
541 * forces the speed to the current settings in phydev
c5e38a94
AF
542 * if phydev->autoneg is off
543 */
00db8189
AF
544 int (*config_aneg)(struct phy_device *phydev);
545
76a423a3
FF
546 /* Determines the auto negotiation result */
547 int (*aneg_done)(struct phy_device *phydev);
548
00db8189
AF
549 /* Determines the negotiated speed and duplex */
550 int (*read_status)(struct phy_device *phydev);
551
552 /* Clears any pending interrupts */
553 int (*ack_interrupt)(struct phy_device *phydev);
554
555 /* Enables or disables interrupts */
556 int (*config_intr)(struct phy_device *phydev);
557
a8729eb3
AG
558 /*
559 * Checks if the PHY generated an interrupt.
560 * For multi-PHY devices with shared PHY interrupt pin
561 */
562 int (*did_interrupt)(struct phy_device *phydev);
563
00db8189
AF
564 /* Clears up any memory if needed */
565 void (*remove)(struct phy_device *phydev);
566
a30e2c18
DD
567 /* Returns true if this is a suitable driver for the given
568 * phydev. If NULL, matching is based on phy_id and
569 * phy_id_mask.
570 */
571 int (*match_phy_device)(struct phy_device *phydev);
572
c8f3a8c3
RC
573 /* Handles ethtool queries for hardware time stamping. */
574 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
575
c1f19b51
RC
576 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
577 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
578
579 /*
580 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
581 * the phy driver promises to deliver it using netif_rx() as
582 * soon as a timestamp becomes available. One of the
583 * PTP_CLASS_ values is passed in 'type'. The function must
584 * return true if the skb is accepted for delivery.
585 */
586 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
587
588 /*
589 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 590 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
591 * timestamp becomes available. One of the PTP_CLASS_ values
592 * is passed in 'type'.
593 */
594 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
595
42e836eb
MS
596 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
597 * enable Wake on LAN, so set_wol is provided to be called in the
598 * ethernet driver's set_wol function. */
599 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
600
601 /* See set_wol, but for checking whether Wake on LAN is enabled. */
602 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
603
2b8f2a28
DM
604 /*
605 * Called to inform a PHY device driver when the core is about to
606 * change the link state. This callback is supposed to be used as
607 * fixup hook for drivers that need to take action when the link
608 * state changes. Drivers are by no means allowed to mess with the
609 * PHY device structure in their implementations.
610 */
611 void (*link_change_notify)(struct phy_device *dev);
612
1ee6b9bc
RK
613 /*
614 * Phy specific driver override for reading a MMD register.
615 * This function is optional for PHY specific drivers. When
616 * not provided, the default MMD read function will be used
617 * by phy_read_mmd(), which will use either a direct read for
618 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
619 * devnum is the MMD device number within the PHY device,
620 * regnum is the register within the selected MMD device.
621 */
622 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
623
624 /*
625 * Phy specific driver override for writing a MMD register.
626 * This function is optional for PHY specific drivers. When
627 * not provided, the default MMD write function will be used
628 * by phy_write_mmd(), which will use either a direct write for
629 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
630 * devnum is the MMD device number within the PHY device,
631 * regnum is the register within the selected MMD device.
632 * val is the value to be written.
633 */
634 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
635 u16 val);
636
78ffc4ac
RK
637 int (*read_page)(struct phy_device *dev);
638 int (*write_page)(struct phy_device *dev, int page);
639
2f438366
ES
640 /* Get the size and type of the eeprom contained within a plug-in
641 * module */
642 int (*module_info)(struct phy_device *dev,
643 struct ethtool_modinfo *modinfo);
644
645 /* Get the eeprom information from the plug-in module */
646 int (*module_eeprom)(struct phy_device *dev,
647 struct ethtool_eeprom *ee, u8 *data);
648
f3a40945
AL
649 /* Get statistics from the phy using ethtool */
650 int (*get_sset_count)(struct phy_device *dev);
651 void (*get_strings)(struct phy_device *dev, u8 *data);
652 void (*get_stats)(struct phy_device *dev,
653 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
654
655 /* Get and Set PHY tunables */
656 int (*get_tunable)(struct phy_device *dev,
657 struct ethtool_tunable *tuna, void *data);
658 int (*set_tunable)(struct phy_device *dev,
659 struct ethtool_tunable *tuna,
660 const void *data);
f0f9b4ed 661 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 662};
a9049e0c
AL
663#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
664 struct phy_driver, mdiodrv)
00db8189 665
f62220d3
AF
666#define PHY_ANY_ID "MATCH ANY PHY"
667#define PHY_ANY_UID 0xffffffff
668
669/* A Structure for boards to register fixups with the PHY Lib */
670struct phy_fixup {
671 struct list_head list;
4567d686 672 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
673 u32 phy_uid;
674 u32 phy_uid_mask;
675 int (*run)(struct phy_device *phydev);
676};
677
da4625ac
RK
678const char *phy_speed_to_str(int speed);
679const char *phy_duplex_to_str(unsigned int duplex);
680
0ccb4fc6
RK
681/* A structure for mapping a particular speed and duplex
682 * combination to a particular SUPPORTED and ADVERTISED value
683 */
684struct phy_setting {
685 u32 speed;
686 u8 duplex;
687 u8 bit;
688};
689
690const struct phy_setting *
691phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
692 size_t maxbit, bool exact);
693size_t phy_speeds(unsigned int *speeds, size_t size,
694 unsigned long *mask, size_t maxbit);
695
8c5e850c
RK
696void phy_resolve_aneg_linkmode(struct phy_device *phydev);
697
efabdfb9
AF
698/**
699 * phy_read_mmd - Convenience function for reading a register
700 * from an MMD on a given PHY.
701 * @phydev: The phy_device struct
702 * @devad: The MMD to read from
703 * @regnum: The register on the MMD to read
704 *
705 * Same rules as for phy_read();
706 */
9860118b 707int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 708
2e888103
LB
709/**
710 * phy_read - Convenience function for reading a given PHY register
711 * @phydev: the phy_device struct
712 * @regnum: register number to read
713 *
714 * NOTE: MUST NOT be called from interrupt context,
715 * because the bus read/write functions may wait for an interrupt
716 * to conclude the operation.
717 */
abf35df2 718static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 719{
e5a03bfd 720 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
721}
722
788f9933
RK
723/**
724 * __phy_read - convenience function for reading a given PHY register
725 * @phydev: the phy_device struct
726 * @regnum: register number to read
727 *
728 * The caller must have taken the MDIO bus lock.
729 */
730static inline int __phy_read(struct phy_device *phydev, u32 regnum)
731{
732 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
733}
734
2e888103
LB
735/**
736 * phy_write - Convenience function for writing a given PHY register
737 * @phydev: the phy_device struct
738 * @regnum: register number to write
739 * @val: value to write to @regnum
740 *
741 * NOTE: MUST NOT be called from interrupt context,
742 * because the bus read/write functions may wait for an interrupt
743 * to conclude the operation.
744 */
abf35df2 745static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 746{
e5a03bfd 747 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
748}
749
788f9933
RK
750/**
751 * __phy_write - Convenience function for writing a given PHY register
752 * @phydev: the phy_device struct
753 * @regnum: register number to write
754 * @val: value to write to @regnum
755 *
756 * The caller must have taken the MDIO bus lock.
757 */
758static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
759{
760 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
761 val);
762}
763
764int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 765int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 766
2c7b4921
FF
767/**
768 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
769 * @phydev: the phy_device struct
770 *
771 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
772 * PHY_IGNORE_INTERRUPT
773 */
774static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
775{
776 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
777}
778
4284b6a5
FF
779/**
780 * phy_is_internal - Convenience function for testing if a PHY is internal
781 * @phydev: the phy_device struct
782 */
783static inline bool phy_is_internal(struct phy_device *phydev)
784{
785 return phydev->is_internal;
786}
787
32d0f783
IS
788/**
789 * phy_interface_mode_is_rgmii - Convenience function for testing if a
790 * PHY interface mode is RGMII (all variants)
791 * @mode: the phy_interface_t enum
792 */
793static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
794{
795 return mode >= PHY_INTERFACE_MODE_RGMII &&
796 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
797};
798
365c1e64
RK
799/**
800 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
801 * negotiation
802 * @mode: one of &enum phy_interface_t
803 *
804 * Returns true if the phy interface mode uses the 16-bit negotiation
805 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
806 */
807static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
808{
809 return mode == PHY_INTERFACE_MODE_1000BASEX ||
810 mode == PHY_INTERFACE_MODE_2500BASEX;
811}
812
e463d88c
FF
813/**
814 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
815 * is RGMII (all variants)
816 * @phydev: the phy_device struct
817 */
818static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
819{
32d0f783 820 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
821};
822
823/*
824 * phy_is_pseudo_fixed_link - Convenience function for testing if this
825 * PHY is the CPU port facing side of an Ethernet switch, or similar.
826 * @phydev: the phy_device struct
827 */
828static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
829{
830 return phydev->is_pseudo_fixed_link;
e463d88c
FF
831}
832
efabdfb9
AF
833/**
834 * phy_write_mmd - Convenience function for writing a register
835 * on an MMD on a given PHY.
836 * @phydev: The phy_device struct
837 * @devad: The MMD to read from
838 * @regnum: The register on the MMD to read
839 * @val: value to write to @regnum
840 *
841 * Same rules as for phy_write();
842 */
9860118b 843int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 844
78ffc4ac
RK
845int phy_save_page(struct phy_device *phydev);
846int phy_select_page(struct phy_device *phydev, int page);
847int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
848int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
849int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
850int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
851 u16 mask, u16 set);
852
ac28b9f8 853struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
854 bool is_c45,
855 struct phy_c45_device_ids *c45_ids);
90eff909 856#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 857struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 858int phy_device_register(struct phy_device *phy);
90eff909
FF
859void phy_device_free(struct phy_device *phydev);
860#else
861static inline
862struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
863{
864 return NULL;
865}
866
867static inline int phy_device_register(struct phy_device *phy)
868{
869 return 0;
870}
871
872static inline void phy_device_free(struct phy_device *phydev) { }
873#endif /* CONFIG_PHYLIB */
38737e49 874void phy_device_remove(struct phy_device *phydev);
2f5cb434 875int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
876int phy_suspend(struct phy_device *phydev);
877int phy_resume(struct phy_device *phydev);
f0f9b4ed 878int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
879struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
880 phy_interface_t interface);
f8f76db1 881struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
882int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
883 u32 flags, phy_interface_t interface);
fa94f6d9 884int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
885 void (*handler)(struct net_device *),
886 phy_interface_t interface);
887struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
888 void (*handler)(struct net_device *),
889 phy_interface_t interface);
e1393456
AF
890void phy_disconnect(struct phy_device *phydev);
891void phy_detach(struct phy_device *phydev);
892void phy_start(struct phy_device *phydev);
893void phy_stop(struct phy_device *phydev);
894int phy_start_aneg(struct phy_device *phydev);
372788f9 895int phy_aneg_done(struct phy_device *phydev);
e1393456 896
e1393456 897int phy_stop_interrupts(struct phy_device *phydev);
002ba705 898int phy_restart_aneg(struct phy_device *phydev);
a9668491 899int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 900
bafbdd52
SS
901static inline void phy_device_reset(struct phy_device *phydev, int value)
902{
903 mdio_device_reset(&phydev->mdio, value);
904}
905
72ba48be 906#define phydev_err(_phydev, format, args...) \
e5a03bfd 907 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be
AL
908
909#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 910 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 911
84eff6d1
AL
912static inline const char *phydev_name(const struct phy_device *phydev)
913{
e5a03bfd 914 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
915}
916
2220943a
AL
917void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
918 __printf(2, 3);
919void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
920
921/* Clause 22 PHY */
af6b6967 922int genphy_config_init(struct phy_device *phydev);
3fb69bca 923int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
924int genphy_restart_aneg(struct phy_device *phydev);
925int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 926int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
927int genphy_update_link(struct phy_device *phydev);
928int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
929int genphy_suspend(struct phy_device *phydev);
930int genphy_resume(struct phy_device *phydev);
f0f9b4ed 931int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 932int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
933static inline int genphy_no_soft_reset(struct phy_device *phydev)
934{
935 return 0;
936}
5acde34a
RK
937
938/* Clause 45 PHY */
939int genphy_c45_restart_aneg(struct phy_device *phydev);
940int genphy_c45_aneg_done(struct phy_device *phydev);
941int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
942int genphy_c45_read_lpa(struct phy_device *phydev);
943int genphy_c45_read_pma(struct phy_device *phydev);
944int genphy_c45_pma_setup_forced(struct phy_device *phydev);
945int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 946int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 947
00fde795
HK
948static inline int phy_read_status(struct phy_device *phydev)
949{
950 if (!phydev->drv)
951 return -EIO;
952
953 if (phydev->drv->read_status)
954 return phydev->drv->read_status(phydev);
955 else
956 return genphy_read_status(phydev);
957}
958
00db8189 959void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 960void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
961int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
962int phy_drivers_register(struct phy_driver *new_driver, int n,
963 struct module *owner);
4f9c85a1 964void phy_state_machine(struct work_struct *work);
664fcf12
AL
965void phy_change(struct phy_device *phydev);
966void phy_change_work(struct work_struct *work);
5ea94e76 967void phy_mac_interrupt(struct phy_device *phydev, int new_link);
29935aeb 968void phy_start_machine(struct phy_device *phydev);
00db8189 969void phy_stop_machine(struct phy_device *phydev);
f555f34f 970void phy_trigger_machine(struct phy_device *phydev, bool sync);
00db8189 971int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 972void phy_ethtool_ksettings_get(struct phy_device *phydev,
973 struct ethtool_link_ksettings *cmd);
2d55173e
PR
974int phy_ethtool_ksettings_set(struct phy_device *phydev,
975 const struct ethtool_link_ksettings *cmd);
4017b4d3 976int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
977int phy_start_interrupts(struct phy_device *phydev);
978void phy_print_status(struct phy_device *phydev);
f3a6bd39 979int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 980
f62220d3 981int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 982 int (*run)(struct phy_device *));
f62220d3 983int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 984 int (*run)(struct phy_device *));
f62220d3 985int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 986 int (*run)(struct phy_device *));
f62220d3 987
f38e7a32
WH
988int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
989int phy_unregister_fixup_for_id(const char *bus_id);
990int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
991
a59a4d19
GC
992int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
993int phy_get_eee_err(struct phy_device *phydev);
994int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
995int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 996int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
997void phy_ethtool_get_wol(struct phy_device *phydev,
998 struct ethtool_wolinfo *wol);
9d9a77ce
PR
999int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1000 struct ethtool_link_ksettings *cmd);
1001int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1002 const struct ethtool_link_ksettings *cmd);
e86a8987 1003int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1004
90eff909 1005#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1006int __init mdio_bus_init(void);
1007void mdio_bus_exit(void);
90eff909 1008#endif
9b9a8bfc 1009
00db8189 1010extern struct bus_type mdio_bus_type;
c31accd1 1011
648ea013
FF
1012struct mdio_board_info {
1013 const char *bus_id;
1014 char modalias[MDIO_NAME_SIZE];
1015 int mdio_addr;
1016 const void *platform_data;
1017};
1018
90eff909 1019#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1020int mdiobus_register_board_info(const struct mdio_board_info *info,
1021 unsigned int n);
1022#else
1023static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1024 unsigned int n)
1025{
1026 return 0;
1027}
1028#endif
1029
1030
c31accd1
JH
1031/**
1032 * module_phy_driver() - Helper macro for registering PHY drivers
1033 * @__phy_drivers: array of PHY drivers to register
1034 *
1035 * Helper macro for PHY drivers which do not do anything special in module
1036 * init/exit. Each module may only use this macro once, and calling it
1037 * replaces module_init() and module_exit().
1038 */
1039#define phy_module_driver(__phy_drivers, __count) \
1040static int __init phy_module_init(void) \
1041{ \
be01da72 1042 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1043} \
1044module_init(phy_module_init); \
1045static void __exit phy_module_exit(void) \
1046{ \
1047 phy_drivers_unregister(__phy_drivers, __count); \
1048} \
1049module_exit(phy_module_exit)
1050
1051#define module_phy_driver(__phy_drivers) \
1052 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1053
00db8189 1054#endif /* __PHY_H */