net: ethernet: fs-enet: Use generic CRC32 implementation
[linux-block.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
bac83c65 22#include <linux/mdio.h>
13df29f6 23#include <linux/mii.h>
3e3aaf64 24#include <linux/module.h>
13df29f6
MR
25#include <linux/timer.h>
26#include <linux/workqueue.h>
8626d3b4 27#include <linux/mod_devicetable.h>
00db8189 28
60063497 29#include <linux/atomic.h>
0ac49527 30
e9fbdf17 31#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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32 SUPPORTED_TP | \
33 SUPPORTED_MII)
34
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35#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
36 SUPPORTED_10baseT_Full)
37
38#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
39 SUPPORTED_100baseT_Full)
40
41#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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42 SUPPORTED_1000baseT_Full)
43
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44#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
45 PHY_100BT_FEATURES | \
46 PHY_DEFAULT_FEATURES)
47
48#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
49 PHY_1000BT_FEATURES)
50
51
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52/*
53 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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54 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
55 * the attached driver handles the interrupt
56 */
57#define PHY_POLL -1
58#define PHY_IGNORE_INTERRUPT -2
59
60#define PHY_HAS_INTERRUPT 0x00000001
1b86f702 61#define PHY_IS_INTERNAL 0x00000002
a9668491 62#define PHY_RST_AFTER_CLK_EN 0x00000004
a9049e0c 63#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 64
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65/* Interface Mode definitions */
66typedef enum {
4157ef1b 67 PHY_INTERFACE_MODE_NA,
735d8a18 68 PHY_INTERFACE_MODE_INTERNAL,
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69 PHY_INTERFACE_MODE_MII,
70 PHY_INTERFACE_MODE_GMII,
71 PHY_INTERFACE_MODE_SGMII,
72 PHY_INTERFACE_MODE_TBI,
2cc70ba4 73 PHY_INTERFACE_MODE_REVMII,
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74 PHY_INTERFACE_MODE_RMII,
75 PHY_INTERFACE_MODE_RGMII,
a999589c 76 PHY_INTERFACE_MODE_RGMII_ID,
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77 PHY_INTERFACE_MODE_RGMII_RXID,
78 PHY_INTERFACE_MODE_RGMII_TXID,
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79 PHY_INTERFACE_MODE_RTBI,
80 PHY_INTERFACE_MODE_SMII,
898dd0bd 81 PHY_INTERFACE_MODE_XGMII,
fd70f72c 82 PHY_INTERFACE_MODE_MOCA,
b9d12085 83 PHY_INTERFACE_MODE_QSGMII,
572de608 84 PHY_INTERFACE_MODE_TRGMII,
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85 PHY_INTERFACE_MODE_1000BASEX,
86 PHY_INTERFACE_MODE_2500BASEX,
87 PHY_INTERFACE_MODE_RXAUI,
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88 PHY_INTERFACE_MODE_XAUI,
89 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
90 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 91 PHY_INTERFACE_MODE_MAX,
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92} phy_interface_t;
93
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94/**
95 * phy_supported_speeds - return all speeds currently supported by a phy device
96 * @phy: The phy device to return supported speeds of.
97 * @speeds: buffer to store supported speeds in.
98 * @size: size of speeds buffer.
99 *
100 * Description: Returns the number of supported speeds, and
101 * fills the speeds * buffer with the supported speeds. If speeds buffer is
102 * too small to contain * all currently supported speeds, will return as
103 * many speeds as can fit.
104 */
105unsigned int phy_supported_speeds(struct phy_device *phy,
106 unsigned int *speeds,
107 unsigned int size);
108
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109/**
110 * It maps 'enum phy_interface_t' found in include/linux/phy.h
111 * into the device tree binding of 'phy-mode', so that Ethernet
112 * device driver can get phy interface from device tree.
113 */
114static inline const char *phy_modes(phy_interface_t interface)
115{
116 switch (interface) {
117 case PHY_INTERFACE_MODE_NA:
118 return "";
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119 case PHY_INTERFACE_MODE_INTERNAL:
120 return "internal";
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121 case PHY_INTERFACE_MODE_MII:
122 return "mii";
123 case PHY_INTERFACE_MODE_GMII:
124 return "gmii";
125 case PHY_INTERFACE_MODE_SGMII:
126 return "sgmii";
127 case PHY_INTERFACE_MODE_TBI:
128 return "tbi";
129 case PHY_INTERFACE_MODE_REVMII:
130 return "rev-mii";
131 case PHY_INTERFACE_MODE_RMII:
132 return "rmii";
133 case PHY_INTERFACE_MODE_RGMII:
134 return "rgmii";
135 case PHY_INTERFACE_MODE_RGMII_ID:
136 return "rgmii-id";
137 case PHY_INTERFACE_MODE_RGMII_RXID:
138 return "rgmii-rxid";
139 case PHY_INTERFACE_MODE_RGMII_TXID:
140 return "rgmii-txid";
141 case PHY_INTERFACE_MODE_RTBI:
142 return "rtbi";
143 case PHY_INTERFACE_MODE_SMII:
144 return "smii";
145 case PHY_INTERFACE_MODE_XGMII:
146 return "xgmii";
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147 case PHY_INTERFACE_MODE_MOCA:
148 return "moca";
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149 case PHY_INTERFACE_MODE_QSGMII:
150 return "qsgmii";
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151 case PHY_INTERFACE_MODE_TRGMII:
152 return "trgmii";
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153 case PHY_INTERFACE_MODE_1000BASEX:
154 return "1000base-x";
155 case PHY_INTERFACE_MODE_2500BASEX:
156 return "2500base-x";
157 case PHY_INTERFACE_MODE_RXAUI:
158 return "rxaui";
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159 case PHY_INTERFACE_MODE_XAUI:
160 return "xaui";
161 case PHY_INTERFACE_MODE_10GKR:
162 return "10gbase-kr";
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163 default:
164 return "unknown";
165 }
166}
167
00db8189 168
e8a2b6a4 169#define PHY_INIT_TIMEOUT 100000
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170#define PHY_STATE_TIME 1
171#define PHY_FORCE_TIMEOUT 10
172#define PHY_AN_TIMEOUT 10
173
e8a2b6a4 174#define PHY_MAX_ADDR 32
00db8189 175
a4d00f17 176/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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177#define PHY_ID_FMT "%s:%02x"
178
4567d686 179#define MII_BUS_ID_SIZE 61
a4d00f17 180
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181/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
182 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
183#define MII_ADDR_C45 (1<<30)
184
313162d0 185struct device;
9525ae83 186struct phylink;
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187struct sk_buff;
188
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189/*
190 * The Bus class for PHYs. Devices which provide access to
191 * PHYs should register using this structure
192 */
00db8189 193struct mii_bus {
3e3aaf64 194 struct module *owner;
00db8189 195 const char *name;
9d9326d3 196 char id[MII_BUS_ID_SIZE];
00db8189 197 void *priv;
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198 int (*read)(struct mii_bus *bus, int addr, int regnum);
199 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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200 int (*reset)(struct mii_bus *bus);
201
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202 /*
203 * A lock to ensure that only one thing can read/write
204 * the MDIO bus at a time
205 */
35b5f6b1 206 struct mutex mdio_lock;
00db8189 207
18ee49dd 208 struct device *parent;
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209 enum {
210 MDIOBUS_ALLOCATED = 1,
211 MDIOBUS_REGISTERED,
212 MDIOBUS_UNREGISTERED,
213 MDIOBUS_RELEASED,
214 } state;
215 struct device dev;
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216
217 /* list of all PHYs on bus */
7f854420 218 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 219
c6883996 220 /* PHY addresses to be ignored when probing */
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221 u32 phy_mask;
222
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223 /* PHY addresses to ignore the TA/read failure */
224 u32 phy_ignore_ta_mask;
225
c5e38a94 226 /*
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227 * An array of interrupts, each PHY's interrupt at the index
228 * matching its address
c5e38a94 229 */
e7f4dc35 230 int irq[PHY_MAX_ADDR];
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231
232 /* GPIO reset pulse width in microseconds */
233 int reset_delay_us;
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234 /* RESET GPIO descriptor pointer */
235 struct gpio_desc *reset_gpiod;
00db8189 236};
46abc021 237#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 238
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239struct mii_bus *mdiobus_alloc_size(size_t);
240static inline struct mii_bus *mdiobus_alloc(void)
241{
242 return mdiobus_alloc_size(0);
243}
244
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245int __mdiobus_register(struct mii_bus *bus, struct module *owner);
246#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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247void mdiobus_unregister(struct mii_bus *bus);
248void mdiobus_free(struct mii_bus *bus);
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249struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
250static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
251{
252 return devm_mdiobus_alloc_size(dev, 0);
253}
254
255void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 256struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 257
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258#define PHY_INTERRUPT_DISABLED 0x0
259#define PHY_INTERRUPT_ENABLED 0x80000000
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260
261/* PHY state machine states:
262 *
263 * DOWN: PHY device and driver are not ready for anything. probe
264 * should be called if and only if the PHY is in this state,
265 * given that the PHY device exists.
266 * - PHY driver probe function will, depending on the PHY, set
267 * the state to STARTING or READY
268 *
269 * STARTING: PHY device is coming up, and the ethernet driver is
270 * not ready. PHY drivers may set this in the probe function.
271 * If they do, they are responsible for making sure the state is
272 * eventually set to indicate whether the PHY is UP or READY,
273 * depending on the state when the PHY is done starting up.
274 * - PHY driver will set the state to READY
275 * - start will set the state to PENDING
276 *
277 * READY: PHY is ready to send and receive packets, but the
278 * controller is not. By default, PHYs which do not implement
279 * probe will be set to this state by phy_probe(). If the PHY
280 * driver knows the PHY is ready, and the PHY state is STARTING,
281 * then it sets this STATE.
282 * - start will set the state to UP
283 *
284 * PENDING: PHY device is coming up, but the ethernet driver is
285 * ready. phy_start will set this state if the PHY state is
286 * STARTING.
287 * - PHY driver will set the state to UP when the PHY is ready
288 *
289 * UP: The PHY and attached device are ready to do work.
290 * Interrupts should be started here.
291 * - timer moves to AN
292 *
293 * AN: The PHY is currently negotiating the link state. Link is
294 * therefore down for now. phy_timer will set this state when it
295 * detects the state is UP. config_aneg will set this state
296 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
297 * - If autonegotiation finishes, but there's no link, it sets
298 * the state to NOLINK.
299 * - If aneg finishes with link, it sets the state to RUNNING,
300 * and calls adjust_link
301 * - If autonegotiation did not finish after an arbitrary amount
302 * of time, autonegotiation should be tried again if the PHY
303 * supports "magic" autonegotiation (back to AN)
304 * - If it didn't finish, and no magic_aneg, move to FORCING.
305 *
306 * NOLINK: PHY is up, but not currently plugged in.
307 * - If the timer notes that the link comes back, we move to RUNNING
308 * - config_aneg moves to AN
309 * - phy_stop moves to HALTED
310 *
311 * FORCING: PHY is being configured with forced settings
312 * - if link is up, move to RUNNING
313 * - If link is down, we drop to the next highest setting, and
314 * retry (FORCING) after a timeout
315 * - phy_stop moves to HALTED
316 *
317 * RUNNING: PHY is currently up, running, and possibly sending
318 * and/or receiving packets
319 * - timer will set CHANGELINK if we're polling (this ensures the
320 * link state is polled every other cycle of this state machine,
321 * which makes it every other second)
322 * - irq will set CHANGELINK
323 * - config_aneg will set AN
324 * - phy_stop moves to HALTED
325 *
326 * CHANGELINK: PHY experienced a change in link state
327 * - timer moves to RUNNING if link
328 * - timer moves to NOLINK if the link is down
329 * - phy_stop moves to HALTED
330 *
331 * HALTED: PHY is up, but no polling or interrupts are done. Or
332 * PHY is in an error state.
333 *
334 * - phy_start moves to RESUMING
335 *
336 * RESUMING: PHY was halted, but now wants to run again.
337 * - If we are forcing, or aneg is done, timer moves to RUNNING
338 * - If aneg is not done, timer moves to AN
339 * - phy_stop moves to HALTED
340 */
341enum phy_state {
4017b4d3 342 PHY_DOWN = 0,
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AF
343 PHY_STARTING,
344 PHY_READY,
345 PHY_PENDING,
346 PHY_UP,
347 PHY_AN,
348 PHY_RUNNING,
349 PHY_NOLINK,
350 PHY_FORCING,
351 PHY_CHANGELINK,
352 PHY_HALTED,
353 PHY_RESUMING
354};
355
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DD
356/**
357 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
358 * @devices_in_package: Bit vector of devices present.
359 * @device_ids: The device identifer for each present device.
360 */
361struct phy_c45_device_ids {
362 u32 devices_in_package;
363 u32 device_ids[8];
364};
c1f19b51 365
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366/* phy_device: An instance of a PHY
367 *
368 * drv: Pointer to the driver for this PHY instance
00db8189 369 * phy_id: UID for this device found during discovery
ac28b9f8
DD
370 * c45_ids: 802.3-c45 Device Identifers if is_c45.
371 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 372 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 373 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 374 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 375 * suspended: Set to true if this phy has been suspended successfully.
a3995460 376 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 377 * loopback_enabled: Set true if this phy has been loopbacked successfully.
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378 * state: state of the PHY for management purposes
379 * dev_flags: Device-specific flags used by the PHY driver.
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380 * link_timeout: The number of timer firings to wait before the
381 * giving up on the current attempt at acquiring a link
382 * irq: IRQ number of the PHY's interrupt (-1 if none)
383 * phy_timer: The timer for handling the state machine
664fcf12 384 * phy_queue: A work_queue for the phy_mac_interrupt
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385 * attached_dev: The attached enet driver's device instance ptr
386 * adjust_link: Callback for the enet controller to respond to
387 * changes in the link state.
00db8189 388 *
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FF
389 * speed, duplex, pause, supported, advertising, lp_advertising,
390 * and autoneg are used like in mii_if_info
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AF
391 *
392 * interrupts currently only supports enabled or disabled,
393 * but could be changed in the future to support enabling
394 * and disabling specific interrupts
395 *
396 * Contains some infrastructure for polling and interrupt
397 * handling, as well as handling shifts in PHY hardware state
398 */
399struct phy_device {
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AL
400 struct mdio_device mdio;
401
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402 /* Information about the PHY type */
403 /* And management functions */
404 struct phy_driver *drv;
405
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406 u32 phy_id;
407
ac28b9f8 408 struct phy_c45_device_ids c45_ids;
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409 unsigned is_c45:1;
410 unsigned is_internal:1;
411 unsigned is_pseudo_fixed_link:1;
412 unsigned has_fixups:1;
413 unsigned suspended:1;
414 unsigned sysfs_links:1;
415 unsigned loopback_enabled:1;
416
417 unsigned autoneg:1;
418 /* The most recently read link state */
419 unsigned link:1;
ac28b9f8 420
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421 enum phy_state state;
422
423 u32 dev_flags;
424
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425 phy_interface_t interface;
426
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427 /*
428 * forced speed & duplex (no autoneg)
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429 * partner speed & duplex & pause (autoneg)
430 */
431 int speed;
432 int duplex;
433 int pause;
434 int asym_pause;
435
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436 /* Enabled Interrupts */
437 u32 interrupts;
438
439 /* Union of PHY and Attached devices' supported modes */
440 /* See mii.h for more info */
441 u32 supported;
442 u32 advertising;
114002bc 443 u32 lp_advertising;
00db8189 444
d853d145 445 /* Energy efficient ethernet modes which should be prohibited */
446 u32 eee_broken_modes;
447
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AF
448 int link_timeout;
449
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ZB
450#ifdef CONFIG_LED_TRIGGER_PHY
451 struct phy_led_trigger *phy_led_triggers;
452 unsigned int phy_num_led_triggers;
453 struct phy_led_trigger *last_triggered;
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MS
454
455 struct phy_led_trigger *led_link_trigger;
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456#endif
457
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458 /*
459 * Interrupt number for this PHY
460 * -1 means no interrupt
461 */
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462 int irq;
463
464 /* private data pointer */
465 /* For use by PHYs to maintain extra state */
466 void *priv;
467
468 /* Interrupt and Polling infrastructure */
469 struct work_struct phy_queue;
a390d1f3 470 struct delayed_work state_queue;
00db8189 471
35b5f6b1 472 struct mutex lock;
00db8189 473
9525ae83 474 struct phylink *phylink;
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AF
475 struct net_device *attached_dev;
476
634ec36c 477 u8 mdix;
f4ed2fe3 478 u8 mdix_ctrl;
634ec36c 479
a81497be 480 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 481 void (*adjust_link)(struct net_device *dev);
00db8189 482};
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AL
483#define to_phy_device(d) container_of(to_mdio_device(d), \
484 struct phy_device, mdio)
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AF
485
486/* struct phy_driver: Driver structure for a particular PHY type
487 *
a9049e0c 488 * driver_data: static driver data
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AF
489 * phy_id: The result of reading the UID registers of this PHY
490 * type, and ANDing them with the phy_id_mask. This driver
491 * only works for PHYs with IDs which match this field
492 * name: The friendly name of this PHY type
493 * phy_id_mask: Defines the important bits of the phy_id
494 * features: A list of features (speed, duplex, etc) supported
495 * by this PHY
496 * flags: A bitfield defining certain other features this PHY
497 * supports (like interrupts)
498 *
00fde795
HK
499 * All functions are optional. If config_aneg or read_status
500 * are not implemented, the phy core uses the genphy versions.
501 * Note that none of these functions should be called from
502 * interrupt time. The goal is for the bus read/write functions
503 * to be able to block when the bus transaction is happening,
504 * and be freed up by an interrupt (The MPC85xx has this ability,
505 * though it is not currently supported in the driver).
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AF
506 */
507struct phy_driver {
a9049e0c 508 struct mdio_driver_common mdiodrv;
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509 u32 phy_id;
510 char *name;
511e3036 511 u32 phy_id_mask;
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512 u32 features;
513 u32 flags;
860f6e9e 514 const void *driver_data;
00db8189 515
c5e38a94 516 /*
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517 * Called to issue a PHY software reset
518 */
519 int (*soft_reset)(struct phy_device *phydev);
520
521 /*
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522 * Called to initialize the PHY,
523 * including after a reset
524 */
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525 int (*config_init)(struct phy_device *phydev);
526
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527 /*
528 * Called during discovery. Used to set
529 * up device-specific structures, if any
530 */
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531 int (*probe)(struct phy_device *phydev);
532
533 /* PHY Power Management */
534 int (*suspend)(struct phy_device *phydev);
535 int (*resume)(struct phy_device *phydev);
536
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537 /*
538 * Configures the advertisement and resets
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539 * autonegotiation if phydev->autoneg is on,
540 * forces the speed to the current settings in phydev
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541 * if phydev->autoneg is off
542 */
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543 int (*config_aneg)(struct phy_device *phydev);
544
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FF
545 /* Determines the auto negotiation result */
546 int (*aneg_done)(struct phy_device *phydev);
547
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548 /* Determines the negotiated speed and duplex */
549 int (*read_status)(struct phy_device *phydev);
550
551 /* Clears any pending interrupts */
552 int (*ack_interrupt)(struct phy_device *phydev);
553
554 /* Enables or disables interrupts */
555 int (*config_intr)(struct phy_device *phydev);
556
a8729eb3
AG
557 /*
558 * Checks if the PHY generated an interrupt.
559 * For multi-PHY devices with shared PHY interrupt pin
560 */
561 int (*did_interrupt)(struct phy_device *phydev);
562
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563 /* Clears up any memory if needed */
564 void (*remove)(struct phy_device *phydev);
565
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DD
566 /* Returns true if this is a suitable driver for the given
567 * phydev. If NULL, matching is based on phy_id and
568 * phy_id_mask.
569 */
570 int (*match_phy_device)(struct phy_device *phydev);
571
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RC
572 /* Handles ethtool queries for hardware time stamping. */
573 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
574
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RC
575 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
576 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
577
578 /*
579 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
580 * the phy driver promises to deliver it using netif_rx() as
581 * soon as a timestamp becomes available. One of the
582 * PTP_CLASS_ values is passed in 'type'. The function must
583 * return true if the skb is accepted for delivery.
584 */
585 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
586
587 /*
588 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 589 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
590 * timestamp becomes available. One of the PTP_CLASS_ values
591 * is passed in 'type'.
592 */
593 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
594
42e836eb
MS
595 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
596 * enable Wake on LAN, so set_wol is provided to be called in the
597 * ethernet driver's set_wol function. */
598 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
599
600 /* See set_wol, but for checking whether Wake on LAN is enabled. */
601 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
602
2b8f2a28
DM
603 /*
604 * Called to inform a PHY device driver when the core is about to
605 * change the link state. This callback is supposed to be used as
606 * fixup hook for drivers that need to take action when the link
607 * state changes. Drivers are by no means allowed to mess with the
608 * PHY device structure in their implementations.
609 */
610 void (*link_change_notify)(struct phy_device *dev);
611
1ee6b9bc
RK
612 /*
613 * Phy specific driver override for reading a MMD register.
614 * This function is optional for PHY specific drivers. When
615 * not provided, the default MMD read function will be used
616 * by phy_read_mmd(), which will use either a direct read for
617 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
618 * devnum is the MMD device number within the PHY device,
619 * regnum is the register within the selected MMD device.
620 */
621 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
622
623 /*
624 * Phy specific driver override for writing a MMD register.
625 * This function is optional for PHY specific drivers. When
626 * not provided, the default MMD write function will be used
627 * by phy_write_mmd(), which will use either a direct write for
628 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
629 * devnum is the MMD device number within the PHY device,
630 * regnum is the register within the selected MMD device.
631 * val is the value to be written.
632 */
633 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
634 u16 val);
635
78ffc4ac
RK
636 int (*read_page)(struct phy_device *dev);
637 int (*write_page)(struct phy_device *dev, int page);
638
2f438366
ES
639 /* Get the size and type of the eeprom contained within a plug-in
640 * module */
641 int (*module_info)(struct phy_device *dev,
642 struct ethtool_modinfo *modinfo);
643
644 /* Get the eeprom information from the plug-in module */
645 int (*module_eeprom)(struct phy_device *dev,
646 struct ethtool_eeprom *ee, u8 *data);
647
f3a40945
AL
648 /* Get statistics from the phy using ethtool */
649 int (*get_sset_count)(struct phy_device *dev);
650 void (*get_strings)(struct phy_device *dev, u8 *data);
651 void (*get_stats)(struct phy_device *dev,
652 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
653
654 /* Get and Set PHY tunables */
655 int (*get_tunable)(struct phy_device *dev,
656 struct ethtool_tunable *tuna, void *data);
657 int (*set_tunable)(struct phy_device *dev,
658 struct ethtool_tunable *tuna,
659 const void *data);
f0f9b4ed 660 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 661};
a9049e0c
AL
662#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
663 struct phy_driver, mdiodrv)
00db8189 664
f62220d3
AF
665#define PHY_ANY_ID "MATCH ANY PHY"
666#define PHY_ANY_UID 0xffffffff
667
668/* A Structure for boards to register fixups with the PHY Lib */
669struct phy_fixup {
670 struct list_head list;
4567d686 671 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
672 u32 phy_uid;
673 u32 phy_uid_mask;
674 int (*run)(struct phy_device *phydev);
675};
676
da4625ac
RK
677const char *phy_speed_to_str(int speed);
678const char *phy_duplex_to_str(unsigned int duplex);
679
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RK
680/* A structure for mapping a particular speed and duplex
681 * combination to a particular SUPPORTED and ADVERTISED value
682 */
683struct phy_setting {
684 u32 speed;
685 u8 duplex;
686 u8 bit;
687};
688
689const struct phy_setting *
690phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
691 size_t maxbit, bool exact);
692size_t phy_speeds(unsigned int *speeds, size_t size,
693 unsigned long *mask, size_t maxbit);
694
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RK
695void phy_resolve_aneg_linkmode(struct phy_device *phydev);
696
efabdfb9
AF
697/**
698 * phy_read_mmd - Convenience function for reading a register
699 * from an MMD on a given PHY.
700 * @phydev: The phy_device struct
701 * @devad: The MMD to read from
702 * @regnum: The register on the MMD to read
703 *
704 * Same rules as for phy_read();
705 */
9860118b 706int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 707
2e888103
LB
708/**
709 * phy_read - Convenience function for reading a given PHY register
710 * @phydev: the phy_device struct
711 * @regnum: register number to read
712 *
713 * NOTE: MUST NOT be called from interrupt context,
714 * because the bus read/write functions may wait for an interrupt
715 * to conclude the operation.
716 */
abf35df2 717static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 718{
e5a03bfd 719 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
720}
721
788f9933
RK
722/**
723 * __phy_read - convenience function for reading a given PHY register
724 * @phydev: the phy_device struct
725 * @regnum: register number to read
726 *
727 * The caller must have taken the MDIO bus lock.
728 */
729static inline int __phy_read(struct phy_device *phydev, u32 regnum)
730{
731 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
732}
733
2e888103
LB
734/**
735 * phy_write - Convenience function for writing a given PHY register
736 * @phydev: the phy_device struct
737 * @regnum: register number to write
738 * @val: value to write to @regnum
739 *
740 * NOTE: MUST NOT be called from interrupt context,
741 * because the bus read/write functions may wait for an interrupt
742 * to conclude the operation.
743 */
abf35df2 744static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 745{
e5a03bfd 746 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
747}
748
788f9933
RK
749/**
750 * __phy_write - Convenience function for writing a given PHY register
751 * @phydev: the phy_device struct
752 * @regnum: register number to write
753 * @val: value to write to @regnum
754 *
755 * The caller must have taken the MDIO bus lock.
756 */
757static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
758{
759 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
760 val);
761}
762
763int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 764int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 765
ac8322d8
HK
766/**
767 * __phy_set_bits - Convenience function for setting bits in a PHY register
768 * @phydev: the phy_device struct
769 * @regnum: register number to write
770 * @val: bits to set
771 *
772 * The caller must have taken the MDIO bus lock.
773 */
774static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
775{
776 return __phy_modify(phydev, regnum, 0, val);
777}
778
779/**
780 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
781 * @phydev: the phy_device struct
782 * @regnum: register number to write
783 * @val: bits to clear
784 *
785 * The caller must have taken the MDIO bus lock.
786 */
787static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
788 u16 val)
789{
790 return __phy_modify(phydev, regnum, val, 0);
791}
792
793/**
794 * phy_set_bits - Convenience function for setting bits in a PHY register
795 * @phydev: the phy_device struct
796 * @regnum: register number to write
797 * @val: bits to set
798 */
799static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
800{
801 return phy_modify(phydev, regnum, 0, val);
802}
803
804/**
805 * phy_clear_bits - Convenience function for clearing bits in a PHY register
806 * @phydev: the phy_device struct
807 * @regnum: register number to write
808 * @val: bits to clear
809 */
810static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
811{
812 return phy_modify(phydev, regnum, val, 0);
813}
814
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FF
815/**
816 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
817 * @phydev: the phy_device struct
818 *
819 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
820 * PHY_IGNORE_INTERRUPT
821 */
822static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
823{
824 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
825}
826
4284b6a5
FF
827/**
828 * phy_is_internal - Convenience function for testing if a PHY is internal
829 * @phydev: the phy_device struct
830 */
831static inline bool phy_is_internal(struct phy_device *phydev)
832{
833 return phydev->is_internal;
834}
835
32d0f783
IS
836/**
837 * phy_interface_mode_is_rgmii - Convenience function for testing if a
838 * PHY interface mode is RGMII (all variants)
839 * @mode: the phy_interface_t enum
840 */
841static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
842{
843 return mode >= PHY_INTERFACE_MODE_RGMII &&
844 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
845};
846
365c1e64
RK
847/**
848 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
849 * negotiation
850 * @mode: one of &enum phy_interface_t
851 *
852 * Returns true if the phy interface mode uses the 16-bit negotiation
853 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
854 */
855static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
856{
857 return mode == PHY_INTERFACE_MODE_1000BASEX ||
858 mode == PHY_INTERFACE_MODE_2500BASEX;
859}
860
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FF
861/**
862 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
863 * is RGMII (all variants)
864 * @phydev: the phy_device struct
865 */
866static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
867{
32d0f783 868 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
869};
870
871/*
872 * phy_is_pseudo_fixed_link - Convenience function for testing if this
873 * PHY is the CPU port facing side of an Ethernet switch, or similar.
874 * @phydev: the phy_device struct
875 */
876static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
877{
878 return phydev->is_pseudo_fixed_link;
e463d88c
FF
879}
880
efabdfb9
AF
881/**
882 * phy_write_mmd - Convenience function for writing a register
883 * on an MMD on a given PHY.
884 * @phydev: The phy_device struct
885 * @devad: The MMD to read from
886 * @regnum: The register on the MMD to read
887 * @val: value to write to @regnum
888 *
889 * Same rules as for phy_write();
890 */
9860118b 891int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 892
78ffc4ac
RK
893int phy_save_page(struct phy_device *phydev);
894int phy_select_page(struct phy_device *phydev, int page);
895int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
896int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
897int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
898int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
899 u16 mask, u16 set);
900
ac28b9f8 901struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
902 bool is_c45,
903 struct phy_c45_device_ids *c45_ids);
90eff909 904#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 905struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 906int phy_device_register(struct phy_device *phy);
90eff909
FF
907void phy_device_free(struct phy_device *phydev);
908#else
909static inline
910struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
911{
912 return NULL;
913}
914
915static inline int phy_device_register(struct phy_device *phy)
916{
917 return 0;
918}
919
920static inline void phy_device_free(struct phy_device *phydev) { }
921#endif /* CONFIG_PHYLIB */
38737e49 922void phy_device_remove(struct phy_device *phydev);
2f5cb434 923int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
924int phy_suspend(struct phy_device *phydev);
925int phy_resume(struct phy_device *phydev);
9c2c2e62 926int __phy_resume(struct phy_device *phydev);
f0f9b4ed 927int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
928struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
929 phy_interface_t interface);
f8f76db1 930struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
931int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
932 u32 flags, phy_interface_t interface);
fa94f6d9 933int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
934 void (*handler)(struct net_device *),
935 phy_interface_t interface);
936struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
937 void (*handler)(struct net_device *),
938 phy_interface_t interface);
e1393456
AF
939void phy_disconnect(struct phy_device *phydev);
940void phy_detach(struct phy_device *phydev);
941void phy_start(struct phy_device *phydev);
942void phy_stop(struct phy_device *phydev);
943int phy_start_aneg(struct phy_device *phydev);
372788f9 944int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
945int phy_speed_down(struct phy_device *phydev, bool sync);
946int phy_speed_up(struct phy_device *phydev);
e1393456 947
e1393456 948int phy_stop_interrupts(struct phy_device *phydev);
002ba705 949int phy_restart_aneg(struct phy_device *phydev);
a9668491 950int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 951
bafbdd52
SS
952static inline void phy_device_reset(struct phy_device *phydev, int value)
953{
954 mdio_device_reset(&phydev->mdio, value);
955}
956
72ba48be 957#define phydev_err(_phydev, format, args...) \
e5a03bfd 958 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be
AL
959
960#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 961 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 962
84eff6d1
AL
963static inline const char *phydev_name(const struct phy_device *phydev)
964{
e5a03bfd 965 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
966}
967
2220943a
AL
968void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
969 __printf(2, 3);
970void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
971
972/* Clause 22 PHY */
af6b6967 973int genphy_config_init(struct phy_device *phydev);
3fb69bca 974int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
975int genphy_restart_aneg(struct phy_device *phydev);
976int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 977int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
978int genphy_update_link(struct phy_device *phydev);
979int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
980int genphy_suspend(struct phy_device *phydev);
981int genphy_resume(struct phy_device *phydev);
f0f9b4ed 982int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 983int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
984static inline int genphy_no_soft_reset(struct phy_device *phydev)
985{
986 return 0;
987}
5df7af85
KH
988int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
989 u16 regnum);
990int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
991 u16 regnum, u16 val);
5acde34a
RK
992
993/* Clause 45 PHY */
994int genphy_c45_restart_aneg(struct phy_device *phydev);
995int genphy_c45_aneg_done(struct phy_device *phydev);
996int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
997int genphy_c45_read_lpa(struct phy_device *phydev);
998int genphy_c45_read_pma(struct phy_device *phydev);
999int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1000int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1001int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 1002
e8a714e0
FF
1003/* The gen10g_* functions are the old Clause 45 stub */
1004int gen10g_config_aneg(struct phy_device *phydev);
1005int gen10g_read_status(struct phy_device *phydev);
1006int gen10g_no_soft_reset(struct phy_device *phydev);
1007int gen10g_config_init(struct phy_device *phydev);
1008int gen10g_suspend(struct phy_device *phydev);
1009int gen10g_resume(struct phy_device *phydev);
1010
00fde795
HK
1011static inline int phy_read_status(struct phy_device *phydev)
1012{
1013 if (!phydev->drv)
1014 return -EIO;
1015
1016 if (phydev->drv->read_status)
1017 return phydev->drv->read_status(phydev);
1018 else
1019 return genphy_read_status(phydev);
1020}
1021
00db8189 1022void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1023void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1024int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1025int phy_drivers_register(struct phy_driver *new_driver, int n,
1026 struct module *owner);
4f9c85a1 1027void phy_state_machine(struct work_struct *work);
664fcf12 1028void phy_change_work(struct work_struct *work);
28b2e0d2 1029void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1030void phy_start_machine(struct phy_device *phydev);
00db8189 1031void phy_stop_machine(struct phy_device *phydev);
f555f34f 1032void phy_trigger_machine(struct phy_device *phydev, bool sync);
00db8189 1033int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1034void phy_ethtool_ksettings_get(struct phy_device *phydev,
1035 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1036int phy_ethtool_ksettings_set(struct phy_device *phydev,
1037 const struct ethtool_link_ksettings *cmd);
4017b4d3 1038int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
1039int phy_start_interrupts(struct phy_device *phydev);
1040void phy_print_status(struct phy_device *phydev);
f3a6bd39 1041int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
00db8189 1042
f62220d3 1043int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1044 int (*run)(struct phy_device *));
f62220d3 1045int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1046 int (*run)(struct phy_device *));
f62220d3 1047int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1048 int (*run)(struct phy_device *));
f62220d3 1049
f38e7a32
WH
1050int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1051int phy_unregister_fixup_for_id(const char *bus_id);
1052int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1053
a59a4d19
GC
1054int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1055int phy_get_eee_err(struct phy_device *phydev);
1056int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1057int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1058int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1059void phy_ethtool_get_wol(struct phy_device *phydev,
1060 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1061int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1062 struct ethtool_link_ksettings *cmd);
1063int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1064 const struct ethtool_link_ksettings *cmd);
e86a8987 1065int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1066
90eff909 1067#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1068int __init mdio_bus_init(void);
1069void mdio_bus_exit(void);
9e8d438e
FF
1070#endif
1071
1072/* Inline function for use within net/core/ethtool.c (built-in) */
1073static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1074{
9e8d438e
FF
1075 if (!phydev->drv)
1076 return -EIO;
1077
1078 mutex_lock(&phydev->lock);
1079 phydev->drv->get_strings(phydev, data);
1080 mutex_unlock(&phydev->lock);
1081
1082 return 0;
c59530d0
FF
1083}
1084
9e8d438e 1085static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1086{
9e8d438e
FF
1087 int ret;
1088
1089 if (!phydev->drv)
1090 return -EIO;
1091
1092 if (phydev->drv->get_sset_count &&
1093 phydev->drv->get_strings &&
1094 phydev->drv->get_stats) {
1095 mutex_lock(&phydev->lock);
1096 ret = phydev->drv->get_sset_count(phydev);
1097 mutex_unlock(&phydev->lock);
1098
1099 return ret;
1100 }
1101
c59530d0
FF
1102 return -EOPNOTSUPP;
1103}
1104
9e8d438e
FF
1105static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1106 struct ethtool_stats *stats, u64 *data)
c59530d0 1107{
9e8d438e
FF
1108 if (!phydev->drv)
1109 return -EIO;
1110
1111 mutex_lock(&phydev->lock);
1112 phydev->drv->get_stats(phydev, stats, data);
1113 mutex_unlock(&phydev->lock);
1114
1115 return 0;
c59530d0 1116}
9b9a8bfc 1117
00db8189 1118extern struct bus_type mdio_bus_type;
c31accd1 1119
648ea013
FF
1120struct mdio_board_info {
1121 const char *bus_id;
1122 char modalias[MDIO_NAME_SIZE];
1123 int mdio_addr;
1124 const void *platform_data;
1125};
1126
90eff909 1127#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1128int mdiobus_register_board_info(const struct mdio_board_info *info,
1129 unsigned int n);
1130#else
1131static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1132 unsigned int n)
1133{
1134 return 0;
1135}
1136#endif
1137
1138
c31accd1
JH
1139/**
1140 * module_phy_driver() - Helper macro for registering PHY drivers
1141 * @__phy_drivers: array of PHY drivers to register
1142 *
1143 * Helper macro for PHY drivers which do not do anything special in module
1144 * init/exit. Each module may only use this macro once, and calling it
1145 * replaces module_init() and module_exit().
1146 */
1147#define phy_module_driver(__phy_drivers, __count) \
1148static int __init phy_module_init(void) \
1149{ \
be01da72 1150 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1151} \
1152module_init(phy_module_init); \
1153static void __exit phy_module_exit(void) \
1154{ \
1155 phy_drivers_unregister(__phy_drivers, __count); \
1156} \
1157module_exit(phy_module_exit)
1158
1159#define module_phy_driver(__phy_drivers) \
1160 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1161
00db8189 1162#endif /* __PHY_H */