tcp: repaired skbs must init their tso_segs
[linux-block.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189 2 * Framework and drivers for configuring and reading different PHYs
d8de01b7 3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
00db8189
AF
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
b31cdffa 22#include <linux/linkmode.h>
bac83c65 23#include <linux/mdio.h>
13df29f6 24#include <linux/mii.h>
3e3aaf64 25#include <linux/module.h>
13df29f6
MR
26#include <linux/timer.h>
27#include <linux/workqueue.h>
8626d3b4 28#include <linux/mod_devicetable.h>
00db8189 29
60063497 30#include <linux/atomic.h>
0ac49527 31
e9fbdf17 32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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AF
33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
e9fbdf17
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36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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43 SUPPORTED_1000baseT_Full)
44
719655a1
AL
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
9e857a40 51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
719655a1
AL
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
53
54#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
55#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
56#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
57#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
58#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
59#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
9e857a40 60#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
719655a1 61#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 62
3c1bcc86
AL
63extern const int phy_10_100_features_array[4];
64extern const int phy_basic_t1_features_array[2];
65extern const int phy_gbit_features_array[2];
66extern const int phy_10gbit_features_array[1];
67
c5e38a94
AF
68/*
69 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
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70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
71 * the attached driver handles the interrupt
72 */
73#define PHY_POLL -1
74#define PHY_IGNORE_INTERRUPT -2
75
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76#define PHY_IS_INTERNAL 0x00000001
77#define PHY_RST_AFTER_CLK_EN 0x00000002
a9049e0c 78#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 79
e8a2b6a4
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80/* Interface Mode definitions */
81typedef enum {
4157ef1b 82 PHY_INTERFACE_MODE_NA,
735d8a18 83 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
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84 PHY_INTERFACE_MODE_MII,
85 PHY_INTERFACE_MODE_GMII,
86 PHY_INTERFACE_MODE_SGMII,
87 PHY_INTERFACE_MODE_TBI,
2cc70ba4 88 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
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89 PHY_INTERFACE_MODE_RMII,
90 PHY_INTERFACE_MODE_RGMII,
a999589c 91 PHY_INTERFACE_MODE_RGMII_ID,
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92 PHY_INTERFACE_MODE_RGMII_RXID,
93 PHY_INTERFACE_MODE_RGMII_TXID,
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94 PHY_INTERFACE_MODE_RTBI,
95 PHY_INTERFACE_MODE_SMII,
898dd0bd 96 PHY_INTERFACE_MODE_XGMII,
fd70f72c 97 PHY_INTERFACE_MODE_MOCA,
b9d12085 98 PHY_INTERFACE_MODE_QSGMII,
572de608 99 PHY_INTERFACE_MODE_TRGMII,
55601a88
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100 PHY_INTERFACE_MODE_1000BASEX,
101 PHY_INTERFACE_MODE_2500BASEX,
102 PHY_INTERFACE_MODE_RXAUI,
c125ca09
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103 PHY_INTERFACE_MODE_XAUI,
104 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
105 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 106 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
107} phy_interface_t;
108
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109/**
110 * phy_supported_speeds - return all speeds currently supported by a phy device
111 * @phy: The phy device to return supported speeds of.
112 * @speeds: buffer to store supported speeds in.
113 * @size: size of speeds buffer.
114 *
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115 * Description: Returns the number of supported speeds, and fills
116 * the speeds buffer with the supported speeds. If speeds buffer is
117 * too small to contain all currently supported speeds, will return as
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118 * many speeds as can fit.
119 */
120unsigned int phy_supported_speeds(struct phy_device *phy,
121 unsigned int *speeds,
122 unsigned int size);
123
8a2fe56e 124/**
d8de01b7
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125 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
126 * @interface: enum phy_interface_t value
127 *
128 * Description: maps 'enum phy_interface_t' defined in this file
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FF
129 * into the device tree binding of 'phy-mode', so that Ethernet
130 * device driver can get phy interface from device tree.
131 */
132static inline const char *phy_modes(phy_interface_t interface)
133{
134 switch (interface) {
135 case PHY_INTERFACE_MODE_NA:
136 return "";
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FF
137 case PHY_INTERFACE_MODE_INTERNAL:
138 return "internal";
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FF
139 case PHY_INTERFACE_MODE_MII:
140 return "mii";
141 case PHY_INTERFACE_MODE_GMII:
142 return "gmii";
143 case PHY_INTERFACE_MODE_SGMII:
144 return "sgmii";
145 case PHY_INTERFACE_MODE_TBI:
146 return "tbi";
147 case PHY_INTERFACE_MODE_REVMII:
148 return "rev-mii";
149 case PHY_INTERFACE_MODE_RMII:
150 return "rmii";
151 case PHY_INTERFACE_MODE_RGMII:
152 return "rgmii";
153 case PHY_INTERFACE_MODE_RGMII_ID:
154 return "rgmii-id";
155 case PHY_INTERFACE_MODE_RGMII_RXID:
156 return "rgmii-rxid";
157 case PHY_INTERFACE_MODE_RGMII_TXID:
158 return "rgmii-txid";
159 case PHY_INTERFACE_MODE_RTBI:
160 return "rtbi";
161 case PHY_INTERFACE_MODE_SMII:
162 return "smii";
163 case PHY_INTERFACE_MODE_XGMII:
164 return "xgmii";
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165 case PHY_INTERFACE_MODE_MOCA:
166 return "moca";
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167 case PHY_INTERFACE_MODE_QSGMII:
168 return "qsgmii";
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169 case PHY_INTERFACE_MODE_TRGMII:
170 return "trgmii";
55601a88
AL
171 case PHY_INTERFACE_MODE_1000BASEX:
172 return "1000base-x";
173 case PHY_INTERFACE_MODE_2500BASEX:
174 return "2500base-x";
175 case PHY_INTERFACE_MODE_RXAUI:
176 return "rxaui";
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177 case PHY_INTERFACE_MODE_XAUI:
178 return "xaui";
179 case PHY_INTERFACE_MODE_10GKR:
180 return "10gbase-kr";
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181 default:
182 return "unknown";
183 }
184}
185
00db8189 186
e8a2b6a4 187#define PHY_INIT_TIMEOUT 100000
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188#define PHY_STATE_TIME 1
189#define PHY_FORCE_TIMEOUT 10
00db8189 190
e8a2b6a4 191#define PHY_MAX_ADDR 32
00db8189 192
a4d00f17 193/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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194#define PHY_ID_FMT "%s:%02x"
195
4567d686 196#define MII_BUS_ID_SIZE 61
a4d00f17 197
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198/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
199 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
200#define MII_ADDR_C45 (1<<30)
201
313162d0 202struct device;
9525ae83 203struct phylink;
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204struct sk_buff;
205
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206/*
207 * The Bus class for PHYs. Devices which provide access to
208 * PHYs should register using this structure
209 */
00db8189 210struct mii_bus {
3e3aaf64 211 struct module *owner;
00db8189 212 const char *name;
9d9326d3 213 char id[MII_BUS_ID_SIZE];
00db8189 214 void *priv;
ccaa953e
AL
215 int (*read)(struct mii_bus *bus, int addr, int regnum);
216 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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217 int (*reset)(struct mii_bus *bus);
218
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219 /*
220 * A lock to ensure that only one thing can read/write
221 * the MDIO bus at a time
222 */
35b5f6b1 223 struct mutex mdio_lock;
00db8189 224
18ee49dd 225 struct device *parent;
46abc021
LB
226 enum {
227 MDIOBUS_ALLOCATED = 1,
228 MDIOBUS_REGISTERED,
229 MDIOBUS_UNREGISTERED,
230 MDIOBUS_RELEASED,
231 } state;
232 struct device dev;
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233
234 /* list of all PHYs on bus */
7f854420 235 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 236
c6883996 237 /* PHY addresses to be ignored when probing */
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MP
238 u32 phy_mask;
239
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FF
240 /* PHY addresses to ignore the TA/read failure */
241 u32 phy_ignore_ta_mask;
242
c5e38a94 243 /*
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AL
244 * An array of interrupts, each PHY's interrupt at the index
245 * matching its address
c5e38a94 246 */
e7f4dc35 247 int irq[PHY_MAX_ADDR];
69226896
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248
249 /* GPIO reset pulse width in microseconds */
250 int reset_delay_us;
d396e84c
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251 /* RESET GPIO descriptor pointer */
252 struct gpio_desc *reset_gpiod;
00db8189 253};
46abc021 254#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 255
eb8a54a7
TT
256struct mii_bus *mdiobus_alloc_size(size_t);
257static inline struct mii_bus *mdiobus_alloc(void)
258{
259 return mdiobus_alloc_size(0);
260}
261
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262int __mdiobus_register(struct mii_bus *bus, struct module *owner);
263#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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LB
264void mdiobus_unregister(struct mii_bus *bus);
265void mdiobus_free(struct mii_bus *bus);
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266struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
267static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
268{
269 return devm_mdiobus_alloc_size(dev, 0);
270}
271
272void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 273struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 274
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275#define PHY_INTERRUPT_DISABLED false
276#define PHY_INTERRUPT_ENABLED true
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277
278/* PHY state machine states:
279 *
280 * DOWN: PHY device and driver are not ready for anything. probe
281 * should be called if and only if the PHY is in this state,
282 * given that the PHY device exists.
899a3cbb 283 * - PHY driver probe function will set the state to READY
00db8189
AF
284 *
285 * READY: PHY is ready to send and receive packets, but the
286 * controller is not. By default, PHYs which do not implement
899a3cbb 287 * probe will be set to this state by phy_probe().
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AF
288 * - start will set the state to UP
289 *
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290 * UP: The PHY and attached device are ready to do work.
291 * Interrupts should be started here.
85a1f31d 292 * - timer moves to NOLINK or RUNNING
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293 *
294 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 295 * - irq or timer will set RUNNING if link comes back
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296 * - phy_stop moves to HALTED
297 *
298 * FORCING: PHY is being configured with forced settings
299 * - if link is up, move to RUNNING
300 * - If link is down, we drop to the next highest setting, and
301 * retry (FORCING) after a timeout
302 * - phy_stop moves to HALTED
303 *
304 * RUNNING: PHY is currently up, running, and possibly sending
305 * and/or receiving packets
8deeb630 306 * - irq or timer will set NOLINK if link goes down
00db8189
AF
307 * - phy_stop moves to HALTED
308 *
309 * CHANGELINK: PHY experienced a change in link state
310 * - timer moves to RUNNING if link
311 * - timer moves to NOLINK if the link is down
312 * - phy_stop moves to HALTED
313 *
314 * HALTED: PHY is up, but no polling or interrupts are done. Or
315 * PHY is in an error state.
316 *
317 * - phy_start moves to RESUMING
318 *
319 * RESUMING: PHY was halted, but now wants to run again.
320 * - If we are forcing, or aneg is done, timer moves to RUNNING
321 * - If aneg is not done, timer moves to AN
322 * - phy_stop moves to HALTED
323 */
324enum phy_state {
4017b4d3 325 PHY_DOWN = 0,
00db8189 326 PHY_READY,
2b3e88ea 327 PHY_HALTED,
00db8189 328 PHY_UP,
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AF
329 PHY_RUNNING,
330 PHY_NOLINK,
331 PHY_FORCING,
332 PHY_CHANGELINK,
00db8189
AF
333 PHY_RESUMING
334};
335
ac28b9f8
DD
336/**
337 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
338 * @devices_in_package: Bit vector of devices present.
339 * @device_ids: The device identifer for each present device.
340 */
341struct phy_c45_device_ids {
342 u32 devices_in_package;
343 u32 device_ids[8];
344};
c1f19b51 345
00db8189
AF
346/* phy_device: An instance of a PHY
347 *
348 * drv: Pointer to the driver for this PHY instance
00db8189 349 * phy_id: UID for this device found during discovery
ac28b9f8
DD
350 * c45_ids: 802.3-c45 Device Identifers if is_c45.
351 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 352 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 353 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 354 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 355 * suspended: Set to true if this phy has been suspended successfully.
a3995460 356 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 357 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
358 * state: state of the PHY for management purposes
359 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
360 * link_timeout: The number of timer firings to wait before the
361 * giving up on the current attempt at acquiring a link
362 * irq: IRQ number of the PHY's interrupt (-1 if none)
363 * phy_timer: The timer for handling the state machine
00db8189
AF
364 * attached_dev: The attached enet driver's device instance ptr
365 * adjust_link: Callback for the enet controller to respond to
366 * changes in the link state.
00db8189 367 *
114002bc
FF
368 * speed, duplex, pause, supported, advertising, lp_advertising,
369 * and autoneg are used like in mii_if_info
00db8189
AF
370 *
371 * interrupts currently only supports enabled or disabled,
372 * but could be changed in the future to support enabling
373 * and disabling specific interrupts
374 *
375 * Contains some infrastructure for polling and interrupt
376 * handling, as well as handling shifts in PHY hardware state
377 */
378struct phy_device {
e5a03bfd
AL
379 struct mdio_device mdio;
380
00db8189
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381 /* Information about the PHY type */
382 /* And management functions */
383 struct phy_driver *drv;
384
00db8189
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385 u32 phy_id;
386
ac28b9f8 387 struct phy_c45_device_ids c45_ids;
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388 unsigned is_c45:1;
389 unsigned is_internal:1;
390 unsigned is_pseudo_fixed_link:1;
391 unsigned has_fixups:1;
392 unsigned suspended:1;
393 unsigned sysfs_links:1;
394 unsigned loopback_enabled:1;
395
396 unsigned autoneg:1;
397 /* The most recently read link state */
398 unsigned link:1;
ac28b9f8 399
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400 /* Interrupts are enabled */
401 unsigned interrupts:1;
402
00db8189
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403 enum phy_state state;
404
405 u32 dev_flags;
406
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407 phy_interface_t interface;
408
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409 /*
410 * forced speed & duplex (no autoneg)
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411 * partner speed & duplex & pause (autoneg)
412 */
413 int speed;
414 int duplex;
415 int pause;
416 int asym_pause;
417
3c1bcc86
AL
418 /* Union of PHY and Attached devices' supported link modes */
419 /* See ethtool.h for more info */
420 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
421 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 422 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
00db8189 423
d853d145 424 /* Energy efficient ethernet modes which should be prohibited */
425 u32 eee_broken_modes;
426
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427 int link_timeout;
428
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ZB
429#ifdef CONFIG_LED_TRIGGER_PHY
430 struct phy_led_trigger *phy_led_triggers;
431 unsigned int phy_num_led_triggers;
432 struct phy_led_trigger *last_triggered;
3928ee64
MS
433
434 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
435#endif
436
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437 /*
438 * Interrupt number for this PHY
439 * -1 means no interrupt
440 */
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AF
441 int irq;
442
443 /* private data pointer */
444 /* For use by PHYs to maintain extra state */
445 void *priv;
446
447 /* Interrupt and Polling infrastructure */
a390d1f3 448 struct delayed_work state_queue;
00db8189 449
35b5f6b1 450 struct mutex lock;
00db8189 451
9525ae83 452 struct phylink *phylink;
00db8189
AF
453 struct net_device *attached_dev;
454
634ec36c 455 u8 mdix;
f4ed2fe3 456 u8 mdix_ctrl;
634ec36c 457
a81497be 458 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 459 void (*adjust_link)(struct net_device *dev);
00db8189 460};
e5a03bfd
AL
461#define to_phy_device(d) container_of(to_mdio_device(d), \
462 struct phy_device, mdio)
00db8189
AF
463
464/* struct phy_driver: Driver structure for a particular PHY type
465 *
a9049e0c 466 * driver_data: static driver data
00db8189
AF
467 * phy_id: The result of reading the UID registers of this PHY
468 * type, and ANDing them with the phy_id_mask. This driver
469 * only works for PHYs with IDs which match this field
470 * name: The friendly name of this PHY type
471 * phy_id_mask: Defines the important bits of the phy_id
3e64cf7a
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472 * features: A mandatory list of features (speed, duplex, etc)
473 * supported by this PHY
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474 * flags: A bitfield defining certain other features this PHY
475 * supports (like interrupts)
476 *
00fde795
HK
477 * All functions are optional. If config_aneg or read_status
478 * are not implemented, the phy core uses the genphy versions.
479 * Note that none of these functions should be called from
480 * interrupt time. The goal is for the bus read/write functions
481 * to be able to block when the bus transaction is happening,
482 * and be freed up by an interrupt (The MPC85xx has this ability,
483 * though it is not currently supported in the driver).
00db8189
AF
484 */
485struct phy_driver {
a9049e0c 486 struct mdio_driver_common mdiodrv;
00db8189
AF
487 u32 phy_id;
488 char *name;
511e3036 489 u32 phy_id_mask;
719655a1 490 const unsigned long * const features;
00db8189 491 u32 flags;
860f6e9e 492 const void *driver_data;
00db8189 493
c5e38a94 494 /*
9df81dd7
FF
495 * Called to issue a PHY software reset
496 */
497 int (*soft_reset)(struct phy_device *phydev);
498
499 /*
c5e38a94
AF
500 * Called to initialize the PHY,
501 * including after a reset
502 */
00db8189
AF
503 int (*config_init)(struct phy_device *phydev);
504
c5e38a94
AF
505 /*
506 * Called during discovery. Used to set
507 * up device-specific structures, if any
508 */
00db8189
AF
509 int (*probe)(struct phy_device *phydev);
510
511 /* PHY Power Management */
512 int (*suspend)(struct phy_device *phydev);
513 int (*resume)(struct phy_device *phydev);
514
c5e38a94
AF
515 /*
516 * Configures the advertisement and resets
00db8189
AF
517 * autonegotiation if phydev->autoneg is on,
518 * forces the speed to the current settings in phydev
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AF
519 * if phydev->autoneg is off
520 */
00db8189
AF
521 int (*config_aneg)(struct phy_device *phydev);
522
76a423a3
FF
523 /* Determines the auto negotiation result */
524 int (*aneg_done)(struct phy_device *phydev);
525
00db8189
AF
526 /* Determines the negotiated speed and duplex */
527 int (*read_status)(struct phy_device *phydev);
528
529 /* Clears any pending interrupts */
530 int (*ack_interrupt)(struct phy_device *phydev);
531
532 /* Enables or disables interrupts */
533 int (*config_intr)(struct phy_device *phydev);
534
a8729eb3
AG
535 /*
536 * Checks if the PHY generated an interrupt.
537 * For multi-PHY devices with shared PHY interrupt pin
538 */
539 int (*did_interrupt)(struct phy_device *phydev);
540
00db8189
AF
541 /* Clears up any memory if needed */
542 void (*remove)(struct phy_device *phydev);
543
a30e2c18
DD
544 /* Returns true if this is a suitable driver for the given
545 * phydev. If NULL, matching is based on phy_id and
546 * phy_id_mask.
547 */
548 int (*match_phy_device)(struct phy_device *phydev);
549
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550 /* Handles ethtool queries for hardware time stamping. */
551 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
552
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553 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
554 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
555
556 /*
557 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
558 * the phy driver promises to deliver it using netif_rx() as
559 * soon as a timestamp becomes available. One of the
560 * PTP_CLASS_ values is passed in 'type'. The function must
561 * return true if the skb is accepted for delivery.
562 */
563 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
564
565 /*
566 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 567 * to deliver it using skb_complete_tx_timestamp() as soon as a
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568 * timestamp becomes available. One of the PTP_CLASS_ values
569 * is passed in 'type'.
570 */
571 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
572
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573 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
574 * enable Wake on LAN, so set_wol is provided to be called in the
575 * ethernet driver's set_wol function. */
576 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
577
578 /* See set_wol, but for checking whether Wake on LAN is enabled. */
579 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
580
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581 /*
582 * Called to inform a PHY device driver when the core is about to
583 * change the link state. This callback is supposed to be used as
584 * fixup hook for drivers that need to take action when the link
585 * state changes. Drivers are by no means allowed to mess with the
586 * PHY device structure in their implementations.
587 */
588 void (*link_change_notify)(struct phy_device *dev);
589
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590 /*
591 * Phy specific driver override for reading a MMD register.
592 * This function is optional for PHY specific drivers. When
593 * not provided, the default MMD read function will be used
594 * by phy_read_mmd(), which will use either a direct read for
595 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
596 * devnum is the MMD device number within the PHY device,
597 * regnum is the register within the selected MMD device.
598 */
599 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
600
601 /*
602 * Phy specific driver override for writing a MMD register.
603 * This function is optional for PHY specific drivers. When
604 * not provided, the default MMD write function will be used
605 * by phy_write_mmd(), which will use either a direct write for
606 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
607 * devnum is the MMD device number within the PHY device,
608 * regnum is the register within the selected MMD device.
609 * val is the value to be written.
610 */
611 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
612 u16 val);
613
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614 int (*read_page)(struct phy_device *dev);
615 int (*write_page)(struct phy_device *dev, int page);
616
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617 /* Get the size and type of the eeprom contained within a plug-in
618 * module */
619 int (*module_info)(struct phy_device *dev,
620 struct ethtool_modinfo *modinfo);
621
622 /* Get the eeprom information from the plug-in module */
623 int (*module_eeprom)(struct phy_device *dev,
624 struct ethtool_eeprom *ee, u8 *data);
625
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626 /* Get statistics from the phy using ethtool */
627 int (*get_sset_count)(struct phy_device *dev);
628 void (*get_strings)(struct phy_device *dev, u8 *data);
629 void (*get_stats)(struct phy_device *dev,
630 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
631
632 /* Get and Set PHY tunables */
633 int (*get_tunable)(struct phy_device *dev,
634 struct ethtool_tunable *tuna, void *data);
635 int (*set_tunable)(struct phy_device *dev,
636 struct ethtool_tunable *tuna,
637 const void *data);
f0f9b4ed 638 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 639};
a9049e0c
AL
640#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
641 struct phy_driver, mdiodrv)
00db8189 642
f62220d3
AF
643#define PHY_ANY_ID "MATCH ANY PHY"
644#define PHY_ANY_UID 0xffffffff
645
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646#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
647#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
648#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
649
f62220d3
AF
650/* A Structure for boards to register fixups with the PHY Lib */
651struct phy_fixup {
652 struct list_head list;
4567d686 653 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
654 u32 phy_uid;
655 u32 phy_uid_mask;
656 int (*run)(struct phy_device *phydev);
657};
658
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659const char *phy_speed_to_str(int speed);
660const char *phy_duplex_to_str(unsigned int duplex);
661
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662/* A structure for mapping a particular speed and duplex
663 * combination to a particular SUPPORTED and ADVERTISED value
664 */
665struct phy_setting {
666 u32 speed;
667 u8 duplex;
668 u8 bit;
669};
670
671const struct phy_setting *
672phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 673 bool exact);
0ccb4fc6 674size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 675 unsigned long *mask);
0ccb4fc6 676
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HK
677/**
678 * phy_is_started - Convenience function to check whether PHY is started
679 * @phydev: The phy_device struct
680 */
681static inline bool phy_is_started(struct phy_device *phydev)
682{
a2fc9d7e 683 return phydev->state >= PHY_UP;
2b3e88ea
HK
684}
685
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RK
686void phy_resolve_aneg_linkmode(struct phy_device *phydev);
687
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AF
688/**
689 * phy_read_mmd - Convenience function for reading a register
690 * from an MMD on a given PHY.
691 * @phydev: The phy_device struct
692 * @devad: The MMD to read from
693 * @regnum: The register on the MMD to read
694 *
695 * Same rules as for phy_read();
696 */
9860118b 697int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 698
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LB
699/**
700 * phy_read - Convenience function for reading a given PHY register
701 * @phydev: the phy_device struct
702 * @regnum: register number to read
703 *
704 * NOTE: MUST NOT be called from interrupt context,
705 * because the bus read/write functions may wait for an interrupt
706 * to conclude the operation.
707 */
abf35df2 708static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 709{
e5a03bfd 710 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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LB
711}
712
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713/**
714 * __phy_read - convenience function for reading a given PHY register
715 * @phydev: the phy_device struct
716 * @regnum: register number to read
717 *
718 * The caller must have taken the MDIO bus lock.
719 */
720static inline int __phy_read(struct phy_device *phydev, u32 regnum)
721{
722 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
723}
724
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LB
725/**
726 * phy_write - Convenience function for writing a given PHY register
727 * @phydev: the phy_device struct
728 * @regnum: register number to write
729 * @val: value to write to @regnum
730 *
731 * NOTE: MUST NOT be called from interrupt context,
732 * because the bus read/write functions may wait for an interrupt
733 * to conclude the operation.
734 */
abf35df2 735static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 736{
e5a03bfd 737 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
738}
739
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740/**
741 * __phy_write - Convenience function for writing a given PHY register
742 * @phydev: the phy_device struct
743 * @regnum: register number to write
744 * @val: value to write to @regnum
745 *
746 * The caller must have taken the MDIO bus lock.
747 */
748static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
749{
750 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
751 val);
752}
753
754int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 755int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 756
ac8322d8
HK
757/**
758 * __phy_set_bits - Convenience function for setting bits in a PHY register
759 * @phydev: the phy_device struct
760 * @regnum: register number to write
761 * @val: bits to set
762 *
763 * The caller must have taken the MDIO bus lock.
764 */
765static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
766{
767 return __phy_modify(phydev, regnum, 0, val);
768}
769
770/**
771 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
772 * @phydev: the phy_device struct
773 * @regnum: register number to write
774 * @val: bits to clear
775 *
776 * The caller must have taken the MDIO bus lock.
777 */
778static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
779 u16 val)
780{
781 return __phy_modify(phydev, regnum, val, 0);
782}
783
784/**
785 * phy_set_bits - Convenience function for setting bits in a PHY register
786 * @phydev: the phy_device struct
787 * @regnum: register number to write
788 * @val: bits to set
789 */
790static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
791{
792 return phy_modify(phydev, regnum, 0, val);
793}
794
795/**
796 * phy_clear_bits - Convenience function for clearing bits in a PHY register
797 * @phydev: the phy_device struct
798 * @regnum: register number to write
799 * @val: bits to clear
800 */
801static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
802{
803 return phy_modify(phydev, regnum, val, 0);
804}
805
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FF
806/**
807 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
808 * @phydev: the phy_device struct
809 *
810 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
811 * PHY_IGNORE_INTERRUPT
812 */
813static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
814{
815 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
816}
817
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818/**
819 * phy_polling_mode - Convenience function for testing whether polling is
820 * used to detect PHY status changes
821 * @phydev: the phy_device struct
822 */
823static inline bool phy_polling_mode(struct phy_device *phydev)
824{
825 return phydev->irq == PHY_POLL;
826}
827
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FF
828/**
829 * phy_is_internal - Convenience function for testing if a PHY is internal
830 * @phydev: the phy_device struct
831 */
832static inline bool phy_is_internal(struct phy_device *phydev)
833{
834 return phydev->is_internal;
835}
836
32d0f783
IS
837/**
838 * phy_interface_mode_is_rgmii - Convenience function for testing if a
839 * PHY interface mode is RGMII (all variants)
840 * @mode: the phy_interface_t enum
841 */
842static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
843{
844 return mode >= PHY_INTERFACE_MODE_RGMII &&
845 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
846};
847
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RK
848/**
849 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
850 * negotiation
851 * @mode: one of &enum phy_interface_t
852 *
853 * Returns true if the phy interface mode uses the 16-bit negotiation
854 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
855 */
856static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
857{
858 return mode == PHY_INTERFACE_MODE_1000BASEX ||
859 mode == PHY_INTERFACE_MODE_2500BASEX;
860}
861
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862/**
863 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
864 * is RGMII (all variants)
865 * @phydev: the phy_device struct
866 */
867static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
868{
32d0f783 869 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
870};
871
872/*
873 * phy_is_pseudo_fixed_link - Convenience function for testing if this
874 * PHY is the CPU port facing side of an Ethernet switch, or similar.
875 * @phydev: the phy_device struct
876 */
877static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
878{
879 return phydev->is_pseudo_fixed_link;
e463d88c
FF
880}
881
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882/**
883 * phy_write_mmd - Convenience function for writing a register
884 * on an MMD on a given PHY.
885 * @phydev: The phy_device struct
886 * @devad: The MMD to read from
887 * @regnum: The register on the MMD to read
888 * @val: value to write to @regnum
889 *
890 * Same rules as for phy_write();
891 */
9860118b 892int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 893
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894int phy_save_page(struct phy_device *phydev);
895int phy_select_page(struct phy_device *phydev, int page);
896int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
897int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
898int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
899int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
900 u16 mask, u16 set);
901
ac28b9f8 902struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
903 bool is_c45,
904 struct phy_c45_device_ids *c45_ids);
90eff909 905#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 906struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 907int phy_device_register(struct phy_device *phy);
90eff909
FF
908void phy_device_free(struct phy_device *phydev);
909#else
910static inline
911struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
912{
913 return NULL;
914}
915
916static inline int phy_device_register(struct phy_device *phy)
917{
918 return 0;
919}
920
921static inline void phy_device_free(struct phy_device *phydev) { }
922#endif /* CONFIG_PHYLIB */
38737e49 923void phy_device_remove(struct phy_device *phydev);
2f5cb434 924int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
925int phy_suspend(struct phy_device *phydev);
926int phy_resume(struct phy_device *phydev);
9c2c2e62 927int __phy_resume(struct phy_device *phydev);
f0f9b4ed 928int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
929struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
930 phy_interface_t interface);
f8f76db1 931struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
932int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
933 u32 flags, phy_interface_t interface);
fa94f6d9 934int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
935 void (*handler)(struct net_device *),
936 phy_interface_t interface);
937struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
938 void (*handler)(struct net_device *),
939 phy_interface_t interface);
e1393456
AF
940void phy_disconnect(struct phy_device *phydev);
941void phy_detach(struct phy_device *phydev);
942void phy_start(struct phy_device *phydev);
943void phy_stop(struct phy_device *phydev);
944int phy_start_aneg(struct phy_device *phydev);
372788f9 945int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
946int phy_speed_down(struct phy_device *phydev, bool sync);
947int phy_speed_up(struct phy_device *phydev);
e1393456 948
e1393456 949int phy_stop_interrupts(struct phy_device *phydev);
002ba705 950int phy_restart_aneg(struct phy_device *phydev);
a9668491 951int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 952
bafbdd52
SS
953static inline void phy_device_reset(struct phy_device *phydev, int value)
954{
955 mdio_device_reset(&phydev->mdio, value);
956}
957
72ba48be 958#define phydev_err(_phydev, format, args...) \
e5a03bfd 959 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 960
c4fabb8b
AL
961#define phydev_info(_phydev, format, args...) \
962 dev_info(&_phydev->mdio.dev, format, ##args)
963
ab2a605f
AL
964#define phydev_warn(_phydev, format, args...) \
965 dev_warn(&_phydev->mdio.dev, format, ##args)
966
72ba48be 967#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 968 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 969
84eff6d1
AL
970static inline const char *phydev_name(const struct phy_device *phydev)
971{
e5a03bfd 972 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
973}
974
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AL
975void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
976 __printf(2, 3);
977void phy_attached_info(struct phy_device *phydev);
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978
979/* Clause 22 PHY */
af6b6967 980int genphy_config_init(struct phy_device *phydev);
3fb69bca 981int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
982int genphy_restart_aneg(struct phy_device *phydev);
983int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 984int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
985int genphy_update_link(struct phy_device *phydev);
986int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
987int genphy_suspend(struct phy_device *phydev);
988int genphy_resume(struct phy_device *phydev);
f0f9b4ed 989int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 990int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
991static inline int genphy_no_soft_reset(struct phy_device *phydev)
992{
993 return 0;
994}
5df7af85
KH
995int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
996 u16 regnum);
997int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
998 u16 regnum, u16 val);
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RK
999
1000/* Clause 45 PHY */
1001int genphy_c45_restart_aneg(struct phy_device *phydev);
1002int genphy_c45_aneg_done(struct phy_device *phydev);
1003int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
1004int genphy_c45_read_lpa(struct phy_device *phydev);
1005int genphy_c45_read_pma(struct phy_device *phydev);
1006int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1007int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1008int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 1009
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1010/* The gen10g_* functions are the old Clause 45 stub */
1011int gen10g_config_aneg(struct phy_device *phydev);
1012int gen10g_read_status(struct phy_device *phydev);
1013int gen10g_no_soft_reset(struct phy_device *phydev);
1014int gen10g_config_init(struct phy_device *phydev);
1015int gen10g_suspend(struct phy_device *phydev);
1016int gen10g_resume(struct phy_device *phydev);
1017
00fde795
HK
1018static inline int phy_read_status(struct phy_device *phydev)
1019{
1020 if (!phydev->drv)
1021 return -EIO;
1022
1023 if (phydev->drv->read_status)
1024 return phydev->drv->read_status(phydev);
1025 else
1026 return genphy_read_status(phydev);
1027}
1028
00db8189 1029void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1030void phy_drivers_unregister(struct phy_driver *drv, int n);
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AL
1031int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1032int phy_drivers_register(struct phy_driver *new_driver, int n,
1033 struct module *owner);
4f9c85a1 1034void phy_state_machine(struct work_struct *work);
28b2e0d2 1035void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1036void phy_start_machine(struct phy_device *phydev);
00db8189
AF
1037void phy_stop_machine(struct phy_device *phydev);
1038int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1039void phy_ethtool_ksettings_get(struct phy_device *phydev,
1040 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1041int phy_ethtool_ksettings_set(struct phy_device *phydev,
1042 const struct ethtool_link_ksettings *cmd);
4017b4d3 1043int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
1044int phy_start_interrupts(struct phy_device *phydev);
1045void phy_print_status(struct phy_device *phydev);
f3a6bd39 1046int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1047void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
c306ad36 1048void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1049void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1050void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1051 bool autoneg);
70814e81 1052void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1053bool phy_validate_pause(struct phy_device *phydev,
1054 struct ethtool_pauseparam *pp);
00db8189 1055
f62220d3 1056int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1057 int (*run)(struct phy_device *));
f62220d3 1058int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1059 int (*run)(struct phy_device *));
f62220d3 1060int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1061 int (*run)(struct phy_device *));
f62220d3 1062
f38e7a32
WH
1063int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1064int phy_unregister_fixup_for_id(const char *bus_id);
1065int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1066
a59a4d19
GC
1067int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1068int phy_get_eee_err(struct phy_device *phydev);
1069int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1070int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1071int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1072void phy_ethtool_get_wol(struct phy_device *phydev,
1073 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1074int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1075 struct ethtool_link_ksettings *cmd);
1076int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1077 const struct ethtool_link_ksettings *cmd);
e86a8987 1078int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1079
90eff909 1080#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1081int __init mdio_bus_init(void);
1082void mdio_bus_exit(void);
9e8d438e
FF
1083#endif
1084
1085/* Inline function for use within net/core/ethtool.c (built-in) */
1086static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1087{
9e8d438e
FF
1088 if (!phydev->drv)
1089 return -EIO;
1090
1091 mutex_lock(&phydev->lock);
1092 phydev->drv->get_strings(phydev, data);
1093 mutex_unlock(&phydev->lock);
1094
1095 return 0;
c59530d0
FF
1096}
1097
9e8d438e 1098static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1099{
9e8d438e
FF
1100 int ret;
1101
1102 if (!phydev->drv)
1103 return -EIO;
1104
1105 if (phydev->drv->get_sset_count &&
1106 phydev->drv->get_strings &&
1107 phydev->drv->get_stats) {
1108 mutex_lock(&phydev->lock);
1109 ret = phydev->drv->get_sset_count(phydev);
1110 mutex_unlock(&phydev->lock);
1111
1112 return ret;
1113 }
1114
c59530d0
FF
1115 return -EOPNOTSUPP;
1116}
1117
9e8d438e
FF
1118static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1119 struct ethtool_stats *stats, u64 *data)
c59530d0 1120{
9e8d438e
FF
1121 if (!phydev->drv)
1122 return -EIO;
1123
1124 mutex_lock(&phydev->lock);
1125 phydev->drv->get_stats(phydev, stats, data);
1126 mutex_unlock(&phydev->lock);
1127
1128 return 0;
c59530d0 1129}
9b9a8bfc 1130
00db8189 1131extern struct bus_type mdio_bus_type;
c31accd1 1132
648ea013
FF
1133struct mdio_board_info {
1134 const char *bus_id;
1135 char modalias[MDIO_NAME_SIZE];
1136 int mdio_addr;
1137 const void *platform_data;
1138};
1139
90eff909 1140#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1141int mdiobus_register_board_info(const struct mdio_board_info *info,
1142 unsigned int n);
1143#else
1144static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1145 unsigned int n)
1146{
1147 return 0;
1148}
1149#endif
1150
1151
c31accd1
JH
1152/**
1153 * module_phy_driver() - Helper macro for registering PHY drivers
1154 * @__phy_drivers: array of PHY drivers to register
1155 *
1156 * Helper macro for PHY drivers which do not do anything special in module
1157 * init/exit. Each module may only use this macro once, and calling it
1158 * replaces module_init() and module_exit().
1159 */
1160#define phy_module_driver(__phy_drivers, __count) \
1161static int __init phy_module_init(void) \
1162{ \
be01da72 1163 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1164} \
1165module_init(phy_module_init); \
1166static void __exit phy_module_exit(void) \
1167{ \
1168 phy_drivers_unregister(__phy_drivers, __count); \
1169} \
1170module_exit(phy_module_exit)
1171
1172#define module_phy_driver(__phy_drivers) \
1173 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1174
00db8189 1175#endif /* __PHY_H */