net: phy: Move linkmode helpers to somewhere public
[linux-block.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189
AF
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
b31cdffa 22#include <linux/linkmode.h>
bac83c65 23#include <linux/mdio.h>
13df29f6 24#include <linux/mii.h>
3e3aaf64 25#include <linux/module.h>
13df29f6
MR
26#include <linux/timer.h>
27#include <linux/workqueue.h>
8626d3b4 28#include <linux/mod_devicetable.h>
00db8189 29
60063497 30#include <linux/atomic.h>
0ac49527 31
e9fbdf17 32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
e9fbdf17
FF
36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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43 SUPPORTED_1000baseT_Full)
44
e9fbdf17
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45#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
46 PHY_100BT_FEATURES | \
47 PHY_DEFAULT_FEATURES)
48
49#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
50 PHY_1000BT_FEATURES)
51
52
c5e38a94
AF
53/*
54 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
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55 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
56 * the attached driver handles the interrupt
57 */
58#define PHY_POLL -1
59#define PHY_IGNORE_INTERRUPT -2
60
61#define PHY_HAS_INTERRUPT 0x00000001
1b86f702 62#define PHY_IS_INTERNAL 0x00000002
a9668491 63#define PHY_RST_AFTER_CLK_EN 0x00000004
a9049e0c 64#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 65
e8a2b6a4
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66/* Interface Mode definitions */
67typedef enum {
4157ef1b 68 PHY_INTERFACE_MODE_NA,
735d8a18 69 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
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70 PHY_INTERFACE_MODE_MII,
71 PHY_INTERFACE_MODE_GMII,
72 PHY_INTERFACE_MODE_SGMII,
73 PHY_INTERFACE_MODE_TBI,
2cc70ba4 74 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
75 PHY_INTERFACE_MODE_RMII,
76 PHY_INTERFACE_MODE_RGMII,
a999589c 77 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
78 PHY_INTERFACE_MODE_RGMII_RXID,
79 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
80 PHY_INTERFACE_MODE_RTBI,
81 PHY_INTERFACE_MODE_SMII,
898dd0bd 82 PHY_INTERFACE_MODE_XGMII,
fd70f72c 83 PHY_INTERFACE_MODE_MOCA,
b9d12085 84 PHY_INTERFACE_MODE_QSGMII,
572de608 85 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
86 PHY_INTERFACE_MODE_1000BASEX,
87 PHY_INTERFACE_MODE_2500BASEX,
88 PHY_INTERFACE_MODE_RXAUI,
c125ca09
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89 PHY_INTERFACE_MODE_XAUI,
90 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
91 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 92 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
93} phy_interface_t;
94
1f9127ca
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95/**
96 * phy_supported_speeds - return all speeds currently supported by a phy device
97 * @phy: The phy device to return supported speeds of.
98 * @speeds: buffer to store supported speeds in.
99 * @size: size of speeds buffer.
100 *
101 * Description: Returns the number of supported speeds, and
102 * fills the speeds * buffer with the supported speeds. If speeds buffer is
103 * too small to contain * all currently supported speeds, will return as
104 * many speeds as can fit.
105 */
106unsigned int phy_supported_speeds(struct phy_device *phy,
107 unsigned int *speeds,
108 unsigned int size);
109
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110/**
111 * It maps 'enum phy_interface_t' found in include/linux/phy.h
112 * into the device tree binding of 'phy-mode', so that Ethernet
113 * device driver can get phy interface from device tree.
114 */
115static inline const char *phy_modes(phy_interface_t interface)
116{
117 switch (interface) {
118 case PHY_INTERFACE_MODE_NA:
119 return "";
735d8a18
FF
120 case PHY_INTERFACE_MODE_INTERNAL:
121 return "internal";
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122 case PHY_INTERFACE_MODE_MII:
123 return "mii";
124 case PHY_INTERFACE_MODE_GMII:
125 return "gmii";
126 case PHY_INTERFACE_MODE_SGMII:
127 return "sgmii";
128 case PHY_INTERFACE_MODE_TBI:
129 return "tbi";
130 case PHY_INTERFACE_MODE_REVMII:
131 return "rev-mii";
132 case PHY_INTERFACE_MODE_RMII:
133 return "rmii";
134 case PHY_INTERFACE_MODE_RGMII:
135 return "rgmii";
136 case PHY_INTERFACE_MODE_RGMII_ID:
137 return "rgmii-id";
138 case PHY_INTERFACE_MODE_RGMII_RXID:
139 return "rgmii-rxid";
140 case PHY_INTERFACE_MODE_RGMII_TXID:
141 return "rgmii-txid";
142 case PHY_INTERFACE_MODE_RTBI:
143 return "rtbi";
144 case PHY_INTERFACE_MODE_SMII:
145 return "smii";
146 case PHY_INTERFACE_MODE_XGMII:
147 return "xgmii";
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148 case PHY_INTERFACE_MODE_MOCA:
149 return "moca";
b9d12085
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150 case PHY_INTERFACE_MODE_QSGMII:
151 return "qsgmii";
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152 case PHY_INTERFACE_MODE_TRGMII:
153 return "trgmii";
55601a88
AL
154 case PHY_INTERFACE_MODE_1000BASEX:
155 return "1000base-x";
156 case PHY_INTERFACE_MODE_2500BASEX:
157 return "2500base-x";
158 case PHY_INTERFACE_MODE_RXAUI:
159 return "rxaui";
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160 case PHY_INTERFACE_MODE_XAUI:
161 return "xaui";
162 case PHY_INTERFACE_MODE_10GKR:
163 return "10gbase-kr";
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FF
164 default:
165 return "unknown";
166 }
167}
168
00db8189 169
e8a2b6a4 170#define PHY_INIT_TIMEOUT 100000
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171#define PHY_STATE_TIME 1
172#define PHY_FORCE_TIMEOUT 10
173#define PHY_AN_TIMEOUT 10
174
e8a2b6a4 175#define PHY_MAX_ADDR 32
00db8189 176
a4d00f17 177/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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178#define PHY_ID_FMT "%s:%02x"
179
4567d686 180#define MII_BUS_ID_SIZE 61
a4d00f17 181
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JG
182/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
183 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
184#define MII_ADDR_C45 (1<<30)
185
313162d0 186struct device;
9525ae83 187struct phylink;
313162d0
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188struct sk_buff;
189
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190/*
191 * The Bus class for PHYs. Devices which provide access to
192 * PHYs should register using this structure
193 */
00db8189 194struct mii_bus {
3e3aaf64 195 struct module *owner;
00db8189 196 const char *name;
9d9326d3 197 char id[MII_BUS_ID_SIZE];
00db8189 198 void *priv;
ccaa953e
AL
199 int (*read)(struct mii_bus *bus, int addr, int regnum);
200 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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201 int (*reset)(struct mii_bus *bus);
202
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203 /*
204 * A lock to ensure that only one thing can read/write
205 * the MDIO bus at a time
206 */
35b5f6b1 207 struct mutex mdio_lock;
00db8189 208
18ee49dd 209 struct device *parent;
46abc021
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210 enum {
211 MDIOBUS_ALLOCATED = 1,
212 MDIOBUS_REGISTERED,
213 MDIOBUS_UNREGISTERED,
214 MDIOBUS_RELEASED,
215 } state;
216 struct device dev;
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217
218 /* list of all PHYs on bus */
7f854420 219 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 220
c6883996 221 /* PHY addresses to be ignored when probing */
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MP
222 u32 phy_mask;
223
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224 /* PHY addresses to ignore the TA/read failure */
225 u32 phy_ignore_ta_mask;
226
c5e38a94 227 /*
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228 * An array of interrupts, each PHY's interrupt at the index
229 * matching its address
c5e38a94 230 */
e7f4dc35 231 int irq[PHY_MAX_ADDR];
69226896
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232
233 /* GPIO reset pulse width in microseconds */
234 int reset_delay_us;
d396e84c
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235 /* RESET GPIO descriptor pointer */
236 struct gpio_desc *reset_gpiod;
00db8189 237};
46abc021 238#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 239
eb8a54a7
TT
240struct mii_bus *mdiobus_alloc_size(size_t);
241static inline struct mii_bus *mdiobus_alloc(void)
242{
243 return mdiobus_alloc_size(0);
244}
245
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246int __mdiobus_register(struct mii_bus *bus, struct module *owner);
247#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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LB
248void mdiobus_unregister(struct mii_bus *bus);
249void mdiobus_free(struct mii_bus *bus);
6d48f44b
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250struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
251static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
252{
253 return devm_mdiobus_alloc_size(dev, 0);
254}
255
256void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 257struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 258
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259#define PHY_INTERRUPT_DISABLED 0x0
260#define PHY_INTERRUPT_ENABLED 0x80000000
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261
262/* PHY state machine states:
263 *
264 * DOWN: PHY device and driver are not ready for anything. probe
265 * should be called if and only if the PHY is in this state,
266 * given that the PHY device exists.
267 * - PHY driver probe function will, depending on the PHY, set
268 * the state to STARTING or READY
269 *
270 * STARTING: PHY device is coming up, and the ethernet driver is
271 * not ready. PHY drivers may set this in the probe function.
272 * If they do, they are responsible for making sure the state is
273 * eventually set to indicate whether the PHY is UP or READY,
274 * depending on the state when the PHY is done starting up.
275 * - PHY driver will set the state to READY
276 * - start will set the state to PENDING
277 *
278 * READY: PHY is ready to send and receive packets, but the
279 * controller is not. By default, PHYs which do not implement
280 * probe will be set to this state by phy_probe(). If the PHY
281 * driver knows the PHY is ready, and the PHY state is STARTING,
282 * then it sets this STATE.
283 * - start will set the state to UP
284 *
285 * PENDING: PHY device is coming up, but the ethernet driver is
286 * ready. phy_start will set this state if the PHY state is
287 * STARTING.
288 * - PHY driver will set the state to UP when the PHY is ready
289 *
290 * UP: The PHY and attached device are ready to do work.
291 * Interrupts should be started here.
292 * - timer moves to AN
293 *
294 * AN: The PHY is currently negotiating the link state. Link is
295 * therefore down for now. phy_timer will set this state when it
296 * detects the state is UP. config_aneg will set this state
297 * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
298 * - If autonegotiation finishes, but there's no link, it sets
299 * the state to NOLINK.
300 * - If aneg finishes with link, it sets the state to RUNNING,
301 * and calls adjust_link
302 * - If autonegotiation did not finish after an arbitrary amount
303 * of time, autonegotiation should be tried again if the PHY
304 * supports "magic" autonegotiation (back to AN)
305 * - If it didn't finish, and no magic_aneg, move to FORCING.
306 *
307 * NOLINK: PHY is up, but not currently plugged in.
308 * - If the timer notes that the link comes back, we move to RUNNING
309 * - config_aneg moves to AN
310 * - phy_stop moves to HALTED
311 *
312 * FORCING: PHY is being configured with forced settings
313 * - if link is up, move to RUNNING
314 * - If link is down, we drop to the next highest setting, and
315 * retry (FORCING) after a timeout
316 * - phy_stop moves to HALTED
317 *
318 * RUNNING: PHY is currently up, running, and possibly sending
319 * and/or receiving packets
320 * - timer will set CHANGELINK if we're polling (this ensures the
321 * link state is polled every other cycle of this state machine,
322 * which makes it every other second)
323 * - irq will set CHANGELINK
324 * - config_aneg will set AN
325 * - phy_stop moves to HALTED
326 *
327 * CHANGELINK: PHY experienced a change in link state
328 * - timer moves to RUNNING if link
329 * - timer moves to NOLINK if the link is down
330 * - phy_stop moves to HALTED
331 *
332 * HALTED: PHY is up, but no polling or interrupts are done. Or
333 * PHY is in an error state.
334 *
335 * - phy_start moves to RESUMING
336 *
337 * RESUMING: PHY was halted, but now wants to run again.
338 * - If we are forcing, or aneg is done, timer moves to RUNNING
339 * - If aneg is not done, timer moves to AN
340 * - phy_stop moves to HALTED
341 */
342enum phy_state {
4017b4d3 343 PHY_DOWN = 0,
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AF
344 PHY_STARTING,
345 PHY_READY,
346 PHY_PENDING,
347 PHY_UP,
348 PHY_AN,
349 PHY_RUNNING,
350 PHY_NOLINK,
351 PHY_FORCING,
352 PHY_CHANGELINK,
353 PHY_HALTED,
354 PHY_RESUMING
355};
356
ac28b9f8
DD
357/**
358 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
359 * @devices_in_package: Bit vector of devices present.
360 * @device_ids: The device identifer for each present device.
361 */
362struct phy_c45_device_ids {
363 u32 devices_in_package;
364 u32 device_ids[8];
365};
c1f19b51 366
00db8189
AF
367/* phy_device: An instance of a PHY
368 *
369 * drv: Pointer to the driver for this PHY instance
00db8189 370 * phy_id: UID for this device found during discovery
ac28b9f8
DD
371 * c45_ids: 802.3-c45 Device Identifers if is_c45.
372 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 373 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 374 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 375 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 376 * suspended: Set to true if this phy has been suspended successfully.
a3995460 377 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 378 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
379 * state: state of the PHY for management purposes
380 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
381 * link_timeout: The number of timer firings to wait before the
382 * giving up on the current attempt at acquiring a link
383 * irq: IRQ number of the PHY's interrupt (-1 if none)
384 * phy_timer: The timer for handling the state machine
664fcf12 385 * phy_queue: A work_queue for the phy_mac_interrupt
00db8189
AF
386 * attached_dev: The attached enet driver's device instance ptr
387 * adjust_link: Callback for the enet controller to respond to
388 * changes in the link state.
00db8189 389 *
114002bc
FF
390 * speed, duplex, pause, supported, advertising, lp_advertising,
391 * and autoneg are used like in mii_if_info
00db8189
AF
392 *
393 * interrupts currently only supports enabled or disabled,
394 * but could be changed in the future to support enabling
395 * and disabling specific interrupts
396 *
397 * Contains some infrastructure for polling and interrupt
398 * handling, as well as handling shifts in PHY hardware state
399 */
400struct phy_device {
e5a03bfd
AL
401 struct mdio_device mdio;
402
00db8189
AF
403 /* Information about the PHY type */
404 /* And management functions */
405 struct phy_driver *drv;
406
00db8189
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407 u32 phy_id;
408
ac28b9f8 409 struct phy_c45_device_ids c45_ids;
87e5808d
HK
410 unsigned is_c45:1;
411 unsigned is_internal:1;
412 unsigned is_pseudo_fixed_link:1;
413 unsigned has_fixups:1;
414 unsigned suspended:1;
415 unsigned sysfs_links:1;
416 unsigned loopback_enabled:1;
417
418 unsigned autoneg:1;
419 /* The most recently read link state */
420 unsigned link:1;
ac28b9f8 421
00db8189
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422 enum phy_state state;
423
424 u32 dev_flags;
425
e8a2b6a4
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426 phy_interface_t interface;
427
c5e38a94
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428 /*
429 * forced speed & duplex (no autoneg)
00db8189
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430 * partner speed & duplex & pause (autoneg)
431 */
432 int speed;
433 int duplex;
434 int pause;
435 int asym_pause;
436
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AF
437 /* Enabled Interrupts */
438 u32 interrupts;
439
440 /* Union of PHY and Attached devices' supported modes */
441 /* See mii.h for more info */
442 u32 supported;
443 u32 advertising;
114002bc 444 u32 lp_advertising;
00db8189 445
d853d145 446 /* Energy efficient ethernet modes which should be prohibited */
447 u32 eee_broken_modes;
448
00db8189
AF
449 int link_timeout;
450
2e0bc452
ZB
451#ifdef CONFIG_LED_TRIGGER_PHY
452 struct phy_led_trigger *phy_led_triggers;
453 unsigned int phy_num_led_triggers;
454 struct phy_led_trigger *last_triggered;
3928ee64
MS
455
456 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
457#endif
458
c5e38a94
AF
459 /*
460 * Interrupt number for this PHY
461 * -1 means no interrupt
462 */
00db8189
AF
463 int irq;
464
465 /* private data pointer */
466 /* For use by PHYs to maintain extra state */
467 void *priv;
468
469 /* Interrupt and Polling infrastructure */
470 struct work_struct phy_queue;
a390d1f3 471 struct delayed_work state_queue;
00db8189 472
35b5f6b1 473 struct mutex lock;
00db8189 474
9525ae83 475 struct phylink *phylink;
00db8189
AF
476 struct net_device *attached_dev;
477
634ec36c 478 u8 mdix;
f4ed2fe3 479 u8 mdix_ctrl;
634ec36c 480
a81497be 481 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 482 void (*adjust_link)(struct net_device *dev);
00db8189 483};
e5a03bfd
AL
484#define to_phy_device(d) container_of(to_mdio_device(d), \
485 struct phy_device, mdio)
00db8189
AF
486
487/* struct phy_driver: Driver structure for a particular PHY type
488 *
a9049e0c 489 * driver_data: static driver data
00db8189
AF
490 * phy_id: The result of reading the UID registers of this PHY
491 * type, and ANDing them with the phy_id_mask. This driver
492 * only works for PHYs with IDs which match this field
493 * name: The friendly name of this PHY type
494 * phy_id_mask: Defines the important bits of the phy_id
495 * features: A list of features (speed, duplex, etc) supported
496 * by this PHY
497 * flags: A bitfield defining certain other features this PHY
498 * supports (like interrupts)
499 *
00fde795
HK
500 * All functions are optional. If config_aneg or read_status
501 * are not implemented, the phy core uses the genphy versions.
502 * Note that none of these functions should be called from
503 * interrupt time. The goal is for the bus read/write functions
504 * to be able to block when the bus transaction is happening,
505 * and be freed up by an interrupt (The MPC85xx has this ability,
506 * though it is not currently supported in the driver).
00db8189
AF
507 */
508struct phy_driver {
a9049e0c 509 struct mdio_driver_common mdiodrv;
00db8189
AF
510 u32 phy_id;
511 char *name;
511e3036 512 u32 phy_id_mask;
00db8189
AF
513 u32 features;
514 u32 flags;
860f6e9e 515 const void *driver_data;
00db8189 516
c5e38a94 517 /*
9df81dd7
FF
518 * Called to issue a PHY software reset
519 */
520 int (*soft_reset)(struct phy_device *phydev);
521
522 /*
c5e38a94
AF
523 * Called to initialize the PHY,
524 * including after a reset
525 */
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AF
526 int (*config_init)(struct phy_device *phydev);
527
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AF
528 /*
529 * Called during discovery. Used to set
530 * up device-specific structures, if any
531 */
00db8189
AF
532 int (*probe)(struct phy_device *phydev);
533
534 /* PHY Power Management */
535 int (*suspend)(struct phy_device *phydev);
536 int (*resume)(struct phy_device *phydev);
537
c5e38a94
AF
538 /*
539 * Configures the advertisement and resets
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AF
540 * autonegotiation if phydev->autoneg is on,
541 * forces the speed to the current settings in phydev
c5e38a94
AF
542 * if phydev->autoneg is off
543 */
00db8189
AF
544 int (*config_aneg)(struct phy_device *phydev);
545
76a423a3
FF
546 /* Determines the auto negotiation result */
547 int (*aneg_done)(struct phy_device *phydev);
548
00db8189
AF
549 /* Determines the negotiated speed and duplex */
550 int (*read_status)(struct phy_device *phydev);
551
552 /* Clears any pending interrupts */
553 int (*ack_interrupt)(struct phy_device *phydev);
554
555 /* Enables or disables interrupts */
556 int (*config_intr)(struct phy_device *phydev);
557
a8729eb3
AG
558 /*
559 * Checks if the PHY generated an interrupt.
560 * For multi-PHY devices with shared PHY interrupt pin
561 */
562 int (*did_interrupt)(struct phy_device *phydev);
563
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AF
564 /* Clears up any memory if needed */
565 void (*remove)(struct phy_device *phydev);
566
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DD
567 /* Returns true if this is a suitable driver for the given
568 * phydev. If NULL, matching is based on phy_id and
569 * phy_id_mask.
570 */
571 int (*match_phy_device)(struct phy_device *phydev);
572
c8f3a8c3
RC
573 /* Handles ethtool queries for hardware time stamping. */
574 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
575
c1f19b51
RC
576 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
577 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
578
579 /*
580 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
581 * the phy driver promises to deliver it using netif_rx() as
582 * soon as a timestamp becomes available. One of the
583 * PTP_CLASS_ values is passed in 'type'. The function must
584 * return true if the skb is accepted for delivery.
585 */
586 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
587
588 /*
589 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 590 * to deliver it using skb_complete_tx_timestamp() as soon as a
c1f19b51
RC
591 * timestamp becomes available. One of the PTP_CLASS_ values
592 * is passed in 'type'.
593 */
594 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
595
42e836eb
MS
596 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
597 * enable Wake on LAN, so set_wol is provided to be called in the
598 * ethernet driver's set_wol function. */
599 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
600
601 /* See set_wol, but for checking whether Wake on LAN is enabled. */
602 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
603
2b8f2a28
DM
604 /*
605 * Called to inform a PHY device driver when the core is about to
606 * change the link state. This callback is supposed to be used as
607 * fixup hook for drivers that need to take action when the link
608 * state changes. Drivers are by no means allowed to mess with the
609 * PHY device structure in their implementations.
610 */
611 void (*link_change_notify)(struct phy_device *dev);
612
1ee6b9bc
RK
613 /*
614 * Phy specific driver override for reading a MMD register.
615 * This function is optional for PHY specific drivers. When
616 * not provided, the default MMD read function will be used
617 * by phy_read_mmd(), which will use either a direct read for
618 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
619 * devnum is the MMD device number within the PHY device,
620 * regnum is the register within the selected MMD device.
621 */
622 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
623
624 /*
625 * Phy specific driver override for writing a MMD register.
626 * This function is optional for PHY specific drivers. When
627 * not provided, the default MMD write function will be used
628 * by phy_write_mmd(), which will use either a direct write for
629 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
630 * devnum is the MMD device number within the PHY device,
631 * regnum is the register within the selected MMD device.
632 * val is the value to be written.
633 */
634 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
635 u16 val);
636
78ffc4ac
RK
637 int (*read_page)(struct phy_device *dev);
638 int (*write_page)(struct phy_device *dev, int page);
639
2f438366
ES
640 /* Get the size and type of the eeprom contained within a plug-in
641 * module */
642 int (*module_info)(struct phy_device *dev,
643 struct ethtool_modinfo *modinfo);
644
645 /* Get the eeprom information from the plug-in module */
646 int (*module_eeprom)(struct phy_device *dev,
647 struct ethtool_eeprom *ee, u8 *data);
648
f3a40945
AL
649 /* Get statistics from the phy using ethtool */
650 int (*get_sset_count)(struct phy_device *dev);
651 void (*get_strings)(struct phy_device *dev, u8 *data);
652 void (*get_stats)(struct phy_device *dev,
653 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
654
655 /* Get and Set PHY tunables */
656 int (*get_tunable)(struct phy_device *dev,
657 struct ethtool_tunable *tuna, void *data);
658 int (*set_tunable)(struct phy_device *dev,
659 struct ethtool_tunable *tuna,
660 const void *data);
f0f9b4ed 661 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 662};
a9049e0c
AL
663#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
664 struct phy_driver, mdiodrv)
00db8189 665
f62220d3
AF
666#define PHY_ANY_ID "MATCH ANY PHY"
667#define PHY_ANY_UID 0xffffffff
668
669/* A Structure for boards to register fixups with the PHY Lib */
670struct phy_fixup {
671 struct list_head list;
4567d686 672 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
673 u32 phy_uid;
674 u32 phy_uid_mask;
675 int (*run)(struct phy_device *phydev);
676};
677
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RK
678const char *phy_speed_to_str(int speed);
679const char *phy_duplex_to_str(unsigned int duplex);
680
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RK
681/* A structure for mapping a particular speed and duplex
682 * combination to a particular SUPPORTED and ADVERTISED value
683 */
684struct phy_setting {
685 u32 speed;
686 u8 duplex;
687 u8 bit;
688};
689
690const struct phy_setting *
691phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
692 size_t maxbit, bool exact);
693size_t phy_speeds(unsigned int *speeds, size_t size,
694 unsigned long *mask, size_t maxbit);
695
8c5e850c
RK
696void phy_resolve_aneg_linkmode(struct phy_device *phydev);
697
efabdfb9
AF
698/**
699 * phy_read_mmd - Convenience function for reading a register
700 * from an MMD on a given PHY.
701 * @phydev: The phy_device struct
702 * @devad: The MMD to read from
703 * @regnum: The register on the MMD to read
704 *
705 * Same rules as for phy_read();
706 */
9860118b 707int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 708
2e888103
LB
709/**
710 * phy_read - Convenience function for reading a given PHY register
711 * @phydev: the phy_device struct
712 * @regnum: register number to read
713 *
714 * NOTE: MUST NOT be called from interrupt context,
715 * because the bus read/write functions may wait for an interrupt
716 * to conclude the operation.
717 */
abf35df2 718static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 719{
e5a03bfd 720 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
721}
722
788f9933
RK
723/**
724 * __phy_read - convenience function for reading a given PHY register
725 * @phydev: the phy_device struct
726 * @regnum: register number to read
727 *
728 * The caller must have taken the MDIO bus lock.
729 */
730static inline int __phy_read(struct phy_device *phydev, u32 regnum)
731{
732 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
733}
734
2e888103
LB
735/**
736 * phy_write - Convenience function for writing a given PHY register
737 * @phydev: the phy_device struct
738 * @regnum: register number to write
739 * @val: value to write to @regnum
740 *
741 * NOTE: MUST NOT be called from interrupt context,
742 * because the bus read/write functions may wait for an interrupt
743 * to conclude the operation.
744 */
abf35df2 745static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 746{
e5a03bfd 747 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
748}
749
788f9933
RK
750/**
751 * __phy_write - Convenience function for writing a given PHY register
752 * @phydev: the phy_device struct
753 * @regnum: register number to write
754 * @val: value to write to @regnum
755 *
756 * The caller must have taken the MDIO bus lock.
757 */
758static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
759{
760 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
761 val);
762}
763
764int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 765int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 766
ac8322d8
HK
767/**
768 * __phy_set_bits - Convenience function for setting bits in a PHY register
769 * @phydev: the phy_device struct
770 * @regnum: register number to write
771 * @val: bits to set
772 *
773 * The caller must have taken the MDIO bus lock.
774 */
775static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
776{
777 return __phy_modify(phydev, regnum, 0, val);
778}
779
780/**
781 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
782 * @phydev: the phy_device struct
783 * @regnum: register number to write
784 * @val: bits to clear
785 *
786 * The caller must have taken the MDIO bus lock.
787 */
788static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
789 u16 val)
790{
791 return __phy_modify(phydev, regnum, val, 0);
792}
793
794/**
795 * phy_set_bits - Convenience function for setting bits in a PHY register
796 * @phydev: the phy_device struct
797 * @regnum: register number to write
798 * @val: bits to set
799 */
800static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
801{
802 return phy_modify(phydev, regnum, 0, val);
803}
804
805/**
806 * phy_clear_bits - Convenience function for clearing bits in a PHY register
807 * @phydev: the phy_device struct
808 * @regnum: register number to write
809 * @val: bits to clear
810 */
811static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
812{
813 return phy_modify(phydev, regnum, val, 0);
814}
815
2c7b4921
FF
816/**
817 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
818 * @phydev: the phy_device struct
819 *
820 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
821 * PHY_IGNORE_INTERRUPT
822 */
823static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
824{
825 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
826}
827
3c507b8a
HK
828/**
829 * phy_polling_mode - Convenience function for testing whether polling is
830 * used to detect PHY status changes
831 * @phydev: the phy_device struct
832 */
833static inline bool phy_polling_mode(struct phy_device *phydev)
834{
835 return phydev->irq == PHY_POLL;
836}
837
4284b6a5
FF
838/**
839 * phy_is_internal - Convenience function for testing if a PHY is internal
840 * @phydev: the phy_device struct
841 */
842static inline bool phy_is_internal(struct phy_device *phydev)
843{
844 return phydev->is_internal;
845}
846
32d0f783
IS
847/**
848 * phy_interface_mode_is_rgmii - Convenience function for testing if a
849 * PHY interface mode is RGMII (all variants)
850 * @mode: the phy_interface_t enum
851 */
852static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
853{
854 return mode >= PHY_INTERFACE_MODE_RGMII &&
855 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
856};
857
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RK
858/**
859 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
860 * negotiation
861 * @mode: one of &enum phy_interface_t
862 *
863 * Returns true if the phy interface mode uses the 16-bit negotiation
864 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
865 */
866static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
867{
868 return mode == PHY_INTERFACE_MODE_1000BASEX ||
869 mode == PHY_INTERFACE_MODE_2500BASEX;
870}
871
e463d88c
FF
872/**
873 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
874 * is RGMII (all variants)
875 * @phydev: the phy_device struct
876 */
877static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
878{
32d0f783 879 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
880};
881
882/*
883 * phy_is_pseudo_fixed_link - Convenience function for testing if this
884 * PHY is the CPU port facing side of an Ethernet switch, or similar.
885 * @phydev: the phy_device struct
886 */
887static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
888{
889 return phydev->is_pseudo_fixed_link;
e463d88c
FF
890}
891
efabdfb9
AF
892/**
893 * phy_write_mmd - Convenience function for writing a register
894 * on an MMD on a given PHY.
895 * @phydev: The phy_device struct
896 * @devad: The MMD to read from
897 * @regnum: The register on the MMD to read
898 * @val: value to write to @regnum
899 *
900 * Same rules as for phy_write();
901 */
9860118b 902int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 903
78ffc4ac
RK
904int phy_save_page(struct phy_device *phydev);
905int phy_select_page(struct phy_device *phydev, int page);
906int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
907int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
908int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
909int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
910 u16 mask, u16 set);
911
ac28b9f8 912struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
913 bool is_c45,
914 struct phy_c45_device_ids *c45_ids);
90eff909 915#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 916struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 917int phy_device_register(struct phy_device *phy);
90eff909
FF
918void phy_device_free(struct phy_device *phydev);
919#else
920static inline
921struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
922{
923 return NULL;
924}
925
926static inline int phy_device_register(struct phy_device *phy)
927{
928 return 0;
929}
930
931static inline void phy_device_free(struct phy_device *phydev) { }
932#endif /* CONFIG_PHYLIB */
38737e49 933void phy_device_remove(struct phy_device *phydev);
2f5cb434 934int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
935int phy_suspend(struct phy_device *phydev);
936int phy_resume(struct phy_device *phydev);
9c2c2e62 937int __phy_resume(struct phy_device *phydev);
f0f9b4ed 938int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
939struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
940 phy_interface_t interface);
f8f76db1 941struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
942int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
943 u32 flags, phy_interface_t interface);
fa94f6d9 944int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
945 void (*handler)(struct net_device *),
946 phy_interface_t interface);
947struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
948 void (*handler)(struct net_device *),
949 phy_interface_t interface);
e1393456
AF
950void phy_disconnect(struct phy_device *phydev);
951void phy_detach(struct phy_device *phydev);
952void phy_start(struct phy_device *phydev);
953void phy_stop(struct phy_device *phydev);
954int phy_start_aneg(struct phy_device *phydev);
372788f9 955int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
956int phy_speed_down(struct phy_device *phydev, bool sync);
957int phy_speed_up(struct phy_device *phydev);
e1393456 958
e1393456 959int phy_stop_interrupts(struct phy_device *phydev);
002ba705 960int phy_restart_aneg(struct phy_device *phydev);
a9668491 961int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 962
bafbdd52
SS
963static inline void phy_device_reset(struct phy_device *phydev, int value)
964{
965 mdio_device_reset(&phydev->mdio, value);
966}
967
72ba48be 968#define phydev_err(_phydev, format, args...) \
e5a03bfd 969 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be
AL
970
971#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 972 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 973
84eff6d1
AL
974static inline const char *phydev_name(const struct phy_device *phydev)
975{
e5a03bfd 976 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
977}
978
2220943a
AL
979void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
980 __printf(2, 3);
981void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
982
983/* Clause 22 PHY */
af6b6967 984int genphy_config_init(struct phy_device *phydev);
3fb69bca 985int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
986int genphy_restart_aneg(struct phy_device *phydev);
987int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 988int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
989int genphy_update_link(struct phy_device *phydev);
990int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
991int genphy_suspend(struct phy_device *phydev);
992int genphy_resume(struct phy_device *phydev);
f0f9b4ed 993int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 994int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
995static inline int genphy_no_soft_reset(struct phy_device *phydev)
996{
997 return 0;
998}
5df7af85
KH
999int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1000 u16 regnum);
1001int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1002 u16 regnum, u16 val);
5acde34a
RK
1003
1004/* Clause 45 PHY */
1005int genphy_c45_restart_aneg(struct phy_device *phydev);
1006int genphy_c45_aneg_done(struct phy_device *phydev);
1007int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
1008int genphy_c45_read_lpa(struct phy_device *phydev);
1009int genphy_c45_read_pma(struct phy_device *phydev);
1010int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1011int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1012int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 1013
e8a714e0
FF
1014/* The gen10g_* functions are the old Clause 45 stub */
1015int gen10g_config_aneg(struct phy_device *phydev);
1016int gen10g_read_status(struct phy_device *phydev);
1017int gen10g_no_soft_reset(struct phy_device *phydev);
1018int gen10g_config_init(struct phy_device *phydev);
1019int gen10g_suspend(struct phy_device *phydev);
1020int gen10g_resume(struct phy_device *phydev);
1021
00fde795
HK
1022static inline int phy_read_status(struct phy_device *phydev)
1023{
1024 if (!phydev->drv)
1025 return -EIO;
1026
1027 if (phydev->drv->read_status)
1028 return phydev->drv->read_status(phydev);
1029 else
1030 return genphy_read_status(phydev);
1031}
1032
00db8189 1033void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1034void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1035int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1036int phy_drivers_register(struct phy_driver *new_driver, int n,
1037 struct module *owner);
4f9c85a1 1038void phy_state_machine(struct work_struct *work);
664fcf12 1039void phy_change_work(struct work_struct *work);
28b2e0d2 1040void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1041void phy_start_machine(struct phy_device *phydev);
00db8189 1042void phy_stop_machine(struct phy_device *phydev);
f555f34f 1043void phy_trigger_machine(struct phy_device *phydev, bool sync);
00db8189 1044int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1045void phy_ethtool_ksettings_get(struct phy_device *phydev,
1046 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1047int phy_ethtool_ksettings_set(struct phy_device *phydev,
1048 const struct ethtool_link_ksettings *cmd);
4017b4d3 1049int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
1050int phy_start_interrupts(struct phy_device *phydev);
1051void phy_print_status(struct phy_device *phydev);
f3a6bd39 1052int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1053void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
c306ad36 1054void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1055void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1056void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1057 bool autoneg);
70814e81 1058void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1059bool phy_validate_pause(struct phy_device *phydev,
1060 struct ethtool_pauseparam *pp);
00db8189 1061
f62220d3 1062int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1063 int (*run)(struct phy_device *));
f62220d3 1064int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1065 int (*run)(struct phy_device *));
f62220d3 1066int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1067 int (*run)(struct phy_device *));
f62220d3 1068
f38e7a32
WH
1069int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1070int phy_unregister_fixup_for_id(const char *bus_id);
1071int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1072
a59a4d19
GC
1073int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1074int phy_get_eee_err(struct phy_device *phydev);
1075int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1076int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1077int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1078void phy_ethtool_get_wol(struct phy_device *phydev,
1079 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1080int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1081 struct ethtool_link_ksettings *cmd);
1082int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1083 const struct ethtool_link_ksettings *cmd);
e86a8987 1084int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1085
90eff909 1086#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
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1087int __init mdio_bus_init(void);
1088void mdio_bus_exit(void);
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1089#endif
1090
1091/* Inline function for use within net/core/ethtool.c (built-in) */
1092static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1093{
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1094 if (!phydev->drv)
1095 return -EIO;
1096
1097 mutex_lock(&phydev->lock);
1098 phydev->drv->get_strings(phydev, data);
1099 mutex_unlock(&phydev->lock);
1100
1101 return 0;
c59530d0
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1102}
1103
9e8d438e 1104static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1105{
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1106 int ret;
1107
1108 if (!phydev->drv)
1109 return -EIO;
1110
1111 if (phydev->drv->get_sset_count &&
1112 phydev->drv->get_strings &&
1113 phydev->drv->get_stats) {
1114 mutex_lock(&phydev->lock);
1115 ret = phydev->drv->get_sset_count(phydev);
1116 mutex_unlock(&phydev->lock);
1117
1118 return ret;
1119 }
1120
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1121 return -EOPNOTSUPP;
1122}
1123
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1124static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1125 struct ethtool_stats *stats, u64 *data)
c59530d0 1126{
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1127 if (!phydev->drv)
1128 return -EIO;
1129
1130 mutex_lock(&phydev->lock);
1131 phydev->drv->get_stats(phydev, stats, data);
1132 mutex_unlock(&phydev->lock);
1133
1134 return 0;
c59530d0 1135}
9b9a8bfc 1136
00db8189 1137extern struct bus_type mdio_bus_type;
c31accd1 1138
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1139struct mdio_board_info {
1140 const char *bus_id;
1141 char modalias[MDIO_NAME_SIZE];
1142 int mdio_addr;
1143 const void *platform_data;
1144};
1145
90eff909 1146#if IS_ENABLED(CONFIG_MDIO_DEVICE)
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1147int mdiobus_register_board_info(const struct mdio_board_info *info,
1148 unsigned int n);
1149#else
1150static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1151 unsigned int n)
1152{
1153 return 0;
1154}
1155#endif
1156
1157
c31accd1
JH
1158/**
1159 * module_phy_driver() - Helper macro for registering PHY drivers
1160 * @__phy_drivers: array of PHY drivers to register
1161 *
1162 * Helper macro for PHY drivers which do not do anything special in module
1163 * init/exit. Each module may only use this macro once, and calling it
1164 * replaces module_init() and module_exit().
1165 */
1166#define phy_module_driver(__phy_drivers, __count) \
1167static int __init phy_module_init(void) \
1168{ \
be01da72 1169 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
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1170} \
1171module_init(phy_module_init); \
1172static void __exit phy_module_exit(void) \
1173{ \
1174 phy_drivers_unregister(__phy_drivers, __count); \
1175} \
1176module_exit(phy_module_exit)
1177
1178#define module_phy_driver(__phy_drivers) \
1179 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1180
00db8189 1181#endif /* __PHY_H */